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-rw-r--r--board/compulab/cl-som-am57x/Kconfig12
-rw-r--r--board/compulab/cl-som-am57x/MAINTAINERS6
-rw-r--r--board/compulab/cl-som-am57x/Makefile17
-rw-r--r--board/compulab/cl-som-am57x/cl-som-am57x.c78
-rw-r--r--board/compulab/cl-som-am57x/eth.c198
-rw-r--r--board/compulab/cl-som-am57x/mux.c123
-rw-r--r--board/compulab/cl-som-am57x/spl.c238
-rw-r--r--board/sunxi/Makefile3
-rw-r--r--board/sunxi/ahci.c134
-rw-r--r--board/sunxi/gmac.c8
-rw-r--r--board/synopsys/axs10x/axs10x.c29
-rw-r--r--board/synopsys/hsdk/hsdk.c41
-rw-r--r--board/xilinx/zynq/cmds.c9
-rw-r--r--board/xilinx/zynqmp/zynqmp.c20
14 files changed, 28 insertions, 888 deletions
diff --git a/board/compulab/cl-som-am57x/Kconfig b/board/compulab/cl-som-am57x/Kconfig
deleted file mode 100644
index 85fc9a1fdbd..00000000000
--- a/board/compulab/cl-som-am57x/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CL_SOM_AM57X
-
-config SYS_BOARD
- default "cl-som-am57x"
-
-config SYS_VENDOR
- default "compulab"
-
-config SYS_CONFIG_NAME
- default "cl-som-am57x"
-
-endif
diff --git a/board/compulab/cl-som-am57x/MAINTAINERS b/board/compulab/cl-som-am57x/MAINTAINERS
deleted file mode 100644
index e0195f46106..00000000000
--- a/board/compulab/cl-som-am57x/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CL-SOM-AM57x BOARD
-M: Uri Mashiach <uri.mashiach@compulab.co.il>
-S: Maintained
-F: board/compulab/cl-som-am57x/
-F: include/configs/cl-som-am57x.h
-F: configs/cl-som-am57x_defconfig
diff --git a/board/compulab/cl-som-am57x/Makefile b/board/compulab/cl-som-am57x/Makefile
deleted file mode 100644
index 566366bf6e3..00000000000
--- a/board/compulab/cl-som-am57x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Makefile
-#
-# (C) Copyright 2016 CompuLab, Ltd. <www.compulab.co.il>
-#
-# Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-ifdef CONFIG_SPL_BUILD
-obj-y += spl.o mux.o
-else
-obj-y += cl-som-am57x.o mux.o
-endif
-
-obj-$(CONFIG_DRIVER_TI_CPSW) += eth.o
diff --git a/board/compulab/cl-som-am57x/cl-som-am57x.c b/board/compulab/cl-som-am57x/cl-som-am57x.c
deleted file mode 100644
index fcba2a0e2ad..00000000000
--- a/board/compulab/cl-som-am57x/cl-som-am57x.c
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Board functions for CompuLab cl_som_am57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#include <common.h>
-#include <palmas.h>
-#include <usb.h>
-#include <asm/gpio.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/common.h"
-#include "../common/eeprom.h"
-#include <asm/omap_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct omap_sysinfo sysinfo = {
- "Board: CL-SOM-AM57x\n"
-};
-
-int board_init(void)
-{
- /* Disable PMIC Powerhold feature, DEV_CTRL.DEV_ON = 1 */
- palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
-
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
- return 0;
-}
-
-#ifdef CONFIG_MMC
-#define SB_SOM_CD_GPIO 187
-#define SB_SOM_WP_GPIO 188
-
-int board_mmc_init(bd_t *bis)
-{
- int ret0, ret1;
-
- ret0 = omap_mmc_init(0, 0, 0, SB_SOM_CD_GPIO, SB_SOM_WP_GPIO);
- if (ret0)
- printf("cl-som-am57x: failed to initialize mmc0\n");
-
- ret1 = omap_mmc_init(1, 0, 0, -1, -1);
- if (ret1)
- printf("cl-som-am57x: failed to initialize mmc1\n");
-
- return ret0 && ret1;
-}
-#endif /* CONFIG_MMC */
-
-int misc_init_r(void)
-{
- cl_print_pcb_info();
-
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- enable_usb_clocks(index);
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- disable_usb_clocks(index);
- return 0;
-}
diff --git a/board/compulab/cl-som-am57x/eth.c b/board/compulab/cl-som-am57x/eth.c
deleted file mode 100644
index 3c594573411..00000000000
--- a/board/compulab/cl-som-am57x/eth.c
+++ /dev/null
@@ -1,198 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Ethernet specific code for CompuLab CL-SOM-AM57x module
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <common.h>
-#include <cpsw.h>
-#include <environment.h>
-#include <miiphy.h>
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include "../common/eeprom.h"
-
-static void cpsw_control(int enabled)
-{
- /* VTP can be added here */
-}
-
-static struct cpsw_slave_data cl_som_am57x_cpsw_slaves[] = {
- {
- .slave_reg_ofs = 0x208,
- .sliver_reg_ofs = 0xd80,
- .phy_addr = 0,
- .phy_if = PHY_INTERFACE_MODE_RMII,
- },
- {
- .slave_reg_ofs = 0x308,
- .sliver_reg_ofs = 0xdc0,
- .phy_addr = 1,
- .phy_if = PHY_INTERFACE_MODE_RMII,
-
- },
-};
-
-static struct cpsw_platform_data cl_som_am57_cpsw_data = {
- .mdio_base = CPSW_MDIO_BASE,
- .cpsw_base = CPSW_BASE,
- .mdio_div = 0xff,
- .channels = 8,
- .cpdma_reg_ofs = 0x800,
- .slaves = 2,
- .slave_data = cl_som_am57x_cpsw_slaves,
- .ale_reg_ofs = 0xd00,
- .ale_entries = 1024,
- .host_port_reg_ofs = 0x108,
- .hw_stats_reg_ofs = 0x900,
- .bd_ram_ofs = 0x2000,
- .mac_control = (1 << 5),
- .control = cpsw_control,
- .host_port_num = 0,
- .version = CPSW_CTRL_VERSION_2,
-};
-
-/*
- * cl_som_am57x_efuse_read_mac_addr() - read Ethernet port MAC address.
- * The information is retrieved from the SOC's registers.
- * @buff: read buffer.
- * @port_num: port number.
- */
-static void cl_som_am57x_efuse_read_mac_addr(uchar *buff, uint port_num)
-{
- uint32_t mac_hi, mac_lo;
-
- if (port_num) {
- mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
- mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
- } else {
- mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
- mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
- }
-
- buff[0] = (mac_hi & 0xFF0000) >> 16;
- buff[1] = (mac_hi & 0xFF00) >> 8;
- buff[2] = mac_hi & 0xFF;
- buff[3] = (mac_lo & 0xFF0000) >> 16;
- buff[4] = (mac_lo & 0xFF00) >> 8;
- buff[5] = mac_lo & 0xFF;
-}
-
-/*
- * cl_som_am57x_handle_mac_address() - set MAC address in the U-Boot
- * environment.
- * The address is retrieved retrieved from an EEPROM field or from the
- * SOC's registers.
- * @env_name: U-Boot environment name.
- * @field_name: EEPROM field name.
- * @port_num: SOC's port number.
- */
-static int cl_som_am57x_handle_mac_address(char *env_name, uint port_num)
-{
- int ret;
- uint8_t enetaddr[6];
-
- ret = eth_env_get_enetaddr(env_name, enetaddr);
- if (ret)
- return 0;
-
- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
-
- if (ret || !is_valid_ethaddr(enetaddr))
- cl_som_am57x_efuse_read_mac_addr(enetaddr, port_num);
-
- if (!is_valid_ethaddr(enetaddr))
- return -1;
-
- ret = eth_env_set_enetaddr(env_name, enetaddr);
- if (ret)
- printf("cl-som-am57x: Failed to set Eth port %d MAC address\n",
- port_num);
-
- return ret;
-}
-
-#define CL_SOM_AM57X_PHY_ADDR2 0x01
-#define AR8033_PHY_DEBUG_ADDR_REG 0x1d
-#define AR8033_PHY_DEBUG_DATA_REG 0x1e
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_REG 0x00
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_REG 0x05
-#define AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK (1 << 15)
-#define AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK (1 << 8)
-
-/*
- * cl_som_am57x_rgmii_clk_delay() - Set RGMII clock delay.
- * Enable RX delay, disable TX delay.
- */
-static void cl_som_am57x_rgmii_clk_delay(void)
-{
- uint16_t mii_reg_val;
- const char *devname;
-
- devname = miiphy_get_current_dev();
- /* PHY 2 */
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
- AR8033_DEBUG_RGMII_RX_CLK_DLY_REG);
- miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- &mii_reg_val);
- mii_reg_val |= AR8033_DEBUG_RGMII_RX_CLK_DLY_MASK;
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- mii_reg_val);
-
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG,
- AR8033_DEBUG_RGMII_TX_CLK_DLY_REG);
- miiphy_read(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- &mii_reg_val);
- mii_reg_val &= ~AR8033_DEBUG_RGMII_TX_CLK_DLY_MASK;
- miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG,
- mii_reg_val);
-}
-
-#define CL_SOM_AM57X_GPIO_PHY1_RST 92 /* GPIO3_28 */
-#define CL_SOM_AM57X_RGMII_PORT1 1
-
-int board_eth_init(bd_t *bis)
-{
- int ret;
- uint32_t ctrl_val;
- char *cpsw_phy_envval;
- int cpsw_act_phy = 1;
-
- /* SB-SOM-AM57x primary Eth (P21) is routed to RGMII1 */
- ret = cl_som_am57x_handle_mac_address("ethaddr",
- CL_SOM_AM57X_RGMII_PORT1);
-
- if (ret)
- return -1;
-
- /* Select RGMII for GMII1_SEL */
- ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
- ctrl_val |= 0x22;
- writel(ctrl_val, (*ctrl)->control_core_control_io1);
- mdelay(10);
-
- gpio_request(CL_SOM_AM57X_GPIO_PHY1_RST, "phy1_rst");
- gpio_direction_output(CL_SOM_AM57X_GPIO_PHY1_RST, 0);
- mdelay(20);
-
- gpio_set_value(CL_SOM_AM57X_GPIO_PHY1_RST, 1);
- mdelay(20);
-
- cpsw_phy_envval = env_get("cpsw_phy");
- if (cpsw_phy_envval != NULL)
- cpsw_act_phy = simple_strtoul(cpsw_phy_envval, NULL, 0);
-
- cl_som_am57_cpsw_data.active_slave = cpsw_act_phy;
-
- ret = cpsw_register(&cl_som_am57_cpsw_data);
- if (ret < 0)
- printf("Error %d registering CPSW switch\n", ret);
-
- /* Set RGMII clock delay */
- cl_som_am57x_rgmii_clk_delay();
-
- return ret;
-}
diff --git a/board/compulab/cl-som-am57x/mux.c b/board/compulab/cl-som-am57x/mux.c
deleted file mode 100644
index 050f2aa3ef1..00000000000
--- a/board/compulab/cl-som-am57x/mux.c
+++ /dev/null
@@ -1,123 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Pinmux configuration for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mux_dra7xx.h>
-
-/* Serial console */
-static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
- {UART3_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_RXD */
- {UART3_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_TXD */
-};
-
-/* PMIC I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
- {MCASP1_ACLKR, (M10 | PIN_INPUT)}, /* MCASP1_ACLKR.I2C4_SDA */
- {MCASP1_FSR, (M10 | PIN_INPUT)}, /* MCASP1_FSR.I2C4_SCL */
-};
-
-/* Green GPIO led */
-static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
- {GPMC_A15, (M14 | PIN_OUTPUT_PULLDOWN)}, /* GPMC_A15.GPIO2_5 */
-};
-
-/* MMC/SD Card */
-static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
- {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CLK */
- {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CMD */
- {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT0 */
- {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT1 */
- {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT2 */
- {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT3 */
- {MMC1_SDCD, (M14 | PIN_INPUT) }, /* MMC1_SDCD */
- {MMC1_SDWP, (M14 | PIN_INPUT) }, /* MMC1_SDWP */
-};
-
-/* WiFi - must be in the safe mode on boot */
-static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
- {UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_CTSN */
- {UART1_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_RTSN */
- {UART2_RXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RXD */
- {UART2_TXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_TXD */
- {UART2_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_CTSN */
- {UART2_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RTSN */
-};
-
-/* QSPI */
-static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
- {GPMC_A13, (M1 | PIN_INPUT) }, /* GPMC_A13.QSPI1_RTCLK */
- {GPMC_A18, (M1 | PIN_INPUT) }, /* GPMC_A18.QSPI1_SCLK */
- {GPMC_A16, (M1 | PIN_INPUT) }, /* GPMC_A16.QSPI1_D0 */
- {GPMC_A17, (M1 | PIN_INPUT) }, /* GPMC_A17.QSPI1_D1 */
- {GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS2.QSPI1_CS0 */
-};
-
-/* GPIO Expander I2C */
-static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
- {MCASP1_AXR0, (M10 | PIN_INPUT)}, /* MCASP1_AXR0.I2C5_SDA */
- {MCASP1_AXR1, (M10 | PIN_INPUT)}, /* MCASP1_AXR1.I2C5_SCL */
-};
-
-/* eMMC internal storage */
-static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
- {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A19.MMC2_DAT4 */
- {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A20.MMC2_DAT5 */
- {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A21.MMC2_DAT6 */
- {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A22.MMC2_DAT7 */
- {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A23.MMC2_CLK */
- {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A24.MMC2_DAT0 */
- {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A25.MMC2_DAT1 */
- {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A26.MMC2_DAT2 */
- {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A27.MMC2_DAT3 */
- {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS1.MMC2_CMD */
-};
-
-/* usb1_drvvbus */
-static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
- /* USB1_DRVVBUS.USB1_DRVVBUS */
- {USB1_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL) },
-};
-
-/* Ethernet */
-static const struct pad_conf_entry cl_som_am57x_padconf_ethernet[] = {
- /* MDIO bus */
- {VIN2A_D10, (M3 | PIN_OUTPUT_PULLUP) }, /* VIN2A_D10.MDIO_MCLK */
- {VIN2A_D11, (M3 | PIN_INPUT_PULLUP) }, /* VIN2A_D11.MDIO_D */
- /* EMAC Slave 1 at addr 0x1 - Default interface */
- {VIN2A_D12, (M3 | PIN_OUTPUT) }, /* VIN2A_D12.RGMII1_TXC */
- {VIN2A_D13, (M3 | PIN_OUTPUT) }, /* VIN2A_D13.RGMII1_TXCTL */
- {VIN2A_D14, (M3 | PIN_OUTPUT) }, /* VIN2A_D14.RGMII1_TXD3 */
- {VIN2A_D15, (M3 | PIN_OUTPUT) }, /* VIN2A_D15.RGMII1_TXD2 */
- {VIN2A_D16, (M3 | PIN_OUTPUT) }, /* VIN2A_D16.RGMII1_TXD1 */
- {VIN2A_D17, (M3 | PIN_OUTPUT) }, /* VIN2A_D17.RGMII1_TXD0 */
- {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D18.RGMII1_RXC */
- {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D19.RGMII1_RXCTL */
- {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D20.RGMII1_RXD3 */
- {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D21.RGMII1_RXD2 */
- {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D22.RGMII1_RXD1 */
- {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D23.RGMII1_RXD0 */
- /* Eth PHY1 reset GPIOs*/
- {VIN2A_CLK0, (M14 | PIN_OUTPUT_PULLDOWN)}, /* VIN2A_CLK0.GPIO3_28 */
-};
-
-#define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
- mux_array, ARRAY_SIZE(mux_array))
-
-void set_muxconf_regs(void)
-{
- SET_MUX(cl_som_am57x_padconf_console);
- SET_MUX(cl_som_am57x_padconf_pmic);
- SET_MUX(cl_som_am57x_padconf_green_led);
- SET_MUX(cl_som_am57x_padconf_sd_card);
- SET_MUX(cl_som_am57x_padconf_wifi);
- SET_MUX(cl_som_am57x_padconf_qspi);
- SET_MUX(cl_som_am57x_padconf_i2c_gpio);
- SET_MUX(cl_som_am57x_padconf_emmc);
- SET_MUX(cl_som_am57x_padconf_usb);
- SET_MUX(cl_som_am57x_padconf_ethernet);
-}
diff --git a/board/compulab/cl-som-am57x/spl.c b/board/compulab/cl-som-am57x/spl.c
deleted file mode 100644
index 0fb3d84a022..00000000000
--- a/board/compulab/cl-som-am57x/spl.c
+++ /dev/null
@@ -1,238 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL data and initialization for CompuLab CL-SOM-AM57x board
- *
- * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
- *
- * Author: Uri Mashiach <uri.mashiach@compulab.co.il>
- */
-
-#include <asm/emif.h>
-#include <asm/omap_common.h>
-#include <asm/arch/sys_proto.h>
-
-static const struct dmm_lisa_map_regs cl_som_am57x_lisa_regs = {
- .dmm_lisa_map_3 = 0x80740300,
- .is_ma_present = 0x1
-};
-
-void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
-{
- /* Disable SDRAM controller EMIF2 for single core SOC */
- *dmm_lisa_regs = &cl_som_am57x_lisa_regs;
- if (omap_revision() == DRA722_ES1_0) {
- ((struct dmm_lisa_map_regs *) *dmm_lisa_regs)->dmm_lisa_map_3 =
- 0x80640100;
- }
-}
-
-static const struct emif_regs cl_som_am57x_emif1_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61852332,
- .sdram_config = 0x61852332,
- .sdram_config2 = 0x00000000,
- .ref_ctrl = 0x000040f1,
- .ref_ctrl_final = 0x00001040,
- .sdram_tim1 = 0xeeef36f3,
- .sdram_tim2 = 0x348f7fda,
- .sdram_tim3 = 0x027f88a8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x1007190b,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0034400b,
- .emif_ddr_phy_ctlr_1 = 0x0e34400b,
- .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-/* Ext phy ctrl regs 1-35 */
-static const u32 cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs[] = {
- 0x10040100,
- 0x00740074,
- 0x00780078,
- 0x007c007c,
- 0x007b007b,
- 0x00800080,
- 0x00360036,
- 0x00340034,
- 0x00360036,
- 0x00350035,
- 0x00350035,
-
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
-
- 0x00430043,
- 0x003e003e,
- 0x004a004a,
- 0x00470047,
- 0x00400040,
-
- 0x00000000,
- 0x00600020,
- 0x40011080,
- 0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x0,
- 0x0,
- 0x0,
- 0x0,
- 0x0
-};
-
-static const struct emif_regs cl_som_am57x_emif2_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61852332,
- .sdram_config = 0x61852332,
- .sdram_config2 = 0x00000000,
- .ref_ctrl = 0x000040f1,
- .ref_ctrl_final = 0x00001040,
- .sdram_tim1 = 0xeeef36f3,
- .sdram_tim2 = 0x348f7fda,
- .sdram_tim3 = 0x027f88a8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x1007190b,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0034400b,
- .emif_ddr_phy_ctlr_1 = 0x0e34400b,
- .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x00000305
-};
-
-static const u32 cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs[] = {
- 0x10040100,
- 0x00820082,
- 0x008b008b,
- 0x00800080,
- 0x007e007e,
- 0x00800080,
- 0x00370037,
- 0x00390039,
- 0x00360036,
- 0x00370037,
- 0x00350035,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x01ff01ff,
- 0x00540054,
- 0x00540054,
- 0x004e004e,
- 0x004c004c,
- 0x00400040,
-
- 0x00000000,
- 0x00600020,
- 0x40011080,
- 0x08102040,
-
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x00400040,
- 0x0,
- 0x0,
- 0x0,
- 0x0,
- 0x0
-};
-
-static struct vcores_data cl_som_am57x_volts = {
- .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
- .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
- .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .mpu.addr = TPS659038_REG_ADDR_SMPS12,
- .mpu.pmic = &tps659038,
-
- .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
- .eve.value[OPP_OD] = VDD_EVE_DRA7_OD,
- .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
- .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
- .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
- .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
- .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .eve.addr = TPS659038_REG_ADDR_SMPS45,
- .eve.pmic = &tps659038,
-
- .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
- .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
- .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
- .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
- .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
- .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
- .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .gpu.addr = TPS659038_REG_ADDR_SMPS6,
- .gpu.pmic = &tps659038,
-
- .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM,
- .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM,
- .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .core.addr = TPS659038_REG_ADDR_SMPS7,
- .core.pmic = &tps659038,
-
- .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
- .iva.value[OPP_OD] = VDD_IVA_DRA7_OD,
- .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
- .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
- .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD,
- .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
- .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
- .iva.addr = TPS659038_REG_ADDR_SMPS8,
- .iva.pmic = &tps659038,
-};
-
-void hw_data_init(void)
-{
- *prcm = &dra7xx_prcm;
- *dplls_data = &dra7xx_dplls;
- *omap_vcores = &cl_som_am57x_volts;
- *ctrl = &dra7xx_ctrl;
-}
-
-void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
-{
- switch (emif_nr) {
- case 1:
- *regs = &cl_som_am57x_emif1_ddr3_532mhz_emif_regs;
- break;
- case 2:
- *regs = &cl_som_am57x_emif2_ddr3_532mhz_emif_regs;
- break;
- }
-}
-
-void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
-{
- switch (emif_nr) {
- case 1:
- *regs = cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs;
- *size = ARRAY_SIZE(cl_som_am57x_emif1_ddr3_ext_phy_ctrl_regs);
- break;
- case 2:
- *regs = cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs;
- *size = ARRAY_SIZE(cl_som_am57x_emif2_ddr3_ext_phy_ctrl_regs);
- break;
- }
-}
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 4d6258d9324..c4e13f8c38d 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -8,9 +8,6 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y += board.o
obj-$(CONFIG_SUN7I_GMAC) += gmac.o
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_SUNXI_AHCI) += ahci.o
-endif
obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o
obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o
obj-$(CONFIG_MACH_SUN7I) += dram_sun5i_auto.o
diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c
deleted file mode 100644
index a79b80ca1ec..00000000000
--- a/board/sunxi/ahci.c
+++ /dev/null
@@ -1,134 +0,0 @@
-#include <common.h>
-#include <ahci.h>
-#include <dm.h>
-#include <scsi.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-
-#define AHCI_PHYCS0R 0x00c0
-#define AHCI_PHYCS1R 0x00c4
-#define AHCI_PHYCS2R 0x00c8
-#define AHCI_RWCR 0x00fc
-
-/* This magic PHY initialisation was taken from the Allwinner releases
- * and Linux driver, but is completely undocumented.
- */
-static int sunxi_ahci_phy_init(u8 *reg_base)
-{
- u32 reg_val;
- int timeout;
-
- writel(0, reg_base + AHCI_RWCR);
- mdelay(5);
-
- setbits_le32(reg_base + AHCI_PHYCS1R, 0x1 << 19);
- clrsetbits_le32(reg_base + AHCI_PHYCS0R,
- (0x7 << 24),
- (0x5 << 24) | (0x1 << 23) | (0x1 << 18));
- clrsetbits_le32(reg_base + AHCI_PHYCS1R,
- (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
- (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
- setbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 28) | (0x1 << 15));
- clrbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 19));
- clrsetbits_le32(reg_base + AHCI_PHYCS0R, (0x7 << 20), (0x3 << 20));
- clrsetbits_le32(reg_base + AHCI_PHYCS2R, (0x1f << 5), (0x19 << 5));
- mdelay(5);
-
- setbits_le32(reg_base + AHCI_PHYCS0R, (0x1 << 19));
-
- timeout = 250; /* Power up takes approx 50 us */
- for (;;) {
- reg_val = readl(reg_base + AHCI_PHYCS0R) & (0x7 << 28);
- if (reg_val == (0x2 << 28))
- break;
- if (--timeout == 0) {
- printf("AHCI PHY power up failed.\n");
- return -EIO;
- }
- udelay(1);
- };
-
- setbits_le32(reg_base + AHCI_PHYCS2R, (0x1 << 24));
-
- timeout = 100; /* Calibration takes approx 10 us */
- for (;;) {
- reg_val = readl(reg_base + AHCI_PHYCS2R) & (0x1 << 24);
- if (reg_val == 0x0)
- break;
- if (--timeout == 0) {
- printf("AHCI PHY calibration failed.\n");
- return -EIO;
- }
- udelay(1);
- }
-
- mdelay(15);
-
- writel(0x7, reg_base + AHCI_RWCR);
-
- return 0;
-}
-
-#ifndef CONFIG_DM_SCSI
-void scsi_init(void)
-{
- if (sunxi_ahci_phy_init((u8 *)SUNXI_SATA_BASE) < 0)
- return;
-
- ahci_init((void __iomem *)SUNXI_SATA_BASE);
-}
-#else
-static int sunxi_sata_probe(struct udevice *dev)
-{
- ulong base;
- u8 *reg;
- int ret;
-
- base = dev_read_addr(dev);
- if (base == FDT_ADDR_T_NONE) {
- debug("%s: Failed to find address (err=%d\n)", __func__, ret);
- return -EINVAL;
- }
- reg = (u8 *)base;
- ret = sunxi_ahci_phy_init(reg);
- if (ret) {
- debug("%s: Failed to init phy (err=%d\n)", __func__, ret);
- return ret;
- }
- ret = ahci_probe_scsi(dev, base);
- if (ret) {
- debug("%s: Failed to probe (err=%d\n)", __func__, ret);
- return ret;
- }
-
- return 0;
-}
-
-static int sunxi_sata_bind(struct udevice *dev)
-{
- struct udevice *scsi_dev;
- int ret;
-
- ret = ahci_bind_scsi(dev, &scsi_dev);
- if (ret) {
- debug("%s: Failed to bind (err=%d\n)", __func__, ret);
- return ret;
- }
-
- return 0;
-}
-
-static const struct udevice_id sunxi_ahci_ids[] = {
- { .compatible = "allwinner,sun4i-a10-ahci" },
- { }
-};
-
-U_BOOT_DRIVER(ahci_sunxi_drv) = {
- .name = "ahci_sunxi",
- .id = UCLASS_AHCI,
- .of_match = sunxi_ahci_ids,
- .bind = sunxi_sata_bind,
- .probe = sunxi_sata_probe,
-};
-#endif
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 826650c89bc..d8fdf7728e0 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -12,14 +12,6 @@ void eth_init_board(void)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- /* Set up clock gating */
-#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC);
- setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC);
-#else
- setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
-#endif
-
/* Set MII clock */
#ifdef CONFIG_RGMII
setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index ffa7c154b54..7c4fcf281cb 100644
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -11,35 +11,6 @@
DECLARE_GLOBAL_DATA_PTR;
-int board_mmc_init(bd_t *bis)
-{
- struct dwmci_host *host = NULL;
-
- host = malloc(sizeof(struct dwmci_host));
- if (!host) {
- printf("dwmci_host malloc fail!\n");
- return 1;
- }
-
- memset(host, 0, sizeof(struct dwmci_host));
- host->name = "Synopsys Mobile storage";
- host->ioaddr = (void *)ARC_DWMMC_BASE;
- host->buswidth = 4;
- host->dev_index = 0;
- host->bus_hz = 50000000;
-
- add_dwmci(host, host->bus_hz / 2, 400000);
-
- return 0;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct dwmci_host *host = mmc->priv;
-
- return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
-}
-
#define AXS_MB_CREG 0xE0011000
int board_early_init_f(void)
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index 8a2c201477c..ac4d980c49f 100644
--- a/board/synopsys/hsdk/hsdk.c
+++ b/board/synopsys/hsdk/hsdk.c
@@ -982,6 +982,12 @@ int board_early_init_f(void)
*/
init_memory_bridge();
+ /*
+ * Switch SDIO external ciu clock divider from default div-by-8 to
+ * minimum possible div-by-2.
+ */
+ writel(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *)SDIO_UHS_REG_EXT);
+
return 0;
}
@@ -1019,41 +1025,6 @@ int board_late_init(void)
return 0;
}
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct dwmci_host *host = mmc->priv;
-
- return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
-}
-
-int board_mmc_init(bd_t *bis)
-{
- struct dwmci_host *host = NULL;
-
- host = malloc(sizeof(struct dwmci_host));
- if (!host) {
- printf("dwmci_host malloc fail!\n");
- return 1;
- }
-
- /*
- * Switch SDIO external ciu clock divider from default div-by-8 to
- * minimum possible div-by-2.
- */
- writel(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *)SDIO_UHS_REG_EXT);
-
- memset(host, 0, sizeof(struct dwmci_host));
- host->name = "Synopsys Mobile storage";
- host->ioaddr = (void *)ARC_DWMMC_BASE;
- host->buswidth = 4;
- host->dev_index = 0;
- host->bus_hz = 50000000;
-
- add_dwmci(host, host->bus_hz / 2, 400000);
-
- return 0;
-}
-
int checkboard(void)
{
puts("Board: Synopsys ARC HS Development Kit\n");
diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c
index 8b48ea3a03a..27d44b760da 100644
--- a/board/xilinx/zynq/cmds.c
+++ b/board/xilinx/zynq/cmds.c
@@ -414,9 +414,13 @@ static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc,
u32 src_ptr;
char *endp;
+ if (argc != cmdtp->maxargs)
+ return CMD_RET_FAILURE;
+
src_ptr = simple_strtoul(argv[2], &endp, 16);
if (*argv[2] == 0 || *endp != 0)
return CMD_RET_USAGE;
+
if (zynq_verify_image(src_ptr))
return CMD_RET_FAILURE;
@@ -432,6 +436,9 @@ static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc,
u32 srcaddr, srclen, dstaddr, dstlen;
int status;
+ if (argc < 5 && argc > cmdtp->maxargs)
+ return CMD_RET_USAGE;
+
srcaddr = simple_strtoul(argv[2], &endp, 16);
if (*argv[2] == 0 || *endp != 0)
return CMD_RET_USAGE;
@@ -485,7 +492,7 @@ static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return CMD_RET_USAGE;
zynq_cmd = find_cmd_tbl(argv[1], zynq_commands,
ARRAY_SIZE(zynq_commands));
- if (!zynq_cmd || argc != zynq_cmd->maxargs)
+ if (!zynq_cmd)
return CMD_RET_USAGE;
ret = zynq_cmd->cmd(zynq_cmd, flag, argc, argv);
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index db272478506..5189925beb3 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -170,6 +170,10 @@ static const struct {
.id = 0x62,
.name = "29dr",
},
+ {
+ .id = 0x66,
+ .name = "39dr",
+ },
};
#endif
@@ -482,18 +486,20 @@ static const struct {
{}
};
-static u32 reset_reason(void)
+static int reset_reason(void)
{
- u32 ret;
- int i;
+ u32 reg;
+ int i, ret;
const char *reason = NULL;
- ret = readl(&crlapb_base->reset_reason);
+ ret = zynqmp_mmio_read((ulong)&crlapb_base->reset_reason, &reg);
+ if (ret)
+ return -EINVAL;
puts("Reset reason:\t");
for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) {
- if (ret & reset_reasons[i].bit) {
+ if (reg & reset_reasons[i].bit) {
reason = reset_reasons[i].name;
printf("%s ", reset_reasons[i].name);
break;
@@ -504,7 +510,9 @@ static u32 reset_reason(void)
env_set("reset_reason", reason);
- writel(~0, &crlapb_base->reset_reason);
+ ret = zynqmp_mmio_write(~0, ~0, (ulong)&crlapb_base->reset_reason);
+ if (ret)
+ return -EINVAL;
return ret;
}
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-28 16:35:38 +0000