summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/beacon/imx8mm/Kconfig2
-rw-r--r--board/beacon/imx8mm/README6
-rw-r--r--board/beacon/imx8mm/imximage-8mm-lpddr4.cfg9
-rw-r--r--board/beacon/imx8mn/Kconfig2
-rw-r--r--board/beacon/imx8mn/imximage-8mn-lpddr4.cfg10
-rw-r--r--board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg2
-rw-r--r--board/gateworks/venice/Kconfig3
-rw-r--r--board/gateworks/venice/README2
-rw-r--r--board/gateworks/venice/imximage-8mm-lpddr4.cfg9
-rw-r--r--board/sifive/unleashed/unleashed.c2
-rw-r--r--board/sifive/unmatched/unmatched.c2
-rw-r--r--board/theobroma-systems/lion_rk3368/MAINTAINERS2
-rw-r--r--board/theobroma-systems/puma_rk3399/MAINTAINERS2
-rw-r--r--board/udoo/neo/neo.c131
-rw-r--r--board/udoo/udoo.c8
-rw-r--r--board/udoo/udoo_spl.c35
16 files changed, 176 insertions, 51 deletions
diff --git a/board/beacon/imx8mm/Kconfig b/board/beacon/imx8mm/Kconfig
index 58799c1a655..63f064e8cb8 100644
--- a/board/beacon/imx8mm/Kconfig
+++ b/board/beacon/imx8mm/Kconfig
@@ -10,7 +10,7 @@ config SYS_CONFIG_NAME
default "imx8mm_beacon"
config IMX_CONFIG
- default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+ default "board/beacon/imx8mm/imximage-8mm-lpddr4.cfg"
source "board/freescale/common/Kconfig"
diff --git a/board/beacon/imx8mm/README b/board/beacon/imx8mm/README
index dce176fa0b2..03d9412f0d6 100644
--- a/board/beacon/imx8mm/README
+++ b/board/beacon/imx8mm/README
@@ -12,8 +12,8 @@ Get and Build the ARM Trusted firmware
Note: $(srctree) is U-Boot source directory
$ git clone https://source.codeaurora.org/external/imx/imx-atf
-$ git checkout imx_4.19.35_1.0.0
-$ make PLAT=imx8mm bl31 ARCH=arm CROSS_COMPILE=aarch64-linux-gnu-
+$ git checkout imx_5.4.70_2.3.0
+$ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu-
$ cp build/imx8mm/release/bl31.bin $(srctree)
Get the DDR firmware
@@ -26,7 +26,7 @@ $ cp firmware-imx-8.5/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
Build U-Boot
============
$ make imx8mm_beacon_defconfig
-$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000
+$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu-
Burn U-Boot to microSD Card
===========================
diff --git a/board/beacon/imx8mm/imximage-8mm-lpddr4.cfg b/board/beacon/imx8mm/imximage-8mm-lpddr4.cfg
new file mode 100644
index 00000000000..90573be5fd9
--- /dev/null
+++ b/board/beacon/imx8mm/imximage-8mm-lpddr4.cfg
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 NXP
+ */
+
+#define __ASSEMBLY__
+
+BOOT_FROM sd
+LOADER u-boot-spl-ddr.bin 0x7E1000
diff --git a/board/beacon/imx8mn/Kconfig b/board/beacon/imx8mn/Kconfig
index 65d2923918d..fb301397b1a 100644
--- a/board/beacon/imx8mn/Kconfig
+++ b/board/beacon/imx8mn/Kconfig
@@ -16,7 +16,7 @@ config IMX8MN_BEACON_2GB_LPDDR
bool "Enable 2GB LPDDR"
config IMX_CONFIG
- default "arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
+ default "board/beacon/imx8mn/imximage-8mn-lpddr4.cfg"
source "board/freescale/common/Kconfig"
diff --git a/board/beacon/imx8mn/imximage-8mn-lpddr4.cfg b/board/beacon/imx8mn/imximage-8mn-lpddr4.cfg
new file mode 100644
index 00000000000..7286b264944
--- /dev/null
+++ b/board/beacon/imx8mn/imximage-8mn-lpddr4.cfg
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 NXP
+ */
+
+#define __ASSEMBLY__
+
+ROM_VERSION v2
+BOOT_FROM sd
+LOADER u-boot-spl-ddr.bin 0x912000
diff --git a/board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg b/board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg
index b89092a5590..4071219fbf4 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg
+++ b/board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg
@@ -6,4 +6,4 @@
#define __ASSEMBLY__
BOOT_FROM sd
-LOADER mkimage.flash.mkimage 0x7E1000
+LOADER u-boot-spl-ddr.bin 0x7e1000
diff --git a/board/gateworks/venice/Kconfig b/board/gateworks/venice/Kconfig
index 639bf35d205..687b94f24dd 100644
--- a/board/gateworks/venice/Kconfig
+++ b/board/gateworks/venice/Kconfig
@@ -10,6 +10,5 @@ config SYS_CONFIG_NAME
default "imx8mm_venice"
config IMX_CONFIG
- default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
-
+ default "board/gateworks/venice/imximage-8mm-lpddr4.cfg"
endif
diff --git a/board/gateworks/venice/README b/board/gateworks/venice/README
index 6a0ab1ef10a..773cc09e872 100644
--- a/board/gateworks/venice/README
+++ b/board/gateworks/venice/README
@@ -25,7 +25,7 @@ $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin .
Build U-Boot
============
$ make imx8mm_venice_defconfig
-$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000
+$ make CROSS_COMPILE=aarch64-linux-gnu-
Update eMMC
===========
diff --git a/board/gateworks/venice/imximage-8mm-lpddr4.cfg b/board/gateworks/venice/imximage-8mm-lpddr4.cfg
new file mode 100644
index 00000000000..ccaa765cb7d
--- /dev/null
+++ b/board/gateworks/venice/imximage-8mm-lpddr4.cfg
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 Gateworks Corporation
+ */
+
+#define __ASSEMBLY__
+
+BOOT_FROM sd
+LOADER u-boot-spl-ddr.bin 0x7E1000
diff --git a/board/sifive/unleashed/unleashed.c b/board/sifive/unleashed/unleashed.c
index 3c3e0e1d0d1..f8aad862c6d 100644
--- a/board/sifive/unleashed/unleashed.c
+++ b/board/sifive/unleashed/unleashed.c
@@ -117,7 +117,7 @@ int misc_init_r(void)
void *board_fdt_blob_setup(int *err)
{
*err = 0;
- if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
+ if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
if (gd->arch.firmware_fdt_addr)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
diff --git a/board/sifive/unmatched/unmatched.c b/board/sifive/unmatched/unmatched.c
index 4895909f8d6..6295deeae23 100644
--- a/board/sifive/unmatched/unmatched.c
+++ b/board/sifive/unmatched/unmatched.c
@@ -14,7 +14,7 @@
void *board_fdt_blob_setup(int *err)
{
*err = 0;
- if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
+ if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
if (gd->arch.firmware_fdt_addr)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
diff --git a/board/theobroma-systems/lion_rk3368/MAINTAINERS b/board/theobroma-systems/lion_rk3368/MAINTAINERS
index 857f784d21b..a5b4cb31b4a 100644
--- a/board/theobroma-systems/lion_rk3368/MAINTAINERS
+++ b/board/theobroma-systems/lion_rk3368/MAINTAINERS
@@ -1,5 +1,5 @@
LION-RK3368 (RK3368-uQ7 system-on-module)
-M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+M: Quentin Schulz <quentin.schulz@theobroma-systems.com>
M: Klaus Goger <klaus.goger@theobroma-systems.com>
S: Maintained
F: board/theobroma-systems/lion_rk3368
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS
index ccec09c3866..1ec2dd72d6c 100644
--- a/board/theobroma-systems/puma_rk3399/MAINTAINERS
+++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS
@@ -1,5 +1,5 @@
PUMA-RK3399
-M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+M: Quentin Schulz <quentin.schulz@theobroma-systems.com>
M: Klaus Goger <klaus.goger@theobroma-systems.com>
S: Maintained
F: board/theobroma-systems/puma_rk3399
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index ce005d31cc6..5e40583ab43 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -19,6 +19,8 @@
#include <asm/mach-imx/iomux-v3.h>
#include <dm.h>
#include <env.h>
+#include <mmc.h>
+#include <fsl_esdhc_imx.h>
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/mach-imx/mxc_i2c.h>
@@ -73,6 +75,8 @@ enum {
#define BOARD_DETECT_PAD_CFG (MUX_PAD_CTRL(BOARD_DETECT_PAD_CTRL) | \
MUX_MODE_SION)
+#define OCRAM_START 0x8f8000
+
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -214,19 +218,25 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+ MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ /* CD pin */
+ MX6_PAD_SD1_DATA0__GPIO6_IO_2 | MUX_PAD_CTRL(NO_PAD_CTRL),
+ /* Power */
+ MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
static iomux_v3_cfg_t const phy_control_pads[] = {
/* 25MHz Ethernet PHY Clock */
MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M |
MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
};
-static iomux_v3_cfg_t const board_recognition_pads[] = {
- /*Connected to R184*/
- MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
- /*Connected to R185*/
- MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
-};
-
static iomux_v3_cfg_t const wdog_b_pad = {
MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -249,6 +259,7 @@ static int setup_fec(void)
ARRAY_SIZE(phy_control_pads));
/* Reset PHY */
+ gpio_request(IMX_GPIO_NR(2, 1), "enet_rst");
gpio_direction_output(IMX_GPIO_NR(2, 1) , 0);
udelay(10000);
gpio_set_value(IMX_GPIO_NR(2, 1), 1);
@@ -280,52 +291,53 @@ int board_init(void)
ARRAY_SIZE(peri_3v3_pads));
/* Active high for ncp692 */
+ gpio_request(IMX_GPIO_NR(4, 16), "ncp692");
gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
#ifdef CONFIG_SYS_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
+ setup_fec();
+
return 0;
}
-static int get_board_value(void)
+int board_early_init_f(void)
{
- int r184, r185;
-
- imx_iomux_v3_setup_multiple_pads(board_recognition_pads,
- ARRAY_SIZE(board_recognition_pads));
+ setup_iomux_uart();
- gpio_direction_input(IMX_GPIO_NR(4, 13));
- gpio_direction_input(IMX_GPIO_NR(4, 0));
+ return 0;
+}
- r184 = gpio_get_value(IMX_GPIO_NR(4, 13));
- r185 = gpio_get_value(IMX_GPIO_NR(4, 0));
+static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+ {USDHC2_BASE_ADDR},
+};
- /*
- * Machine selection -
- * Machine r184, r185
- * ---------------------------------
- * Basic 0 0
- * Basic Ks 0 1
- * Full 1 0
- * Extended 1 1
- */
+#define USDHC2_PWR_GPIO IMX_GPIO_NR(6, 1)
+#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 2)
- return (r184 << 1) + r185;
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return !gpio_get_value(USDHC2_CD_GPIO);
}
-int board_early_init_f(void)
+int board_mmc_init(struct bd_info *bis)
{
- setup_iomux_uart();
- setup_fec();
-
- return 0;
+ SETUP_IOMUX_PADS(usdhc2_pads);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ gpio_request(IMX_GPIO_NR(6, 1), "usdhc2_pwr");
+ gpio_request(IMX_GPIO_NR(6, 2), "usdhc2_cd");
+ gpio_direction_input(USDHC2_CD_GPIO);
+ gpio_direction_output(USDHC2_PWR_GPIO, 1);
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
}
-static char *board_string(void)
+static char *board_string(int type)
{
- switch (get_board_value()) {
+ switch (type) {
case UDOO_NEO_TYPE_BASIC:
return "BASIC";
case UDOO_NEO_TYPE_BASIC_KS:
@@ -338,16 +350,21 @@ static char *board_string(void)
return "UNDEFINED";
}
-int checkboard(void)
+/* Override the default implementation, DT model is not accurate */
+int show_board_info(void)
{
- printf("Board: UDOO Neo %s\n", board_string());
+ int *board_type = (int *)OCRAM_START;
+
+ printf("Board: UDOO Neo %s\n", board_string(*board_type));
return 0;
}
int board_late_init(void)
{
+ int *board_type = (int *)OCRAM_START;
+
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- env_set("board_name", board_string());
+ env_set("board_name", board_string(*board_type));
#endif
return 0;
@@ -358,6 +375,41 @@ int board_late_init(void)
#include <linux/libfdt.h>
#include <asm/arch/mx6-ddr.h>
+static const iomux_v3_cfg_t board_recognition_pads[] = {
+ /*Connected to R184*/
+ MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
+ /*Connected to R185*/
+ MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
+};
+
+static int get_board_value(void)
+{
+ int r184, r185;
+
+ imx_iomux_v3_setup_multiple_pads(board_recognition_pads,
+ ARRAY_SIZE(board_recognition_pads));
+
+ gpio_request(IMX_GPIO_NR(4, 13), "r184");
+ gpio_request(IMX_GPIO_NR(4, 0), "r185");
+ gpio_direction_input(IMX_GPIO_NR(4, 13));
+ gpio_direction_input(IMX_GPIO_NR(4, 0));
+
+ r184 = gpio_get_value(IMX_GPIO_NR(4, 13));
+ r185 = gpio_get_value(IMX_GPIO_NR(4, 0));
+
+ /*
+ * Machine selection -
+ * Machine r184, r185
+ * ---------------------------------
+ * Basic 0 0
+ * Basic Ks 0 1
+ * Full 1 0
+ * Extended 1 1
+ */
+
+ return (r184 << 1) + r185;
+}
+
static const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
.dram_dqm0 = 0x00000028,
.dram_dqm1 = 0x00000028,
@@ -453,7 +505,7 @@ static void ccgr_init(void)
static void spl_dram_init(void)
{
- int board = get_board_value();
+ int *board_type = (int *)OCRAM_START;
struct mx6_ddr_sysinfo sysinfo = {
.dsize = 1, /* width of data bus: 1 = 32 bits */
@@ -470,8 +522,11 @@ static void spl_dram_init(void)
.rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
};
+ *board_type = get_board_value();
+
mx6sx_dram_iocfg(32, &mx6_ddr_ioregs, &mx6_grp_ioregs);
- if (board == UDOO_NEO_TYPE_BASIC || board == UDOO_NEO_TYPE_BASIC_KS)
+ if (*board_type == UDOO_NEO_TYPE_BASIC ||
+ *board_type == UDOO_NEO_TYPE_BASIC_KS)
mx6_dram_cfg(&sysinfo, &neo_basic_mmcd_calib,
&neo_basic_mem_ddr);
else
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
index 5c49388cbfb..9e0365615d6 100644
--- a/board/udoo/udoo.c
+++ b/board/udoo/udoo.c
@@ -90,6 +90,14 @@ int mx6_rgmii_rework(struct phy_device *phydev)
static void setup_iomux_enet(void)
{
+ gpio_request(IMX_GPIO_NR(2, 31), "eth_power");
+ gpio_request(IMX_GPIO_NR(3, 23), "eth_phy_reset");
+ gpio_request(IMX_GPIO_NR(6, 24), "strap1");
+ gpio_request(IMX_GPIO_NR(6, 25), "strap2");
+ gpio_request(IMX_GPIO_NR(6, 27), "strap3");
+ gpio_request(IMX_GPIO_NR(6, 28), "strap4");
+ gpio_request(IMX_GPIO_NR(6, 29), "strap5");
+
gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power supply on */
gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
index d9afbbb7419..647380e1db6 100644
--- a/board/udoo/udoo_spl.c
+++ b/board/udoo/udoo_spl.c
@@ -254,4 +254,39 @@ void board_init_f(ulong dummy)
/* DDR initialization */
spl_dram_init();
}
+
+#define USDHC3_CD_GPIO IMX_GPIO_NR(7, 0)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
+ {USDHC3_BASE_ADDR},
+};
+
+static const iomux_v3_cfg_t usdhc3_pads[] = {
+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return !gpio_get_value(USDHC3_CD_GPIO);
+}
+
+int board_mmc_init(struct bd_info *bis)
+{
+ SETUP_IOMUX_PADS(usdhc3_pads);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ gpio_direction_input(USDHC3_CD_GPIO);
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
#endif
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-02 22:37:04 +0000