diff options
Diffstat (limited to 'board')
88 files changed, 3694 insertions, 413 deletions
diff --git a/board/airoha/an7581/MAINTAINERS b/board/airoha/an7581/MAINTAINERS new file mode 100644 index 00000000000..28ec2fbf2ea --- /dev/null +++ b/board/airoha/an7581/MAINTAINERS @@ -0,0 +1,5 @@ +AN7581 +M: Christian Marangi <ansuelsmth@gmail.com> +S: Maintained +N: airoha +N: an7581 diff --git a/board/airoha/an7581/Makefile b/board/airoha/an7581/Makefile new file mode 100644 index 00000000000..70f8db7bce9 --- /dev/null +++ b/board/airoha/an7581/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += an7581_rfb.o diff --git a/board/airoha/an7581/an7581_rfb.c b/board/airoha/an7581/an7581_rfb.c new file mode 100644 index 00000000000..aa73679d929 --- /dev/null +++ b/board/airoha/an7581/an7581_rfb.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Author: Christian Marangi <ansuelsmth@gmail.com> + */ + +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; + + return 0; +} diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 584b5455e97..7e8709444fe 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -28,7 +28,7 @@ choice config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" select VEXPRESS64_BASE_MODEL - imply OF_HAS_PRIOR_STAGE + imply OF_HAS_PRIOR_STAGE if !BLOBLIST config TARGET_VEXPRESS64_BASER_FVP bool "Support Versatile Express ARMv8r64 FVP BASE model" diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile index 1878fbed4ec..b0dd1d0af87 100644 --- a/board/armltd/vexpress64/Makefile +++ b/board/armltd/vexpress64/Makefile @@ -3,5 +3,8 @@ # (C) Copyright 2000-2004 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-y := vexpress64.o lowlevel_init.o +obj-y := vexpress64.o + +obj-$(CONFIG_OF_HAS_PRIOR_STAGE) += lowlevel_init.o + obj-$(CONFIG_TARGET_VEXPRESS64_JUNO) += pcie.o diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index b5ede58757d..0b75c1358f0 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -100,7 +100,9 @@ int dram_init_banksize(void) * Push the variable into the .data section so that it * does not get cleared later. */ +#ifdef CONFIG_OF_HAS_PRIOR_STAGE unsigned long __section(".data") prior_stage_fdt_address[2]; +#endif #ifdef CONFIG_OF_BOARD @@ -151,6 +153,7 @@ static phys_addr_t find_dtb_in_nor_flash(const char *partname) } #endif +#ifdef CONFIG_OF_HAS_PRIOR_STAGE /* * Filter for a valid DTB, as TF-A happens to provide a pointer to some * data structure using the DTB format, which we cannot use. @@ -201,6 +204,7 @@ int board_fdt_blob_setup(void **fdtp) return -ENXIO; } #endif +#endif /* Actual reset is done via PSCI. */ void reset_cpu(void) diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c index 12013aa5a4d..93ee5b7ee0c 100644 --- a/board/beacon/imx8mm/spl.c +++ b/board/beacon/imx8mm/spl.c @@ -100,9 +100,6 @@ void board_init_f(ulong dummy) int ret; arch_cpu_init(); - - init_uart_clk(1); - timer_init(); /* Clear the BSS. */ @@ -114,8 +111,6 @@ void board_init_f(ulong dummy) hang(); } - preloader_console_init(); - ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@30380000", &dev); @@ -124,6 +119,7 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); enable_tzc380(); power_init_board(); diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c index f03841e5a01..e91d3fdcf5e 100644 --- a/board/beacon/imx8mn/spl.c +++ b/board/beacon/imx8mn/spl.c @@ -111,8 +111,6 @@ int board_early_init_f(void) /* Claiming pwm pins prevents LCD flicker during startup*/ imx_iomux_v3_setup_multiple_pads(pwm_pads, ARRAY_SIZE(pwm_pads)); - init_uart_clk(1); - return 0; } diff --git a/board/beacon/imx8mp/spl.c b/board/beacon/imx8mp/spl.c index 30d577f7e0e..027fae38278 100644 --- a/board/beacon/imx8mp/spl.c +++ b/board/beacon/imx8mp/spl.c @@ -50,7 +50,7 @@ void spl_board_init(void) * setting done. Default is 400Mhz (system_pll1_800m with div = 2) * set by ROM for ND VDD_SOC */ - if (IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV)) { + if (!IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV)) { clock_enable(CCGR_GIC, 0); clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5)); clock_enable(CCGR_GIC, 1); @@ -112,8 +112,6 @@ void board_init_f(ulong dummy) arch_cpu_init(); - init_uart_clk(1); - ret = spl_early_init(); if (ret) { debug("spl_init() failed: %d\n", ret); diff --git a/board/beagle/beagley-ai/Kconfig b/board/beagle/beagley-ai/Kconfig new file mode 100644 index 00000000000..bf953982151 --- /dev/null +++ b/board/beagle/beagley-ai/Kconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ +# + +if TARGET_J722S_R5_BEAGLEY_AI || TARGET_J722S_A53_BEAGLEY_AI + +config SYS_BOARD + default "beagley-ai" + +config SYS_VENDOR + default "beagle" + +config SYS_CONFIG_NAME + default "beagley_ai" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J722S_R5_BEAGLEY_AI + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +endif diff --git a/board/beagle/beagley-ai/MAINTAINERS b/board/beagle/beagley-ai/MAINTAINERS new file mode 100644 index 00000000000..1623329b714 --- /dev/null +++ b/board/beagle/beagley-ai/MAINTAINERS @@ -0,0 +1,8 @@ +BEAGLEY-AI BOARD +M: Robert Nelson <robertcnelson@gmail.com> +M: Tom Rini <trini@konsulko.com> +S: Maintained +F: board/beagle/beagley-ai/ +F: include/configs/beagley_ai.h +F: configs/am67a_beagley_ai_r5_defconfig +F: configs/am67a_beagley_ai_a53_defconfig diff --git a/board/beagle/beagley-ai/Makefile b/board/beagle/beagley-ai/Makefile new file mode 100644 index 00000000000..08593548e58 --- /dev/null +++ b/board/beagle/beagley-ai/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += beagley-ai.o diff --git a/board/beagle/beagley-ai/beagley-ai.c b/board/beagle/beagley-ai/beagley-ai.c new file mode 100644 index 00000000000..9786f628f6d --- /dev/null +++ b/board/beagle/beagley-ai/beagley-ai.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * https://www.beagleboard.org/boards/beagley-ai + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <dm/uclass.h> +#include <env.h> +#include <fdt_support.h> +#include <spl.h> +#include <asm/arch/k3-ddr.h> + +#if IS_ENABLED(CONFIG_SET_DFU_ALT_INFO) +void set_dfu_alt_info(char *interface, char *devstr) +{ + if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) + env_set("dfu_alt_info", update_info.dfu_string); +} +#endif + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } +} +#endif + +#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) +int board_late_init(void) +{ + char fdtfile[50]; + + snprintf(fdtfile, sizeof(fdtfile), "%s.dtb", CONFIG_DEFAULT_DEVICE_TREE); + + env_set("fdtfile", fdtfile); + + return 0; +} +#endif diff --git a/board/beagle/beagley-ai/beagley-ai.env b/board/beagle/beagley-ai/beagley-ai.env new file mode 100644 index 00000000000..10d62034e1a --- /dev/null +++ b/board/beagle/beagley-ai/beagley-ai.env @@ -0,0 +1,21 @@ +#include <env/ti/ti_common.env> +#include <env/ti/mmc.env> + +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +name_kern=Image +console=ttyS2,115200n8 +args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 + ${mtdparts} +run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} + +boot_targets=mmc1 mmc0 pxe dhcp +boot=mmc +mmcdev=1 +bootpart=1:2 +bootdir=/boot +rd_spec=- + +rproc_fw_binaries= 0 /lib/firmware/j722s-mcu-r5f0_0-fw 2 /lib/firmware/j722s-main-r5f0_0-fw 3 /lib/firmware/j722s-c71_0-fw 4 /lib/firmware/j722s-c71_1-fw diff --git a/board/beagle/beagley-ai/board-cfg.yaml b/board/beagle/beagley-ai/board-cfg.yaml new file mode 100644 index 00000000000..f9a4c438ca9 --- /dev/null +++ b/board/beagle/beagley-ai/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J722S +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 diff --git a/board/beagle/beagley-ai/pm-cfg.yaml b/board/beagle/beagley-ai/pm-cfg.yaml new file mode 100644 index 00000000000..46b3ad20109 --- /dev/null +++ b/board/beagle/beagley-ai/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J722S +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 diff --git a/board/beagle/beagley-ai/rm-cfg.yaml b/board/beagle/beagley-ai/rm-cfg.yaml new file mode 100644 index 00000000000..e32beb84795 --- /dev/null +++ b/board/beagle/beagley-ai/rm-cfg.yaml @@ -0,0 +1,1137 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 38 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - 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+ start_resource: 2560 + num_resource: 8 + type: 12825 + host_id: 128 + reserved: 0 + - + start_resource: 3072 + num_resource: 32 + type: 12826 + host_id: 128 + reserved: 0 + - + start_resource: 3584 + num_resource: 32 + type: 12827 + host_id: 128 + reserved: 0 + - + start_resource: 4096 + num_resource: 32 + type: 12828 + host_id: 128 + reserved: 0 diff --git a/board/beagle/beagley-ai/sec-cfg.yaml b/board/beagle/beagley-ai/sec-cfg.yaml new file mode 100644 index 00000000000..a41374b30c9 --- /dev/null +++ b/board/beagle/beagley-ai/sec-cfg.yaml @@ -0,0 +1,379 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for J722S +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id: 0 + otp_entry: + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + auth_resource_owner: 0 + enable_saul_psil_global_config_writes: 0x5A + rsvd: [0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x5A + allow_wildcard_unlock: 0x5A + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] diff --git a/board/beagle/beagley-ai/tifs-rm-cfg.yaml b/board/beagle/beagley-ai/tifs-rm-cfg.yaml new file mode 100644 index 00000000000..4a2af0ebcaf --- /dev/null +++ b/board/beagle/beagley-ai/tifs-rm-cfg.yaml @@ -0,0 +1,993 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +tifs-rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 38 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #10 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #31 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #32 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + resasg: + subhdr: + magic: 0x7B25 + size: 8 + resasg_entries_size: 992 + reserved: 0 + resasg_entries: + - + start_resource: 0 + num_resource: 16 + type: 1677 + host_id: 12 + reserved: 0 + - + start_resource: 16 + num_resource: 6 + type: 1677 + host_id: 20 + reserved: 0 + - + start_resource: 16 + num_resource: 6 + type: 1677 + host_id: 36 + reserved: 0 + - + start_resource: 22 + num_resource: 2 + type: 1677 + host_id: 30 + reserved: 0 + - + start_resource: 24 + num_resource: 4 + type: 1677 + host_id: 22 + reserved: 0 + - + start_resource: 28 + num_resource: 4 + type: 1677 + host_id: 38 + reserved: 0 + - + start_resource: 57 + num_resource: 16 + type: 1678 + host_id: 12 + reserved: 0 + - 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+ start_resource: 5120 + num_resource: 24 + type: 1809 + host_id: 128 + reserved: 0 + - + start_resource: 5632 + num_resource: 51 + type: 1810 + host_id: 128 + reserved: 0 + - + start_resource: 6144 + num_resource: 51 + type: 1811 + host_id: 128 + reserved: 0 + - + start_resource: 8192 + num_resource: 32 + type: 1812 + host_id: 128 + reserved: 0 + - + start_resource: 8704 + num_resource: 32 + type: 1813 + host_id: 128 + reserved: 0 + - + start_resource: 9216 + num_resource: 32 + type: 1814 + host_id: 128 + reserved: 0 + - + start_resource: 9728 + num_resource: 25 + type: 1815 + host_id: 128 + reserved: 0 + - + start_resource: 10240 + num_resource: 25 + type: 1816 + host_id: 128 + reserved: 0 + - + start_resource: 10752 + num_resource: 25 + type: 1817 + host_id: 128 + reserved: 0 + - + start_resource: 11264 + num_resource: 25 + type: 1818 + host_id: 128 + reserved: 0 + - + start_resource: 11776 + num_resource: 25 + type: 1819 + host_id: 128 + reserved: 0 + - + start_resource: 12288 + num_resource: 25 + type: 1820 + host_id: 128 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1936 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1936 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1936 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1936 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1936 + host_id: 38 + reserved: 0 + - + start_resource: 19 + num_resource: 64 + type: 1937 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 64 + type: 1937 + host_id: 36 + reserved: 0 + - + start_resource: 83 + num_resource: 8 + type: 1938 + host_id: 12 + reserved: 0 + - + start_resource: 91 + num_resource: 8 + type: 1939 + host_id: 12 + reserved: 0 + - + start_resource: 99 + num_resource: 10 + type: 1942 + host_id: 12 + reserved: 0 + - + start_resource: 109 + num_resource: 3 + type: 1942 + host_id: 35 + reserved: 0 + - + start_resource: 109 + num_resource: 3 + type: 1942 + host_id: 36 + reserved: 0 + - + start_resource: 112 + num_resource: 3 + type: 1942 + host_id: 30 + reserved: 0 + - + start_resource: 115 + num_resource: 3 + type: 1942 + host_id: 38 + reserved: 0 + - + start_resource: 118 + num_resource: 16 + type: 1943 + host_id: 12 + reserved: 0 + - + start_resource: 118 + num_resource: 16 + type: 1943 + host_id: 36 + reserved: 0 + - + start_resource: 134 + num_resource: 8 + type: 1944 + host_id: 12 + reserved: 0 + - + start_resource: 134 + num_resource: 8 + type: 1945 + host_id: 12 + reserved: 0 + - + start_resource: 142 + num_resource: 8 + type: 1946 + host_id: 12 + reserved: 0 + - + start_resource: 142 + num_resource: 8 + type: 1947 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1955 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1955 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1955 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1955 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1955 + host_id: 38 + reserved: 0 + - + start_resource: 19 + num_resource: 8 + type: 1956 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 8 + type: 1956 + host_id: 36 + reserved: 0 + - + start_resource: 27 + num_resource: 1 + type: 1957 + host_id: 12 + reserved: 0 + - + start_resource: 28 + num_resource: 1 + type: 1958 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1961 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1961 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1961 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1961 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1961 + host_id: 38 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1962 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1962 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1962 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1962 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1962 + host_id: 38 + reserved: 0 + - + start_resource: 19 + num_resource: 1 + type: 1963 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 1 + type: 1963 + host_id: 36 + reserved: 0 + - + start_resource: 19 + num_resource: 16 + type: 1964 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 16 + type: 1964 + host_id: 36 + reserved: 0 + - + start_resource: 20 + num_resource: 1 + type: 1965 + host_id: 12 + reserved: 0 + - + start_resource: 35 + num_resource: 8 + type: 1966 + host_id: 12 + reserved: 0 + - + start_resource: 21 + num_resource: 1 + type: 1967 + host_id: 12 + reserved: 0 + - + start_resource: 35 + num_resource: 8 + type: 1968 + host_id: 12 + reserved: 0 + - + start_resource: 22 + num_resource: 1 + type: 1969 + host_id: 12 + reserved: 0 + - + start_resource: 43 + num_resource: 8 + type: 1970 + host_id: 12 + reserved: 0 + - + start_resource: 23 + num_resource: 1 + type: 1971 + host_id: 12 + reserved: 0 + - + start_resource: 43 + num_resource: 8 + type: 1972 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 1 + type: 2112 + host_id: 128 + reserved: 0 + - + start_resource: 2 + num_resource: 2 + type: 2122 + host_id: 12 + reserved: 0 + - + start_resource: 8 + num_resource: 32 + type: 12750 + host_id: 12 + reserved: 0 + - + start_resource: 8 + num_resource: 32 + type: 12750 + host_id: 38 + reserved: 0 + - + start_resource: 0 + num_resource: 8 + type: 12751 + host_id: 38 + reserved: 0 + - + start_resource: 0 + num_resource: 32 + type: 12769 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 32 + type: 12769 + host_id: 38 + reserved: 0 + - + start_resource: 0 + num_resource: 8 + type: 12770 + host_id: 38 + reserved: 0 + - + start_resource: 0 + num_resource: 2 + type: 12810 + host_id: 12 + reserved: 0 + - + start_resource: 2 + num_resource: 2 + type: 12810 + host_id: 20 + reserved: 0 + - + start_resource: 4 + num_resource: 2 + type: 12810 + host_id: 22 + reserved: 0 + - + start_resource: 22 + num_resource: 18 + type: 12810 + host_id: 38 + reserved: 0 + - + start_resource: 1536 + num_resource: 8 + type: 12823 + host_id: 128 + reserved: 0 + - + start_resource: 2048 + num_resource: 8 + type: 12824 + host_id: 128 + reserved: 0 + - + start_resource: 2560 + num_resource: 8 + type: 12825 + host_id: 128 + reserved: 0 + - + start_resource: 3072 + num_resource: 32 + type: 12826 + host_id: 128 + reserved: 0 + - + start_resource: 3584 + num_resource: 32 + type: 12827 + host_id: 128 + reserved: 0 + - + start_resource: 4096 + num_resource: 32 + type: 12828 + host_id: 128 + reserved: 0 diff --git a/board/comvetia/lxr2/lxr2.env b/board/comvetia/lxr2/lxr2.env index ec213800222..26ad4f18c68 100644 --- a/board/comvetia/lxr2/lxr2.env +++ b/board/comvetia/lxr2/lxr2.env @@ -2,7 +2,6 @@ addcons=setenv bootargs ${bootargs} console=${console},${baudrate} addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off addmisc=setenv bootargs ${bootargs} ${miscargs} addmtd=run mtdnand;run mtdspi;setenv bootargs ${bootargs} ${mtdparts} -altbootcmd=run swupdate bootcmd=run nandboot;run swupdate bootcount=2 bootlimit=3 diff --git a/board/coreboot/coreboot/MAINTAINERS b/board/coreboot/coreboot/MAINTAINERS index d97383c030c..5166e7a762d 100644 --- a/board/coreboot/coreboot/MAINTAINERS +++ b/board/coreboot/coreboot/MAINTAINERS @@ -8,3 +8,8 @@ COREBOOT64 BOARD M: Simon Glass <sjg@chromium.org> S: Maintained F: configs/coreboot64_defconfig + +COREBOOT64 NO SPL +M: Jeremy Compostella <jeremy.compostella@intel.com> +S: Maintained +F: configs/coreboot64-no-spl_defconfig diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index 4af3cbe9fe2..4275436b128 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -186,5 +186,7 @@ int board_late_init(void) enum env_location env_get_location(enum env_operation op, int prio) { - return prio ? ENVL_UNKNOWN : ENVL_SPI_FLASH; + return prio ? ENVL_UNKNOWN : CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH, + (ENVL_SPI_FLASH), + (ENVL_NOWHERE)); } diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 012ac14a123..134dbfd7151 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -62,6 +62,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply VIDEO_SIMPLE imply PCIE_ECAM_GENERIC imply DM_RNG + imply RNG_RISCV_ZKR imply DM_RTC imply RTC_GOLDFISH imply SCSI diff --git a/board/emulation/qemu-sbsa/Kconfig b/board/emulation/qemu-sbsa/Kconfig index 72c76b351fa..9ea6303ec9c 100644 --- a/board/emulation/qemu-sbsa/Kconfig +++ b/board/emulation/qemu-sbsa/Kconfig @@ -30,9 +30,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAS_ROM select MTD select OF_LIBFDT_OVERLAY - select OF_SEPARATE select PCI select PCIE_ECAM_GENERIC + select SYS_PCI_64BIT select USB select GIC_V3 select GIC_V3_ITS @@ -48,6 +48,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply CFI_FLASH imply SYS_MTDPARTS_RUNTIME imply SET_DFU_ALT_INFO + imply PCI_INIT_R if DEBUG_UART diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 690a29690b9..d51301869cd 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -102,102 +102,6 @@ uint calculate_octo_phy_mask(void) return octo_phy_mask; } -int register_miiphy_bus(uint k, struct mii_dev **bus) -{ - int retval; - struct mii_dev *mdiodev = mdio_alloc(); - char *name = bb_miiphy_buses[k].name; - - if (!mdiodev) - return -ENOMEM; - strlcpy(mdiodev->name, name, MDIO_NAME_LEN); - mdiodev->read = bb_miiphy_read; - mdiodev->write = bb_miiphy_write; - - retval = mdio_register(mdiodev); - if (retval < 0) - return retval; - *bus = miiphy_get_dev_by_name(name); - - return 0; -} - -struct porttype *get_porttype(uint octo_phy_mask, uint k) -{ - uint octo_index = k * 4; - - if (!k) { - if (octo_phy_mask & 0x01) - return &porttypes[PORTTYPE_MAIN_CAT]; - else if (!(octo_phy_mask & 0x03)) - return &porttypes[PORTTYPE_16C_16F]; - } else { - if (octo_phy_mask & (1 << octo_index)) - return &porttypes[PORTTYPE_TOP_CAT]; - } - - return NULL; -} - -int init_single_phy(struct porttype *porttype, struct mii_dev *bus, - uint bus_idx, uint m, uint phy_idx) -{ - struct phy_device *phydev; - - phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx)); - printf(" %u", bus_idx * 32 + m * 8 + phy_idx); - - if (!phydev) - puts("!"); - else - ihs_phy_config(phydev, porttype->phy_invert_in_pol, - porttype->phy_invert_out_pol); - - return 0; -} - -int init_octo_phys(uint octo_phy_mask) -{ - uint bus_idx; - - /* there are up to four octo-phys on each mdio bus */ - for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) { - uint m; - uint octo_index = bus_idx * 4; - struct mii_dev *bus = NULL; - struct porttype *porttype = NULL; - int ret; - - porttype = get_porttype(octo_phy_mask, bus_idx); - - if (!porttype) - continue; - - for (m = 0; m < 4; ++m) { - uint phy_idx; - - /** - * Register a bus device if there is at least one phy - * on the current bus - */ - if (!m && octo_phy_mask & (0xf << octo_index)) { - ret = register_miiphy_bus(bus_idx, &bus); - if (ret) - return ret; - } - - if (!(octo_phy_mask & BIT(octo_index + m))) - continue; - - for (phy_idx = 0; phy_idx < 8; ++phy_idx) - init_single_phy(porttype, bus, bus_idx, m, - phy_idx); - } - } - - return 0; -} - /* * MII GPIO bitbang implementation * MDC MDIO bus @@ -219,9 +123,9 @@ struct gpio_mii { { 2, {}, {}, 46, 24, 1 }, }; -static int mii_mdio_init(struct bb_miiphy_bus *bus) +static int mii_mdio_init(const int k) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = &gpio_mii_set[k]; char name[32] = {}; struct udevice *gpio_dev1 = NULL; struct udevice *gpio_dev2 = NULL; @@ -260,27 +164,27 @@ static int mii_mdio_init(struct bb_miiphy_bus *bus) return 0; } -static int mii_mdio_active(struct bb_miiphy_bus *bus) +static int mii_mdio_active(struct mii_dev *miidev) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value); return 0; } -static int mii_mdio_tristate(struct bb_miiphy_bus *bus) +static int mii_mdio_tristate(struct mii_dev *miidev) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); return 0; } -static int mii_set_mdio(struct bb_miiphy_bus *bus, int v) +static int mii_set_mdio(struct mii_dev *miidev, int v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT); dm_gpio_set_value(&gpio_mii->mdio_gpio, v); @@ -289,9 +193,9 @@ static int mii_set_mdio(struct bb_miiphy_bus *bus, int v) return 0; } -static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v) +static int mii_get_mdio(struct mii_dev *miidev, int *v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); *v = (dm_gpio_get_value(&gpio_mii->mdio_gpio)); @@ -299,56 +203,135 @@ static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v) return 0; } -static int mii_set_mdc(struct bb_miiphy_bus *bus, int v) +static int mii_set_mdc(struct mii_dev *miidev, int v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_value(&gpio_mii->mdc_gpio, v); return 0; } -static int mii_delay(struct bb_miiphy_bus *bus) +static int mii_delay(struct mii_dev *miidev) { udelay(1); return 0; } -struct bb_miiphy_bus bb_miiphy_buses[] = { - { - .name = "ihs0", - .init = mii_mdio_init, - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[0], - }, - { - .name = "ihs1", - .init = mii_mdio_init, - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[1], - }, - { - .name = "ihs2", - .init = mii_mdio_init, - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[2], - }, +static const struct bb_miiphy_bus_ops mii_bb_miiphy_bus_ops = { + .mdio_active = mii_mdio_active, + .mdio_tristate = mii_mdio_tristate, + .set_mdio = mii_set_mdio, + .get_mdio = mii_get_mdio, + .set_mdc = mii_set_mdc, + .delay = mii_delay, }; -int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); +static int mii_bb_miiphy_read(struct mii_dev *miidev, int addr, + int devad, int reg) +{ + return bb_miiphy_read(miidev, &mii_bb_miiphy_bus_ops, + addr, devad, reg); +} + +static int mii_bb_miiphy_write(struct mii_dev *miidev, int addr, + int devad, int reg, u16 value) +{ + return bb_miiphy_write(miidev, &mii_bb_miiphy_bus_ops, + addr, devad, reg, value); +} + +int register_miiphy_bus(uint k, struct mii_dev **bus) +{ + struct mii_dev *mdiodev = mdio_alloc(); + int retval; + + snprintf(mdiodev->name, MDIO_NAME_LEN, "ihs%d", k); + mdiodev->read = mii_bb_miiphy_read; + mdiodev->write = mii_bb_miiphy_write; + mdiodev->priv = &gpio_mii_set[k]; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; + *bus = mdiodev; + + return mii_mdio_init(k); +} + +struct porttype *get_porttype(uint octo_phy_mask, uint k) +{ + uint octo_index = k * 4; + + if (!k) { + if (octo_phy_mask & 0x01) + return &porttypes[PORTTYPE_MAIN_CAT]; + else if (!(octo_phy_mask & 0x03)) + return &porttypes[PORTTYPE_16C_16F]; + } else { + if (octo_phy_mask & (1 << octo_index)) + return &porttypes[PORTTYPE_TOP_CAT]; + } + + return NULL; +} + +int init_single_phy(struct porttype *porttype, struct mii_dev *bus, + uint bus_idx, uint m, uint phy_idx) +{ + struct phy_device *phydev; + + phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx)); + printf(" %u", bus_idx * 32 + m * 8 + phy_idx); + + if (!phydev) + puts("!"); + else + ihs_phy_config(phydev, porttype->phy_invert_in_pol, + porttype->phy_invert_out_pol); + + return 0; +} + +int init_octo_phys(uint octo_phy_mask) +{ + uint bus_idx; + + /* there are up to four octo-phys on each mdio bus */ + for (bus_idx = 0; bus_idx < ARRAY_SIZE(gpio_mii_set); ++bus_idx) { + uint m; + uint octo_index = bus_idx * 4; + struct mii_dev *bus = NULL; + struct porttype *porttype = NULL; + int ret; + + porttype = get_porttype(octo_phy_mask, bus_idx); + + if (!porttype) + continue; + + for (m = 0; m < 4; ++m) { + uint phy_idx; + + /** + * Register a bus device if there is at least one phy + * on the current bus + */ + if (!m && octo_phy_mask & (0xf << octo_index)) { + ret = register_miiphy_bus(bus_idx, &bus); + if (ret) + return ret; + } + + if (!(octo_phy_mask & BIT(octo_index + m))) + continue; + + for (phy_idx = 0; phy_idx < 8; ++phy_idx) + init_single_phy(porttype, bus, bus_idx, m, + phy_idx); + } + } + + return 0; +} diff --git a/board/intel/agilex5-socdk/MAINTAINERS b/board/intel/agilex5-socdk/MAINTAINERS index b696f788c81..30d8815d202 100644 --- a/board/intel/agilex5-socdk/MAINTAINERS +++ b/board/intel/agilex5-socdk/MAINTAINERS @@ -2,7 +2,9 @@ SOCFPGA BOARD M: Tien Fong Chee <tien.fong.chee@intel.com> M: Teik Heng Chong <teik.heng.chong@intel.com> M: Jit Loon Lim <jit.loon.lim@intel.com> +M: Dinesh Maniyam <dinesh.maniyam@intel.com> S: Maintained F: board/intel/agilex5-socdk/ F: include/configs/socfpga_agilex5_socdk.h F: configs/socfpga_agilex5_defconfig +F: configs/socfpga_agilex5_nand2_defconfig diff --git a/board/intel/agilex5-socdk/Makefile b/board/intel/agilex5-socdk/Makefile new file mode 100644 index 00000000000..306a8cf5f0b --- /dev/null +++ b/board/intel/agilex5-socdk/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2025 Altera Corporation <www.altera.com> +# +# SPDX-License-Identifier: GPL-2.0 +# + +obj-y := socfpga.o diff --git a/board/intel/agilex5-socdk/socfpga.c b/board/intel/agilex5-socdk/socfpga.c new file mode 100644 index 00000000000..d6628cfc696 --- /dev/null +++ b/board/intel/agilex5-socdk/socfpga.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Altera Corporation <www.altera.com> + */ + +#include <asm/arch/misc.h> + +int board_early_init_f(void) +{ + socfpga_get_sys_mgr_addr("sysmgr@10d12000"); + return 0; +} diff --git a/board/keymile/scripts/develop-common.txt b/board/keymile/scripts/develop-common.txt index 1bdff2f908f..cfc69357e43 100644 --- a/board/keymile/scripts/develop-common.txt +++ b/board/keymile/scripts/develop-common.txt @@ -1,4 +1,3 @@ -altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_nfs_path && saveenv && reset subbootcmds=tftpfdt tftpkernel nfsargs add_default boot diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt index 0a4a9c80b7e..c86e6267bdc 100644 --- a/board/keymile/scripts/ramfs-common.txt +++ b/board/keymile/scripts/ramfs-common.txt @@ -1,6 +1,5 @@ addramfs=setenv bootargs "${bootargs} phram.phram=rootfs${boot_bank},${rootfsaddr},${rootfssize}" boot_bank=-1 -altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} subbootcmds=save_and_reset_once tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot save_and_reset_once=setenv save_and_reset_once true && saveenv && reset diff --git a/board/keymile/secu1/socfpga_secu.env b/board/keymile/secu1/socfpga_secu.env index 147c4170ef5..60999882958 100644 --- a/board/keymile/secu1/socfpga_secu.env +++ b/board/keymile/secu1/socfpga_secu.env @@ -1,4 +1,3 @@ -altbootcmd=run bootcmd; bootlimit=6 bootnum=1 bootretry=CONFIG_BOOT_RETRY_TIME diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 55e93a77f0f..699e5ca54a7 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -4,6 +4,7 @@ */ #include <dm.h> +#include <event.h> #include <asm/io.h> #include <asm/arch/gcr.h> #include "../common/uart.h" @@ -98,9 +99,5 @@ int dram_init_banksize(void) return 0; } -int last_stage_init(void) -{ - board_set_console(); +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, board_set_console); - return 0; -} diff --git a/board/nuvoton/common/uart.c b/board/nuvoton/common/uart.c index b35c795704a..06f637855f5 100644 --- a/board/nuvoton/common/uart.c +++ b/board/nuvoton/common/uart.c @@ -14,7 +14,7 @@ #define UART_LCR 0xc #define LCR_DLAB BIT(7) -void board_set_console(void) +int board_set_console(void) { const unsigned long baudrate_table[] = CFG_SYS_BAUDRATE_TABLE; struct udevice *dev = gd->cur_serial_dev; @@ -28,12 +28,12 @@ void board_set_console(void) int ret, i; if (!dev) - return; + return -ENODEV; uart_reg = dev_read_addr_ptr(dev); ret = clk_get_by_index(dev, 0, &clk); if (ret) - return; + return ret; uart_clk = clk_get_rate(&clk); setbits_8(uart_reg + UART_LCR, LCR_DLAB); @@ -67,4 +67,5 @@ void board_set_console(void) snprintf(string, sizeof(string), "ttyS0,%un8", gd->baudrate); env_set("console", string); + return 0; } diff --git a/board/nuvoton/common/uart.h b/board/nuvoton/common/uart.h index 9cc895251b3..fc8ec477c8b 100644 --- a/board/nuvoton/common/uart.h +++ b/board/nuvoton/common/uart.h @@ -6,6 +6,6 @@ #ifndef _NUVOTON_UART_H #define _NUVOTON_UART_H -void board_set_console(void); +int board_set_console(void); #endif /* _NUVOTON_COMMON_H */ diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c index 3c4e5aaf294..2faa34954eb 100644 --- a/board/nuvoton/poleg_evb/poleg_evb.c +++ b/board/nuvoton/poleg_evb/poleg_evb.c @@ -6,6 +6,7 @@ #include <dm.h> #include <env.h> +#include <event.h> #include <asm/io.h> #include <asm/arch/gcr.h> #include <asm/mach-types.h> @@ -48,7 +49,7 @@ int dram_init(void) return 0; } -int last_stage_init(void) +static int last_stage_init(void) { char value[32]; @@ -68,8 +69,10 @@ int last_stage_init(void) } sprintf(value, "ttyS%d,115200n8", dev->seq_); env_set("console", value); - board_set_console(); + return board_set_console(); } return 0; } +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); + diff --git a/board/ouya/ouya/Kconfig b/board/ouya/ouya/Kconfig new file mode 100644 index 00000000000..6bab40ce933 --- /dev/null +++ b/board/ouya/ouya/Kconfig @@ -0,0 +1,12 @@ +if TARGET_OUYA + +config SYS_BOARD + default "ouya" + +config SYS_VENDOR + default "ouya" + +config SYS_CONFIG_NAME + default "ouya" + +endif diff --git a/board/ouya/ouya/MAINTAINERS b/board/ouya/ouya/MAINTAINERS new file mode 100644 index 00000000000..7f664b2e65f --- /dev/null +++ b/board/ouya/ouya/MAINTAINERS @@ -0,0 +1,8 @@ +OUYA BOARD +M: Svyatoslav Ryhel <clamor95@gmail.com> +M: Peter Geis <pgwipeout@gmail.com> +S: Maintained +F: board/ouya/ouya/ +F: configs/ouya_defconfig +F: doc/board/ouya/ouya.rst +F: include/configs/ouya.h diff --git a/board/ouya/ouya/Makefile b/board/ouya/ouya/Makefile new file mode 100644 index 00000000000..d479ec83e5e --- /dev/null +++ b/board/ouya/ouya/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation <www.nvidia.com> +# +# (C) Copyright 2021 +# Svyatoslav Ryhel <clamor95@gmail.com> + +obj-$(CONFIG_XPL_BUILD) += ouya-spl.o + +obj-y += ouya.o diff --git a/board/ouya/ouya/ouya-spl.c b/board/ouya/ouya/ouya-spl.c new file mode 100644 index 00000000000..1f45853c8be --- /dev/null +++ b/board/ouya/ouya/ouya-spl.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Ouya SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2025 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +#define TPS65911_I2C_ADDR (0x2D << 1) +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR (0x60 << 1) +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/ouya/ouya/ouya.c b/board/ouya/ouya/ouya.c new file mode 100644 index 00000000000..6d6eb54afe2 --- /dev/null +++ b/board/ouya/ouya/ouya.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2025 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <fdt_support.h> + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif diff --git a/board/ouya/ouya/ouya.env b/board/ouya/ouya/ouya.env new file mode 100644 index 00000000000..6ec881b910a --- /dev/null +++ b/board/ouya/ouya/ouya.env @@ -0,0 +1,12 @@ +#include <env/nvidia/prod_upd.env> + +partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs} +boot_interface=usb + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_2=update bootloader=run flash_uboot +bootmenu_3=reboot RCM=enterrcm +bootmenu_4=reboot=reset +bootmenu_5=power off=poweroff +bootmenu_delay=-1 diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig index bc5511707ac..65451a3b20d 100644 --- a/board/phytec/common/Kconfig +++ b/board/phytec/common/Kconfig @@ -38,6 +38,17 @@ config PHYTEC_AM62_SOM_DETECTION Support of I2C EEPROM based SoM detection. Supported for PHYTEC AM62x boards. +config PHYTEC_AM62A_SOM_DETECTION + bool "Support SoM detection for AM62Ax PHYTEC platforms" + depends on (TARGET_PHYCORE_AM62AX_A53 || TARGET_PHYCORE_AM62AX_R5) && \ + PHYTEC_SOM_DETECTION + select SUPPORT_EXTENSION_SCAN + depends on SPL_I2C && DM_I2C + default y + help + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM62Ax boards. + config PHYTEC_AM64_SOM_DETECTION bool "Support SoM detection for AM64x PHYTEC platforms" depends on (TARGET_PHYCORE_AM64X_A53 || TARGET_PHYCORE_AM64X_R5) && \ diff --git a/board/phytec/common/am6_som_detection.c b/board/phytec/common/am6_som_detection.c index 7930ab42d1c..f5de5de4821 100644 --- a/board/phytec/common/am6_som_detection.c +++ b/board/phytec/common/am6_som_detection.c @@ -11,10 +11,12 @@ extern struct phytec_eeprom_data eeprom_data; #if IS_ENABLED(CONFIG_PHYTEC_AM62_SOM_DETECTION) || \ + IS_ENABLED(CONFIG_PHYTEC_AM62A_SOM_DETECTION) || \ IS_ENABLED(CONFIG_PHYTEC_AM64_SOM_DETECTION) /* Check if the SoM is actually one of the following products: * - phyCORE-AM62x + * - phyCORE-AM62Ax * - phyCORE-AM64x * * Returns 0 in case it's a known SoM. Otherwise, returns -1. @@ -41,6 +43,9 @@ int phytec_am6_detect(struct phytec_eeprom_data *data) if (som == PHYTEC_AM62X_SOM && soc_is_am62x()) return 0; + if (som == PHYTEC_AM62AX_SOM && soc_is_am62ax()) + return 0; + if (som == PHYTEC_AM64X_SOM && soc_is_am64x()) return 0; diff --git a/board/phytec/common/am6_som_detection.h b/board/phytec/common/am6_som_detection.h index c5c6e179da6..0b3c9c8e1ee 100644 --- a/board/phytec/common/am6_som_detection.h +++ b/board/phytec/common/am6_som_detection.h @@ -11,6 +11,7 @@ #define EEPROM_ADDR 0x50 #define PHYTEC_AM62X_SOM 71 +#define PHYTEC_AM62AX_SOM 75 #define PHYTEC_AM64X_SOM 72 #define PHYTEC_EEPROM_VALUE_X 0x21 #define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI 0xC diff --git a/board/phytec/common/k3/board.c b/board/phytec/common/k3/board.c index 9d833456810..7d2146d5727 100644 --- a/board/phytec/common/k3/board.c +++ b/board/phytec/common/k3/board.c @@ -48,7 +48,7 @@ struct efi_capsule_update_info update_info = { * Note: Currently, eMMC hardware partitions are not differentiated; Updates * are always applied to the first boot partition. */ -void configure_capsule_updates(void) +static void configure_capsule_updates(void) { static char dfu_string[128] = { 0 }; const char *dfu_raw = "tiboot3.bin raw 0x0 0x400 mmcpart 1;" diff --git a/board/phytec/phycore_am62ax/MAINTAINERS b/board/phytec/phycore_am62ax/MAINTAINERS index 3e4e2feff4e..7c8a29b20d9 100644 --- a/board/phytec/phycore_am62ax/MAINTAINERS +++ b/board/phytec/phycore_am62ax/MAINTAINERS @@ -10,5 +10,6 @@ F: arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts F: board/phytec/phycore_am62ax/ F: configs/phycore_am62ax_a53_defconfig F: configs/phycore_am62ax_r5_defconfig +F: configs/phycore_am62ax_r5_usbdfu_defconfig F: include/configs/phycore_am62ax.h F: doc/board/phytec/phycore-am62ax.rst diff --git a/board/phytec/phycore_am62ax/phycore_am62ax.env b/board/phytec/phycore_am62ax/phycore_am62ax.env index 77c5ea8d99a..a0eacd1dfc3 100644 --- a/board/phytec/phycore_am62ax/phycore_am62ax.env +++ b/board/phytec/phycore_am62ax/phycore_am62ax.env @@ -1,3 +1,8 @@ +#include <env/phytec/k3_dfu.env> +#include <env/phytec/k3_mmc.env> +#include <env/phytec/k3_net.env> +#include <env/phytec/k3_spi.env> + fdtaddr=0x88000000 loadaddr=0x82000000 scriptaddr=0x80000000 @@ -12,3 +17,9 @@ mmcroot=2 mmcpart=1 console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 + +get_cmd=tftp + +spi_fdt_addr=0x700000 +spi_image_addr=0x800000 +spi_ramdisk_addr=0x1e00000 diff --git a/board/phytec/phycore_am62x/MAINTAINERS b/board/phytec/phycore_am62x/MAINTAINERS index 670c7473481..8f2b8069ad4 100644 --- a/board/phytec/phycore_am62x/MAINTAINERS +++ b/board/phytec/phycore_am62x/MAINTAINERS @@ -12,4 +12,5 @@ F: configs/phycore_am62x_r5_defconfig F: configs/phycore_am62x_r5_usbdfu_defconfig F: include/configs/phycore_am62x.h F: doc/board/phytec/phycore-am62x.rst +F: doc/board/phytec/k3-common.rst F: board/phytec/common/k3 diff --git a/board/phytec/phycore_am62x/phycore_am62x.env b/board/phytec/phycore_am62x/phycore_am62x.env index 711ca3040c4..5c48e856685 100644 --- a/board/phytec/phycore_am62x/phycore_am62x.env +++ b/board/phytec/phycore_am62x/phycore_am62x.env @@ -1,4 +1,4 @@ -#include <env/ti/k3_dfu.env> +#include <env/phytec/k3_dfu.env> #include <env/phytec/k3_mmc.env> #include <env/phytec/k3_net.env> #include <env/phytec/k3_spi.env> @@ -22,4 +22,4 @@ get_cmd=tftp spi_fdt_addr=0x700000 spi_image_addr=0x800000 -spi_ramdisk_addr=0x1e00000 +spi_ramdisk_addr=0x2200000 diff --git a/board/phytec/phycore_am64x/phycore_am64x.env b/board/phytec/phycore_am64x/phycore_am64x.env index 3032b518e0b..d69dfe75674 100644 --- a/board/phytec/phycore_am64x/phycore_am64x.env +++ b/board/phytec/phycore_am64x/phycore_am64x.env @@ -21,4 +21,4 @@ get_cmd=tftp spi_fdt_addr=0x700000 spi_image_addr=0x800000 -spi_ramdisk_addr=0x1e00000 +spi_ramdisk_addr=0x2200000 diff --git a/board/phytec/phycore_imx8mp/Kconfig b/board/phytec/phycore_imx8mp/Kconfig index bdf9e97beaa..caf9cb0c3c3 100644 --- a/board/phytec/phycore_imx8mp/Kconfig +++ b/board/phytec/phycore_imx8mp/Kconfig @@ -45,7 +45,6 @@ config PHYCORE_IMX8MP_RAM_SIZE_4GB config PHYCORE_IMX8MP_RAM_SIZE_8GB bool "8GB RAM" - select PHYCORE_IMX8MP_USE_2GHZ_RAM_TIMINGS help Set RAM size fix to 8GB for phyCORE-i.MX8MP. Only 2GHz RAMs are supported. @@ -54,7 +53,6 @@ endchoice config PHYCORE_IMX8MP_RAM_FREQ_FIX bool "Set phyCORE-i.MX8MP RAM frequency fix instead of detecting" - default false help RAM frequency is automatic being detected with the help of the EEPROM introspection data. Set RAM frequency to a fix value diff --git a/board/siemens/common/Kconfig b/board/siemens/common/Kconfig index 4ae12b1c973..3808257cd07 100644 --- a/board/siemens/common/Kconfig +++ b/board/siemens/common/Kconfig @@ -3,4 +3,5 @@ config FACTORYSET config DDR_SI_TEST bool "DDR signal integrity test implementations" + depends on TARGET_CAPRICORN default y diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index e6bedc38917..d827f728a08 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -25,28 +25,7 @@ #include <asm/gpio.h> #include <asm/io.h> -#define IOT2050_INFO_MAGIC 0x20502050 - -struct iot2050_info { - u32 magic; - u16 size; - char name[20 + 1]; - char serial[16 + 1]; - char mlfb[18 + 1]; - char uuid[32 + 1]; - char a5e[18 + 1]; - u8 mac_addr_cnt; - u8 mac_addr[8][ARP_HLEN]; - char seboot_version[40 + 1]; - u8 padding[3]; - u32 ddr_size_mb; -} __packed; - -/* - * Scratch SRAM (available before DDR RAM) contains extracted EEPROM data. - */ -#define IOT2050_INFO_DATA ((struct iot2050_info *) \ - TI_SRAM_SCRATCH_BOARD_EEPROM_START) +#include "../../../../drivers/sysinfo/iot2050.h" DECLARE_GLOBAL_DATA_PTR; @@ -117,6 +96,8 @@ static const char *m2_connector_mode_name[] = { static enum m2_connector_mode connector_mode; +static char iot2050_board_name[21]; + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) static void *connector_overlay; static u32 connector_overlay_size; @@ -149,37 +130,57 @@ static void set_pinvalue(const char *gpio_name, const char *label, int value) dm_gpio_set_value(&gpio, value); } +static bool setup_sysinfo(struct udevice **sysinfo_ptr) +{ + if (sysinfo_get(sysinfo_ptr)) { + pr_err("Could not find sysinfo device.\n"); + return false; + } + if (sysinfo_detect(*sysinfo_ptr)) { + pr_err("Board info parsing error\n"); + return false; + } + return true; +} + +static void get_board_name(void) +{ + struct udevice *sysinfo; + + if (iot2050_board_name[0] != 0) + return; + + if (!setup_sysinfo(&sysinfo)) + return; + + sysinfo_get_str(sysinfo, BOARD_NAME, sizeof(iot2050_board_name), + iot2050_board_name); +} + static bool board_is_advanced(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - return info->magic == IOT2050_INFO_MAGIC && - strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; + get_board_name(); + return strstr(iot2050_board_name, "IOT2050-ADVANCED") != NULL; } static bool board_is_pg1(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - - return info->magic == IOT2050_INFO_MAGIC && - (strcmp((char *)info->name, "IOT2050-BASIC") == 0 || - strcmp((char *)info->name, "IOT2050-ADVANCED") == 0); + get_board_name(); + return strcmp(iot2050_board_name, "IOT2050-BASIC") == 0 || + strcmp(iot2050_board_name, "IOT2050-ADVANCED") == 0; } static bool board_is_m2(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - - return info->magic == IOT2050_INFO_MAGIC && - strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; + get_board_name(); + return strcmp(iot2050_board_name, "IOT2050-ADVANCED-M2") == 0; } static bool board_is_sm(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - - return info->magic == IOT2050_INFO_MAGIC && - strcmp((char *)info->name, "IOT2050-ADVANCED-SM") == 0; + get_board_name(); + return strcmp(iot2050_board_name, "IOT2050-ADVANCED-SM") == 0; } static void remove_mmc1_target(void) @@ -206,33 +207,43 @@ static void enable_pcie_connector_power(void) void set_board_info_env(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - u8 __maybe_unused mac_cnt; + struct udevice *sysinfo; const char *fdtfile; + char buf[41]; - if (info->magic != IOT2050_INFO_MAGIC) { - pr_err("IOT2050: Board info parsing error!\n"); + if (env_get("board_uuid")) return; - } - if (env_get("board_uuid")) + if (!setup_sysinfo(&sysinfo)) return; - env_set("board_name", info->name); - env_set("board_serial", info->serial); - env_set("mlfb", info->mlfb); - env_set("board_uuid", info->uuid); - env_set("board_a5e", info->a5e); + if (sysinfo_get_str(sysinfo, BOARD_NAME, sizeof(buf), buf) == 0) + env_set("board_name", buf); + if (sysinfo_get_str(sysinfo, SYSID_SM_SYSTEM_SERIAL, sizeof(buf), buf) == 0) + env_set("board_serial", buf); + if (sysinfo_get_str(sysinfo, BOARD_MLFB, sizeof(buf), buf) == 0) + env_set("mlfb", buf); + if (sysinfo_get_str(sysinfo, BOARD_UUID, sizeof(buf), buf) == 0) + env_set("board_uuid", buf); + if (sysinfo_get_str(sysinfo, BOARD_A5E, sizeof(buf), buf) == 0) + env_set("board_a5e", buf); + if (sysinfo_get_str(sysinfo, BOARD_SEBOOT_VER, sizeof(buf), buf) == 0) + env_set("seboot_version", buf); env_set("fw_version", PLAIN_VERSION); - env_set("seboot_version", info->seboot_version); if (IS_ENABLED(CONFIG_NET)) { + int mac_cnt; + + mac_cnt = sysinfo_get_item_count(sysinfo, SYSID_BOARD_MAC_ADDR); /* set MAC addresses to ensure forwarding to the OS */ - for (mac_cnt = 0; mac_cnt < info->mac_addr_cnt; mac_cnt++) { - if (is_valid_ethaddr(info->mac_addr[mac_cnt])) - eth_env_set_enetaddr_by_index("eth", - mac_cnt + 1, - info->mac_addr[mac_cnt]); + for (int i = 0; i < mac_cnt; i++) { + u8 *mac = NULL; + size_t bytes = 0; + + sysinfo_get_data_by_index(sysinfo, SYSID_BOARD_MAC_ADDR, + i, (void **)&mac, &bytes); + if (bytes == ARP_HLEN && is_valid_ethaddr(mac)) + eth_env_set_enetaddr_by_index("eth", i + 1, mac); } } @@ -288,7 +299,7 @@ static void do_overlay_prepare(const char *overlay_path) return; fit_error: - pr_err("M.2 device tree overlay %s not available,\n", overlay_path); + pr_err("M.2 device tree overlay %s not available.\n", overlay_path); #endif } @@ -362,8 +373,15 @@ int board_init(void) int dram_init(void) { - struct iot2050_info *info = IOT2050_INFO_DATA; - gd->ram_size = ((phys_size_t)(info->ddr_size_mb)) << 20; + struct udevice *sysinfo; + u32 ddr_size_mb; + + if (!setup_sysinfo(&sysinfo)) + return -ENODEV; + + sysinfo_get_int(sysinfo, SYSID_BOARD_RAM_SIZE_MB, &ddr_size_mb); + + gd->ram_size = ((phys_size_t)(ddr_size_mb)) << 20; return 0; } @@ -405,18 +423,18 @@ int dram_init_banksize(void) #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { - struct iot2050_info *info = IOT2050_INFO_DATA; char upper_name[32]; + get_board_name(); + /* skip the prefix "ti/k3-am65x8-" */ name += 13; - if (info->magic != IOT2050_INFO_MAGIC || - strlen(name) >= sizeof(upper_name)) + if (strlen(name) >= sizeof(upper_name)) return -1; str_to_upper(name, upper_name, sizeof(upper_name)); - if (!strcmp(upper_name, (char *)info->name)) + if (!strcmp(upper_name, iot2050_board_name)) return 0; return -1; diff --git a/board/st/stm32f746-disco/MAINTAINERS b/board/st/stm32f746-disco/MAINTAINERS index 18e4c99c4fb..f9c3af6fb8b 100644 --- a/board/st/stm32f746-disco/MAINTAINERS +++ b/board/st/stm32f746-disco/MAINTAINERS @@ -1,5 +1,5 @@ STM32F746 DISCOVERY BOARD -M: Vikas Manocha <vikas.manocha@st.com> +M: Patrice Chotard <patrice.chotard@foss.st.com> S: Maintained F: doc/board/st/ F: board/st/stm32f746-disco diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index 8966a09501e..07bc8a5f0a2 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -76,42 +76,6 @@ u32 spl_boot_device(void) } #endif -int board_late_init(void) -{ - struct gpio_desc gpio = {}; - int node; - - node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1"); - if (node < 0) - return -1; - - gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio, - GPIOD_IS_OUT); - - if (dm_gpio_is_valid(&gpio)) { - dm_gpio_set_value(&gpio, 0); - mdelay(10); - dm_gpio_set_value(&gpio, 1); - } - - /* read button 1*/ - node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1"); - if (node < 0) - return -1; - - gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0, - &gpio, GPIOD_IS_IN); - - if (dm_gpio_is_valid(&gpio)) { - if (dm_gpio_get_value(&gpio)) - puts("usr button is at HIGH LEVEL\n"); - else - puts("usr button is at LOW LEVEL\n"); - } - - return 0; -} - int board_init(void) { #ifdef CONFIG_ETH_DESIGNWARE diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index f41bd6d603f..3e4d3e21988 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -103,6 +103,9 @@ void board_init_f(ulong dummy) JH7110_CLK_CPU_ROOT_MASK, BIT(JH7110_CLK_CPU_ROOT_SHIFT)); + /* Set USB overcurrent overflow pin disable */ + SYS_IOMUX_DIN_DISABLED(2); + ret = spl_board_init_f(); if (ret) { debug("spl_board_init_f init failed: %d\n", ret); @@ -118,6 +121,10 @@ int board_fit_config_name_match(const char *name) product_id = get_product_id_from_eeprom(); + /* Strip off prefix */ + if (strncmp(name, "starfive/", 9)) + return -EINVAL; + name += 9; if (!strncmp(product_id, "VF7110", 6)) { version = get_pcb_revision_from_eeprom(); if ((version == 'b' || version == 'B') && diff --git a/board/storopack/smegw01/smegw01.env b/board/storopack/smegw01/smegw01.env index 93de8669109..c0d408e4a20 100644 --- a/board/storopack/smegw01/smegw01.env +++ b/board/storopack/smegw01/smegw01.env @@ -12,21 +12,6 @@ setenv bootmenu_${emmc_priority} eMMC=run boot_emmc; \ setenv bootmenu_${sd_priority} SD=run boot_sd; #endif - -altbootcmd= - echo Performing rollback...; - if test "${mmcpart_committed}" = 1; then - setenv mmcpart 2; - setenv mmcpart_committed 2; - else - setenv mmcpart 1; - setenv mmcpart_committed 1; - fi; - setenv bootcount 0; - setenv upgrade_available; - setenv ustate 3; - saveenv; - run bootcmd; boot_emmc=setenv mmcdev_wanted 1; run persist_mmcdev; run bootcmd; boot_sd=setenv mmcdev_wanted 0; run persist_mmcdev; run bootcmd; bootcmd= diff --git a/board/sunxi/board.c b/board/sunxi/board.c index c7a2205ed61..ac9cefc6eac 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -563,7 +563,8 @@ void sunxi_board_init(void) #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_AXP221_POWER || defined CONFIG_AXP305_POWER || \ defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER || \ - defined CONFIG_AXP313_POWER || defined CONFIG_AXP717_POWER + defined CONFIG_AXP313_POWER || defined CONFIG_AXP717_POWER || \ + defined CONFIG_AXP803_POWER power_failed = axp_init(); if (IS_ENABLED(CONFIG_AXP_DISABLE_BOOT_ON_POWERON) && !power_failed) { @@ -581,6 +582,8 @@ void sunxi_board_init(void) #endif #ifdef CONFIG_AXP_DCDC2_VOLT power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); +#endif +#ifdef CONFIG_AXP_DCDC3_VOLT power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT); #endif #ifdef CONFIG_AXP_DCDC4_VOLT diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env index 7ef54079aa8..f19e158d8d6 100644 --- a/board/ti/am62px/am62px.env +++ b/board/ti/am62px/am62px.env @@ -1,5 +1,12 @@ #include <env/ti/ti_common.env> #include <env/ti/mmc.env> +#include <env/ti/k3_dfu.env> + +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +rproc_fw_binaries= 0 /lib/firmware/am62p-mcu-r5f0_0-fw name_kern=Image console=ttyS2,115200n8 @@ -7,7 +14,7 @@ args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 ${mtdparts} run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} -boot_targets=mmc1 mmc0 pxe dhcp +boot_targets=mmc1 mmc0 usb pxe dhcp boot=mmc mmcdev=1 bootpart=1:2 @@ -17,4 +24,4 @@ rd_spec=- #if CONFIG_BOOTMETH_ANDROID #include <env/ti/android.env> adtb_idx=3 -#endif
\ No newline at end of file +#endif diff --git a/board/ti/am62px/rm-cfg.yaml b/board/ti/am62px/rm-cfg.yaml index caa2f7a5a83..73da85eeade 100644 --- a/board/ti/am62px/rm-cfg.yaml +++ b/board/ti/am62px/rm-cfg.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/ # # Resource management configuration for AM62P # @@ -244,7 +244,7 @@ rm-cfg: subhdr: magic: 0x7B25 size: 8 - resasg_entries_size: 984 + resasg_entries_size: 1112 reserved: 0 resasg_entries: - @@ -303,31 +303,55 @@ rm-cfg: reserved: 0 - start_resource: 0 + num_resource: 2 + type: 1676 + host_id: 12 + reserved: 0 + - + start_resource: 2 + num_resource: 1 + type: 1676 + host_id: 35 + reserved: 0 + - + start_resource: 2 + num_resource: 1 + type: 1676 + host_id: 36 + reserved: 0 + - + start_resource: 3 + num_resource: 1 + type: 1676 + host_id: 30 + reserved: 0 + - + start_resource: 4 num_resource: 18 type: 1677 host_id: 12 reserved: 0 - - start_resource: 18 + start_resource: 22 num_resource: 6 type: 1677 host_id: 35 reserved: 0 - - start_resource: 18 + start_resource: 22 num_resource: 6 type: 1677 host_id: 36 reserved: 0 - - start_resource: 24 + start_resource: 28 num_resource: 2 type: 1677 host_id: 30 reserved: 0 - - start_resource: 26 - num_resource: 6 + start_resource: 30 + num_resource: 2 type: 1677 host_id: 128 reserved: 0 @@ -387,31 +411,55 @@ rm-cfg: reserved: 0 - start_resource: 0 + num_resource: 2 + type: 1695 + host_id: 12 + reserved: 0 + - + start_resource: 2 + num_resource: 1 + type: 1695 + host_id: 35 + reserved: 0 + - + start_resource: 2 + num_resource: 1 + type: 1695 + host_id: 36 + reserved: 0 + - + start_resource: 3 + num_resource: 1 + type: 1695 + host_id: 30 + reserved: 0 + - + start_resource: 4 num_resource: 18 type: 1696 host_id: 12 reserved: 0 - - start_resource: 18 + start_resource: 22 num_resource: 6 type: 1696 host_id: 35 reserved: 0 - - start_resource: 18 + start_resource: 22 num_resource: 6 type: 1696 host_id: 36 reserved: 0 - - start_resource: 24 + start_resource: 28 num_resource: 2 type: 1696 host_id: 30 reserved: 0 - - start_resource: 26 - num_resource: 6 + start_resource: 30 + num_resource: 2 type: 1696 host_id: 128 reserved: 0 @@ -476,13 +524,13 @@ rm-cfg: host_id: 12 reserved: 0 - - start_resource: 45 + start_resource: 44 num_resource: 35 type: 1802 host_id: 35 reserved: 0 - - start_resource: 45 + start_resource: 44 num_resource: 35 type: 1802 host_id: 36 @@ -494,31 +542,31 @@ rm-cfg: host_id: 30 reserved: 0 - - start_resource: 14 + start_resource: 13 num_resource: 512 type: 1805 host_id: 12 reserved: 0 - - start_resource: 526 + start_resource: 525 num_resource: 256 type: 1805 host_id: 35 reserved: 0 - - start_resource: 526 + start_resource: 525 num_resource: 256 type: 1805 host_id: 36 reserved: 0 - - start_resource: 782 + start_resource: 781 num_resource: 128 type: 1805 host_id: 30 reserved: 0 - - start_resource: 910 + start_resource: 909 num_resource: 626 type: 1805 host_id: 128 @@ -645,17 +693,29 @@ rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 64 + num_resource: 32 type: 1937 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 64 + num_resource: 32 type: 1937 host_id: 36 reserved: 0 - + start_resource: 51 + num_resource: 32 + type: 1937 + host_id: 12 + reserved: 0 + - + start_resource: 51 + num_resource: 32 + type: 1937 + host_id: 30 + reserved: 0 + - start_resource: 83 num_resource: 8 type: 1938 @@ -699,17 +759,29 @@ rm-cfg: reserved: 0 - start_resource: 118 - num_resource: 16 + num_resource: 6 type: 1943 host_id: 12 reserved: 0 - start_resource: 118 - num_resource: 16 + num_resource: 6 type: 1943 host_id: 36 reserved: 0 - + start_resource: 124 + num_resource: 10 + type: 1943 + host_id: 12 + reserved: 0 + - + start_resource: 124 + num_resource: 10 + type: 1943 + host_id: 30 + reserved: 0 + - start_resource: 134 num_resource: 8 type: 1944 @@ -765,17 +837,29 @@ rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 8 + num_resource: 4 type: 1956 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 8 + num_resource: 4 type: 1956 host_id: 36 reserved: 0 - + start_resource: 23 + num_resource: 4 + type: 1956 + host_id: 12 + reserved: 0 + - + start_resource: 23 + num_resource: 4 + type: 1956 + host_id: 30 + reserved: 0 + - start_resource: 27 num_resource: 1 type: 1957 @@ -861,17 +945,29 @@ rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 16 + num_resource: 6 type: 1964 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 16 + num_resource: 6 type: 1964 host_id: 36 reserved: 0 - + start_resource: 25 + num_resource: 10 + type: 1964 + host_id: 12 + reserved: 0 + - + start_resource: 25 + num_resource: 10 + type: 1964 + host_id: 30 + reserved: 0 + - start_resource: 20 num_resource: 1 type: 1965 diff --git a/board/ti/am62px/tifs-rm-cfg.yaml b/board/ti/am62px/tifs-rm-cfg.yaml index a80a2750467..80269748057 100644 --- a/board/ti/am62px/tifs-rm-cfg.yaml +++ b/board/ti/am62px/tifs-rm-cfg.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/ # # Resource management configuration for AM62P # @@ -244,7 +244,7 @@ tifs-rm-cfg: subhdr: magic: 0x7B25 size: 8 - resasg_entries_size: 840 + resasg_entries_size: 904 reserved: 0 resasg_entries: - @@ -423,13 +423,13 @@ tifs-rm-cfg: reserved: 0 - start_resource: 44 - num_resource: 36 + num_resource: 35 type: 1802 host_id: 35 reserved: 0 - start_resource: 44 - num_resource: 36 + num_resource: 35 type: 1802 host_id: 36 reserved: 0 @@ -555,17 +555,29 @@ tifs-rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 64 + num_resource: 32 type: 1937 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 64 + num_resource: 32 type: 1937 host_id: 36 reserved: 0 - + start_resource: 51 + num_resource: 32 + type: 1937 + host_id: 12 + reserved: 0 + - + start_resource: 51 + num_resource: 32 + type: 1937 + host_id: 30 + reserved: 0 + - start_resource: 83 num_resource: 8 type: 1938 @@ -609,17 +621,29 @@ tifs-rm-cfg: reserved: 0 - start_resource: 118 - num_resource: 16 + num_resource: 6 type: 1943 host_id: 12 reserved: 0 - start_resource: 118 - num_resource: 16 + num_resource: 6 type: 1943 host_id: 36 reserved: 0 - + start_resource: 124 + num_resource: 10 + type: 1943 + host_id: 12 + reserved: 0 + - + start_resource: 124 + num_resource: 10 + type: 1943 + host_id: 30 + reserved: 0 + - start_resource: 134 num_resource: 8 type: 1944 @@ -675,17 +699,29 @@ tifs-rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 8 + num_resource: 4 type: 1956 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 8 + num_resource: 4 type: 1956 host_id: 36 reserved: 0 - + start_resource: 23 + num_resource: 4 + type: 1956 + host_id: 12 + reserved: 0 + - + start_resource: 23 + num_resource: 4 + type: 1956 + host_id: 30 + reserved: 0 + - start_resource: 27 num_resource: 1 type: 1957 @@ -771,17 +807,29 @@ tifs-rm-cfg: reserved: 0 - start_resource: 19 - num_resource: 16 + num_resource: 6 type: 1964 host_id: 12 reserved: 0 - start_resource: 19 - num_resource: 16 + num_resource: 6 type: 1964 host_id: 36 reserved: 0 - + start_resource: 25 + num_resource: 10 + type: 1964 + host_id: 12 + reserved: 0 + - + start_resource: 25 + num_resource: 10 + type: 1964 + host_id: 30 + reserved: 0 + - start_resource: 20 num_resource: 1 type: 1965 diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env index 078cc4b5ac9..60b5fd5e6ca 100644 --- a/board/ti/am62x/am62x.env +++ b/board/ti/am62x/am62x.env @@ -2,6 +2,12 @@ #include <env/ti/mmc.env> #include <env/ti/k3_dfu.env> +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +rproc_fw_binaries= 0 /lib/firmware/am62-mcu-m4f0_0-fw + name_kern=Image console=ttyS2,115200n8 args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 diff --git a/board/ti/am64x/am64x.env b/board/ti/am64x/am64x.env index 8ad805a613c..c8ab57b807c 100644 --- a/board/ti/am64x/am64x.env +++ b/board/ti/am64x/am64x.env @@ -2,6 +2,12 @@ #include <env/ti/mmc.env> #include <env/ti/k3_dfu.env> +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +rproc_fw_binaries= 0 /lib/firmware/am64-mcu-m4f0_0-fw 1 /lib/firmware/am64-main-r5f0_0-fw 2 /lib/firmware/am64-main-r5f0_1-fw 3 /lib/firmware/am64-main-r5f1_0-fw 4 /lib/firmware/am64-main-r5f1_1-fw + name_kern=Image console=ttyS2,115200n8 args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 ${mtdparts} diff --git a/board/ti/j7200/Kconfig b/board/ti/j7200/Kconfig new file mode 100644 index 00000000000..093d23e7bf8 --- /dev/null +++ b/board/ti/j7200/Kconfig @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ +# Lokesh Vutla <lokeshvutla@ti.com> + +if TARGET_J7200_A72_EVM + +config SYS_BOARD + default "j7200" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j721e_evm" + +config ENV_SOURCE_FILE + default "j7200" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J7200_R5_EVM + +config SYS_BOARD + default "j7200" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j721e_evm" + +config ENV_SOURCE_FILE + default "j7200" + +source "board/ti/common/Kconfig" + +endif diff --git a/board/ti/j7200/MAINTAINERS b/board/ti/j7200/MAINTAINERS new file mode 100644 index 00000000000..626141367a5 --- /dev/null +++ b/board/ti/j7200/MAINTAINERS @@ -0,0 +1,7 @@ +J7200 BOARD +M: Tom Rini <trini@konsulko.com> +S: Maintained +F: board/ti/j7200 +F: include/configs/j7200_evm.h +F: configs/j7200_evm_r5_defconfig +F: configs/j7200_evm_a72_defconfig diff --git a/board/ti/j7200/Makefile b/board/ti/j7200/Makefile new file mode 100644 index 00000000000..4ae69aaea7b --- /dev/null +++ b/board/ti/j7200/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ../j721e/evm.o diff --git a/board/ti/j721e/board-cfg_j7200.yaml b/board/ti/j7200/board-cfg.yaml index a1e55a26be5..a1e55a26be5 100644 --- a/board/ti/j721e/board-cfg_j7200.yaml +++ b/board/ti/j7200/board-cfg.yaml diff --git a/board/ti/j7200/j7200.env b/board/ti/j7200/j7200.env new file mode 100644 index 00000000000..6cc92bf0d8d --- /dev/null +++ b/board/ti/j7200/j7200.env @@ -0,0 +1,40 @@ +#include <env/ti/ti_common.env> +#include <env/ti/mmc.env> +#include <env/ti/ufs.env> +#include <env/ti/k3_dfu.env> + +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + +name_kern=Image +console=ttyS2,115200n8 +args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 + ${mtdparts} +run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} + +#if CONFIG_TARGET_J7200_R5_EVM +addr_mcur5f0_0load=0x89000000 +name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw +#endif + +boot_targets=mmc1 mmc0 usb pxe dhcp +boot=mmc +mmcdev=1 +bootpart=1:2 +bootdir=/boot +rd_spec=- + +#if CONFIG_TARGET_J7200_A72_EVM +do_main_cpsw0_qsgmii_phyinit=1 +init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17; + gpio clear gpio@22_16 +main_cpsw0_qsgmii_phyinit= + if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then + run init_main_cpsw0_qsgmii_phy; + fi; +#endif + +#if CONFIG_TARGET_J7200_A72_EVM +rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw +#endif diff --git a/board/ti/j721e/pm-cfg_j7200.yaml b/board/ti/j7200/pm-cfg.yaml index 85cd2c9dbca..85cd2c9dbca 100644 --- a/board/ti/j721e/pm-cfg_j7200.yaml +++ b/board/ti/j7200/pm-cfg.yaml diff --git a/board/ti/j721e/rm-cfg_j7200.yaml b/board/ti/j7200/rm-cfg.yaml index f83184bbfc0..f83184bbfc0 100644 --- a/board/ti/j721e/rm-cfg_j7200.yaml +++ b/board/ti/j7200/rm-cfg.yaml diff --git a/board/ti/j721e/sec-cfg_j7200.yaml b/board/ti/j7200/sec-cfg.yaml index 4726ac24a38..4726ac24a38 100644 --- a/board/ti/j721e/sec-cfg_j7200.yaml +++ b/board/ti/j7200/sec-cfg.yaml diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index 6990f6ef4a4..7c7e23988d8 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -38,39 +38,3 @@ config ENV_SOURCE_FILE source "board/ti/common/Kconfig" endif - -if TARGET_J7200_A72_EVM - -config SYS_BOARD - default "j721e" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "j721e_evm" - -config ENV_SOURCE_FILE - default "j721e" - -source "board/ti/common/Kconfig" - -endif - -if TARGET_J7200_R5_EVM - -config SYS_BOARD - default "j721e" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "j721e_evm" - -config ENV_SOURCE_FILE - default "j721e" - -source "board/ti/common/Kconfig" - -endif diff --git a/board/ti/j721e/MAINTAINERS b/board/ti/j721e/MAINTAINERS index 06aba53d9b0..19199dbeadd 100644 --- a/board/ti/j721e/MAINTAINERS +++ b/board/ti/j721e/MAINTAINERS @@ -7,5 +7,3 @@ F: configs/j721e_evm_r5_defconfig F: configs/j721e_evm_a72_defconfig F: configs/j721e_sk_r5_defconfig F: configs/j721e_sk_a72_defconfig -F: configs/j7200_evm_r5_defconfig -F: configs/j7200_evm_a72_defconfig diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env index 38bfd7d4963..e5b4225b3ce 100644 --- a/board/ti/j721e/j721e.env +++ b/board/ti/j721e/j721e.env @@ -16,9 +16,6 @@ run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} #if CONFIG_TARGET_J721E_R5_EVM addr_mcur5f0_0load=0x89000000 name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw -#elif CONFIG_TARGET_J7200_R5_EVM -addr_mcur5f0_0load=0x89000000 -name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw #endif boot_targets=mmc1 mmc0 usb pxe dhcp @@ -28,15 +25,7 @@ bootpart=1:2 bootdir=/boot rd_spec=- -#if CONFIG_TARGET_J7200_A72_EVM -do_main_cpsw0_qsgmii_phyinit=1 -init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17; - gpio clear gpio@22_16 -main_cpsw0_qsgmii_phyinit= - if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then - run init_main_cpsw0_qsgmii_phy; - fi; -#elif CONFIG_TARGET_J721E_A72_EVM +#if CONFIG_TARGET_J721E_A72_EVM init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17; gpio clear gpio@22_16 main_cpsw0_qsgmii_phyinit= @@ -51,7 +40,3 @@ main_cpsw0_qsgmii_phyinit= #if CONFIG_TARGET_J721E_A72_EVM rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw #endif - -#if CONFIG_TARGET_J7200_A72_EVM -rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw -#endif diff --git a/board/ti/j722s/j722s.env b/board/ti/j722s/j722s.env index 10d62034e1a..4cc66e8d6da 100644 --- a/board/ti/j722s/j722s.env +++ b/board/ti/j722s/j722s.env @@ -1,5 +1,6 @@ #include <env/ti/ti_common.env> #include <env/ti/mmc.env> +#include <env/ti/k3_dfu.env> #if CONFIG_CMD_REMOTEPROC #include <env/ti/k3_rproc.env> diff --git a/board/ti/j784s4/Kconfig b/board/ti/j784s4/Kconfig index 490c7be66b3..de95ac575d7 100644 --- a/board/ti/j784s4/Kconfig +++ b/board/ti/j784s4/Kconfig @@ -35,3 +35,36 @@ config SPL_LDSCRIPT source "board/ti/common/Kconfig" endif + +if TARGET_J742S2_A72_EVM + +config SYS_BOARD + default "j784s4" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j784s4_evm" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J742S2_R5_EVM + +config SYS_BOARD + default "j784s4" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j784s4_evm" + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +source "board/ti/common/Kconfig" + +endif diff --git a/board/ti/j784s4/MAINTAINERS b/board/ti/j784s4/MAINTAINERS index e92e8d03cb3..b289c639f3f 100644 --- a/board/ti/j784s4/MAINTAINERS +++ b/board/ti/j784s4/MAINTAINERS @@ -20,3 +20,13 @@ F: arch/arm/dts/k3-am69-sk-u-boot.dtsi F: arch/arm/dts/k3-am69-r5-sk.dts F: configs/am69_sk_r5_defconfig F: configs/am69_sk_a72_defconfig + +J742S2 EVM BOARD +M: Manorit Chawdhry <m-chawdhry@ti.com> +S: Maintained +F: arch/arm/dts/k3-j784s4-j742s2-ddr.dtsi +F: arch/arm/dts/k3-j742s2-r5-evm.dts +F: arch/arm/dts/k3-j742s2-evm-u-boot.dtsi +F: arch/arm/dts/k3-j742s2-ddr-evm-lp4-4266.dtsi +F: configs/j742s2_evm_r5_defconfig +F: configs/j742s2_evm_a72_defconfig diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env index f5b72c7505e..9e1741be424 100644 --- a/board/ti/j784s4/j784s4.env +++ b/board/ti/j784s4/j784s4.env @@ -20,4 +20,8 @@ bootpart=1:2 bootdir=/boot rd_spec=- +#if CONFIG_TARGET_J784S4_A72_EVM rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw +#elif CONFIG_TARGET_J742S2_A72_EVM +rproc_fw_binaries= 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw +#endif diff --git a/board/ti/j784s4/rm-cfg.yaml b/board/ti/j784s4/rm-cfg.yaml index a448bd2e1e0..6968d317522 100644 --- a/board/ti/j784s4/rm-cfg.yaml +++ b/board/ti/j784s4/rm-cfg.yaml @@ -406,49 +406,49 @@ rm-cfg: reserved: 0 - start_resource: 16 - num_resource: 16 + num_resource: 32 type: 17998 host_id: 12 reserved: 0 - - start_resource: 32 - num_resource: 16 + start_resource: 16 + num_resource: 32 type: 17998 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 8 + num_resource: 16 type: 17999 host_id: 12 reserved: 0 - - start_resource: 8 - num_resource: 8 + start_resource: 0 + num_resource: 16 type: 17999 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 16 + num_resource: 32 type: 18017 host_id: 12 reserved: 0 - - start_resource: 16 - num_resource: 16 + start_resource: 0 + num_resource: 32 type: 18017 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 8 + num_resource: 16 type: 18018 host_id: 12 reserved: 0 - - start_resource: 8 - num_resource: 8 + start_resource: 0 + num_resource: 16 type: 18018 host_id: 35 reserved: 0 diff --git a/board/ti/j784s4/tifs-rm-cfg.yaml b/board/ti/j784s4/tifs-rm-cfg.yaml index 1c5faffb8e9..992ea23155a 100644 --- a/board/ti/j784s4/tifs-rm-cfg.yaml +++ b/board/ti/j784s4/tifs-rm-cfg.yaml @@ -250,49 +250,49 @@ tifs-rm-cfg: resasg_entries: - start_resource: 16 - num_resource: 16 + num_resource: 32 type: 17998 host_id: 12 reserved: 0 - - start_resource: 32 - num_resource: 16 + start_resource: 16 + num_resource: 32 type: 17998 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 8 + num_resource: 16 type: 17999 host_id: 12 reserved: 0 - - start_resource: 8 - num_resource: 8 + start_resource: 0 + num_resource: 16 type: 17999 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 16 + num_resource: 32 type: 18017 host_id: 12 reserved: 0 - - start_resource: 16 - num_resource: 16 + start_resource: 0 + num_resource: 32 type: 18017 host_id: 35 reserved: 0 - start_resource: 0 - num_resource: 8 + num_resource: 16 type: 18018 host_id: 12 reserved: 0 - - start_resource: 8 - num_resource: 8 + start_resource: 0 + num_resource: 16 type: 18018 host_id: 35 reserved: 0 diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index ec0f223c4aa..e0a7c661270 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -36,6 +36,7 @@ #include <dwc_ahsata.h> #include <env.h> #include <fsl_esdhc_imx.h> +#include <i2c.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -77,6 +78,8 @@ DECLARE_GLOBAL_DATA_PTR; #define APALIS_IMX6_SATA_INIT_RETRIES 10 +#define I2C_PWR 1 + int dram_init(void) { /* use the DDR controllers configured size */ @@ -689,6 +692,32 @@ int board_init(void) return 0; } +static bool is_som_variant_1_2(void) +{ + struct udevice *bus; + struct udevice *i2c_dev; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PWR, &bus); + if (ret) { + printf("Failed to get I2C_PWR\n"); + return false; + } + + /* V1.2 uses the TLA2024 at 0x49 instead of the STMPE811 at 0x41 */ + ret = dm_i2c_probe(bus, 0x49, 0, &i2c_dev); + + return (bool)!ret; +} + +static void select_dt_from_module_version(void) +{ + if (is_som_variant_1_2()) + env_set("variant", "-v1.2"); + else + env_set("variant", ""); +} + #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { @@ -696,6 +725,8 @@ int board_late_init(void) char env_str[256]; u32 rev; + select_dt_from_module_version(); + rev = get_board_revision(); snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev); env_set("board_rev", env_str); diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 64cf99e9cfc..69a3c5f3dfd 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -33,6 +33,7 @@ #include <cpu.h> #include <dm/platform_data/serial_mxc.h> #include <fsl_esdhc_imx.h> +#include <i2c.h> #include <imx_thermal.h> #include <miiphy.h> #include <netdev.h> @@ -71,6 +72,8 @@ DECLARE_GLOBAL_DATA_PTR; #define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST) +#define I2C_PWR 1 + int dram_init(void) { /* use the DDR controllers configured size */ @@ -609,6 +612,32 @@ int board_init(void) return 0; } +static bool is_som_variant_1_2(void) +{ + struct udevice *bus; + struct udevice *i2c_dev; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PWR, &bus); + if (ret) { + printf("Failed to get I2C_PWR\n"); + return false; + } + + /* V1.2 uses the TLA2024 at 0x49 instead of the STMPE811 at 0x41 */ + ret = dm_i2c_probe(bus, 0x49, 0, &i2c_dev); + + return (bool)!ret; +} + +static void select_dt_from_module_version(void) +{ + if (is_som_variant_1_2()) + env_set("variant", "-v1.2"); + else + env_set("variant", ""); +} + #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { @@ -616,6 +645,8 @@ int board_late_init(void) char env_str[256]; u32 rev; + select_dt_from_module_version(); + rev = get_board_revision(); snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev); env_set("board_rev", env_str); diff --git a/board/xiaomi/mocha/Kconfig b/board/xiaomi/mocha/Kconfig new file mode 100644 index 00000000000..25c61d4169e --- /dev/null +++ b/board/xiaomi/mocha/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MOCHA + +config SYS_BOARD + default "mocha" + +config SYS_VENDOR + default "xiaomi" + +config SYS_CONFIG_NAME + default "mocha" + +endif diff --git a/board/xiaomi/mocha/MAINTAINERS b/board/xiaomi/mocha/MAINTAINERS new file mode 100644 index 00000000000..c3871a15a35 --- /dev/null +++ b/board/xiaomi/mocha/MAINTAINERS @@ -0,0 +1,8 @@ +MOCHA BOARD +M: Svyatoslav Ryhel <clamor95@gmail.com> +S: Maintained +F: arch/arm/dts/tegra124-xiaomi-mocha.dts +F: board/xiaomi/mocha/ +F: configs/mocha_defconfig +F: doc/board/xiaomi/mocha.rst +F: include/configs/mocha.h diff --git a/board/xiaomi/mocha/Makefile b/board/xiaomi/mocha/Makefile new file mode 100644 index 00000000000..c42e42639b3 --- /dev/null +++ b/board/xiaomi/mocha/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2024, Svyatoslav Ryhel <clamor95@gmail.com> +# + +obj-$(CONFIG_XPL_BUILD) += mocha-spl.o + +obj-y += mocha.o + diff --git a/board/xiaomi/mocha/mocha-spl.c b/board/xiaomi/mocha/mocha-spl.c new file mode 100644 index 00000000000..5fb11df0a93 --- /dev/null +++ b/board/xiaomi/mocha/mocha-spl.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Mocha SPL stage configuration + * + * (C) Copyright 2024 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +#define TPS65913_I2C_ADDR (0x58 << 1) + +#define TPS65913_SMPS12_CTRL 0x20 +#define TPS65913_SMPS12_VOLTAGE 0x23 +#define TPS65913_SMPS45_CTRL 0x28 +#define TPS65913_SMPS45_VOLTAGE 0x2B +#define TPS65913_SMPS7_CTRL 0x30 +#define TPS65913_SMPS7_VOLTAGE 0x33 + +#define TPS65913_SMPS12_CTRL_DATA (0x5100 | TPS65913_SMPS12_CTRL) +#define TPS65913_SMPS12_VOLTAGE_DATA (0x3800 | TPS65913_SMPS12_VOLTAGE) +#define TPS65913_SMPS45_CTRL_DATA (0x5100 | TPS65913_SMPS45_CTRL) +#define TPS65913_SMPS45_VOLTAGE_DATA (0x3800 | TPS65913_SMPS45_VOLTAGE) +#define TPS65913_SMPS7_CTRL_DATA (0x5100 | TPS65913_SMPS7_CTRL) +#define TPS65913_SMPS7_VOLTAGE_DATA (0x4700 | TPS65913_SMPS7_VOLTAGE) + +void pmic_enable_cpu_vdd(void) +{ + /* Set CORE VDD to 1.150V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_CTRL_DATA); + + udelay(1000); + + /* Set CPU VDD to 1.0V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_CTRL_DATA); + udelay(10 * 1000); + + /* Set GPU VDD to 1.0V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_CTRL_DATA); + udelay(10 * 1000); +} diff --git a/board/xiaomi/mocha/mocha.c b/board/xiaomi/mocha/mocha.c new file mode 100644 index 00000000000..5026d541a5f --- /dev/null +++ b/board/xiaomi/mocha/mocha.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2024 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <dm.h> +#include <fdt_support.h> +#include <i2c.h> +#include <log.h> + +#ifdef CONFIG_MMC_SDHCI_TEGRA + +#define TPS65913_I2C_ADDRESS 0x58 +#define TPS65913_PRIMARY_SECONDARY_PAD2 0xfb +#define GPIO_4 BIT(0) +#define TPS65913_PRIMARY_SECONDARY_PAD3 0xfe +#define DVFS2 BIT(1) +#define DVFS1 BIT(0) + +/* We are using this function only till palmas pinctrl driver is available */ +void pin_mux_mmc(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65913_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("%s: cannot find PMIC I2C chip\n", __func__); + return; + } + + /* GPIO4 function has to be GPIO */ + dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD2, + GPIO_4, 0); + + /* DVFS1 and DVFS2 are disabled */ + dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD3, + DVFS2 | DVFS1, 0); +} +#endif diff --git a/board/xiaomi/mocha/mocha.env b/board/xiaomi/mocha/mocha.env new file mode 100644 index 00000000000..d93e24316f6 --- /dev/null +++ b/board/xiaomi/mocha/mocha.env @@ -0,0 +1,23 @@ +#include <env/nvidia/prod_upd.env> + +button_cmd_0_name=Volume Down +button_cmd_0=bootmenu +button_cmd_1_name=Hall sensor (back) +button_cmd_1=poweroff +button_cmd_1_name=Hall sensor (front) +button_cmd_1=poweroff + +partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs} + +boot_block_size_r=0x400000 +boot_block_size=0x2000 +boot_dev=1 + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu +bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_3=update bootloader=run flash_uboot +bootmenu_4=reboot RCM=enterrcm +bootmenu_5=reboot=reset +bootmenu_6=power off=poweroff +bootmenu_delay=-1 |