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-rw-r--r--cpu/arm920t/interrupts.c2
-rw-r--r--cpu/arm926ejs/start.S3
-rw-r--r--cpu/arm946es/Makefile1
-rw-r--r--cpu/arm946es/cpu.c15
-rw-r--r--cpu/arm_intcm/cpu.c4
-rw-r--r--cpu/arm_intcm/interrupts.c6
-rw-r--r--cpu/arm_intcm/start.S4
7 files changed, 16 insertions, 19 deletions
diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c
index 1d254c76d76..a43a3ed4fe9 100644
--- a/cpu/arm920t/interrupts.c
+++ b/cpu/arm920t/interrupts.c
@@ -165,7 +165,7 @@ void do_irq (struct pt_regs *pt_regs)
/* ASSUMED to be a timer interrupt */
/* Just clear it - count handled in */
/* integratorap.c */
- *(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
+ *(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
#else
printf ("interrupt request\n");
show_regs (pt_regs);
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index dfa6e7fa314..5f5a1c59690 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -395,7 +395,7 @@ fiq:
# ifdef CONFIG_INTEGRATOR
- /* Satisfied by Integrator routine (AP or CP) */
+ /* Satisfied by Integrator routine (AP or CP) */
#else
@@ -414,4 +414,3 @@ rstctl1:
.word 0xfffece10
#endif /* #ifdef CONFIG_INTEGRATOR */
-
diff --git a/cpu/arm946es/Makefile b/cpu/arm946es/Makefile
index 9a0e21795a0..203278e9cff 100644
--- a/cpu/arm946es/Makefile
+++ b/cpu/arm946es/Makefile
@@ -41,4 +41,3 @@ $(LIB): $(OBJS)
sinclude .depend
#########################################################################
-
diff --git a/cpu/arm946es/cpu.c b/cpu/arm946es/cpu.c
index ea75fe23083..ba0a4e496e2 100644
--- a/cpu/arm946es/cpu.c
+++ b/cpu/arm946es/cpu.c
@@ -16,7 +16,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -39,7 +39,7 @@ static unsigned long read_p15_c1 (void)
unsigned long value;
__asm__ __volatile__(
- "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
+ "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
: "=r" (value)
:
: "memory");
@@ -57,7 +57,7 @@ static void write_p15_c1 (unsigned long value)
printf ("write %08lx to p15/c1\n", value);
#endif
__asm__ __volatile__(
- "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
+ "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
:
: "r" (value)
: "memory");
@@ -82,7 +82,7 @@ static void cp_delay (void)
#define C1_SYS_PROT (1<<8) /* system protection */
#define C1_ROM_PROT (1<<9) /* ROM protection */
#define C1_IC (1<<12) /* icache off/on */
-#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
+#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
int cpu_init (void)
@@ -112,10 +112,10 @@ int cleanup_before_linux (void)
disable_interrupts ();
- /* ARM926E-S needs the protection unit enabled for the icache to have
- * been enabled - left for possible later use
+ /* ARM926E-S needs the protection unit enabled for the icache to have
+ * been enabled - left for possible later use
* should turn off the protection unit as well....
- */
+ */
/* turn off I/D-cache */
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
i &= ~(C1_DC | C1_IC);
@@ -161,4 +161,3 @@ int icache_status (void)
{
return (read_p15_c1 () & C1_IC) != 0;
}
-
diff --git a/cpu/arm_intcm/cpu.c b/cpu/arm_intcm/cpu.c
index 34cd5af82b2..d03b09dad81 100644
--- a/cpu/arm_intcm/cpu.c
+++ b/cpu/arm_intcm/cpu.c
@@ -58,8 +58,8 @@ int cleanup_before_linux (void)
disable_interrupts ();
- /* Since the CM has unknown processor we do not support
- * cache operations
+ /* Since the CM has unknown processor we do not support
+ * cache operations
*/
return (0);
diff --git a/cpu/arm_intcm/interrupts.c b/cpu/arm_intcm/interrupts.c
index e41ac5ac5b9..1763176912b 100644
--- a/cpu/arm_intcm/interrupts.c
+++ b/cpu/arm_intcm/interrupts.c
@@ -40,16 +40,16 @@
#ifndef CONFIG_INTEGRATOR
/* Only to be used for integrator/AP or /CP */
-/* Allows U-Boot to be used with any ARM supplied core module (CM),
+/* Allows U-Boot to be used with any ARM supplied core module (CM),
* provided the ARM boot monitor, or similar software,
* runs first to set up the platform e.g. map writeable memory to 0x00000000
* - see Integrator User Guides
* Versatile has a supported cpu - arm926ejs
* Some integrator CMs cpus are supported
* CM926EJ-S, CM946E-S
- * For platforms with supported cpus U-Boot can be used as the sole boot
+ * For platforms with supported cpus U-Boot can be used as the sole boot
* monitor/loader - it will configure the platform itself
- * Also U-Boot may be faster/smaller in those cases since specific
+ * Also U-Boot may be faster/smaller in those cases since specific
* qualities of the cpu and/or CM can be used e.g i and/or d caches etc.
*/
#endif
diff --git a/cpu/arm_intcm/start.S b/cpu/arm_intcm/start.S
index ccfd1815a42..75fe9174ab9 100644
--- a/cpu/arm_intcm/start.S
+++ b/cpu/arm_intcm/start.S
@@ -354,14 +354,14 @@ fiq:
#else
.align 5
-.globl irq
+.globl irq
irq:
get_bad_stack
bad_save_user_regs
bl do_irq
.align 5
-.globl fiq
+.globl fiq
fiq:
get_bad_stack
bad_save_user_regs