diff options
Diffstat (limited to 'doc/board')
| -rw-r--r-- | doc/board/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/nxp/imx91_11x11_evk.rst | 70 | ||||
| -rw-r--r-- | doc/board/nxp/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/phytec/imx93-phycore.rst (renamed from doc/board/phytec/imx93-phyboard-segin.rst) | 8 | ||||
| -rw-r--r-- | doc/board/phytec/index.rst | 3 | ||||
| -rw-r--r-- | doc/board/phytec/phycore-am62ax.rst | 183 | ||||
| -rw-r--r-- | doc/board/sophgo/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/sophgo/licheerv_nano.rst | 72 | ||||
| -rw-r--r-- | doc/board/spacemit/bananapi-f3.rst | 106 | ||||
| -rw-r--r-- | doc/board/spacemit/index.rst | 9 | ||||
| -rw-r--r-- | doc/board/ti/k3.rst | 1 |
11 files changed, 450 insertions, 5 deletions
diff --git a/doc/board/index.rst b/doc/board/index.rst index b54c1748d57..b1c470eb2cb 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -55,6 +55,7 @@ Board-specific doc sipeed/index socionext/index sophgo/index + spacemit/index st/index starfive/index ste/index diff --git a/doc/board/nxp/imx91_11x11_evk.rst b/doc/board/nxp/imx91_11x11_evk.rst new file mode 100644 index 00000000000..3ec3d28c1c2 --- /dev/null +++ b/doc/board/nxp/imx91_11x11_evk.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx91_11x11_EVK +======================= + +U-Boot for the NXP i.MX91 11x11 EVK + +Quick Start +----------- + +- Get and Build the ARM Trusted firmware +- Get the DDR firmware +- Get ahab-container.img +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +Note: srctree is U-Boot source directory +Get ATF from: https://github.com/nxp-imx/imx-atf/ +branch: lf_v2.10 + +.. code-block:: bash + + $ unset LDFLAGS + $ make PLAT=imx91 bl31 + $ cp build/imx91/release/bl31.bin $(srctree) + +Get the DDR firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin + $ chmod +x firmware-imx-8.21.bin + $ ./firmware-imx-8.21.bin + $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree) + +Get ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin + $ chmod +x firmware-ele-imx-1.3.0-17945fc.bin + $ ./firmware-ele-imx-1.3.0-17945fc.bin + $ cp firmware-ele-imx-1.3.0-17945fc/mx91a0-ahab-container.img $(srctree) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx91_11x11_evk_defconfig or imx91_11x11_evk_inline_ecc_defconfig + $ make + +- Inline ECC is to enable DDR ECC feature with imx91_11x11_evk_inline_ecc_defconfig + +Burn the flash.bin to MicroSD card offset 32KB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc + +Boot +---- + +Set Boot switch to SD boot diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index 734bab69807..8ca4b561986 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -12,6 +12,7 @@ NXP Semiconductors imx8mq_evk imx8qxp_mek imx8ulp_evk + imx91_11x11_evk imx93_9x9_qsb imx93_11x11_evk imxrt1020-evk diff --git a/doc/board/phytec/imx93-phyboard-segin.rst b/doc/board/phytec/imx93-phycore.rst index ce17fbec78d..bd110a3ebee 100644 --- a/doc/board/phytec/imx93-phyboard-segin.rst +++ b/doc/board/phytec/imx93-phycore.rst @@ -1,9 +1,9 @@ .. SPDX-License-Identifier: GPL-2.0+ -phyBOARD-Segin-i.MX93 -===================== +phyCORE-i.MX 93 +=============== -U-Boot for the phyBOARD-Segin-i.MX93. +U-Boot for the phyCORE-i.MX 93. Quick Start ----------- @@ -51,7 +51,7 @@ Build U-Boot .. code-block:: bash - $ make imx93-phyboard-segin_defconfig + $ make imx93-phycore_defconfig $ make Burn the flash.bin to MicroSD card offset 32KB: diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst index 99848a9e958..1ae30c2dcd5 100644 --- a/doc/board/phytec/index.rst +++ b/doc/board/phytec/index.rst @@ -7,8 +7,9 @@ PHYTEC :maxdepth: 2 imx8mm-phygate-tauri-l - imx93-phyboard-segin + imx93-phycore phycore-am62x + phycore-am62ax phycore-am64x phycore-imx8mm phycore-imx8mp diff --git a/doc/board/phytec/phycore-am62ax.rst b/doc/board/phytec/phycore-am62ax.rst new file mode 100644 index 00000000000..0c5b4814fc2 --- /dev/null +++ b/doc/board/phytec/phycore-am62ax.rst @@ -0,0 +1,183 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Garrett Giordano <ggiordano@phytec.com> + +phyCORE-AM62Ax +============== + +The `phyCORE-AM62Ax <https://www.phytec.com/product/phycore-am62a>`_ is a +SoM (System on Module) featuring TI's AM62Ax SoC. It can be used in combination +with different carrier boards. This module can come with different sizes and +models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family. + +A development Kit, called `phyBOARD-Lyra <https://www.phytec.com/product/phyboard-am62x>`_ +is used as a carrier board reference design around the AM62Ax SoM. + +Quickstart +---------- + +* Download sources and TI firmware blobs +* Build Trusted Firmware-A +* Build OP-TEE +* Build U-Boot for the R5 +* Build U-Boot for the A53 +* Create bootable uSD Card +* Boot + +Sources +------- + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_sources + :end-before: .. k3_rst_include_end_boot_sources + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_boot_firmwares + :end-before: .. k3_rst_include_end_tifsstub + +Build procedure +--------------- + +Setup the environment variables: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_common_env_vars_desc + :end-before: .. k3_rst_include_end_common_env_vars_desc + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_board_env_vars_desc + :end-before: .. k3_rst_include_end_board_env_vars_desc + +Set the variables corresponding to this platform: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_common_env_vars_defn + :end-before: .. k3_rst_include_end_common_env_vars_defn +.. code-block:: bash + + $ export UBOOT_CFG_CORTEXR=phycore_am62ax_r5_defconfig + $ export UBOOT_CFG_CORTEXA=phycore_am62ax_a53_defconfig + $ export TFA_BOARD=lite + $ # we dont use any extra TFA parameters + $ unset TFA_EXTRA_ARGS + $ export OPTEE_PLATFORM=k3-am62ax + $ # we dont use any extra OPTEE parameters + $ unset OPTEE_EXTRA_ARGS + +1. Trusted Firmware-A: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_tfa + :end-before: .. k3_rst_include_end_build_steps_tfa + +2. OP-TEE: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_optee + :end-before: .. k3_rst_include_end_build_steps_optee + +3. U-Boot: + +* 3.1 R5: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_spl_r5 + :end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* 3.2 A53: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_uboot + :end-before: .. k3_rst_include_end_build_steps_uboot + +uSD Card creation +----------------- + +Use fdisk to partition the uSD card. The layout should look similar to: + +.. code-block:: bash + + $ sudo fdisk -l /dev/mmcblk0 + Disk /dev/mmcblk0: 15 GB, 15913189376 bytes, 31080448 sectors + 242816 cylinders, 4 heads, 32 sectors/track + Units: sectors of 1 * 512 = 512 bytes + + Device Boot StartCHS EndCHS StartLBA EndLBA Sectors Size Id Type + /dev/mmcblk0p1 * 128,0,1 1023,3,32 16384 278527 262144 128M c Win95 FAT32 (LBA) + /dev/mmcblk0p2 1023,3,32 1023,3,32 278528 1693883 1415356 691M 83 Linux + + +Once partitioned, the boot partition has to be formatted with a FAT filesystem. +Assuming the uSD card is `/dev/mmcblk0`: + +.. code-block:: bash + + $ mkfs.vfat /dev/mmcblk0p1 + +To boot from a micro SD card on a HSFS device simply copy the following +artifacts to the FAT partition: + +* tiboot3.bin from R5 build +* tispl.bin from Cortex-A build +* u-boot.img from Cortex-A build + +Boot +---- + +Put the uSD card in the slot on the board and apply power. Check the serial +console for output. + +UART based boot +--------------- + +To boot the board via UART, set the switches to UART mode and connect to the +micro USB port labeled as "Debug UART". After power-on the build artifacts +needs to be uploaded one by one with a tool like sz. + +Example bash script sequence for running on a Linux host PC feeding all boot +artifacts needed to the device. Assuming the host uses /dev/ttyUSB0 as +the main domain serial port: + +.. prompt:: bash $ + + stty -F /dev/ttyUSB0 115200 + sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem tispl.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem u-boot.img > /dev/ttyUSB0 < /dev/ttyUSB0 + +Boot Modes +---------- + +The phyCORE-AM62x development kit supports booting from many different +interfaces. By default, the development kit is set to boot from the micro-SD +card. To change the boot device, DIP switches S5 and S6 can be used. +Boot switches should be changed with power off. + +.. list-table:: Boot Modes + :widths: 16 16 16 + :header-rows: 1 + + * - Switch Label + - SW5: 12345678 + - SW6: 12345678 + + * - uSD + - 11000010 + - 01000000 + + * - eMMC + - 11010010 + - 00000000 + + * - OSPI + - 11010000 + - 10000000 + + * - UART + - 11011100 + - 00000000 + +Further Information +------------------- + +Please see :doc:`../ti/am62ax_sk` chapter for further AM62Ax SoC related documentation +and https://docs.phytec.com/projects/yocto-phycore-am62ax/en/latest/ for vendor documentation. diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst index e097afdac64..26dba4a4851 100644 --- a/doc/board/sophgo/index.rst +++ b/doc/board/sophgo/index.rst @@ -6,3 +6,4 @@ Sophgo :maxdepth: 1 milkv_duo + licheerv_nano diff --git a/doc/board/sophgo/licheerv_nano.rst b/doc/board/sophgo/licheerv_nano.rst new file mode 100644 index 00000000000..a75c6a37dc5 --- /dev/null +++ b/doc/board/sophgo/licheerv_nano.rst @@ -0,0 +1,72 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +LicheeRV Nano +============= + +SG2002 RISC-V SoC +----------------- +The SG2002 is a high-performance, low-power 64-bit RISC-V/ARM SoC from Sophgo. + +Mainline support +---------------- +The support for following drivers are already enabled: +1. ns16550 UART Driver. +2. Synopsys Designware MSHC Driver + +Building +~~~~~~~~ +1. Add the RISC-V toolchain to your PATH. +2. Setup ARCH & cross compilation environment variable: + +.. code-block:: console + + export CROSS_COMPILE=<riscv64 toolchain prefix> + cd <U-Boot-dir> + make sipeed_licheerv_nano_defconfig + make + +This will generate u-boot.bin + +Booting +~~~~~~~ +Currently, we rely on vendor FSBL (First Stage Boot Loader) to initialize the +clock and load the u-boot image, then bootup from it. + +To run u-boot.bin on top of FSBL, follow these steps: + +1. Use mainline OpenSBI with a newer version than 1.5 to generate fw_dynamic. + +2. Generate a compatible u-boot.bin using U-Boot with the LicheeRV Nano default + configuration. + +3. Use the vendor-provided tool [1] to create a unified fip.bin file containing + FSBL, OpenSBI, and U-Boot. + Note that you will have to use the file cv181x.bin as the FSBL. + +2. Place the generated fip.bin file into the FAT partition of the SD card. + +3. Insert the SD card into the board and power it on. + +The board will automatically execute the FSBL from the fip.bin file. +Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke +U-Boot. + +[1]: https://github.com/sophgo/fiptool + + +Sample boot log from LicheeRV Nano board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. code-block:: none + + U-Boot 2024.10 (Oct 24 2024 - 15:00:20 +0200)licheerv_nano + + DRAM: 256 MiB + Core: 19 devices, 11 uclasses, devicetree: separate + MMC: mmc@4310000: 0 + Loading Environment from nowhere... OK + In: serial@4140000 + Out: serial@4140000 + Err: serial@4140000 + Net: No ethernet found. + Hit any key to stop autoboot: 0 + licheerv_nano# diff --git a/doc/board/spacemit/bananapi-f3.rst b/doc/board/spacemit/bananapi-f3.rst new file mode 100644 index 00000000000..f2220950a3a --- /dev/null +++ b/doc/board/spacemit/bananapi-f3.rst @@ -0,0 +1,106 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Banana Pi BPI-F3 +================ + +Building +~~~~~~~~ +1. Install the SpacemiT riscv cross compile toolchain_, or skip it if riscv toolchain is installed. + +.. _toolchain: https://archive.spacemit.com/toolchain/ + +2. Setup cross compilation environment variable: + +.. code-block:: console + + export CROSS_COMPILE=<riscv64 toolchain prefix, e.g /opt/spacemit/bin/riscv64-unknown-linux-gnu-> + +3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be +built for SpacemiT K1 SoC as below: + +.. code-block:: console + + git clone https://github.com/cyyself/opensbi -b k1-opensbi + cd opensbi + make PLATFORM=generic + +4. Then build U-Boot as following: + +.. code-block:: console + + cd <U-Boot-dir> + make bananapi-f3_defconfig + make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin + +This will generate u-boot.itb + +Burning +~~~~~~~ +Actually, we can replace the uboot partition of Bianbu Linux which is the bsp_ to validate this patch, +use `balena etcher` to burn the bianbu-minimal.img to the sd card, +and replace the /dev/sdx4 where places the uboot_ with the `u-boot.itb` generated from this patch. +Or use fastboot: +Collect FSBL.bin, u-boot.itb, partition_2M.json, bootinfo_spinor.bin +u-boot-env-default.bin, fw_dynamic.itb from vendor SDK + +.. code-block:: console + + fastboot stage FSBL.bin + fastboot continue + fastboot stage u-boot.itb-vendor # the itb from vendor uboot + fastboot continue + + fastboot flash mtd partition_2M.json + fastboot flash bootinfo bootinfo_spinor.bin + fastboot flash fsbl FSBL.bin + fastboot flash env u-boot-env-default.bin + fastboot flash opensbi fw_dynamic.itb + + fastboot flash uboot u-boot.itb-mainline # the itb from mainline uboot + +.. _bsp: https://archive.spacemit.com/image/k1/version/bianbu/v2.0/ +.. _uboot: https://bianbu-linux.spacemit.com/en/device/boot#21-firmware-layout + +Booting +~~~~~~~ +Sample boot log from Banana Pi BPI-F3 board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. code-block:: none + + try sd... + bm:3 + j... + + U-Boot SPL 2022.10spacemit-dirty (Oct 21 2024 - 09:01:13 +0000) + [ 0.279] DDR type LPDDR4X + [ 0.292] lpddr4_silicon_init consume 13ms + [ 0.293] Change DDR data rate to 2400MT/s + [ 0.430] ## Checking hash(es) for config conf-1 ... OK + [ 0.432] ## Checking hash(es) for Image opensbi ... OK + [ 0.437] ## Checking hash(es) for Image uboot ... OK + [ 0.443] ## Checking hash(es) for Image fdt-1 ... OK + [ 0.488] ## Checking hash(es) for config config_1 ... OK + [ 0.490] ## Checking hash(es) for Image opensbi ... crc32+ OK + + + U-Boot 2024.10-rc4-00462-g5b138cfcc587-dirty (Nov 28 2024 - 14:56:49 +0800) + + DRAM: 4 GiB + Core: 19 devices, 8 uclasses, devicetree: separate + Loading Environment from nowhere... OK + In: serial@d4017000 + Out: serial@d4017000 + Err: serial@d4017000 + Net: No ethernet found. + => cpu list + 0: cpu@0 spacemit,x60 + 1: cpu@1 spacemit,x60 + 2: cpu@2 spacemit,x60 + 3: cpu@3 spacemit,x60 + 4: cpu@4 spacemit,x60 + 5: cpu@5 spacemit,x60 + 6: cpu@6 spacemit,x60 + 7: cpu@7 spacemit,x60 + => test + => + diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst new file mode 100644 index 00000000000..e7d3d94e459 --- /dev/null +++ b/doc/board/spacemit/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +SpacemiT +======== +.. toctree:: + :maxdepth: 1 + + bananapi-f3 + diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 5d01f487622..0deb4d768f9 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -46,6 +46,7 @@ K3 SoC based boards in other sections * :doc:`../beagle/am62x_beagleplay` * :doc:`../beagle/j721e_beagleboneai64` * :doc:`../phytec/phycore-am62x` +* :doc:`../phytec/phycore-am62ax` * :doc:`../toradex/verdin-am62` Boot Flow Overview |