diff options
Diffstat (limited to 'doc/board')
| -rw-r--r-- | doc/board/broadcom/bcm7xxx.rst | 6 | ||||
| -rw-r--r-- | doc/board/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/liebherr/btt.rst | 34 | ||||
| -rw-r--r-- | doc/board/liebherr/index.rst | 9 | ||||
| -rw-r--r-- | doc/board/qualcomm/board.rst | 21 | ||||
| -rw-r--r-- | doc/board/qualcomm/dragonwing.rst | 49 | ||||
| -rw-r--r-- | doc/board/qualcomm/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/qualcomm/rdp.rst | 15 | ||||
| -rw-r--r-- | doc/board/thead/lpi4a.rst | 125 | ||||
| -rw-r--r-- | doc/board/ti/k3.rst | 1 | ||||
| -rw-r--r-- | doc/board/toradex/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/toradex/verdin-am62p.rst | 196 |
12 files changed, 352 insertions, 107 deletions
diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst index f1994d9f975..f559d5c290a 100644 --- a/doc/board/broadcom/bcm7xxx.rst +++ b/doc/board/broadcom/bcm7xxx.rst @@ -149,10 +149,8 @@ and with a generic ARMv7 root file system. * to the Linux source tree as a .dts file. * * To support modifications to the device tree - * in-place in U-Boot, add to Linux's - * arch/arm/boot/dts/Makefile: - * - * DTC_FLAGS ?= -p 4096 + * in-place in U-Boot, set the config variable + * CONFIG_SYS_DTC_PAD_BYTES as needed. * * This will leave some padding in the DTB and * thus reserve room for node additions. diff --git a/doc/board/index.rst b/doc/board/index.rst index 3c5a2c7d1cf..e084c7fb1df 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -38,6 +38,7 @@ Board-specific doc kontron/index lenovo/index lg/index + liebherr/index mediatek/index microchip/index microsoft/index diff --git a/doc/board/liebherr/btt.rst b/doc/board/liebherr/btt.rst new file mode 100644 index 00000000000..d22ffa205bd --- /dev/null +++ b/doc/board/liebherr/btt.rst @@ -0,0 +1,34 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Lukasz Majewski <lukma@denx.de> + +BTT devices +=========== + +Those devices are based on IMX's IMX287 SoC. The description regarding the +**btt** family of boards (i.e. `btt3` and `bttc`) is identical as the one for +the already supported **xea** board. + +Building +-------- + +Make sure that `CROSS_COMPILE` is set appropriately: + +.. code-block:: text + + $ make imx28_btt3_defconfig + $ make -j4 u-boot.sb u-boot.img + +Now you should see `u-boot.sb` and `u-boot.img` files in the build directory. + +For initial bringup - one can use `uuu` utulity to boot till u-boot prompt +(USB connection with the board is required). + +Flashing +-------- + +Via U-Boot: + +.. code-block:: text + + => run update_spl + => run update_uboot diff --git a/doc/board/liebherr/index.rst b/doc/board/liebherr/index.rst new file mode 100644 index 00000000000..d8db6bd188c --- /dev/null +++ b/doc/board/liebherr/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Liebherr +======== + +.. toctree:: + :maxdepth: 2 + + btt diff --git a/doc/board/qualcomm/board.rst b/doc/board/qualcomm/board.rst index 003d59a18eb..642c5095261 100644 --- a/doc/board/qualcomm/board.rst +++ b/doc/board/qualcomm/board.rst @@ -23,10 +23,7 @@ Installation ------------ Build ^^^^^ - - $ ./tools/buildman/buildman -o .output qcom - -This will build ``.output/u-boot-nodtb.bin`` using the ``qcom_defconfig``. +We will build ``u-boot-nodtb.bin`` from the u-boot source tree. Generate FIT image (optional) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -81,19 +78,20 @@ Steps: - Build u-boot -As above:: +Use the following commands:: - ./tools/buildman/buildman -o .output qcom + make CROSS_COMPILE=aarch64-linux-gnu- O=.output qcom_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- O=.output -j$(nproc) Or for db410c (and other boards not supported by the generic target):: make CROSS_COMPILE=aarch64-linux-gnu- O=.output dragonboard410c_defconfig - make O=.output -j$(nproc) + make CROSS_COMPILE=aarch64-linux-gnu- O=.output -j$(nproc) Or for smartphones:: make CROSS_COMPILE=aarch64-linux-gnu- O=.output qcom_defconfig qcom-phone.config - make O=.output -j$(nproc) + make CROSS_COMPILE=aarch64-linux-gnu- O=.output -j$(nproc) - gzip u-boot:: @@ -119,6 +117,13 @@ Or with no FIT image:: mkbootimg --kernel u-boot-nodtb.bin.gz-dtb \ --output boot.img --pagesize 4096 --base 0x80000000 +Other devices with boot image version 2 can be built like this example:: + + mkbootimg --pagesize 4096 --header_version 2 \ + --kernel_offset 0x00008000 --kernel u-boot-nodtb.bin.gz \ + --dtb_offset 0x01f00000 --dtb dts/upstream/src/arm64/qcom/qcm6490-fairphone-fp5.dtb \ + --output boot.img + - Flash boot.img using fastboot and erase dtbo to avoid conflicts with our DTB: .. code-block:: bash diff --git a/doc/board/qualcomm/dragonwing.rst b/doc/board/qualcomm/dragonwing.rst new file mode 100644 index 00000000000..d4899415309 --- /dev/null +++ b/doc/board/qualcomm/dragonwing.rst @@ -0,0 +1,49 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. sectionauthor:: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> + +Qualcomm DragonWing +======================================== + +Qualcomm DragonWing are industrial-grade boards that provides various series +of processors such as IQ6 (QCS615), IQ8 (QCS8300) and IQ9 (QCS9100). +These SoCs are used for factory/industry based applications. +More information can be found on the `Qualcomm's IQ6 product page`_, +`Qualcomm's IQ8 product page`_ and `Qualcomm's IQ9 product page`_. + +.. _Qualcomm's IQ6 product page: https://docs.qualcomm.com/bundle/publicresource/87-83838-1_REV_A_Qualcomm_IQ6_Series_Product_Brief.pdf +.. _Qualcomm's IQ8 product page: https://docs.qualcomm.com/bundle/publicresource/87-83839-1_REV_A_Qualcomm_IQ8_Series_Product_Brief________.pdf +.. _Qualcomm's IQ9 product page: https://docs.qualcomm.com/bundle/publicresource/87-83840-1_REV_A_Qualcomm_IQ9_Series_Product_Brief.pdf + +Installation +------------ +First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``QCS615``, ``QCS8300`` or ``QCS9100``:: + + $ export CROSS_COMPILE=<aarch64 toolchain prefix> + $ make qcom_qcs8300_defconfig + $ make -j8 u-boot.mbn + +Although the board does not have secure boot set up by default, +the firmware still expects firmware ELF images to be "signed". The signature +does not provide any security in this case, but it provides the firmware with +some required metadata. + +To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: + + $ qtestsign -v6 aboot -o u-boot.mbn u-boot.elf + +Then flash the resulting ``u-boot.mbn`` to the ``uefi_a`` partition +on your device with ``fastboot flash uefi_a u-boot.mbn``. + +U-Boot should be running after a reboot (``fastboot reboot``). + +Note that fastboot is not yet supported in U-Boot on Dragonwing boards, as a result, to flash +back the original firmware, or new versoins of the U-Boot, EDL mode must be used. + +A tool like bkerler's `edl`_ can be used for flashing with the firehose loader (for example, for QCS9100 +the firehose loader can be obtained from `dragonwing IQ9 bootbinaries`.) :: + +$ edl.py --loader /path/to/prog_firehose_ddr.elf w uefi_a u-boot.mbn + +.. _qtestsign: https://github.com/msm8916-mainline/qtestsign +.. _edl: https://github.com/bkerler/edl +.. _dragonwing IQ9 bootbinaries: https://artifacts.codelinaro.org/ui/native/qli-ci/flashable-binaries/qimpsdk/qcs9075-rb8-core-kit diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst index e2fcbfa19c2..ccf834208e9 100644 --- a/doc/board/qualcomm/index.rst +++ b/doc/board/qualcomm/index.rst @@ -8,6 +8,7 @@ Qualcomm dragonboard410c rb3gen2 + dragonwing board phones debugging diff --git a/doc/board/qualcomm/rdp.rst b/doc/board/qualcomm/rdp.rst index fd14f1d9829..99cf8eba57c 100644 --- a/doc/board/qualcomm/rdp.rst +++ b/doc/board/qualcomm/rdp.rst @@ -21,13 +21,16 @@ First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``IPQ9574``:: This will build ``u-boot.elf`` in the configured output directory. -Although the RDPs do not have secure boot set up by default, the firmware still -expects firmware ELF images to be "signed". The signature does not provide any -security in this case, but it provides the firmware with some required metadata. +The firmware expects the ELF images to be in MBN format. The `elftombn.py` tool +can be used to convert the ELF images to MBN format. -To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: + IPQ9574: (MBN version 6) - $ qtestsign -v6 aboot -o u-boot.mbn u-boot.elf + $ python elftombn.py -f u-boot.elf -o u-boot.mbn -v6 + + IPQ5424: (MBN version 7) + + $ python elftombn.py -f u-boot.elf -o u-boot.mbn -v7 Then install the resulting ``u-boot.mbn`` to the ``0:APPSBL`` partition on your device with:: @@ -51,5 +54,5 @@ U-Boot should be running after a reboot (``reset``). Note that the support added is very basic. Restoring the original U-Boot on boards with older version of the software requires a debugger. -.. _qtestsign: https://github.com/msm8916-mainline/qtestsign +.. _elftombn.py: https://git.codelinaro.org/clo/qsdk/oss/system/tools/meta/-/tree/NHSS.QSDK.13.0.5.r2/scripts?ref_type=heads .. _edl: https://github.com/bkerler/edl diff --git a/doc/board/thead/lpi4a.rst b/doc/board/thead/lpi4a.rst index 7e4c4ea81ee..acd7ac2698d 100644 --- a/doc/board/thead/lpi4a.rst +++ b/doc/board/thead/lpi4a.rst @@ -55,123 +55,70 @@ DDR driver requires a firmware to function, to build it: cd th1520-firmware lua5.4 ddr-generate.lua src/<CONFIGURATION_NAME>.lua th1520-ddr-firmware.bin -4. Build U-Boot images +4. Build OpenSBI Firmware -The U-Boot is capable of running in M-Mode, so we can directly build it without -OpenSBI. The DDR firmware should be copied to U-Boot source directory before +TH1520 port of proper U-Boot runs in S mode, thus OpenSBI is required as +SBI firmware to setup S-mode environment and provide SBI calls. It could +be cloned and built for TH1520 as below, + +.. code-block:: bash + + git clone https://github.com/riscv-software-src/opensbi.git + cd opensbi + make PLATFORM=generic + +TH1520 support in OpenSBI requires v1.2 or a more recent version. + +More detailed description of steps required to build fw_dynamic firmware +is beyond the scope of this document. Please refer to OpenSBI +documenation. + +5. Build U-Boot images + +The DDR firmware should be copied to U-Boot source directory before building. -.. code-block:: console +.. code-block:: bash cd <U-Boot-dir> cp <path-to-ddr-firmware> th1520-ddr-firmware.bin make th1520_lpi4a_defconfig - make + make OPENSBI=<opensbi_dir>/build/platform/generic/firmware/fw_dynamic.bin -This will generate u-boot-dtb.bin and u-boot-with-spl.bin. The former contains -only proper U-Boot and is for chainloading; the later contains also SPL and -DDR firmware and is ready for booting by BROM directly. +This will generate u-boot-with-spl.bin, which contains SPL, DDR firmware, +OpenSBI firmware and proper U-Boot. Booting ~~~~~~~ -Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem, -and chain load the mainline u-boot image either via tftp or emmc storage, -then bootup from it. - -Sample boot log from Lichee PI 4A board via tftp -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - -.. code-block:: none - - brom_ver 8 - [APP][E] protocol_connect failed, exit. - - U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) - FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init - ddr initialized, jump to uboot - image has no header +u-boot-with-spl.bin should be loaded to SRAM through fastboot. Connect +the board to computer with Type-C cable and run +.. code-block:: bash - U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) + fastboot flash ram u-boot-with-spl.bin + fastboot reboot - CPU: rv64imafdcvsu - Model: T-HEAD c910 light - DRAM: 8 GiB - C910 CPU FREQ: 750MHz - AHB2_CPUSYS_HCLK FREQ: 250MHz - AHB3_CPUSYS_PCLK FREQ: 125MHz - PERISYS_AHB_HCLK FREQ: 250MHz - PERISYS_APB_PCLK FREQ: 62MHz - GMAC PLL POSTDIV FREQ: 1000MHZ - DPU0 PLL POSTDIV FREQ: 1188MHZ - DPU1 PLL POSTDIV FREQ: 1188MHZ - MMC: sdhci@ffe7080000: 0, sd@ffe7090000: 1 - Loading Environment from MMC... OK - Error reading output register - Warning: cannot get lcd-en GPIO - LCD panel cannot be found : -121 - splash screen startup cost 16 ms - In: serial - Out: serial - Err: serial - Net: - Warning: ethernet@ffe7070000 using MAC address from ROM - eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000. Reconnecting to ethernet@ffe7060000 - - Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc - , eth1: ethernet@ffe7060000 - Hit any key to stop autoboot: 2 - ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done - Speed: 1000, full duplex - Using ethernet@ffe7070000 device - TFTP from server 192.168.8.50; our IP address is 192.168.8.45 - Filename 'u-boot-dtb.bin'. - Load address: 0x1c00000 - Loading: * ######################### - 8 MiB/s - done - Bytes transferred = 376686 (5bf6e hex) - ## Starting application at 0x01C00000 ... - - U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800) - - CPU: rv64imafdc - Model: Sipeed Lichee Pi 4A - DRAM: 8 GiB - Core: 13 devices, 6 uclasses, devicetree: separate - Loading Environment from <NULL>... OK - In: serial@ffe7014000 - Out: serial@ffe7014000 - Err: serial@ffe7014000 - Model: Sipeed Lichee Pi 4A - LPI4A=> - -SPL support is still in an early stage and not all of the functionalities are -available when booting from mainline SPL. When using mainline SPL, -u-boot-with-spl.bin should be loaded to SRAM through fastboot. - -Sample boot log from Lichee PI 4A board via fastboot and mainline SPL -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Sample boot log from Lichee PI 4A board via fastboot +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ .. code-block:: none - brom_ver 8 [APP][E] protocol_connect failed, exit. - Starting download of 636588 bytes + Starting download of 940681 bytes - downloading of 636588 bytes finished + downloading of 940681 bytes finished - U-Boot SPL 2025.04-rc2-00049-geaa9fc99d4cd-dirty (Apr 26 2025 - 13:31:41 +0000) + U-Boot SPL 2025.07-rc3-00005-g3a0ef515b8bb (May 29 2025 - 10:42:46 +0000) Trying to boot from RAM - U-Boot 2025.04-rc2-00049-geaa9fc99d4cd-dirty (Apr 26 2025 - 13:31:41 +0000) + U-Boot 2025.07-rc3-00005-g3a0ef515b8bb (May 29 2025 - 10:42:46 +0000) CPU: thead,c910 Model: Sipeed Lichee Pi 4A DRAM: 8 GiB - Core: 30 devices, 9 uclasses, devicetree: separate + Core: 110 devices, 9 uclasses, devicetree: separate MMC: mmc@ffe7080000: 0, mmc@ffe7090000: 1 Loading Environment from <NULL>... OK In: serial@ffe7014000 diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 0d9ccd5a768..01fb9411688 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -49,6 +49,7 @@ K3 SoC based boards in other sections * :doc:`../phytec/phycore-am62x` * :doc:`../phytec/phycore-am62ax` * :doc:`../toradex/verdin-am62` +* :doc:`../toradex/verdin-am62p` Boot Flow Overview ------------------ diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst index 7d510a80112..68934566ad7 100644 --- a/doc/board/toradex/index.rst +++ b/doc/board/toradex/index.rst @@ -11,5 +11,6 @@ Toradex colibri-imx8x smarc-imx8mp verdin-am62 + verdin-am62p verdin-imx8mm verdin-imx8mp diff --git a/doc/board/toradex/verdin-am62p.rst b/doc/board/toradex/verdin-am62p.rst new file mode 100644 index 00000000000..2f3262b8d1e --- /dev/null +++ b/doc/board/toradex/verdin-am62p.rst @@ -0,0 +1,196 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later +.. sectionauthor:: Parth Pancholi <parth.pancholi@toradex.com> + +Verdin AM62P Module +=================== + +- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p +- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit + +Quick Start +----------- + +- Setup environment variables +- Get binary-only TI Linux firmware +- Build the ARM trusted firmware binary +- Build the OPTEE binary +- Build U-Boot for the R5 +- Build U-Boot for the A53 +- Flash to eMMC +- Boot + +Setup environment +----------------- + +Suggested current toolchains are ARM 11.3 (https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads): + +- https://developer.arm.com/-/media/Files/downloads/gnu/11.3.rel1/binrel/arm-gnu-toolchain-11.3.rel1-x86_64-arm-none-linux-gnueabihf.tar.xz +- https://developer.arm.com/-/media/Files/downloads/gnu/11.3.rel1/binrel/arm-gnu-toolchain-11.3.rel1-x86_64-aarch64-none-linux-gnu.tar.xz + +.. code-block:: bash + + $ export CROSS_COMPILE_32=<path/to/arm/toolchain/bin/>arm-none-linux-gnueabihf- + $ export CROSS_COMPILE_64=<path/to/arm64/toolchain/bin/>aarch64-none-linux-gnu- + +Get the TI Linux Firmware +------------------------- + +.. code-block:: bash + + $ echo "Downloading TI Linux Firmware..." + $ git clone -b ti-linux-firmware https://git.ti.com/git/processor-firmware/ti-linux-firmware.git + +Get and Build the ARM Trusted Firmware (Trusted Firmware A) +----------------------------------------------------------- + +.. code-block:: bash + + $ echo "Downloading and building TF-A..." + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + +Then build ATF (TF-A): + +.. code-block:: bash + + $ export CROSS_COMPILE="$CROSS_COMPILE_64" + $ make PLAT=k3 K3_PM_SYSTEM_SUSPEND=1 TARGET_BOARD=lite SPD=opteed + +Get and Build OPTEE +------------------- + +.. code-block:: bash + + $ echo "Downloading and building OPTEE..." + $ git clone https://github.com/OP-TEE/optee_os.git + $ cd optee_os + +Then build OPTEE: + +.. code-block:: bash + + $ export CROSS_COMPILE="$CROSS_COMPILE_32" + $ export CROSS_COMPILE64="$CROSS_COMPILE_64" + $ make PLATFORM=k3-am62px CFG_ARM64_core=y + +Build U-Boot for R5 +------------------- + +.. code-block:: bash + + $ export CROSS_COMPILE="$CROSS_COMPILE_32" + $ export BINMAN_INDIRS=<path/to/ti-linux-firmware> + $ make O=/tmp/verdin-am62p-r5 verdin-am62p_r5_defconfig + $ make O=/tmp/verdin-am62p-r5 + +Build U-Boot for A53 +-------------------- + +.. code-block:: bash + + $ export CROSS_COMPILE=$CROSS_COMPILE_64 + $ export BL31=<path/to/atf>/build/k3/lite/release/bl31.bin + $ export TEE=<path/to/optee>/out/arm-plat-k3/core/tee-pager_v2.bin + $ export BINMAN_INDIRS="<path/to/ti-linux-firmware> /tmp/verdin-am62p-r5" + $ make O=/tmp/verdin-am62p-a53 verdin-am62p_a53_defconfig + $ make O=/tmp/verdin-am62p-a53 + +Flash to eMMC +------------- + +.. code-block:: console + + => mmc dev 0 1 + => fatload mmc 1 ${loadaddr} tiboot3.bin + => mmc write ${loadaddr} 0x0 0x400 + => fatload mmc 1 ${loadaddr} tispl.bin + => mmc write ${loadaddr} 0x400 0x1000 + => fatload mmc 1 ${loadaddr} u-boot.img + => mmc write ${loadaddr} 0x1400 0x2000 + +As a convenience, instead of having to remember all those addresses and sizes, +one may also use the update U-Boot wrappers: + +.. code-block:: console + + => tftpboot ${loadaddr} tiboot3.bin + => run update_tiboot3 + + => tftpboot ${loadaddr} tispl.bin + => run update_tispl + + => tftpboot ${loadaddr} u-boot.img + => run update_uboot + +Boot +---- + +Output: + +.. code-block:: console + +U-Boot SPL 2025.04-00006-g51dc98d36470 (May 12 2025 - 15:46:57 +0100) +SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.7--v11.00.07 (Fancy Rat)') +Changed A53 CPU frequency to 1250000000Hz (U grade) in DT +SPL initial stack usage: 17080 bytes +Trying to boot from MMC1 +Authentication passed +Authentication passed +Authentication passed +Loading Environment from nowhere... OK +init_env from device 9 not supported! +Authentication passed +Authentication passed +Starting ATF on ARM64 core... + +NOTICE: BL31: v2.12.0(release):v2.12.0-1106-g4301798db096 +NOTICE: BL31: Built : 10:57:58, May 9 2025 +I/TC: +I/TC: OP-TEE version: 4.6.0-18-g76d920d354df (gcc version 12.3.1 20230626 (Arm GNU Toolchain 12.3.Rel1 (Build arm-12.35))) #4 Tue May 6 19:48:13 UTC 2025 aarch64 +I/TC: WARNING: This OP-TEE configuration might be insecure! +I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html +I/TC: Primary CPU initializing +I/TC: GIC redistributor base address not provided +I/TC: Assuming default GIC group status and modifier +I/TC: SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.7--v11.00.07 (Fancy Rat)') +I/TC: Activated SA2UL device +I/TC: Enabled firewalls for SA2UL TRNG device +I/TC: SA2UL TRNG initialized +I/TC: SA2UL Drivers initialized +I/TC: HUK Initialized +I/TC: Primary CPU switching to normal world boot + +U-Boot SPL 2025.04-00006-g51dc98d36470 (May 12 2025 - 15:47:54 +0100) +SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.7--v11.00.07 (Fancy Rat)') +SPL initial stack usage: 1760 bytes +HW CFG: 0x00 +Trying to boot from MMC1 +Authentication passed +Authentication passed + + +U-Boot 2025.04-00006-g51dc98d36470 (May 12 2025 - 15:47:54 +0100) + +SoC: AM62PX SR1.0 HS-FS +DRAM: 2 GiB +Core: 147 devices, 31 uclasses, devicetree: separate +MMC: mmc@fa10000: 0, mmc@fa00000: 1 +Loading Environment from MMC... Reading from MMC(0)... OK +In: serial@2800000 +Out: serial@2800000 +Err: serial@2800000 +Model: Toradex 0099 Verdin AM62P Quad 2GB WB IT V1.0A +Serial#: 15664919 +Carrier: Toradex Dahlia V1.1D, Serial# 11287149 +am65_cpsw_nuss ethernet@8000000: K3 CPSW: nuss_ver: 0x6BA01903 cpsw_ver: 0x6BA81903 ale_ver: 0x00290105 Ports:2 +Setting variant to wifi +Net: +Warning: ethernet@8000000port@1 MAC addresses don't match: +Address in ROM is 58:a1:5f:b8:93:f9 +Address in environment is 00:14:2d:ef:07:17 +eth0: ethernet@8000000port@1 [PRIME]Could not get PHY for mdio@f00: addr 7 +am65_cpsw_nuss_port ethernet@8000000port@2: phy_connect() failed + +Hit any key to stop autoboot: 0 +Verdin AM62P # + |