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-rw-r--r--doc/develop/uefi/uefi.rst80
-rw-r--r--doc/usage/index.rst1
-rw-r--r--doc/usage/mmc.rst212
3 files changed, 291 insertions, 2 deletions
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index b3494c22e07..4f2b8b036db 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -180,6 +180,12 @@ Set up boot parameters on your board::
efidebug boot add -b 1 HELLO mmc 0:1 /helloworld.efi.signed ""
+Since kernel 5.7 there's an alternative way of loading an initrd using
+LoadFile2 protocol if CONFIG_EFI_LOAD_FILE2_INITRD is enabled.
+The initrd path can be specified with::
+
+ efidebug boot add -b ABE0 'kernel' mmc 0:1 Image -i mmc 0:1 initrd
+
Now your board can run the signed image via the boot manager (see below).
You can also try this sequence by running Pytest, test_efi_secboot,
on the sandbox
@@ -213,7 +219,63 @@ non-volatile variables. When calling the variable services via the
OP-TEE API U-Boot's OP-TEE supplicant relays calls to the RPMB driver
which has to be enabled via CONFIG_SUPPORT_EMMC_RPMB=y.
-[1] https://optee.readthedocs.io/ - OP-TEE documentation
+EDK2 Build instructions
+***********************
+
+.. code-block:: bash
+
+ $ git clone https://github.com/tianocore/edk2.git
+ $ git clone https://github.com/tianocore/edk2-platforms.git
+ $ cd edk2
+ $ git submodule init && git submodule update --init --recursive
+ $ cd ..
+ $ export WORKSPACE=$(pwd)
+ $ export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms
+ $ export ACTIVE_PLATFORM="Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc"
+ $ export GCC5_AARCH64_PREFIX=aarch64-linux-gnu-
+ $ source edk2/edksetup.sh
+ $ make -C edk2/BaseTools
+ $ build -p $ACTIVE_PLATFORM -b RELEASE -a AARCH64 -t GCC5 -n `nproc`
+
+OP-TEE Build instructions
+*************************
+
+.. code-block:: bash
+
+ $ git clone https://github.com/OP-TEE/optee_os.git
+ $ cd optee_os
+ $ ln -s ../Build/MmStandaloneRpmb/RELEASE_GCC5/FV/BL32_AP_MM.fd
+ $ export ARCH=arm
+ $ CROSS_COMPILE32=arm-linux-gnueabihf- make -j32 CFG_ARM64_core=y \
+ PLATFORM=<myboard> CFG_STMM_PATH=BL32_AP_MM.fd CFG_RPMB_FS=y \
+ CFG_RPMB_FS_DEV_ID=0 CFG_CORE_HEAP_SIZE=524288 CFG_RPMB_WRITE_KEY=1 \
+ CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y CFG_RPMB_TESTKEY=y \
+ CFG_REE_FS=n CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 \
+ CFG_TEE_TA_LOG_LEVEL=1 CFG_SCTLR_ALIGNMENT_CHECK=n
+
+U-Boot Build instructions
+*************************
+
+Although the StandAloneMM binary comes from EDK2, using and storing the
+variables is currently available in U-Boot only.
+
+.. code-block:: bash
+
+ $ git clone https://github.com/u-boot/u-boot.git
+ $ cd u-boot
+ $ export CROSS_COMPILE=aarch64-linux-gnu-
+ $ export ARCH=<arch>
+ $ make <myboard>_defconfig
+ $ make menuconfig
+
+Enable ``CONFIG_OPTEE``, ``CONFIG_CMD_OPTEE_RPMB`` and ``CONFIG_EFI_MM_COMM_TEE``
+
+.. warning::
+
+ - Your OP-TEE platform port must support Dynamic shared memory, since that's
+ the only kind of memory U-Boot supports for now.
+
+[1] https://optee.readthedocs.io/en/latest/building/efi_vars/stmm.html
Executing the boot manager
~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -484,7 +546,21 @@ The load file 2 protocol can be used by the Linux kernel to load the initial
RAM disk. U-Boot can be configured to provide an implementation with::
EFI_LOAD_FILE2_INITRD=y
- EFI_INITRD_FILESPEC=interface dev:part path_to_initrd
+
+When the option is enabled the user can add the initrd path with the efidebug
+command.
+
+Load options Boot#### have a FilePathList[] member. The first element of
+the array (FilePathList[0]) is the EFI binary to execute. When an initrd
+is specified the Device Path for the initrd is denoted by a VenMedia node
+with the EFI_INITRD_MEDIA_GUID. Each entry of the array is terminated by the
+'end of entire device path' subtype (0xff). If a user wants to define multiple
+initrds, those must by separated by the 'end of this instance' identifier of
+the end node (0x01).
+
+So our final format of the FilePathList[] is::
+
+ Loaded image - end node (0xff) - VenMedia - initrd_1 - [end node (0x01) - initrd_n ...] - end node (0xff)
Links
-----
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 5faf279f431..d330b14a176 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -32,6 +32,7 @@ Shell commands
load
loady
mbr
+ mmc
md
pstore
qfw
diff --git a/doc/usage/mmc.rst b/doc/usage/mmc.rst
new file mode 100644
index 00000000000..57284ed6741
--- /dev/null
+++ b/doc/usage/mmc.rst
@@ -0,0 +1,212 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+mmc command
+============
+
+Synopsis
+--------
+
+::
+
+ mmc info
+ mmc read addr blk# cnt
+ mmc write addr blk# cnt
+ mmc erase blk# cnt
+ mmc rescan
+ mmc part
+ mmc dev [dev] [part]
+ mmc list
+ mmc wp
+ mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
+ mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB>
+ mmc partconf <dev> [boot_ack boot_partition partition_access]
+ mmc rst-function <dev> <value>
+
+Description
+-----------
+
+The mmc command is used to control MMC(eMMC/SD) device.
+
+The 'mmc info' command displays information (Manufacturer ID, OEM, Name, Bus Speed, Mode, ...) of MMC device.
+
+The 'mmc read' command reads raw data to memory address from MMC device with block offset and count.
+
+The 'mmc write' command writes raw data to MMC device from memory address with block offset and count.
+
+ addr
+ memory address
+ blk#
+ start block offset
+ cnt
+ block count
+
+The 'mmc erase' command erases MMC device from block offset until count.
+
+ blk#
+ start block offset
+ cnt
+ block count
+
+The 'mmc rescan' command scans the available MMC device.
+
+The 'mmc part' command displays the list available partition on current mmc device.
+
+The 'mmc dev' command shows or set current mmc device.
+
+ dev
+ device number to change
+ part
+ partition number to change
+
+The 'mmc list' command displays the list available devices.
+
+The 'mmc wp' command enables "power on write protect" function for boot partitions.
+
+The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specification*)
+
+ boot_bus_width
+ 0x0
+ x1 (sdr) or x4(ddr) buswidth in boot operation mode (default)
+ 0x1
+ x4 (sdr/ddr) buswidth in boot operation mode
+ 0x2
+ x8 (sdr/ddr) buswidth in boot operation mode
+ 0x3
+ Reserved
+
+ reset_boot_bus_width
+ 0x0
+ Reset buswidth to x1, Single data reate and backward compatible timing after boot operation (default)
+ 0x1
+ Retain BOOT_BUS_WIDTH and BOOT_MODE value after boot operation. This is relevant to Push-pull mode operation only
+
+ boot_mode
+ 0x0
+ Use single data rate + backward compatible timing in boot operation (default)
+ 0x1
+ Use single data rate + High Speed timing in boot operation mode
+ 0x2
+ Use dual data rate in boot operation
+ 0x3
+ Reserved
+
+The 'mmc partconf' command shows or changes PARTITION_CONFIG field.
+
+ boot_ack
+ boot acknowledge value
+ boot_partition
+ boot partition to enable for boot
+ 0x0
+ Device not boot enabled(default)
+ 0x1
+ Boot partition1 enabled for boot
+ 0x2
+ Boot partition2 enabled for boot
+ 0x7
+ User area enabled for boot
+ others
+ Reserved
+ partition_access
+ partitions to access
+
+The 'mmc bootpart-resize' command changes sizes of boot and RPMB partitions.
+ dev
+ device number
+ boot part size MB
+ target size of boot partition
+ RPMB part size MB
+ target size of RPMB partition
+
+The 'mmc rst-function' command changes the RST_n_FUNCTION field.
+**WARNING** : This is a write-once field. (*Refer to eMMC specification*)
+
+ value
+ 0x0
+ RST_n signal is temporarily disabled (default)
+ 0x1
+ RST_n signal is permanently enabled
+ 0x2
+ RST_n signal is permanently disabled
+ 0x3
+ Reserved
+
+
+Examples
+--------
+
+The 'mmc info' command displays device's capabilities:
+::
+
+ => mmc info
+ Device: EXYNOS DWMMC
+ Manufacturer ID: 45
+ OEM: 100
+ Name: SDW16
+ Bus Speed: 52000000
+ Mode: MMC DDR52 (52MHz)
+ Rd Block Len: 512
+ MMC version 5.0
+ High Capacity: Yes
+ Capacity: 14.7 GiB
+ Bus Width: 8-bit DDR
+ Erase Group Size: 512 KiB
+ HC WP Group Size: 8 MiB
+ User Capacity: 14.7 GiB WRREL
+ Boot Capacity: 4 MiB ENH
+ RPMB Capacity: 4 MiB ENH
+ Boot area 0 is not write protected
+ Boot area 1 is not write protected
+
+The raw data can be read/written via 'mmc read/write' command:
+::
+
+ => mmc read 0x40000000 0x5000 0x100
+ MMC read: dev # 0, block # 20480, count 256 ... 256 blocks read: OK
+
+ => mmc write 0x40000000 0x5000 0x10
+ MMC write: dev # 0, block # 20480, count 256 ... 256 blocks written: OK
+
+The partition list can be shown via 'mmc part' command:
+::
+
+ => mmc part
+ Partition Map for MMC device 0 -- Partition Type: DOS
+
+ Part Start Sector Num Sectors UUID Type
+ 1 8192 131072 dff8751a-01 0e Boot
+ 2 139264 6291456 dff8751a-02 83
+ 3 6430720 1048576 dff8751a-03 83
+ 4 7479296 23298048 dff8751a-04 05 Extd
+ 5 7481344 307200 dff8751a-05 83
+ 6 7790592 65536 dff8751a-06 83
+ 7 7858176 16384 dff8751a-07 83
+ 8 7876608 22900736 dff8751a-08 83
+
+The current device can be shown or set via 'mmc dev' command:
+::
+
+ => mmc dev
+ switch to partitions #0, OK
+ mmc0(part0) is current device
+ => mmc dev 2 0
+ switch to partitions #0, OK
+ mmc2 is current device
+
+The list of available devices can be shown via 'mmc list' command:
+::
+
+ => mmc list
+ mmc list
+ EXYNOS DWMMC: 0 (eMMC)
+ EXYNOS DWMMC: 2 (SD)
+
+Configuration
+-------------
+
+The mmc command is only available if CONFIG_CMD_MMC=y.
+Some commands need to enable more configuration.
+
+write, erase
+ CONFIG_MMC_WRITE
+bootbus, bootpart-resize, partconf, rst-function
+ CONFIG_SUPPORT_EMMC_BOOT=y
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-18 09:43:04 +0000