diff options
Diffstat (limited to 'drivers/clk/aspeed/clk_ast2600.c')
-rw-r--r-- | drivers/clk/aspeed/clk_ast2600.c | 56 |
1 files changed, 51 insertions, 5 deletions
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 3a92739f5cf..3fb8d68d648 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -19,11 +19,11 @@ DECLARE_GLOBAL_DATA_PTR; #define CLKIN_25M 25000000UL /* MAC Clock Delay settings */ -#define MAC12_DEF_DELAY_1G 0x0041b75d -#define MAC12_DEF_DELAY_100M 0x00417410 -#define MAC12_DEF_DELAY_10M 0x00417410 -#define MAC34_DEF_DELAY_1G 0x0010438a -#define MAC34_DEF_DELAY_100M 0x00104208 +#define MAC12_DEF_DELAY_1G 0x0028a410 +#define MAC12_DEF_DELAY_100M 0x00410410 +#define MAC12_DEF_DELAY_10M 0x00410410 +#define MAC34_DEF_DELAY_1G 0x00104208 +#define MAC34_DEF_DELAY_100M 0x00104208 #define MAC34_DEF_DELAY_10M 0x00104208 /* @@ -1013,6 +1013,46 @@ static ulong ast2600_enable_usbbhclk(struct ast2600_scu *scu) return 0; } +static ulong ast2600_enable_haceclk(struct ast2600_scu *scu) +{ + uint32_t reset_bit; + uint32_t clkgate_bit; + + /* share the same reset control bit with ACRY */ + reset_bit = BIT(ASPEED_RESET_HACE); + clkgate_bit = SCU_CLKGATE1_HACE; + + /* + * we don't do reset assertion here as HACE + * shares the same reset control with ACRY + */ + writel(clkgate_bit, &scu->clkgate_clr1); + mdelay(20); + writel(reset_bit, &scu->modrst_clr1); + + return 0; +} + +static ulong ast2600_enable_rsaclk(struct ast2600_scu *scu) +{ + uint32_t reset_bit; + uint32_t clkgate_bit; + + /* same reset control bit with HACE */ + reset_bit = BIT(ASPEED_RESET_HACE); + clkgate_bit = SCU_CLKGATE1_ACRY; + + /* + * we don't do reset assertion here as HACE + * shares the same reset control with ACRY + */ + writel(clkgate_bit, &scu->clkgate_clr1); + mdelay(20); + writel(reset_bit, &scu->modrst_clr1); + + return 0; +} + static int ast2600_clk_enable(struct clk *clk) { struct ast2600_clk_priv *priv = dev_get_priv(clk->dev); @@ -1051,6 +1091,12 @@ static int ast2600_clk_enable(struct clk *clk) case ASPEED_CLK_GATE_USBPORT2CLK: ast2600_enable_usbbhclk(priv->scu); break; + case ASPEED_CLK_GATE_YCLK: + ast2600_enable_haceclk(priv->scu); + break; + case ASPEED_CLK_GATE_RSACLK: + ast2600_enable_rsaclk(priv->scu); + break; default: pr_err("can't enable clk\n"); return -ENOENT; |