diff options
Diffstat (limited to 'drivers/clk/qcom/clock-ipq4019.c')
| -rw-r--r-- | drivers/clk/qcom/clock-ipq4019.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c index 72f235eab21..f6760c6fb3d 100644 --- a/drivers/clk/qcom/clock-ipq4019.c +++ b/drivers/clk/qcom/clock-ipq4019.c @@ -9,13 +9,18 @@ */ #include <clk-uclass.h> -#include <common.h> #include <dm.h> #include <errno.h> #include <dt-bindings/clock/qcom,gcc-ipq4019.h> #include "clock-qcom.h" +/* I2C controller clock control registerss */ +#define BLSP1_QUP1_I2C_APPS_CBCR (0x2008) +#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x200C) +#define BLSP1_QUP2_I2C_APPS_CBCR (0x3010) +#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x3000) + static ulong ipq4019_clk_set_rate(struct clk *clk, ulong rate) { switch (clk->id) { @@ -29,7 +34,22 @@ static ulong ipq4019_clk_set_rate(struct clk *clk, ulong rate) static int ipq4019_clk_enable(struct clk *clk) { + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + switch (clk->id) { + case GCC_BLSP1_AHB_CLK: + /* This clock is already initialized by SBL1 */ + return 0; + case GCC_BLSP1_QUP1_I2C_APPS_CLK: + clk_enable_cbc(priv->base + BLSP1_QUP1_I2C_APPS_CBCR); + clk_rcg_set_rate(priv->base, BLSP1_QUP1_I2C_APPS_CMD_RCGR, 0, + CFG_CLK_SRC_CXO); + return 0; + case GCC_BLSP1_QUP2_I2C_APPS_CLK: + clk_enable_cbc(priv->base + BLSP1_QUP2_I2C_APPS_CBCR); + clk_rcg_set_rate(priv->base, BLSP1_QUP2_I2C_APPS_CMD_RCGR, 0, + CFG_CLK_SRC_CXO); + return 0; case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/ /* This clock is already initialized by SBL1 */ return 0; @@ -44,6 +64,9 @@ static int ipq4019_clk_enable(struct clk *clk) case GCC_USB2_MOCK_UTMI_CLK: /* These clocks is already initialized by SBL1 */ return 0; + case GCC_ESS_CLK: + /* This clock is already initialized by SBL1 */ + return 0; default: return -EINVAL; } @@ -121,6 +144,12 @@ static const struct qcom_reset_map gcc_ipq4019_resets[] = { [GCC_TCSR_BCR] = {0x22000, 0}, [GCC_MPM_BCR] = {0x24000, 0}, [GCC_SPDM_BCR] = {0x25000, 0}, + [ESS_MAC1_ARES] = {0x1200C, 0}, + [ESS_MAC2_ARES] = {0x1200C, 1}, + [ESS_MAC3_ARES] = {0x1200C, 2}, + [ESS_MAC4_ARES] = {0x1200C, 3}, + [ESS_MAC5_ARES] = {0x1200C, 4}, + [ESS_PSGMII_ARES] = {0x1200C, 5}, }; static struct msm_clk_data ipq4019_clk_data = { |