diff options
Diffstat (limited to 'drivers/clk/stm32')
| -rw-r--r-- | drivers/clk/stm32/clk-stm32f.c | 25 | ||||
| -rw-r--r-- | drivers/clk/stm32/clk-stm32mp1.c | 31 |
2 files changed, 22 insertions, 34 deletions
diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c index ed7660196ef..d68c75ed201 100644 --- a/drivers/clk/stm32/clk-stm32f.c +++ b/drivers/clk/stm32/clk-stm32f.c @@ -522,17 +522,20 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate) /* get the current PLLSAIR output freq */ pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR); - best_div = pllsair_rate / rate; - - /* look into pllsaidivr_table if this divider is available*/ - for (i = 0 ; i < sizeof(pllsaidivr_table); i++) - if (best_div == pllsaidivr_table[i]) { - /* set pll_saidivr with found value */ - clrsetbits_le32(®s->dckcfgr, - RCC_DCKCFGR_PLLSAIDIVR_MASK, - pllsaidivr_table[i]); - return rate; - } + if ((pllsair_rate % rate) == 0) { + best_div = pllsair_rate / rate; + + /* look into pllsaidivr_table if this divider is available */ + for (i = 0 ; i < sizeof(pllsaidivr_table); i++) + if (best_div == pllsaidivr_table[i]) { + /* set pll_saidivr with found value */ + clrsetbits_le32(®s->dckcfgr, + RCC_DCKCFGR_PLLSAIDIVR_MASK, + pllsaidivr_table[i] << + RCC_DCKCFGR_PLLSAIDIVR_SHIFT); + return rate; + } + } /* * As no pllsaidivr value is suitable to obtain requested freq, diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index f3ac8c75831..6f000c8e444 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -2225,10 +2225,13 @@ static void stm32mp1_osc_init(struct udevice *dev) } } -static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv) +static void __maybe_unused stm32mp1_clk_dump(struct udevice *dev) { char buf[32]; int i, s, p; + struct stm32mp1_clk_priv *priv; + + priv = dev_get_priv(dev); printf("Clocks:\n"); for (i = 0; i < _PARENT_NB; i++) { @@ -2252,27 +2255,6 @@ static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv) } } -#ifdef CONFIG_CMD_CLK -int soc_clk_dump(void) -{ - struct udevice *dev; - struct stm32mp1_clk_priv *priv; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_CLK, - DM_DRIVER_GET(stm32mp1_clock), - &dev); - if (ret) - return ret; - - priv = dev_get_priv(dev); - - stm32mp1_clk_dump(priv); - - return 0; -} -#endif - static int stm32mp1_clk_probe(struct udevice *dev) { int result = 0; @@ -2302,7 +2284,7 @@ static int stm32mp1_clk_probe(struct udevice *dev) #if defined(VERBOSE_DEBUG) /* display debug information for probe after relocation */ if (gd->flags & GD_FLG_RELOC) - stm32mp1_clk_dump(priv); + stm32mp1_clk_dump(dev); #endif gd->cpu_clk = stm32mp1_clk_get(priv, _CK_MPU); @@ -2333,6 +2315,9 @@ static const struct clk_ops stm32mp1_clk_ops = { .disable = stm32mp1_clk_disable, .get_rate = stm32mp1_clk_get_rate, .set_rate = stm32mp1_clk_set_rate, +#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_SPL_BUILD) + .dump = stm32mp1_clk_dump, +#endif }; U_BOOT_DRIVER(stm32mp1_clock) = { |