diff options
Diffstat (limited to 'drivers/ddr/Kconfig')
| -rw-r--r-- | drivers/ddr/Kconfig | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig new file mode 100644 index 00000000000..fa873cc4875 --- /dev/null +++ b/drivers/ddr/Kconfig @@ -0,0 +1,47 @@ +choice + prompt "Method to determine DDR clock frequency" + default STATIC_DDR_CLK_FREQ + depends on ARCH_P1010 || ARCH_P1020 || ARCH_P2020 || ARCH_T1024 \ + || ARCH_T1042 || ARCH_T2080 || ARCH_T4240 || ARCH_LS1021A \ + || FSL_LSCH2 || FSL_LSCH3 || TARGET_KMCENT2 + help + The DDR clock frequency can either be defined statically now at + build time, or can be determined at run-time via the + get_board_ddr_clk function. + +config DYNAMIC_DDR_CLK_FREQ + bool "Run-time DDR clock frequency" + +config STATIC_DDR_CLK_FREQ + bool "Build-time static DDR clock frequency" + +endchoice + +config DDR_CLK_FREQ + int "DDR clock frequency in Hz" + depends on STATIC_DDR_CLK_FREQ + default 100000000 + help + The DDR clock frequency, specified in Hz. + +config DDR_SPD + bool "JEDEC Serial Presence Detect (SPD) support" + help + For memory controllers that can utilize it, add enable support for + using the JEDEC SDP standard. + +config SYS_SPD_BUS_NUM + int "I2C bus number for DDR SPD" + depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY + default 0 + +source "drivers/ddr/altera/Kconfig" +source "drivers/ddr/imx/Kconfig" + +config SPD_EEPROM + bool "DDR controller makes use of an SPD EEPROM for JEDEC information" + depends on SYS_FSL_DDR || SYS_FSL_MMDC || CONFIG_ARMADA_XP + help + Get DDR timing information from an I2C EEPROM. Common with pluggable + memory modules such as SODIMMs. You must define SPD_EEPROM_ADDRESS + to the I2C address of the SPD EEPROM. |