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-rw-r--r--drivers/dma/Kconfig30
-rw-r--r--drivers/dma/fsl_dma.c4
-rw-r--r--drivers/dma/keystone_nav.c30
-rw-r--r--drivers/dma/keystone_nav_cfg.c24
-rw-r--r--drivers/dma/ti/Kconfig1
5 files changed, 57 insertions, 32 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 1993c1d31df..9cacea88d0c 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -35,19 +35,40 @@ config BCM6348_IUDMA
This driver support data transfer from devices to
memory and from memory to devices.
+config DMA_LPC32XX
+ bool "LPC32XX DMA driver"
+ select DMA_LEGACY
+ help
+ Enable some legacy DMA code for lpc32xx. It provides some direct
+ functions likes lpc32xx_dma_wait_status() which can be called from
+ other code.
+
+ This should be converted to use driver model and UCLASS_DMA.
+
config TI_EDMA3
bool "TI EDMA3 driver"
+ select DMA_LEGACY
help
Enable the TI EDMA3 driver for DRA7xx and AM43xx evms.
This driver support data transfer between memory
regions.
+config TI_KSNAV
+ bool "TI Keystone Navigator DMA driver"
+ depends on ARCH_KEYSTONE
+ default y
+ select DMA_LEGACY
+ help
+ Enable the Keystone Navigator driver for Keystone 2 platforms.
+
config APBH_DMA
bool "Support APBH DMA"
depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
+ select DMA_LEGACY
help
Enable APBH DMA driver.
+
if APBH_DMA
config APBH_DMA_BURST
bool "Enable DMA BURST"
@@ -57,6 +78,15 @@ config APBH_DMA_BURST8
endif
+config DMA_LEGACY
+ bool "Legacy DMA support"
+ default y if FSLDMAFEC
+ help
+ Enable legacy DMA support. This does not use driver model and should
+ be migrated to the new API.
+
+ It is required for some PowerPC boards.
+
source "drivers/dma/ti/Kconfig"
endmenu # menu "DMA Support"
diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index b7eddf0f04c..1864b5d88b0 100644
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -130,11 +130,9 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) {
/*
* 85xx/86xx use dma to initialize SDRAM when !CONFIG_ECC_INIT_VIA_DDRCONTROLLER
- * while 83xx uses dma to initialize SDRAM when CONFIG_DDR_ECC_INIT_VIA_DMA
*/
#if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) || \
- (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)))
+ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)))
void dma_meminit(uint val, uint size)
{
uint *p = 0;
diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c
index 443e4b23669..9a5ba79f3fe 100644
--- a/drivers/dma/keystone_nav.c
+++ b/drivers/dma/keystone_nav.c
@@ -11,20 +11,20 @@
#include <linux/delay.h>
struct qm_config qm_memmap = {
- .stat_cfg = CONFIG_KSNAV_QM_QUEUE_STATUS_BASE,
- .queue = (void *)CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE,
- .mngr_vbusm = CONFIG_KSNAV_QM_BASE_ADDRESS,
- .i_lram = CONFIG_KSNAV_QM_LINK_RAM_BASE,
- .proxy = (void *)CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE,
- .status_ram = CONFIG_KSNAV_QM_STATUS_RAM_BASE,
- .mngr_cfg = (void *)CONFIG_KSNAV_QM_CONF_BASE,
- .intd_cfg = CONFIG_KSNAV_QM_INTD_CONF_BASE,
- .desc_mem = (void *)CONFIG_KSNAV_QM_DESC_SETUP_BASE,
- .region_num = CONFIG_KSNAV_QM_REGION_NUM,
- .pdsp_cmd = CONFIG_KSNAV_QM_PDSP1_CMD_BASE,
- .pdsp_ctl = CONFIG_KSNAV_QM_PDSP1_CTRL_BASE,
- .pdsp_iram = CONFIG_KSNAV_QM_PDSP1_IRAM_BASE,
- .qpool_num = CONFIG_KSNAV_QM_QPOOL_NUM,
+ .stat_cfg = KS2_QM_QUEUE_STATUS_BASE,
+ .queue = (void *)KS2_QM_MANAGER_QUEUES_BASE,
+ .mngr_vbusm = KS2_QM_BASE_ADDRESS,
+ .i_lram = KS2_QM_LINK_RAM_BASE,
+ .proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE,
+ .status_ram = KS2_QM_STATUS_RAM_BASE,
+ .mngr_cfg = (void *)KS2_QM_CONF_BASE,
+ .intd_cfg = KS2_QM_INTD_CONF_BASE,
+ .desc_mem = (void *)KS2_QM_DESC_SETUP_BASE,
+ .region_num = KS2_QM_REGION_NUM,
+ .pdsp_cmd = KS2_QM_PDSP1_CMD_BASE,
+ .pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE,
+ .pdsp_iram = KS2_QM_PDSP1_IRAM_BASE,
+ .qpool_num = KS2_QM_QPOOL_NUM,
};
/*
@@ -252,7 +252,7 @@ int ksnav_init(struct pktdma_cfg *pktdma, struct rx_buff_desc *rx_buffers)
writel(0, &pktdma->global->emulation_control);
/* Set QM base address, only for K2x devices */
- writel(CONFIG_KSNAV_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]);
+ writel(KS2_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]);
/* Enable all channels. The current state isn't important */
for (j = 0; j < pktdma->tx_ch_num; j++) {
diff --git a/drivers/dma/keystone_nav_cfg.c b/drivers/dma/keystone_nav_cfg.c
index 9a64801cf9b..301419b6fda 100644
--- a/drivers/dma/keystone_nav_cfg.c
+++ b/drivers/dma/keystone_nav_cfg.c
@@ -8,19 +8,17 @@
#include <asm/ti-common/keystone_nav.h>
-#ifdef CONFIG_KSNAV_PKTDMA_NETCP
/* NETCP Pktdma */
struct pktdma_cfg netcp_pktdma = {
- .global = (void *)CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE,
- .tx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_TX_BASE,
- .tx_ch_num = CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM,
- .rx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_BASE,
- .rx_ch_num = CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM,
- .tx_sched = (u32 *)CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE,
- .rx_flows = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE,
- .rx_flow_num = CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM,
- .rx_free_q = CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE,
- .rx_rcv_q = CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE,
- .tx_snd_q = CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE,
+ .global = (void *)KS2_NETCP_PDMA_CTRL_BASE,
+ .tx_ch = (void *)KS2_NETCP_PDMA_TX_BASE,
+ .tx_ch_num = KS2_NETCP_PDMA_TX_CH_NUM,
+ .rx_ch = (void *)KS2_NETCP_PDMA_RX_BASE,
+ .rx_ch_num = KS2_NETCP_PDMA_RX_CH_NUM,
+ .tx_sched = (u32 *)KS2_NETCP_PDMA_SCHED_BASE,
+ .rx_flows = (void *)KS2_NETCP_PDMA_RX_FLOW_BASE,
+ .rx_flow_num = KS2_NETCP_PDMA_RX_FLOW_NUM,
+ .rx_free_q = KS2_NETCP_PDMA_RX_FREE_QUEUE,
+ .rx_rcv_q = KS2_NETCP_PDMA_RX_RCV_QUEUE,
+ .tx_snd_q = KS2_NETCP_PDMA_TX_SND_QUEUE,
};
-#endif
diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig
index 9cbd5f334dc..87c026e0490 100644
--- a/drivers/dma/ti/Kconfig
+++ b/drivers/dma/ti/Kconfig
@@ -9,7 +9,6 @@ config TI_K3_NAVSS_UDMA
select TI_K3_NAVSS_RINGACC
select TI_K3_NAVSS_PSILCFG
select TI_K3_PSIL
- default n
help
Support for UDMA used in K3 devices.
endif