diff options
Diffstat (limited to 'drivers/gpio')
67 files changed, 473 insertions, 70 deletions
diff --git a/drivers/gpio/74x164_gpio.c b/drivers/gpio/74x164_gpio.c index 7a7cfe86114..331428ccdb9 100644 --- a/drivers/gpio/74x164_gpio.c +++ b/drivers/gpio/74x164_gpio.c @@ -8,7 +8,6 @@ * */ -#include <common.h> #include <errno.h> #include <dm.h> #include <fdtdec.h> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b050585389b..3996333fe8d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -157,6 +157,13 @@ config ASPEED_GPIO is found in the AST2400, AST2500 and AST2600 BMC SoCs and provides access to over 200 GPIOs on each chip. +config ASPEED_G7_GPIO + bool "Aspeed G7 GPIO Driver" + help + Say yes here to support the Aspeed G7 GPIO driver. The controller + is found in the AST2700 BMC SoCs and provides access to over 200 + GPIOs on each chip. + config DA8XX_GPIO bool "DA8xx GPIO Driver" help @@ -301,6 +308,15 @@ config NPCM_GPIO Support GPIO controllers on Nuvovon NPCM SoCs. NPCM7xx/NPCM8xx contain 8 GPIO banks, each bank contains 32 pins. +config NPCM_SGPIO + bool "Nuvoton NPCM SGPIO driver" + depends on DM_GPIO + help + Support Nuvoton BMC NPCM7xx/NPCM8xx sgpio driver support. + Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595) + and parallel to serial IC (HC165). + BMC can use this driver to increase 64 GPI pins and 64 GPO pins to use. + config OMAP_GPIO bool "TI OMAP GPIO driver" depends on ARCH_OMAP2PLUS @@ -487,7 +503,7 @@ config MVEBU_GPIO config ZYNQ_GPIO bool "Zynq GPIO driver" depends on DM_GPIO - default y if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL + default y if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL2 help Supports GPIO access on Zynq SoC. @@ -639,7 +655,7 @@ config NOMADIK_GPIO config ZYNQMP_GPIO_MODEPIN bool "ZynqMP gpio modepin" - depends on DM_GPIO + depends on DM_GPIO && ZYNQMP_FIRMWARE help This config enables the ZynqMP gpio modepin driver. ZynqMP modepin driver will set and get the status of PS_MODE pins. These modepins diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 4a293154350..da0faf05246 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_$(SPL_TPL_)DM_GPIO) += gpio-uclass.o obj-$(CONFIG_$(SPL_)DM_PCA953X) += pca953x_gpio.o obj-$(CONFIG_ASPEED_GPIO) += gpio-aspeed.o +obj-$(CONFIG_ASPEED_G7_GPIO) += gpio-aspeed-g7.o obj-$(CONFIG_AT91_GPIO) += at91_gpio.o obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o obj-$(CONFIG_BCM6345_GPIO) += bcm6345_gpio.o @@ -27,6 +28,7 @@ obj-$(CONFIG_$(SPL_TPL_)MCP230XX_GPIO) += mcp230xx_gpio.o obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o obj-$(CONFIG_NPCM_GPIO) += npcm_gpio.o +obj-$(CONFIG_NPCM_SGPIO) += npcm_sgpio.o obj-$(CONFIG_PCA953X) += pca953x.o obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c index edc5a8093b0..469c50a6016 100644 --- a/drivers/gpio/altera_pio.c +++ b/drivers/gpio/altera_pio.c @@ -4,7 +4,6 @@ * Copyright (C) 2011 Missing Link Electronics * Joachim Foerster <joachim@missinglinkelectronics.com> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <malloc.h> @@ -60,7 +59,6 @@ static int altera_pio_get_value(struct udevice *dev, unsigned pin) return !!(readl(®s->data) & (1 << pin)); } - static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val) { struct altera_pio_plat *plat = dev_get_plat(dev); diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index f80f4afd24f..50a69815907 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -8,7 +8,6 @@ */ #include <config.h> -#include <common.h> #include <clk.h> #include <dm.h> #include <malloc.h> diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c index be1dd752bf7..65d064b46df 100644 --- a/drivers/gpio/atmel_pio4.c +++ b/drivers/gpio/atmel_pio4.c @@ -5,7 +5,6 @@ * Copyright (C) 2015 Atmel Corporation * Wenyou.Yang <wenyou.yang@atmel.com> */ -#include <common.h> #include <clk.h> #include <dm.h> #include <fdtdec.h> diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c index af6631697f5..6e632c8fc73 100644 --- a/drivers/gpio/axp_gpio.c +++ b/drivers/gpio/axp_gpio.c @@ -5,7 +5,6 @@ * X-Powers AXP Power Management ICs gpio driver */ -#include <common.h> #include <asm/arch/pmic_bus.h> #include <asm/gpio.h> #include <axp_pmic.h> diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c index 704a6fa7121..ccf84fdae11 100644 --- a/drivers/gpio/bcm2835_gpio.c +++ b/drivers/gpio/bcm2835_gpio.c @@ -4,7 +4,6 @@ * <vikram186@gmail.com> */ -#include <common.h> #include <dm.h> #include <dm/pinctrl.h> #include <errno.h> diff --git a/drivers/gpio/bcm6345_gpio.c b/drivers/gpio/bcm6345_gpio.c index e031f71a784..e76c84e806a 100644 --- a/drivers/gpio/bcm6345_gpio.c +++ b/drivers/gpio/bcm6345_gpio.c @@ -7,7 +7,6 @@ * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <asm/gpio.h> diff --git a/drivers/gpio/cortina_gpio.c b/drivers/gpio/cortina_gpio.c index 72ef523be96..e0ea14cce69 100644 --- a/drivers/gpio/cortina_gpio.c +++ b/drivers/gpio/cortina_gpio.c @@ -5,7 +5,6 @@ * GPIO Driver for Cortina Access CAxxxx Line of SoCs */ -#include <common.h> #include <dm.h> #include <log.h> #include <asm/io.h> diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index b310f2dbf65..1ccb9e69f15 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -6,7 +6,6 @@ * Laurence Withers <lwithers@guralp.com> */ -#include <common.h> #include <dm.h> #include <fdtdec.h> #include <malloc.h> diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c index 6c091d4fd87..4cb550a540c 100644 --- a/drivers/gpio/ftgpio010.c +++ b/drivers/gpio/ftgpio010.c @@ -3,7 +3,6 @@ * Faraday Technology's FTGPIO010 controller. */ -#include <common.h> #include <dm.h> #include <asm/io.h> #include <asm/gpio.h> diff --git a/drivers/gpio/gpio-aspeed-g7.c b/drivers/gpio/gpio-aspeed-g7.c new file mode 100644 index 00000000000..4c6ab86203c --- /dev/null +++ b/drivers/gpio/gpio-aspeed-g7.c @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) ASPEED Technology Inc. + * Billy Tsai <billy_tsai@aspeedtech.com> + */ +#include <asm/io.h> +#include <asm/gpio.h> + +#include <config.h> +#include <clk.h> +#include <dm.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/sizes.h> + +struct aspeed_gpio_priv { + void *regs; +}; + +#define GPIO_G7_IRQ_STS_BASE 0x100 +#define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4) +#define GPIO_G7_CTRL_REG_BASE 0x180 +#define GPIO_G7_CTRL_REG_OFFSET(x) (GPIO_G7_CTRL_REG_BASE + (x) * 0x4) +#define GPIO_G7_OUT_DATA BIT(0) +#define GPIO_G7_DIR BIT(1) +#define GPIO_G7_IRQ_EN BIT(2) +#define GPIO_G7_IRQ_TYPE0 BIT(3) +#define GPIO_G7_IRQ_TYPE1 BIT(4) +#define GPIO_G7_IRQ_TYPE2 BIT(5) +#define GPIO_G7_RST_TOLERANCE BIT(6) +#define GPIO_G7_DEBOUNCE_SEL GENMASK(8, 7) +#define GPIO_G7_INPUT_MASK BIT(9) +#define GPIO_G7_IRQ_STS BIT(12) +#define GPIO_G7_IN_DATA BIT(13) +/* + * The configuration of the following registers should be determined + * outside of the GPIO driver. + */ +#define GPIO_G7_PRIVILEGE_W_REG_BASE 0x810 +#define GPIO_G7_PRIVILEGE_W_REG_OFFSET(x) (GPIO_G7_PRIVILEGE_W_REG_BASE + ((x) >> 2) * 0x4) +#define GPIO_G7_PRIVILEGE_R_REG_BASE 0x910 +#define GPIO_G7_PRIVILEGE_R_REG_OFFSET(x) (GPIO_G7_PRIVILEGE_R_REG_BASE + ((x) >> 2) * 0x4) +#define GPIO_G7_IRQ_TARGET_REG_BASE 0xA10 +#define GPIO_G7_IRQ_TARGET_REG_OFFSET(x) (GPIO_G7_IRQ_TARGET_REG_BASE + ((x) >> 2) * 0x4) +#define GPIO_G7_IRQ_TO_INTC2_18 BIT(0) +#define GPIO_G7_IRQ_TO_INTC2_19 BIT(1) +#define GPIO_G7_IRQ_TO_INTC2_20 BIT(2) +#define GPIO_G7_IRQ_TO_SIO BIT(3) +#define GPIO_G7_IRQ_TARGET_RESET_TOLERANCE BIT(6) +#define GPIO_G7_IRQ_TARGET_W_PROTECT BIT(7) + +static int +aspeed_gpio_direction_input(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset); + u32 dir = readl(addr); + + dir &= ~GPIO_G7_DIR; + writel(dir, addr); + + return 0; +} + +static int aspeed_gpio_direction_output(struct udevice *dev, unsigned int offset, + int value) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset); + u32 data = readl(addr); + + if (value) + data |= GPIO_G7_OUT_DATA; + else + data &= ~GPIO_G7_OUT_DATA; + writel(data, addr); + data |= GPIO_G7_DIR; + writel(data, addr); + + return 0; +} + +static int aspeed_gpio_get_value(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset); + + return !!(readl(addr) & GPIO_G7_IN_DATA); +} + +static int +aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset); + u32 data = readl(addr); + + if (value) + data |= GPIO_G7_OUT_DATA; + else + data &= ~GPIO_G7_OUT_DATA; + + writel(data, addr); + + return 0; +} + +static int aspeed_gpio_get_function(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset); + + if (readl(addr) & GPIO_G7_DIR) + return GPIOF_OUTPUT; + + return GPIOF_INPUT; +} + +static const struct dm_gpio_ops aspeed_gpio_ops = { + .direction_input = aspeed_gpio_direction_input, + .direction_output = aspeed_gpio_direction_output, + .get_value = aspeed_gpio_get_value, + .set_value = aspeed_gpio_set_value, + .get_function = aspeed_gpio_get_function, +}; + +static int aspeed_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + + uc_priv->bank_name = dev->name; + ofnode_read_u32(dev_ofnode(dev), "ngpios", &uc_priv->gpio_count); + priv->regs = devfdt_get_addr_ptr(dev); + + return 0; +} + +static const struct udevice_id aspeed_gpio_ids[] = { + { .compatible = "aspeed,ast2700-gpio", }, + { } +}; + +U_BOOT_DRIVER(gpio_aspeed) = { + .name = "gpio-aspeed", + .id = UCLASS_GPIO, + .of_match = aspeed_gpio_ids, + .ops = &aspeed_gpio_ops, + .probe = aspeed_gpio_probe, + .priv_auto = sizeof(struct aspeed_gpio_priv), +}; diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 1c3d18796b3..c5608f4a9df 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -6,7 +6,6 @@ * * Implementation extracted from the Linux kernel and adapted for u-boot. */ -#include <common.h> #include <asm/io.h> #include <asm/gpio.h> diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c index ca7aa14eeb2..c8d2dff5f7b 100644 --- a/drivers/gpio/gpio-fxl6408.c +++ b/drivers/gpio/gpio-fxl6408.c @@ -37,7 +37,6 @@ #include <asm-generic/gpio.h> #include <asm/global_data.h> -#include <common.h> #include <dm.h> #include <dm/device_compat.h> #include <dt-bindings/gpio/gpio.h> diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 70778501232..d1a39938809 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> */ -#include <common.h> #include <clk.h> #include <dm.h> #include <malloc.h> diff --git a/drivers/gpio/gpio-rza1.c b/drivers/gpio/gpio-rza1.c index f14be871e8d..8c3fe61b25f 100644 --- a/drivers/gpio/gpio-rza1.c +++ b/drivers/gpio/gpio-rza1.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> */ -#include <common.h> #include <clk.h> #include <dm.h> #include <errno.h> diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 4234cd912c9..92ce68dd4a1 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY UCLASS_GPIO -#include <common.h> #include <dm.h> #include <dt-structs.h> #include <log.h> diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 61c705b5ac5..033fb4b60ee 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -4,7 +4,6 @@ * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ -#include <common.h> #include <dm.h> #include <linux/bitops.h> #include <linux/io.h> diff --git a/drivers/gpio/gpio_slg7xl45106.c b/drivers/gpio/gpio_slg7xl45106.c index 4ad06c18b4b..a7c9ff53af7 100644 --- a/drivers/gpio/gpio_slg7xl45106.c +++ b/drivers/gpio/gpio_slg7xl45106.c @@ -5,7 +5,6 @@ * Copyright (C) 2021 Xilinx, Inc. */ -#include <common.h> #include <errno.h> #include <asm/io.h> #include <asm/gpio.h> diff --git a/drivers/gpio/hi6220_gpio.c b/drivers/gpio/hi6220_gpio.c index e287c31b93f..7ceb5f424c9 100644 --- a/drivers/gpio/hi6220_gpio.c +++ b/drivers/gpio/hi6220_gpio.c @@ -4,7 +4,6 @@ * Peter Griffin <peter.griffin@linaro.org> */ -#include <common.h> #include <dm.h> #include <asm/gpio.h> #include <asm/io.h> diff --git a/drivers/gpio/hsdk-creg-gpio.c b/drivers/gpio/hsdk-creg-gpio.c index 66f8441840b..734b31d3dc1 100644 --- a/drivers/gpio/hsdk-creg-gpio.c +++ b/drivers/gpio/hsdk-creg-gpio.c @@ -12,7 +12,6 @@ #include <log.h> #include <asm-generic/gpio.h> #include <asm/io.h> -#include <common.h> #include <dm.h> #include <errno.h> #include <linux/bitops.h> diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c index 3227a8d5b57..fc1d418315c 100644 --- a/drivers/gpio/imx_rgpio2p.c +++ b/drivers/gpio/imx_rgpio2p.c @@ -5,7 +5,6 @@ * RGPIO2P driver for the Freescale i.MX7ULP. */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c index 20af35de2cf..53ed0a3eed0 100644 --- a/drivers/gpio/intel_broadwell_gpio.c +++ b/drivers/gpio/intel_broadwell_gpio.c @@ -3,7 +3,6 @@ * Copyright (c) 2012 The Chromium OS Authors. */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index 4a3ec6d6350..0ab6e8a90bc 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY UCLASS_GPIO -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c index 2ed0d0bea9a..096bc3b05bb 100644 --- a/drivers/gpio/intel_ich6_gpio.c +++ b/drivers/gpio/intel_ich6_gpio.c @@ -28,7 +28,6 @@ #define LOG_CATEGORY UCLASS_GPIO -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/iproc_gpio.c b/drivers/gpio/iproc_gpio.c index 7187d3257b9..8688f12e43c 100644 --- a/drivers/gpio/iproc_gpio.c +++ b/drivers/gpio/iproc_gpio.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Broadcom */ -#include <common.h> #include <errno.h> #include <asm/gpio.h> #include <asm/io.h> diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c index a15769793f1..e183f5594b5 100644 --- a/drivers/gpio/kw_gpio.c +++ b/drivers/gpio/kw_gpio.c @@ -12,7 +12,6 @@ * Dieter Kiermaier dk-arm-linux@gmx.de */ -#include <common.h> #include <linux/bitops.h> #include <asm/io.h> #include <asm/arch/soc.h> diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c index de66c765d11..2b537e007ba 100644 --- a/drivers/gpio/lpc32xx_gpio.c +++ b/drivers/gpio/lpc32xx_gpio.c @@ -6,7 +6,6 @@ * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> */ -#include <common.h> #include <asm/io.h> #include <asm/arch-lpc32xx/cpu.h> #include <asm/arch-lpc32xx/gpio.h> diff --git a/drivers/gpio/max7320_gpio.c b/drivers/gpio/max7320_gpio.c index 647aed907b4..f733cc924e5 100644 --- a/drivers/gpio/max7320_gpio.c +++ b/drivers/gpio/max7320_gpio.c @@ -7,7 +7,6 @@ * */ -#include <common.h> #include <dm.h> #include <i2c.h> #include <asm-generic/gpio.h> diff --git a/drivers/gpio/mcp230xx_gpio.c b/drivers/gpio/mcp230xx_gpio.c index df99fde5660..42e7fe9d474 100644 --- a/drivers/gpio/mcp230xx_gpio.c +++ b/drivers/gpio/mcp230xx_gpio.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY UCLASS_GPIO -#include <common.h> #include <errno.h> #include <dm.h> #include <i2c.h> diff --git a/drivers/gpio/mpc83xx_spisel_boot.c b/drivers/gpio/mpc83xx_spisel_boot.c index fd26a36a0f9..2be8c73ae3d 100644 --- a/drivers/gpio/mpc83xx_spisel_boot.c +++ b/drivers/gpio/mpc83xx_spisel_boot.c @@ -5,7 +5,6 @@ * GPIO driver to set/clear SPISEL_BOOT pin on mpc83xx. */ -#include <common.h> #include <log.h> #include <dm.h> #include <mapmem.h> diff --git a/drivers/gpio/mpc8xx_gpio.c b/drivers/gpio/mpc8xx_gpio.c index 2f653465331..e2b12f8b56c 100644 --- a/drivers/gpio/mpc8xx_gpio.c +++ b/drivers/gpio/mpc8xx_gpio.c @@ -10,7 +10,6 @@ * Copyright 2010 eXMeritus, A Boeing Company */ -#include <common.h> #include <asm/io.h> #include <dm.h> #include <mapmem.h> diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c index f7ffd8926ad..e9bd38f162c 100644 --- a/drivers/gpio/mpc8xxx_gpio.c +++ b/drivers/gpio/mpc8xxx_gpio.c @@ -9,7 +9,6 @@ * Copyright 2020-2021 NXP */ -#include <common.h> #include <dm.h> #include <mapmem.h> #include <asm/gpio.h> diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c index c97e44005ee..5a40304f1f9 100644 --- a/drivers/gpio/mscc_sgpio.c +++ b/drivers/gpio/mscc_sgpio.c @@ -7,7 +7,6 @@ * Copyright (c) 2018 Microsemi Corporation */ -#include <common.h> #include <dm.h> #include <log.h> #include <asm/gpio.h> diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index f5d9ab54e81..2fb266f1285 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -5,7 +5,6 @@ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <asm/global_data.h> diff --git a/drivers/gpio/mt7621_gpio.c b/drivers/gpio/mt7621_gpio.c index 43bb4df4da7..63a202310a5 100644 --- a/drivers/gpio/mt7621_gpio.c +++ b/drivers/gpio/mt7621_gpio.c @@ -7,7 +7,6 @@ * Copyright (C) 2013 John Crispin <blogic@openwrt.org> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/mvebu_gpio.c b/drivers/gpio/mvebu_gpio.c index f706a6dfa4f..0d82380dde4 100644 --- a/drivers/gpio/mvebu_gpio.c +++ b/drivers/gpio/mvebu_gpio.c @@ -3,7 +3,6 @@ * Copyright (C) 2016 Stefan Roese <sr@denx.de> */ -#include <common.h> #include <dm.h> #include <dm/pinctrl.h> #include <asm/gpio.h> diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 1dec4e35e0a..28176e15b7d 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -6,7 +6,6 @@ * Copyright (C) 2011 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de> */ -#include <common.h> #include <errno.h> #include <dm.h> #include <malloc.h> @@ -134,7 +133,10 @@ int gpio_get_value(unsigned gpio) regs = (struct gpio_regs *)gpio_ports[port]; - val = (readl(®s->gpio_psr) >> gpio) & 0x01; + if ((readl(®s->gpio_dir) >> gpio) & 0x01) + val = (readl(®s->gpio_dr) >> gpio) & 0x01; + else + val = (readl(®s->gpio_psr) >> gpio) & 0x01; return val; } @@ -211,7 +213,10 @@ static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset, static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset) { - return (readl(®s->gpio_psr) >> offset) & 0x01; + if ((readl(®s->gpio_dir) >> offset) & 0x01) + return (readl(®s->gpio_dr) >> offset) & 0x01; + else + return (readl(®s->gpio_psr) >> offset) & 0x01; } /* set GPIO pin 'gpio' as an input */ diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index 1356f89ac2f..80910c9ec4c 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -6,7 +6,6 @@ * on behalf of DENX Software Engineering GmbH */ -#include <common.h> #include <log.h> #include <malloc.h> #include <asm/global_data.h> diff --git a/drivers/gpio/nmk_gpio.c b/drivers/gpio/nmk_gpio.c index e1bb41b196c..c2716e71763 100644 --- a/drivers/gpio/nmk_gpio.c +++ b/drivers/gpio/nmk_gpio.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* Copyright (C) 2019 Stephan Gerhold */ -#include <common.h> #include <dm.h> #include <asm/gpio.h> #include <asm/io.h> diff --git a/drivers/gpio/npcm_gpio.c b/drivers/gpio/npcm_gpio.c index 98e5dc79c1c..da3b3ffbc92 100644 --- a/drivers/gpio/npcm_gpio.c +++ b/drivers/gpio/npcm_gpio.c @@ -3,7 +3,6 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ -#include <common.h> #include <dm.h> #include <asm/gpio.h> #include <linux/io.h> diff --git a/drivers/gpio/npcm_sgpio.c b/drivers/gpio/npcm_sgpio.c new file mode 100644 index 00000000000..6d73287c0a2 --- /dev/null +++ b/drivers/gpio/npcm_sgpio.c @@ -0,0 +1,291 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Nuvoton Technology Corp. + */ + +#include <dm.h> +#include <asm/gpio.h> +#include <linux/io.h> + +#define MAX_NR_HW_SGPIO 64 +#define NPCM_CLK_MHZ 8000000 + +#define NPCM_IOXCFG1 0x2A + +#define NPCM_IOXCTS 0x28 +#define NPCM_IOXCTS_IOXIF_EN BIT(7) +#define NPCM_IOXCTS_RD_MODE GENMASK(2, 1) +#define NPCM_IOXCTS_RD_MODE_PERIODIC BIT(2) + +#define NPCM_IOXCFG2 0x2B +#define NPCM_IOXCFG2_PORT GENMASK(3, 0) + +#define GPIO_BANK(x) ((x) / 8) +#define GPIO_BIT(x) ((x) % 8) + +struct npcm_sgpio_priv { + void __iomem *base; + u32 nin_sgpio; + u32 nout_sgpio; + u32 in_port; + u32 out_port; +}; + +struct npcm_sgpio_bank { + u8 rdata_reg; + u8 wdata_reg; + u8 event_config; + u8 event_status; +}; + +enum npcm_sgpio_reg { + READ_DATA, + WRITE_DATA, + EVENT_CFG, + EVENT_STS, +}; + +static const struct npcm_sgpio_bank npcm_sgpio_banks[] = { + { + .wdata_reg = 0x00, + .rdata_reg = 0x08, + .event_config = 0x10, + .event_status = 0x20, + }, + { + .wdata_reg = 0x01, + .rdata_reg = 0x09, + .event_config = 0x12, + .event_status = 0x21, + }, + { + .wdata_reg = 0x02, + .rdata_reg = 0x0a, + .event_config = 0x14, + .event_status = 0x22, + }, + { + .wdata_reg = 0x03, + .rdata_reg = 0x0b, + .event_config = 0x16, + .event_status = 0x23, + }, + { + .wdata_reg = 0x04, + .rdata_reg = 0x0c, + .event_config = 0x18, + .event_status = 0x24, + }, + { + .wdata_reg = 0x05, + .rdata_reg = 0x0d, + .event_config = 0x1a, + .event_status = 0x25, + }, + { + .wdata_reg = 0x06, + .rdata_reg = 0x0e, + .event_config = 0x1c, + .event_status = 0x26, + }, + { + .wdata_reg = 0x07, + .rdata_reg = 0x0f, + .event_config = 0x1e, + .event_status = 0x27, + }, +}; + +static void __iomem *bank_reg(struct npcm_sgpio_priv *gpio, + const struct npcm_sgpio_bank *bank, + const enum npcm_sgpio_reg reg) +{ + switch (reg) { + case READ_DATA: + return gpio->base + bank->rdata_reg; + case WRITE_DATA: + return gpio->base + bank->wdata_reg; + case EVENT_CFG: + return gpio->base + bank->event_config; + case EVENT_STS: + return gpio->base + bank->event_status; + default: + /* actually if code runs to here, it's an error case */ + printf("Getting here is an error condition\n"); + return NULL; + } +} + +static const struct npcm_sgpio_bank *offset_to_bank(unsigned int offset) +{ + unsigned int bank = GPIO_BANK(offset); + + return &npcm_sgpio_banks[bank]; +} + +static int npcm_sgpio_direction_input(struct udevice *dev, unsigned int offset) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + + if (offset < priv->nout_sgpio) { + printf("Error: Offset %d is a output pin\n", offset); + return -EINVAL; + } + + return 0; +} + +static int npcm_sgpio_direction_output(struct udevice *dev, unsigned int offset, + int value) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + const struct npcm_sgpio_bank *bank = offset_to_bank(offset); + void __iomem *addr; + u8 reg = 0; + + if (offset >= priv->nout_sgpio) { + printf("Error: Offset %d is a input pin\n", offset); + return -EINVAL; + } + + addr = bank_reg(priv, bank, WRITE_DATA); + reg = ioread8(addr); + + if (value) + reg |= BIT(GPIO_BIT(offset)); + else + reg &= ~BIT(GPIO_BIT(offset)); + + iowrite8(reg, addr); + + return 0; +} + +static int npcm_sgpio_get_value(struct udevice *dev, unsigned int offset) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + const struct npcm_sgpio_bank *bank; + void __iomem *addr; + u8 reg; + + if (offset < priv->nout_sgpio) { + bank = offset_to_bank(offset); + addr = bank_reg(priv, bank, WRITE_DATA); + } else { + offset -= priv->nout_sgpio; + bank = offset_to_bank(offset); + addr = bank_reg(priv, bank, READ_DATA); + } + + reg = ioread8(addr); + + return !!(reg & BIT(GPIO_BIT(offset))); +} + +static int npcm_sgpio_set_value(struct udevice *dev, unsigned int offset, + int value) +{ + return npcm_sgpio_direction_output(dev, offset, value); +} + +static int npcm_sgpio_get_function(struct udevice *dev, unsigned int offset) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + + if (offset < priv->nout_sgpio) + return GPIOF_OUTPUT; + + return GPIOF_INPUT; +} + +static void npcm_sgpio_setup_enable(struct npcm_sgpio_priv *gpio, bool enable) +{ + u8 reg; + + reg = ioread8(gpio->base + NPCM_IOXCTS); + reg = (reg & ~NPCM_IOXCTS_RD_MODE) | NPCM_IOXCTS_RD_MODE_PERIODIC; + + if (enable) + reg |= NPCM_IOXCTS_IOXIF_EN; + else + reg &= ~NPCM_IOXCTS_IOXIF_EN; + + iowrite8(reg, gpio->base + NPCM_IOXCTS); +} + +static int npcm_sgpio_init_port(struct udevice *dev) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + u8 in_port, out_port, set_port, reg, set_clk; + + npcm_sgpio_setup_enable(priv, false); + + in_port = GPIO_BANK(priv->nin_sgpio); + if (GPIO_BIT(priv->nin_sgpio) > 0) + in_port += 1; + + out_port = GPIO_BANK(priv->nout_sgpio); + if (GPIO_BIT(priv->nout_sgpio) > 0) + out_port += 1; + + priv->in_port = in_port; + priv->out_port = out_port; + + set_port = (out_port & NPCM_IOXCFG2_PORT) << 4 | (in_port & NPCM_IOXCFG2_PORT); + set_clk = 0x07; + + iowrite8(set_port, priv->base + NPCM_IOXCFG2); + iowrite8(set_clk, priv->base + NPCM_IOXCFG1); + + reg = ioread8(priv->base + NPCM_IOXCFG2); + + return reg == set_port ? 0 : -EINVAL; +} + +static const struct dm_gpio_ops npcm_sgpio_ops = { + .direction_input = npcm_sgpio_direction_input, + .direction_output = npcm_sgpio_direction_output, + .get_value = npcm_sgpio_get_value, + .set_value = npcm_sgpio_set_value, + .get_function = npcm_sgpio_get_function, +}; + +static int npcm_sgpio_probe(struct udevice *dev) +{ + struct npcm_sgpio_priv *priv = dev_get_priv(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int rc; + + priv->base = dev_read_addr_ptr(dev); + ofnode_read_u32(dev_ofnode(dev), "nuvoton,input-ngpios", &priv->nin_sgpio); + ofnode_read_u32(dev_ofnode(dev), "nuvoton,output-ngpios", &priv->nout_sgpio); + + if (priv->nin_sgpio > MAX_NR_HW_SGPIO || priv->nout_sgpio > MAX_NR_HW_SGPIO) + return -EINVAL; + + rc = npcm_sgpio_init_port(dev); + if (rc < 0) + return rc; + + uc_priv->gpio_count = priv->nin_sgpio + priv->nout_sgpio; + uc_priv->bank_name = dev->name; + + npcm_sgpio_setup_enable(priv, true); + + return 0; +} + +static const struct udevice_id npcm_sgpio_match[] = { + { .compatible = "nuvoton,npcm845-sgpio" }, + { .compatible = "nuvoton,npcm750-sgpio" }, + { } +}; + +U_BOOT_DRIVER(npcm_sgpio) = { + .name = "npcm_sgpio", + .id = UCLASS_GPIO, + .of_match = npcm_sgpio_match, + .probe = npcm_sgpio_probe, + .priv_auto = sizeof(struct npcm_sgpio_priv), + .ops = &npcm_sgpio_ops, +}; diff --git a/drivers/gpio/nx_gpio.c b/drivers/gpio/nx_gpio.c index e2565d70953..741b2ff7f17 100644 --- a/drivers/gpio/nx_gpio.c +++ b/drivers/gpio/nx_gpio.c @@ -4,7 +4,6 @@ * DeokJin, Lee <truevirtue@nexell.co.kr> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <malloc.h> diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index 50c4f75ddf5..1aceafcdf58 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -17,7 +17,6 @@ * Copyright (C) 2003-2005 Nokia Corporation * Written by Juha Yrjölä <juha.yrjola@nokia.com> */ -#include <common.h> #include <dm.h> #include <fdtdec.h> #include <asm/global_data.h> diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index b5ed35256ee..fc4dcf9f986 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c @@ -8,10 +8,11 @@ * pca9539, etc) */ -#include <common.h> +#include <config.h> #include <command.h> #include <i2c.h> #include <pca953x.h> +#include <vsprintf.h> /* Default to an address that hopefully won't corrupt other i2c devices */ #ifndef CFG_SYS_I2C_PCA953X_ADDR diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c index b0c66d18317..e84038f312e 100644 --- a/drivers/gpio/pca953x_gpio.c +++ b/drivers/gpio/pca953x_gpio.c @@ -18,7 +18,6 @@ * 2. Support Polarity Inversion */ -#include <common.h> #include <errno.h> #include <dm.h> #include <fdtdec.h> @@ -40,7 +39,6 @@ #define PCA957X_INVERT 1 #define PCA957X_DIRECTION 4 - #define PCA_GPIO_MASK 0x00FF #define PCA_INT 0x0100 #define PCA_PCAL BIT(9) diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c index f38e215c4d6..10ae86ec5d4 100644 --- a/drivers/gpio/pcf8575_gpio.c +++ b/drivers/gpio/pcf8575_gpio.c @@ -17,7 +17,6 @@ * */ -#include <common.h> #include <dm.h> #include <i2c.h> #include <log.h> diff --git a/drivers/gpio/pic32_gpio.c b/drivers/gpio/pic32_gpio.c index 975a2af3ccb..d8edfefb2d7 100644 --- a/drivers/gpio/pic32_gpio.c +++ b/drivers/gpio/pic32_gpio.c @@ -4,7 +4,6 @@ * Purna Chandra Mandal <purna.mandal@microchip.com> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <malloc.h> diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 0dd3434e9e0..80fee841ee3 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -5,7 +5,6 @@ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> */ -#include <common.h> #include <dm.h> #include <dm/device-internal.h> #include <dm/lists.h> diff --git a/drivers/gpio/qe_gpio.c b/drivers/gpio/qe_gpio.c index 16e8d1eae6e..ac6e68299e0 100644 --- a/drivers/gpio/qe_gpio.c +++ b/drivers/gpio/qe_gpio.c @@ -4,7 +4,6 @@ * Christophe Leroy <christophe.leroy@csgroup.eu> */ -#include <common.h> #include <dm.h> #include <mapmem.h> #include <asm/gpio.h> diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 2e901ac5c73..24ba12dd820 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -6,7 +6,6 @@ * Peter, Software Engineering, <superpeter.cai@gmail.com>. */ -#include <common.h> #include <dm.h> #include <syscon.h> #include <linux/errno.h> diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index 06ed585f3d6..83e65aa4aec 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -4,7 +4,6 @@ * Minkyu Kang <mk7.kang@samsung.com> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c index 305f9a6ff62..f5be2781443 100644 --- a/drivers/gpio/sandbox.c +++ b/drivers/gpio/sandbox.c @@ -3,7 +3,6 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include <common.h> #include <dm.h> #include <fdtdec.h> #include <log.h> diff --git a/drivers/gpio/sandbox_test.c b/drivers/gpio/sandbox_test.c index c76e1997419..4699a976252 100644 --- a/drivers/gpio/sandbox_test.c +++ b/drivers/gpio/sandbox_test.c @@ -5,7 +5,6 @@ * Copyright 2021 Google LLC */ -#include <common.h> #include <dm.h> #include <asm-generic/gpio.h> diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c index 2495d6c1c15..9f6051c1c4d 100644 --- a/drivers/gpio/sh_pfc.c +++ b/drivers/gpio/sh_pfc.c @@ -9,7 +9,6 @@ * for more details. */ -#include <common.h> #include <log.h> #include <malloc.h> #include <asm/bitops.h> diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c index 151f484e8fd..90f59120ecd 100644 --- a/drivers/gpio/sifive-gpio.c +++ b/drivers/gpio/sifive-gpio.c @@ -5,7 +5,6 @@ * Copyright (C) 2019 SiFive, Inc. */ -#include <common.h> #include <dm.h> #include <asm/arch/gpio.h> #include <asm/io.h> diff --git a/drivers/gpio/sl28cpld-gpio.c b/drivers/gpio/sl28cpld-gpio.c index 700fc3df298..e85f9260ec3 100644 --- a/drivers/gpio/sl28cpld-gpio.c +++ b/drivers/gpio/sl28cpld-gpio.c @@ -5,7 +5,6 @@ * Copyright (c) 2021 Michael Walle <michael@walle.cc> */ -#include <common.h> #include <dm.h> #include <asm/gpio.h> #include <sl28cpld.h> diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index 7a2ca91c769..b8eb55465d3 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -6,7 +6,6 @@ #define LOG_CATEGORY UCLASS_GPIO -#include <common.h> #include <clk.h> #include <dm.h> #include <fdtdec.h> diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index e4463a223f7..218ca2af397 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -9,7 +9,6 @@ * Tom Cubie <tangliang@allwinnertech.com> */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> @@ -158,7 +157,6 @@ void sunxi_gpio_set_pull_bank(void *bank_base, int pin_offset, u32 val) 0x3U << offset, val << offset); } - /* =========== Non-DM code, used by the SPL. ============ */ #if !CONFIG_IS_ENABLED(DM_GPIO) diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c index b07496e6e49..1d45b500746 100644 --- a/drivers/gpio/tca642x.c +++ b/drivers/gpio/tca642x.c @@ -20,7 +20,7 @@ * MA 02111-1307 USA */ -#include <common.h> +#include <config.h> #include <command.h> #include <i2c.h> #include <tca642x.h> diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c index 94a20d143e1..01b8245c8d5 100644 --- a/drivers/gpio/tegra186_gpio.c +++ b/drivers/gpio/tegra186_gpio.c @@ -4,7 +4,6 @@ * (based on tegra_gpio.c) */ -#include <common.h> #include <dm.h> #include <malloc.h> #include <errno.h> diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 55105f2802c..0c40d36c41e 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -10,7 +10,6 @@ * Tom Warren (twarren@nvidia.com) */ -#include <common.h> #include <dm.h> #include <log.h> #include <malloc.h> diff --git a/drivers/gpio/vybrid_gpio.c b/drivers/gpio/vybrid_gpio.c index 339392dcd35..5b4bba96da7 100644 --- a/drivers/gpio/vybrid_gpio.c +++ b/drivers/gpio/vybrid_gpio.c @@ -4,7 +4,6 @@ * Bhuvanchandra DV, Toradex, Inc. */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c index fa8d630b465..c0a92378b03 100644 --- a/drivers/gpio/xilinx_gpio.c +++ b/drivers/gpio/xilinx_gpio.c @@ -3,7 +3,6 @@ * Copyright (c) 2013 - 2018 Xilinx, Michal Simek */ -#include <common.h> #include <errno.h> #include <log.h> #include <malloc.h> diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 71a56127c0a..7db58c70663 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -8,7 +8,6 @@ * Copyright (C) 2009 - 2014 Xilinx, Inc. */ -#include <common.h> #include <asm/gpio.h> #include <asm/io.h> #include <linux/bitops.h> diff --git a/drivers/gpio/zynqmp_gpio_modepin.c b/drivers/gpio/zynqmp_gpio_modepin.c index e9565ff5430..8aaffaf37b3 100644 --- a/drivers/gpio/zynqmp_gpio_modepin.c +++ b/drivers/gpio/zynqmp_gpio_modepin.c @@ -5,7 +5,6 @@ * Copyright (C) 2021 Xilinx, Inc. */ -#include <common.h> #include <errno.h> #include <asm/io.h> #include <asm/gpio.h> |