diff options
Diffstat (limited to 'drivers/gpio')
| -rw-r--r-- | drivers/gpio/Kconfig | 54 | ||||
| -rw-r--r-- | drivers/gpio/Makefile | 1 | ||||
| -rw-r--r-- | drivers/gpio/msm_gpio.c | 2 | ||||
| -rw-r--r-- | drivers/gpio/pca953x.c | 1 | ||||
| -rw-r--r-- | drivers/gpio/tca642x.c | 356 |
5 files changed, 24 insertions, 390 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e11109fb56d..fd227d46f5a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -115,7 +115,7 @@ config ALTERA_PIO config BCM2835_GPIO bool "BCM2835 GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_BCM283X config BCM6345_GPIO bool "BCM6345 GPIO driver" @@ -140,6 +140,7 @@ config DWAPB_GPIO config AT91_GPIO bool "AT91 PIO GPIO driver" + depends on ARCH_AT91 help Say yes here to select AT91 PIO GPIO driver. AT91 PIO controller manages up to 32 fully programmable input/output @@ -151,7 +152,7 @@ config AT91_GPIO config ATMEL_PIO4 bool "ATMEL PIO4 driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_AT91 help Say yes here to support the Atmel PIO4 driver. The PIO4 is new version of Atmel PIO controller, which manages @@ -194,11 +195,11 @@ config FXL6408_GPIO config HIKEY_GPIO bool "HI6220 GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && TARGET_HIKEY config INTEL_BROADWELL_GPIO bool "Intel Broadwell GPIO driver" - depends on DM + depends on DM_GPIO && X86 help This driver supports Broadwell U devices which have an expanded GPIO feature set. The difference is large enough to merit a separate @@ -207,7 +208,7 @@ config INTEL_BROADWELL_GPIO config INTEL_GPIO bool "Intel generic GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && X86 help Say yes here to select Intel generic GPIO driver. This controller supports recent chips (e.g. Apollo Lake). It permits basic GPIO @@ -216,13 +217,13 @@ config INTEL_GPIO config INTEL_ICH6_GPIO bool "Intel ICH6 compatible legacy GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && X86 help Say yes here to select Intel ICH6 compatible legacy GPIO driver. config IMX_RGPIO2P bool "i.MX7ULP RGPIO2P driver" - depends on DM + depends on DM && (ARCH_MX7ULP || ARCH_IMX8ULP || ARCH_IMX9) help This driver supports i.MX7ULP Rapid GPIO2P controller. @@ -244,12 +245,13 @@ config HSDK_CREG_GPIO config KIRKWOOD_GPIO bool "Kirkwood GPIO driver" + depends on ARCH_KIRKWOOD help This drdiver supports GPIOs on Kirkwood platforms config LPC32XX_GPIO bool "LPC32XX GPIO driver" - depends on DM + depends on DM && ARCH_LPC32XX help Support for the LPC32XX GPIO driver. @@ -296,7 +298,7 @@ config MSCC_SGPIO config MSM_GPIO bool "Qualcomm GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_SNAPDRAGON help Support GPIO controllers on Qualcomm Snapdragon family of SoCs. This controller have single bank (default name "soc"), every @@ -309,24 +311,26 @@ config MSM_GPIO config MXC_GPIO bool "Freescale/NXP MXC GPIO driver" + depends on MACH_IMX help Support GPIO controllers on various i.MX platforms config MXS_GPIO bool "Freescale/NXP MXS GPIO driver" + depends on ARCH_MX23 || ARCH_MX28 help Support GPIO controllers on i.MX23 and i.MX28 platforms config NPCM_GPIO bool "Nuvoton NPCM GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_NPCM help Support GPIO controllers on Nuvovon NPCM SoCs. NPCM7xx/NPCM8xx contain 8 GPIO banks, each bank contains 32 pins. config NPCM_SGPIO bool "Nuvoton NPCM SGPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_NPCM help Support Nuvoton BMC NPCM7xx/NPCM8xx sgpio driver support. Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595) @@ -380,7 +384,7 @@ config RZA1_GPIO config ROCKCHIP_GPIO bool "Rockchip GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_ROCKCHIP help Support GPIO access on Rockchip SoCs. The GPIOs are arranged into a number of banks (different for each SoC type) each with 32 GPIOs. @@ -428,23 +432,9 @@ config XILINX_GPIO help This config enable the Xilinx GPIO driver for Microblaze. -config TCA642X - bool "TCA642x legacy GPIO driver" - -config CMD_TCA642X - bool "tca642x - Command to access tca642x state" - depends on TCA642X - default y - help - DEPRECATED - This needs conversion to driver model - - This provides a way to looking at the pin state of this device. - This mirrors the 'gpio' command and that should be used in preference - to custom code. - config TEGRA_GPIO bool "Tegra20..210 GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && ARCH_TEGRA help Support for the GPIO controller contained in NVIDIA Tegra20 through Tegra210. @@ -465,7 +455,7 @@ config GPIO_UNIPHIER config VYBRID_GPIO bool "Vybrid GPIO driver" - depends on DM + depends on DM && MACH_IMX help Say yes here to support Vybrid vf610 GPIOs. @@ -504,7 +494,7 @@ config STM32_GPIO config SIFIVE_GPIO bool "SiFive GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && RISCV help Device model driver for GPIO controller present in SiFive FU540 SoC. This driver enables GPIO interface on HiFive Unleashed A00 board. @@ -591,7 +581,7 @@ config PCA953X config MPC8XXX_GPIO bool "Freescale MPC8XXX GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) help This driver supports the built-in GPIO controller of MPC8XXX CPUs. Each GPIO bank is identified by its own entry in the device tree, @@ -632,7 +622,7 @@ config QE_GPIO config MPC8XX_GPIO bool "Freescale MPC8XX GPIO driver" - depends on DM_GPIO + depends on DM_GPIO && PPC help This driver supports parallel IO ports from MPC8XX CPUs. Each GPIO bank is identified by its own entry in the device tree. @@ -699,7 +689,7 @@ config SL28CPLD_GPIO config SLG7XL45106_I2C_GPO bool "slg7xl45106 i2c gpo expander" - depends on DM_GPIO + depends on DM_GPIO && ARCH_ZYNQMP help Support for slg7xl45106 i2c gpo expander. It is an i2c based 8-bit gpo expander, all gpo lines are controlled by writing diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index d64c14db5cf..e8422b94f53 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -49,7 +49,6 @@ obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o obj-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o -obj-$(CONFIG_TCA642X) += tca642x.o obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index 6783fc756f4..7de332c66ae 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -202,7 +202,7 @@ static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio) if (qcom_is_special_pin(priv->pin_data, gpio)) return msm_gpio_get_value_special(priv, gpio); - return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN); + return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) & BIT(GPIO_IN)); } static int msm_gpio_get_function_special(struct msm_gpio_bank *priv, diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index 2fb14590c0f..f0a79b92b02 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c @@ -13,6 +13,7 @@ #include <i2c.h> #include <pca953x.h> #include <vsprintf.h> +#include <asm/byteorder.h> /* Default to an address that hopefully won't corrupt other i2c devices */ #ifndef CFG_SYS_I2C_PCA953X_ADDR diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c deleted file mode 100644 index 8307a07e14e..00000000000 --- a/drivers/gpio/tca642x.c +++ /dev/null @@ -1,356 +0,0 @@ -/* - * Copyright 2013 Texas Instruments, Inc. - * Author: Dan Murphy <dmurphy@ti.com> - * - * Derived work from the pca953x.c driver - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <command.h> -#include <i2c.h> -#include <tca642x.h> - -/* tca642x register address definitions */ -struct tca642x_bank_info tca642x_regs[] = { - { .input_reg = 0x00, - .output_reg = 0x04, - .polarity_reg = 0x08, - .configuration_reg = 0x0c }, - { .input_reg = 0x01, - .output_reg = 0x05, - .polarity_reg = 0x09, - .configuration_reg = 0x0d }, - { .input_reg = 0x02, - .output_reg = 0x06, - .polarity_reg = 0x0a, - .configuration_reg = 0x0e }, -}; - -/* - * Modify masked bits in register - */ -static int tca642x_reg_write(uchar chip, uint8_t addr, - uint8_t reg_bit, uint8_t data) -{ - uint8_t valw; - int org_bus_num; - int ret; - - org_bus_num = i2c_get_bus_num(); - i2c_set_bus_num(CFG_SYS_I2C_TCA642X_BUS_NUM); - - if (i2c_read(chip, addr, 1, (uint8_t *)&valw, 1)) { - printf("Could not read before writing\n"); - ret = -1; - goto error; - } - valw &= ~reg_bit; - valw |= data; - - ret = i2c_write(chip, addr, 1, (u8 *)&valw, 1); - -error: - i2c_set_bus_num(org_bus_num); - return ret; -} - -static int tca642x_reg_read(uchar chip, uint8_t addr, uint8_t *data) -{ - uint8_t valw; - int org_bus_num; - int ret = 0; - - org_bus_num = i2c_get_bus_num(); - i2c_set_bus_num(CFG_SYS_I2C_TCA642X_BUS_NUM); - if (i2c_read(chip, addr, 1, (u8 *)&valw, 1)) { - ret = -1; - goto error; - } - - *data = valw; - -error: - i2c_set_bus_num(org_bus_num); - return ret; -} - -/* - * Set output value of IO pins in 'reg_bit' to corresponding value in 'data' - * 0 = low, 1 = high - */ -int tca642x_set_val(uchar chip, uint8_t gpio_bank, - uint8_t reg_bit, uint8_t data) -{ - uint8_t out_reg = tca642x_regs[gpio_bank].output_reg; - - return tca642x_reg_write(chip, out_reg, reg_bit, data); -} - -/* - * Set read polarity of IO pins in 'reg_bit' to corresponding value in 'data' - * 0 = read pin value, 1 = read inverted pin value - */ -int tca642x_set_pol(uchar chip, uint8_t gpio_bank, - uint8_t reg_bit, uint8_t data) -{ - uint8_t pol_reg = tca642x_regs[gpio_bank].polarity_reg; - - return tca642x_reg_write(chip, pol_reg, reg_bit, data); -} - -/* - * Set direction of IO pins in 'reg_bit' to corresponding value in 'data' - * 0 = output, 1 = input - */ -int tca642x_set_dir(uchar chip, uint8_t gpio_bank, - uint8_t reg_bit, uint8_t data) -{ - uint8_t config_reg = tca642x_regs[gpio_bank].configuration_reg; - - return tca642x_reg_write(chip, config_reg, reg_bit, data); -} - -/* - * Read current logic level of all IO pins - */ -int tca642x_get_val(uchar chip, uint8_t gpio_bank) -{ - uint8_t val; - uint8_t in_reg = tca642x_regs[gpio_bank].input_reg; - - if (tca642x_reg_read(chip, in_reg, &val) < 0) - return -1; - - return (int)val; -} - -/* - * Set the inital register states for the tca642x gpio expander - */ -int tca642x_set_inital_state(uchar chip, struct tca642x_bank_info init_data[]) -{ - int i, ret; - uint8_t config_reg; - uint8_t polarity_reg; - uint8_t output_reg; - - for (i = 0; i < 3; i++) { - config_reg = tca642x_regs[i].configuration_reg; - ret = tca642x_reg_write(chip, config_reg, 0xff, - init_data[i].configuration_reg); - polarity_reg = tca642x_regs[i].polarity_reg; - ret = tca642x_reg_write(chip, polarity_reg, 0xff, - init_data[i].polarity_reg); - output_reg = tca642x_regs[i].output_reg; - ret = tca642x_reg_write(chip, output_reg, 0xff, - init_data[i].output_reg); - } - - return ret; -} - -#if defined(CONFIG_CMD_TCA642X) && !defined(CONFIG_XPL_BUILD) -/* - * Display tca642x information - */ -static int tca642x_info(uchar chip) -{ - int i, j; - uint8_t data; - - printf("tca642x@ 0x%x (%d pins):\n", chip, 24); - for (i = 0; i < 3; i++) { - printf("Bank %i\n", i); - if (tca642x_reg_read(chip, - tca642x_regs[i].configuration_reg, - &data) < 0) - return -1; - printf("\tConfiguration: "); - for (j = 7; j >= 0; j--) - printf("%c", data & (1 << j) ? 'i' : 'o'); - printf("\n"); - - if (tca642x_reg_read(chip, - tca642x_regs[i].polarity_reg, &data) < 0) - return -1; - printf("\tPolarity: "); - for (j = 7; j >= 0; j--) - printf("%c", data & (1 << j) ? '1' : '0'); - printf("\n"); - - if (tca642x_reg_read(chip, - tca642x_regs[i].input_reg, &data) < 0) - return -1; - printf("\tInput value: "); - for (j = 7; j >= 0; j--) - printf("%c", data & (1 << j) ? '1' : '0'); - printf("\n"); - - if (tca642x_reg_read(chip, - tca642x_regs[i].output_reg, &data) < 0) - return -1; - printf("\tOutput value: "); - for (j = 7; j >= 0; j--) - printf("%c", data & (1 << j) ? '1' : '0'); - printf("\n"); - } - - return 0; -} - -static int tca642x_get_bank(int pin) -{ - int gpio_bank; - - if (pin <= 7) { - gpio_bank = 0; - } else if ((pin >= 10) && (pin <= 17)) { - gpio_bank = 1; - } else if ((pin >= 20) && (pin <= 27)) { - gpio_bank = 2; - } else { - printf("Requested pin is not available\n"); - gpio_bank = -1; - } - - return gpio_bank; -} - -static struct cmd_tbl cmd_tca642x[] = { - U_BOOT_CMD_MKENT(device, 3, 0, (void *)TCA642X_CMD_DEVICE, "", ""), - U_BOOT_CMD_MKENT(output, 4, 0, (void *)TCA642X_CMD_OUTPUT, "", ""), - U_BOOT_CMD_MKENT(input, 3, 0, (void *)TCA642X_CMD_INPUT, "", ""), - U_BOOT_CMD_MKENT(invert, 4, 0, (void *)TCA642X_CMD_INVERT, "", ""), - U_BOOT_CMD_MKENT(info, 2, 0, (void *)TCA642X_CMD_INFO, "", ""), -}; - -static int do_tca642x(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - static uchar chip = CFG_SYS_I2C_TCA642X_ADDR; - int ret = CMD_RET_USAGE, val; - int gpio_bank = 0; - uint8_t bank_shift; - ulong ul_arg2 = 0; - ulong ul_arg3 = 0; - struct cmd_tbl *c; - - c = find_cmd_tbl(argv[1], cmd_tca642x, ARRAY_SIZE(cmd_tca642x)); - - /* All commands but "device" require 'maxargs' arguments */ - if (!c || - !((argc == (c->maxargs)) || - (((int)c->cmd == TCA642X_CMD_DEVICE) && - (argc == (c->maxargs - 1))))) { - return CMD_RET_USAGE; - } - - /* arg2 used as chip number or pin number */ - if (argc > 2) - ul_arg2 = dectoul(argv[2], NULL); - - /* arg3 used as pin or invert value */ - if (argc > 3) - ul_arg3 = dectoul(argv[3], NULL) & 0x1; - - switch ((int)c->cmd) { - case TCA642X_CMD_INFO: - ret = tca642x_info(chip); - if (ret) - ret = CMD_RET_FAILURE; - break; - - case TCA642X_CMD_DEVICE: - if (argc == 3) - chip = (uint8_t)ul_arg2; - printf("Current device address: 0x%x\n", chip); - ret = CMD_RET_SUCCESS; - break; - - case TCA642X_CMD_INPUT: - gpio_bank = tca642x_get_bank(ul_arg2); - if (gpio_bank < 0) { - ret = CMD_RET_FAILURE; - goto error; - } - bank_shift = ul_arg2 - (gpio_bank * 10); - ret = tca642x_set_dir(chip, gpio_bank, (1 << bank_shift), - TCA642X_DIR_IN << bank_shift); - val = (tca642x_get_val(chip, gpio_bank) & - (1 << bank_shift)) != 0; - - if (ret) - ret = CMD_RET_FAILURE; - else - printf("chip 0x%02x, pin 0x%lx = %d\n", chip, - ul_arg2, val); - break; - - case TCA642X_CMD_OUTPUT: - gpio_bank = tca642x_get_bank(ul_arg2); - if (gpio_bank < 0) { - ret = CMD_RET_FAILURE; - goto error; - } - bank_shift = ul_arg2 - (gpio_bank * 10); - ret = tca642x_set_dir(chip, gpio_bank, (1 << bank_shift), - (TCA642X_DIR_OUT << bank_shift)); - if (!ret) - ret = tca642x_set_val(chip, - gpio_bank, (1 << bank_shift), - (ul_arg3 << bank_shift)); - if (ret) - ret = CMD_RET_FAILURE; - break; - - case TCA642X_CMD_INVERT: - gpio_bank = tca642x_get_bank(ul_arg2); - if (gpio_bank < 0) { - ret = CMD_RET_FAILURE; - goto error; - } - bank_shift = ul_arg2 - (gpio_bank * 10); - ret = tca642x_set_pol(chip, gpio_bank, (1 << bank_shift), - (ul_arg3 << bank_shift)); - if (ret) - ret = CMD_RET_FAILURE; - break; - } -error: - if (ret == CMD_RET_FAILURE) - eprintf("Error talking to chip at 0x%x\n", chip); - - return ret; -} - -U_BOOT_CMD( - tca642x, 5, 1, do_tca642x, - "tca642x gpio access", - "device [dev]\n" - " - show or set current device address\n" - "tca642x info\n" - " - display info for current chip\n" - "tca642x output pin 0|1\n" - " - set pin as output and drive low or high\n" - "tca642x invert pin 0|1\n" - " - disable/enable polarity inversion for reads\n" - "tca642x input pin\n" - " - set pin as input and read value" -); - -#endif /* CONFIG_CMD_TCA642X */ |