4 files changed, 3 insertions, 25 deletions
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index a1406baa87b..ff3dc25927a 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -284,15 +284,6 @@ static void __i2c_init(const struct fsl_i2c_base *base, int speed, int
 
 		break;
 	}
-
-#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
-	/* Call board specific i2c bus reset routine AFTER the bus has been
-	 * initialized. Use either this callpoint or i2c_init_board;
-	 * which is called before i2c_init operations.
-	 * For details about this problem see doc/I2C_Edge_Conditions.
-	*/
-	i2c_board_late_init();
-#endif
 }
 
 static int
diff --git a/drivers/i2c/fti2c010.c b/drivers/i2c/fti2c010.c
index b35d0d2d9c5..4da959fa537 100644
--- a/drivers/i2c/fti2c010.c
+++ b/drivers/i2c/fti2c010.c
@@ -146,15 +146,6 @@ static void fti2c010_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 	set_i2c_bus_speed(chip, speed);
 
 	/* slave init, don't care */
-
-#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
-	/* Call board specific i2c bus reset routine AFTER the bus has been
-	 * initialized. Use either this callpoint or i2c_init_board;
-	 * which is called before fti2c010_init operations.
-	 * For details about this problem see doc/I2C_Edge_Conditions.
-	*/
-	i2c_board_late_init();
-#endif
 }
 
 /*
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 13ec0e63b10..b68e82770b5 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -69,10 +69,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2SR_IIF_CLEAR	(0 << 1)
 #endif
 
-#if defined(CONFIG_HARD_I2C) && !defined(CONFIG_SYS_I2C_BASE)
-#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
-#endif
-
 #ifdef I2C_QUIRK_REG
 static u16 i2c_clk_div[60][2] = {
 	{ 20,	0x00 }, { 22,	0x01 }, { 24,	0x02 }, { 26,	0x03 },
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index a23737ab781..4b8397a890d 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -122,7 +122,7 @@ static int wait_for_bb(struct i2c *i2c_base, int waitdelay)
 	u16 stat;
 
 	writew(0xFFFF, &i2c_base->stat);	/* clear current interrupts...*/
-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+#if defined(CONFIG_OMAP34XX)
 	while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
 #else
 	/* Read RAW status */
@@ -153,7 +153,7 @@ static u16 wait_for_event(struct i2c *i2c_base, int waitdelay)
 
 	do {
 		udelay(waitdelay);
-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+#if defined(CONFIG_OMAP34XX)
 		status = readw(&i2c_base->stat);
 #else
 		/* Read RAW status */
@@ -338,7 +338,7 @@ retry:
 	/* own address */
 	writew(slaveadd, &i2c_base->oa);
 
-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+#if defined(CONFIG_OMAP34XX)
 	/*
 	 * Have to enable interrupts for OMAP2/3, these IPs don't have
 	 * an 'irqstatus_raw' register and we shall have to poll 'stat'