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-rw-r--r--drivers/misc/Kconfig2
-rw-r--r--drivers/misc/cros_ec_sandbox.c4
-rw-r--r--drivers/misc/stm32_rcc.c66
3 files changed, 40 insertions, 32 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 8b8f6309ada..515d3668395 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -300,7 +300,7 @@ config DS4510
config FSL_IIM
bool "Enable FSL IC Identification Module (IIM) driver"
- depends on ARCH_MX31 || ARCH_MX5
+ depends on ARCH_MX5
config FSL_SEC_MON
bool "Enable FSL SEC_MON Driver"
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c
index 3ac690a3733..432b1fbb0c4 100644
--- a/drivers/misc/cros_ec_sandbox.c
+++ b/drivers/misc/cros_ec_sandbox.c
@@ -540,7 +540,7 @@ static int process_cmd(struct ec_state *ec,
const struct ec_params_vstore_write *req = req_data;
struct vstore_slot *slot;
- if (req->slot >= EC_VSTORE_SLOT_MAX)
+ if (req->slot >= VSTORE_SLOT_COUNT)
return -EINVAL;
slot = &ec->slot[req->slot];
slot->locked = true;
@@ -553,7 +553,7 @@ static int process_cmd(struct ec_state *ec,
struct ec_response_vstore_read *resp = resp_data;
struct vstore_slot *slot;
- if (req->slot >= EC_VSTORE_SLOT_MAX)
+ if (req->slot >= VSTORE_SLOT_COUNT)
return -EINVAL;
slot = &ec->slot[req->slot];
memcpy(resp->data, slot->data, EC_VSTORE_SLOT_SIZE);
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index 5a6f979f91b..15bf69f7d57 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -14,47 +14,56 @@
#include <dm/device_compat.h>
#include <dm/lists.h>
-struct stm32_rcc_clk stm32_rcc_clk_f42x = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f42x = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F42X,
};
-struct stm32_rcc_clk stm32_rcc_clk_f469 = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f469 = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F469,
};
-struct stm32_rcc_clk stm32_rcc_clk_f7 = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f7 = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F7,
};
-struct stm32_rcc_clk stm32_rcc_clk_h7 = {
- .drv_name = "stm32h7_rcc_clock",
+static const struct stm32_rcc stm32_rcc_h7 = {
+ .drv_name_clk = "stm32h7_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
};
-struct stm32_rcc_clk stm32_rcc_clk_mp1 = {
- .drv_name = "stm32mp1_clk",
- .soc = STM32MP1,
+static const struct stm32_rcc stm32_rcc_mp15 = {
+ .drv_name_clk = "stm32mp1_clk",
+ .drv_name_rst = "stm32mp1_reset",
};
-struct stm32_rcc_clk stm32_rcc_clk_mp13 = {
- .drv_name = "stm32mp13_clk",
- .soc = STM32MP1,
+static const struct stm32_rcc stm32_rcc_mp13 = {
+ .drv_name_clk = "stm32mp13_clk",
+ .drv_name_rst = "stm32mp1_reset",
+};
+
+static const struct stm32_rcc stm32_rcc_mp25 = {
+ .drv_name_clk = "stm32mp25_clk",
+ .drv_name_rst = "stm32mp25_reset",
};
static int stm32_rcc_bind(struct udevice *dev)
{
struct udevice *child;
struct driver *drv;
- struct stm32_rcc_clk *rcc_clk =
- (struct stm32_rcc_clk *)dev_get_driver_data(dev);
+ struct stm32_rcc *rcc_clk =
+ (struct stm32_rcc *)dev_get_driver_data(dev);
int ret;
dev_dbg(dev, "RCC bind\n");
- drv = lists_driver_lookup_name(rcc_clk->drv_name);
+ drv = lists_driver_lookup_name(rcc_clk->drv_name_clk);
if (!drv) {
- dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name);
+ dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name_clk);
return -ENOENT;
}
@@ -65,25 +74,24 @@ static int stm32_rcc_bind(struct udevice *dev)
if (ret)
return ret;
- drv = lists_driver_lookup_name("stm32_rcc_reset");
+ drv = lists_driver_lookup_name(rcc_clk->drv_name_rst);
if (!drv) {
dev_err(dev, "Cannot find driver stm32_rcc_reset'\n");
return -ENOENT;
}
- return device_bind_with_driver_data(dev, drv, dev->name,
- rcc_clk->soc,
- dev_ofnode(dev), &child);
+ return device_bind(dev, drv, dev->name, NULL, dev_ofnode(dev), &child);
}
static const struct udevice_id stm32_rcc_ids[] = {
- {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x },
- {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 },
- {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
- {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
- {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 },
- {.compatible = "st,stm32mp1-rcc-secure", .data = (ulong)&stm32_rcc_clk_mp1 },
- {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_clk_mp13 },
+ {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_f42x },
+ {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_f469 },
+ {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_f7 },
+ {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_h7 },
+ {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_mp15 },
+ {.compatible = "st,stm32mp1-rcc-secure", .data = (ulong)&stm32_rcc_mp15 },
+ {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_mp13 },
+ {.compatible = "st,stm32mp25-rcc", .data = (ulong)&stm32_rcc_mp25 },
{ }
};