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-rw-r--r--drivers/misc/Kconfig15
-rw-r--r--drivers/misc/Makefile10
-rw-r--r--drivers/misc/cros_ec_sandbox.c1
-rw-r--r--drivers/misc/rockchip-io-domain.c5
-rw-r--r--drivers/misc/rockchip-otp.c15
-rw-r--r--drivers/misc/stm32_rcc.c66
6 files changed, 75 insertions, 37 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 834e0285097..8b8f6309ada 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -104,12 +104,24 @@ config ROCKCHIP_OTP
config ROCKCHIP_IODOMAIN
bool "Rockchip IO-domain driver support"
depends on DM_REGULATOR && ARCH_ROCKCHIP
- default y if ROCKCHIP_RK3328 || ROCKCHIP_RK3568
+ default y if ROCKCHIP_PX30
+ default y if ROCKCHIP_RK3308
+ default y if ROCKCHIP_RK3328
+ default y if ROCKCHIP_RK3399
+ default y if ROCKCHIP_RK3568
help
Enable support for IO-domains in Rockchip SoCs. It is necessary
for the IO-domain setting of the SoC to match the voltage supplied
by the regulators.
+config SPL_ROCKCHIP_IODOMAIN
+ bool "Rockchip IO-domain driver support in SPL"
+ depends on SPL_MISC && SPL_DM_REGULATOR && ARCH_ROCKCHIP
+ help
+ Enable support for IO-domains in Rockchip SoCs in SPL. It is necessary
+ for the IO-domain setting of the SoC to match the voltage supplied
+ by the regulators.
+
config SIFIVE_OTP
bool "SiFive eMemory OTP driver"
depends on MISC
@@ -576,6 +588,7 @@ config QFW_SMBIOS
bool
default y
depends on QFW && SMBIOS && !SANDBOX && !SYSINFO_SMBIOS
+ select BLOBLIST
help
Hidden option to read SMBIOS tables from QEMU.
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0b81ba2604f..248068d5b43 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_SANDBOX) += p2sb_sandbox.o p2sb_emul.o
obj-$(CONFIG_SANDBOX) += swap_case.o
endif
-ifdef CONFIG_$(XPL_)DM_I2C
+ifdef CONFIG_$(PHASE_)DM_I2C
ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o
@@ -37,14 +37,14 @@ obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
-obj-$(CONFIG_$(XPL_)FS_LOADER) += fs_loader.o
+obj-$(CONFIG_$(PHASE_)FS_LOADER) += fs_loader.o
obj-$(CONFIG_GATEWORKS_SC) += gsc.o
obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
obj-$(CONFIG_IRQ) += irq-uclass.o
obj-$(CONFIG_SANDBOX) += irq_sandbox.o irq_sandbox_test.o
-obj-$(CONFIG_$(XPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_$(PHASE_)I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_IMX8) += imx8/
obj-$(CONFIG_IMX_ELE) += imx_ele/
@@ -53,14 +53,14 @@ obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
obj-$(CONFIG_$(PHASE_)LS2_SFP) += ls2_sfp.o
-obj-$(CONFIG_$(XPL_)MXC_OCOTP) += mxc_ocotp.o
+obj-$(CONFIG_$(PHASE_)MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NPCM_OTP) += npcm_otp.o
obj-$(CONFIG_NPCM_HOST) += npcm_host_intf.o
obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
obj-$(CONFIG_P2SB) += p2sb-uclass.o
obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
-obj-$(CONFIG_$(XPL_)PWRSEQ) += pwrseq-uclass.o
+obj-$(CONFIG_$(PHASE_)PWRSEQ) += pwrseq-uclass.o
ifdef CONFIG_QFW
obj-y += qfw.o
obj-$(CONFIG_QFW_ACPI) += qfw_acpi.o
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c
index 1cad51d474d..3ac690a3733 100644
--- a/drivers/misc/cros_ec_sandbox.c
+++ b/drivers/misc/cros_ec_sandbox.c
@@ -15,7 +15,6 @@
#include <log.h>
#include <os.h>
#include <u-boot/sha256.h>
-#include <spi.h>
#include <time.h>
#include <asm/malloc.h>
#include <asm/state.h>
diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c
index 025b6049a9f..a0573c52193 100644
--- a/drivers/misc/rockchip-io-domain.c
+++ b/drivers/misc/rockchip-io-domain.c
@@ -344,8 +344,10 @@ static int rockchip_iodomain_probe(struct udevice *dev)
continue;
ret = device_get_supply_regulator(dev, supply_name, &reg);
- if (ret)
+ if (ret) {
+ dev_dbg(dev, "%s: Regulator not found\n", supply_name);
continue;
+ }
ret = regulator_autoset(reg);
if (ret && ret != -EALREADY && ret != -EMEDIUMTYPE &&
@@ -353,6 +355,7 @@ static int rockchip_iodomain_probe(struct udevice *dev)
continue;
uV = regulator_get_value(reg);
+ dev_dbg(dev, "%s: Regulator %s at %d uV\n", supply_name, reg->name, uV);
if (uV <= 0)
continue;
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 2123c31038f..46820425a84 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -361,6 +361,13 @@ static const struct rockchip_otp_data rk3568_data = {
.block_size = 2,
};
+static const struct rockchip_otp_data rk3576_data = {
+ .read = rockchip_rk3588_otp_read,
+ .offset = 0x700,
+ .size = 0x100,
+ .block_size = 4,
+};
+
static const struct rockchip_otp_data rk3588_data = {
.read = rockchip_rk3588_otp_read,
.offset = 0xC00,
@@ -384,10 +391,18 @@ static const struct udevice_id rockchip_otp_ids[] = {
.data = (ulong)&px30_data,
},
{
+ .compatible = "rockchip,rk3528-otp",
+ .data = (ulong)&rk3568_data,
+ },
+ {
.compatible = "rockchip,rk3568-otp",
.data = (ulong)&rk3568_data,
},
{
+ .compatible = "rockchip,rk3576-otp",
+ .data = (ulong)&rk3576_data,
+ },
+ {
.compatible = "rockchip,rk3588-otp",
.data = (ulong)&rk3588_data,
},
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index 5a6f979f91b..15bf69f7d57 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -14,47 +14,56 @@
#include <dm/device_compat.h>
#include <dm/lists.h>
-struct stm32_rcc_clk stm32_rcc_clk_f42x = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f42x = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F42X,
};
-struct stm32_rcc_clk stm32_rcc_clk_f469 = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f469 = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F469,
};
-struct stm32_rcc_clk stm32_rcc_clk_f7 = {
- .drv_name = "stm32fx_rcc_clock",
+static const struct stm32_rcc stm32_rcc_f7 = {
+ .drv_name_clk = "stm32fx_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
.soc = STM32F7,
};
-struct stm32_rcc_clk stm32_rcc_clk_h7 = {
- .drv_name = "stm32h7_rcc_clock",
+static const struct stm32_rcc stm32_rcc_h7 = {
+ .drv_name_clk = "stm32h7_rcc_clock",
+ .drv_name_rst = "stm32_rcc_reset",
};
-struct stm32_rcc_clk stm32_rcc_clk_mp1 = {
- .drv_name = "stm32mp1_clk",
- .soc = STM32MP1,
+static const struct stm32_rcc stm32_rcc_mp15 = {
+ .drv_name_clk = "stm32mp1_clk",
+ .drv_name_rst = "stm32mp1_reset",
};
-struct stm32_rcc_clk stm32_rcc_clk_mp13 = {
- .drv_name = "stm32mp13_clk",
- .soc = STM32MP1,
+static const struct stm32_rcc stm32_rcc_mp13 = {
+ .drv_name_clk = "stm32mp13_clk",
+ .drv_name_rst = "stm32mp1_reset",
+};
+
+static const struct stm32_rcc stm32_rcc_mp25 = {
+ .drv_name_clk = "stm32mp25_clk",
+ .drv_name_rst = "stm32mp25_reset",
};
static int stm32_rcc_bind(struct udevice *dev)
{
struct udevice *child;
struct driver *drv;
- struct stm32_rcc_clk *rcc_clk =
- (struct stm32_rcc_clk *)dev_get_driver_data(dev);
+ struct stm32_rcc *rcc_clk =
+ (struct stm32_rcc *)dev_get_driver_data(dev);
int ret;
dev_dbg(dev, "RCC bind\n");
- drv = lists_driver_lookup_name(rcc_clk->drv_name);
+ drv = lists_driver_lookup_name(rcc_clk->drv_name_clk);
if (!drv) {
- dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name);
+ dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name_clk);
return -ENOENT;
}
@@ -65,25 +74,24 @@ static int stm32_rcc_bind(struct udevice *dev)
if (ret)
return ret;
- drv = lists_driver_lookup_name("stm32_rcc_reset");
+ drv = lists_driver_lookup_name(rcc_clk->drv_name_rst);
if (!drv) {
dev_err(dev, "Cannot find driver stm32_rcc_reset'\n");
return -ENOENT;
}
- return device_bind_with_driver_data(dev, drv, dev->name,
- rcc_clk->soc,
- dev_ofnode(dev), &child);
+ return device_bind(dev, drv, dev->name, NULL, dev_ofnode(dev), &child);
}
static const struct udevice_id stm32_rcc_ids[] = {
- {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x },
- {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 },
- {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
- {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
- {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 },
- {.compatible = "st,stm32mp1-rcc-secure", .data = (ulong)&stm32_rcc_clk_mp1 },
- {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_clk_mp13 },
+ {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_f42x },
+ {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_f469 },
+ {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_f7 },
+ {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_h7 },
+ {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_mp15 },
+ {.compatible = "st,stm32mp1-rcc-secure", .data = (ulong)&stm32_rcc_mp15 },
+ {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_mp13 },
+ {.compatible = "st,stm32mp25-rcc", .data = (ulong)&stm32_rcc_mp25 },
{ }
};
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 07:51:15 +0000