summaryrefslogtreecommitdiff
path: root/drivers/mmc
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/mmc-uclass.c13
-rw-r--r--drivers/mmc/mmc.c8
-rw-r--r--drivers/mmc/omap_hsmmc.c13
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c1
-rw-r--r--drivers/mmc/rockchip_sdhci.c54
5 files changed, 83 insertions, 6 deletions
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 9af84da1599..2f4dc5bd887 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -83,6 +83,19 @@ int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
return dm_mmc_wait_dat0(mmc->dev, state, timeout_us);
}
+void dm_mmc_send_init_stream(struct udevice *dev)
+{
+ struct dm_mmc_ops *ops = mmc_get_ops(dev);
+
+ if (ops->send_init_stream)
+ ops->send_init_stream(dev);
+}
+
+void mmc_send_init_stream(struct mmc *mmc)
+{
+ dm_mmc_send_init_stream(mmc->dev);
+}
+
static int dm_mmc_get_wp(struct udevice *dev)
{
struct dm_mmc_ops *ops = mmc_get_ops(dev);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 47139e0a911..cdcf2e0c8fe 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1663,6 +1663,10 @@ static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
}
#endif
+static void mmc_send_init_stream(struct mmc *mmc)
+{
+}
+
static int mmc_set_ios(struct mmc *mmc)
{
int ret = 0;
@@ -2550,7 +2554,7 @@ static int mmc_startup(struct mmc *mmc)
/*
* For MMC cards, set the Relative Address.
- * For SD cards, get the Relatvie Address.
+ * For SD cards, get the Relative Address.
* This also puts the cards into Standby State
*/
if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
@@ -2929,6 +2933,8 @@ int mmc_get_op_cond(struct mmc *mmc, bool quiet)
retry:
mmc_set_initial_state(mmc);
+ mmc_send_init_stream(mmc);
+
/* Reset the Card */
err = mmc_go_idle(mmc);
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index e66ab25d02a..92bc72b267c 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -780,6 +780,14 @@ tuning_error:
return ret;
}
#endif
+
+static void omap_hsmmc_send_init_stream(struct udevice *dev)
+{
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct hsmmc *mmc_base = priv->base_addr;
+
+ mmc_init_stream(mmc_base);
+}
#endif
static void mmc_enable_irq(struct mmc *mmc, struct mmc_cmd *cmd)
@@ -1515,9 +1523,10 @@ static const struct dm_mmc_ops omap_hsmmc_ops = {
.get_wp = omap_hsmmc_getwp,
#endif
#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
- .execute_tuning = omap_hsmmc_execute_tuning,
+ .execute_tuning = omap_hsmmc_execute_tuning,
#endif
- .wait_dat0 = omap_hsmmc_wait_dat0,
+ .send_init_stream = omap_hsmmc_send_init_stream,
+ .wait_dat0 = omap_hsmmc_wait_dat0,
};
#else
static const struct mmc_ops omap_hsmmc_ops = {
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 422b8f7e4c8..7a72abaa38a 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -171,6 +171,7 @@ static int rockchip_dwmmc_bind(struct udevice *dev)
static const struct udevice_id rockchip_dwmmc_ids[] = {
{ .compatible = "rockchip,rk2928-dw-mshc" },
{ .compatible = "rockchip,rk3288-dw-mshc" },
+ { .compatible = "rockchip,rk3576-dw-mshc" },
{ }
};
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index da630b9d97a..761e3619329 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -50,6 +50,10 @@
#define DWCMSHC_EMMC_EMMC_CTRL 0x52c
#define DWCMSHC_CARD_IS_EMMC BIT(0)
#define DWCMSHC_ENHANCED_STROBE BIT(8)
+#define DWCMSHC_EMMC_AT_CTRL 0x540
+#define EMMC_AT_CTRL_TUNE_CLK_STOP_EN BIT(16)
+#define EMMC_AT_CTRL_PRE_CHANGE_DLY 17
+#define EMMC_AT_CTRL_POST_CHANGE_DLY 19
#define DWCMSHC_EMMC_DLL_CTRL 0x800
#define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1)
#define DWCMSHC_EMMC_DLL_RXCLK 0x804
@@ -156,6 +160,9 @@ struct sdhci_data {
u32 flags;
u8 hs200_txclk_tapnum;
u8 hs400_txclk_tapnum;
+ u8 hs400_cmdout_tapnum;
+ u8 hs400_strbin_tapnum;
+ u8 ddr50_strbin_delay_num;
};
static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
@@ -323,6 +330,11 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab
udelay(1);
sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
+ extra = 0x3 << EMMC_AT_CTRL_POST_CHANGE_DLY |
+ 0x3 << EMMC_AT_CTRL_PRE_CHANGE_DLY |
+ EMMC_AT_CTRL_TUNE_CLK_STOP_EN;
+ sdhci_writel(host, extra, DWCMSHC_EMMC_AT_CTRL);
+
/* Init DLL settings */
extra = DWCMSHC_EMMC_DLL_START_DEFAULT << DWCMSHC_EMMC_DLL_START_POINT |
DWCMSHC_EMMC_DLL_INC_VALUE << DWCMSHC_EMMC_DLL_INC |
@@ -348,7 +360,7 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab
extra = DLL_CMDOUT_SRC_CLK_NEG |
DLL_CMDOUT_BOTH_CLK_EDGE |
DWCMSHC_EMMC_DLL_DLYENA |
- DLL_CMDOUT_TAPNUM_90_DEGREES |
+ data->hs400_cmdout_tapnum |
DLL_CMDOUT_TAPNUM_FROM_SW;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CMDOUT);
}
@@ -360,7 +372,7 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
extra = DWCMSHC_EMMC_DLL_DLYENA |
- DLL_STRBIN_TAPNUM_DEFAULT |
+ data->hs400_strbin_tapnum |
DLL_STRBIN_TAPNUM_FROM_SW;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
} else {
@@ -380,7 +392,7 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab
*/
extra = DWCMSHC_EMMC_DLL_DLYENA |
DLL_STRBIN_DELAY_NUM_SEL |
- DLL_STRBIN_DELAY_NUM_DEFAULT << DLL_STRBIN_DELAY_NUM_OFFSET;
+ data->ddr50_strbin_delay_num << DLL_STRBIN_DELAY_NUM_OFFSET;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
}
@@ -647,6 +659,17 @@ static const struct sdhci_data rk3399_data = {
.set_enhanced_strobe = rk3399_sdhci_set_enhanced_strobe,
};
+static const struct sdhci_data rk3528_data = {
+ .set_ios_post = rk3568_sdhci_set_ios_post,
+ .set_clock = rk3568_sdhci_set_clock,
+ .config_dll = rk3568_sdhci_config_dll,
+ .hs200_txclk_tapnum = 0xc,
+ .hs400_txclk_tapnum = 0x6,
+ .hs400_cmdout_tapnum = 0x6,
+ .hs400_strbin_tapnum = 0x3,
+ .ddr50_strbin_delay_num = 0xa,
+};
+
static const struct sdhci_data rk3568_data = {
.set_ios_post = rk3568_sdhci_set_ios_post,
.set_clock = rk3568_sdhci_set_clock,
@@ -654,6 +677,20 @@ static const struct sdhci_data rk3568_data = {
.flags = FLAG_INVERTER_FLAG_IN_RXCLK,
.hs200_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
.hs400_txclk_tapnum = 0x8,
+ .hs400_cmdout_tapnum = DLL_CMDOUT_TAPNUM_90_DEGREES,
+ .hs400_strbin_tapnum = DLL_STRBIN_TAPNUM_DEFAULT,
+ .ddr50_strbin_delay_num = DLL_STRBIN_DELAY_NUM_DEFAULT,
+};
+
+static const struct sdhci_data rk3576_data = {
+ .set_ios_post = rk3568_sdhci_set_ios_post,
+ .set_clock = rk3568_sdhci_set_clock,
+ .config_dll = rk3568_sdhci_config_dll,
+ .hs200_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
+ .hs400_txclk_tapnum = 0x7,
+ .hs400_cmdout_tapnum = 0x7,
+ .hs400_strbin_tapnum = 0x5,
+ .ddr50_strbin_delay_num = 0xa,
};
static const struct sdhci_data rk3588_data = {
@@ -662,6 +699,9 @@ static const struct sdhci_data rk3588_data = {
.config_dll = rk3568_sdhci_config_dll,
.hs200_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
.hs400_txclk_tapnum = 0x9,
+ .hs400_cmdout_tapnum = DLL_CMDOUT_TAPNUM_90_DEGREES,
+ .hs400_strbin_tapnum = DLL_STRBIN_TAPNUM_DEFAULT,
+ .ddr50_strbin_delay_num = DLL_STRBIN_DELAY_NUM_DEFAULT,
};
static const struct udevice_id sdhci_ids[] = {
@@ -670,10 +710,18 @@ static const struct udevice_id sdhci_ids[] = {
.data = (ulong)&rk3399_data,
},
{
+ .compatible = "rockchip,rk3528-dwcmshc",
+ .data = (ulong)&rk3528_data,
+ },
+ {
.compatible = "rockchip,rk3568-dwcmshc",
.data = (ulong)&rk3568_data,
},
{
+ .compatible = "rockchip,rk3576-dwcmshc",
+ .data = (ulong)&rk3576_data,
+ },
+ {
.compatible = "rockchip,rk3588-dwcmshc",
.data = (ulong)&rk3588_data,
},
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-22 17:43:59 +0000