summaryrefslogtreecommitdiff
path: root/drivers/mmc
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/fsl_esdhc.c43
-rw-r--r--drivers/mmc/hi6220_dw_mmc.c1
-rw-r--r--drivers/mmc/mtk-sd.c26
3 files changed, 56 insertions, 14 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 2fa61c4259b..21fa2ab1d46 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -384,6 +384,25 @@ static void check_and_invalidate_dcache_range
invalidate_dcache_range(start, end);
}
+#ifdef CONFIG_MCF5441x
+/*
+ * Swaps 32-bit words to little-endian byte order.
+ */
+static inline void sd_swap_dma_buff(struct mmc_data *data)
+{
+ int i, size = data->blocksize >> 2;
+ u32 *buffer = (u32 *)data->dest;
+ u32 sw;
+
+ while (data->blocks--) {
+ for (i = 0; i < size; i++) {
+ sw = __sw32(*buffer);
+ *buffer++ = sw;
+ }
+ }
+}
+#endif
+
/*
* Sends a command out on the bus. Takes the mmc pointer,
* a command pointer, and an optional data pointer.
@@ -546,8 +565,12 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
* cache-fill during the DMA operations such as the
* speculative pre-fetching etc.
*/
- if (data->flags & MMC_DATA_READ)
+ if (data->flags & MMC_DATA_READ) {
check_and_invalidate_dcache_range(cmd, data);
+#ifdef CONFIG_MCF5441x
+ sd_swap_dma_buff(data);
+#endif
+ }
#endif
}
@@ -1029,8 +1052,12 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
+#ifdef CONFIG_MCF5441x
+ esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD);
+#else
/* Put the PROCTL reg back to the default */
esdhc_write32(&regs->proctl, PROCTL_INIT);
+#endif
/* Set timout to the maximum value */
esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@ -1138,6 +1165,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
if (ret)
return ret;
+#ifdef CONFIG_MCF5441x
+ /* ColdFire, using SDHC_DATA[3] for card detection */
+ esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD);
+#endif
+
#ifndef CONFIG_FSL_USDHC
esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
| SYSCTL_IPGEN | SYSCTL_CKEN);
@@ -1162,6 +1194,15 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
voltage_caps = 0;
caps = esdhc_read32(&regs->hostcapblt);
+#ifdef CONFIG_MCF5441x
+ /*
+ * MCF5441x RM declares in more points that sdhc clock speed must
+ * never exceed 25 Mhz. From this, the HS bit needs to be disabled
+ * from host capabilities.
+ */
+ caps &= ~ESDHC_HOSTCAPBLT_HSS;
+#endif
+
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index cc58aff38cc..effd1e4c7c8 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -77,6 +77,7 @@ static int hi6220_dwmmc_bind(struct udevice *dev)
static const struct udevice_id hi6220_dwmmc_ids[] = {
{ .compatible = "hisilicon,hi6220-dw-mshc" },
+ { .compatible = "hisilicon,hi3798cv200-dw-mshc" },
{ }
};
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index 0741a525c01..d3f07783688 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -269,7 +269,7 @@ struct msdc_host {
bool builtin_cd;
/* card detection / write protection GPIOs */
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
struct gpio_desc gpio_wp;
struct gpio_desc gpio_cd;
#endif
@@ -554,6 +554,14 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size)
break;
}
+ chksz = min(size, (u32)MSDC_FIFO_SIZE);
+
+ if (msdc_fifo_rx_bytes(host) >= chksz) {
+ msdc_fifo_read(host, ptr, chksz);
+ ptr += chksz;
+ size -= chksz;
+ }
+
if (status & MSDC_INT_XFER_COMPL) {
if (size) {
pr_err("data not fully read\n");
@@ -562,15 +570,7 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size)
break;
}
-
- chksz = min(size, (u32)MSDC_FIFO_SIZE);
-
- if (msdc_fifo_rx_bytes(host) >= chksz) {
- msdc_fifo_read(host, ptr, chksz);
- ptr += chksz;
- size -= chksz;
- }
- }
+}
return ret;
}
@@ -849,7 +849,7 @@ static int msdc_ops_get_cd(struct udevice *dev)
return !(val & MSDC_PS_CDSTS);
}
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
if (!host->gpio_cd.dev)
return 1;
@@ -861,9 +861,9 @@ static int msdc_ops_get_cd(struct udevice *dev)
static int msdc_ops_get_wp(struct udevice *dev)
{
+#if IS_ENABLED(DM_GPIO)
struct msdc_host *host = dev_get_priv(dev);
-#ifdef CONFIG_DM_GPIO
if (!host->gpio_wp.dev)
return 0;
@@ -1332,7 +1332,7 @@ static int msdc_ofdata_to_platdata(struct udevice *dev)
if (ret < 0)
return ret;
-#ifdef CONFIG_DM_GPIO
+#if IS_ENABLED(DM_GPIO)
gpio_request_by_name(dev, "wp-gpios", 0, &host->gpio_wp, GPIOD_IS_IN);
gpio_request_by_name(dev, "cd-gpios", 0, &host->gpio_cd, GPIOD_IS_IN);
#endif