3 files changed, 41 insertions, 9 deletions

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index fa3ac2d9e37..8bfdffd56f5 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -11,7 +11,7 @@
 #include <log.h>
 #include <memalign.h>
 #include <mmc.h>
-#include <sdhci.h>
+#include <asm/byteorder.h>
 #include <u-boot/sha256.h>
 #include "mmc_private.h"
 
@@ -91,7 +91,6 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 {
 	struct mmc_cmd cmd = {0};
 	struct mmc_data data;
-	struct sdhci_host *host = mmc->priv;
 	int ret;
 
 	ret = mmc_set_blockcount(mmc, count, is_rel_write);
@@ -106,9 +105,6 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 	cmd.cmdarg = 0;
 	cmd.resp_type = MMC_RSP_R1;
 
-	if (host->quirks & SDHCI_QUIRK_BROKEN_R1B)
-		cmd.resp_type = MMC_RSP_R1;
-
 	data.src = (const char *)s;
 	data.blocks = 1;
 	data.blocksize = MMC_MAX_BLOCK_LEN;
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 9dc1ceaa09b..3b86bc9b18c 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -54,16 +54,30 @@ static int socfpga_dwmci_clksel(struct dwmci_host *host)
 	u32 sdmmc_mask = ((priv->smplsel & 0x7) << SYSMGR_SDMMC_SMPLSEL_SHIFT) |
 			 ((priv->drvsel & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT);
 
+	/* Get clock manager base address */
+	struct udevice *clkmgr_dev;
+	int ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@ffd10000", &clkmgr_dev);
+
+	if (ret) {
+		printf("Failed to get clkmgr device: %d\n", ret);
+		return ret;
+	}
+
+	fdt_addr_t clkmgr_base = dev_read_addr(clkmgr_dev);
+
+	if (clkmgr_base == FDT_ADDR_T_NONE) {
+		printf("Failed to read base address from clkmgr DT node\n");
+		return -EINVAL;
+	}
+
 	/* Disable SDMMC clock. */
-	clrbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_PERPLL_EN,
+	clrbits_le32(clkmgr_base + CLKMGR_PERPLL_EN,
 		     CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK);
 
 	debug("%s: drvsel %d smplsel %d\n", __func__,
 	      priv->drvsel, priv->smplsel);
 
 #if !defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_ATF)
-	int ret;
-
 	ret = socfpga_secure_reg_write32(SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC,
 					 sdmmc_mask);
 	if (ret) {
@@ -78,7 +92,7 @@ static int socfpga_dwmci_clksel(struct dwmci_host *host)
 #endif
 
 	/* Enable SDMMC clock */
-	setbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_PERPLL_EN,
+	setbits_le32(clkmgr_base + CLKMGR_PERPLL_EN,
 		     CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK);
 
 	return 0;
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 2375b15539b..3b682918b03 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -1127,6 +1127,28 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	if (arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_VERSAL_NET_EMMC))
 		priv->internal_phy_reg = true;
 
+	ret = reset_get_bulk(dev, &priv->resets);
+	if (ret == -ENOTSUPP || ret == -ENOENT) {
+		dev_warn(dev, "Reset not found\n");
+	} else if (ret) {
+		dev_err(dev, "Reset failed\n");
+		return ret;
+	}
+
+	if (!ret) {
+		ret = reset_assert_bulk(&priv->resets);
+		if (ret) {
+			dev_err(dev, "Reset assert failed\n");
+			return ret;
+		}
+
+		ret = reset_deassert_bulk(&priv->resets);
+		if (ret) {
+			dev_err(dev, "Reset release failed\n");
+			return ret;
+		}
+	}
+
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret < 0) {
 		dev_err(dev, "failed to get clock\n");