diff options
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/fsl_pci_init.c | 1 | ||||
| -rw-r--r-- | drivers/pci/pci.c | 1 | ||||
| -rw-r--r-- | drivers/pci/pci_common.c | 1 | ||||
| -rw-r--r-- | drivers/pci/pcie_intel_fpga.c | 18 |
4 files changed, 14 insertions, 7 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index b4c85566861..ab5e49941f3 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <env.h> #include <malloc.h> #include <asm/fsl_serdes.h> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index e2195726c8a..5db24f1c51d 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -17,6 +17,7 @@ #include <common.h> #include <command.h> +#include <env.h> #include <errno.h> #include <asm/processor.h> #include <asm/io.h> diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c index 9f2d2678e37..5231b69dc9a 100644 --- a/drivers/pci/pci_common.c +++ b/drivers/pci/pci_common.c @@ -11,6 +11,7 @@ #include <common.h> #include <dm.h> +#include <env.h> #include <errno.h> #include <pci.h> #include <asm/io.h> diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c index 3cdf05b3144..a5ea4888f34 100644 --- a/drivers/pci/pcie_intel_fpga.c +++ b/drivers/pci/pcie_intel_fpga.c @@ -36,16 +36,18 @@ #define RP_CFG_ADDR(pcie, reg) \ ((pcie->hip_base) + (reg) + (1 << 20)) +#define RP_SECONDARY(pcie) \ + readb(RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS)) #define TLP_REQ_ID(bus, devfn) (((bus) << 8) | (devfn)) #define TLP_CFGRD_DW0(pcie, bus) \ - ((((bus != pcie->first_busno) ? TLP_FMTTYPE_CFGRD0 \ - : TLP_FMTTYPE_CFGRD1) << 24) | \ + ((((bus > RP_SECONDARY(pcie)) ? TLP_FMTTYPE_CFGRD1 \ + : TLP_FMTTYPE_CFGRD0) << 24) | \ TLP_PAYLOAD_SIZE) #define TLP_CFGWR_DW0(pcie, bus) \ - ((((bus != pcie->first_busno) ? TLP_FMTTYPE_CFGWR0 \ - : TLP_FMTTYPE_CFGWR1) << 24) | \ + ((((bus > RP_SECONDARY(pcie)) ? TLP_FMTTYPE_CFGWR1 \ + : TLP_FMTTYPE_CFGWR0) << 24) | \ TLP_PAYLOAD_SIZE) #define TLP_CFG_DW1(pcie, tag, be) \ @@ -56,7 +58,7 @@ #define TLP_COMP_STATUS(s) (((s) >> 13) & 7) #define TLP_BYTE_COUNT(s) (((s) >> 0) & 0xfff) #define TLP_HDR_SIZE 3 -#define TLP_LOOP 500 +#define TLP_LOOP 20000 #define DWORD_MASK 3 #define IS_ROOT_PORT(pcie, bdf) \ @@ -161,8 +163,10 @@ static int tlp_read_packet(struct intel_fpga_pcie *pcie, u32 *value) dw[count++] = cra_readl(pcie, RP_RXCPL_REG); if (ctrl & RP_RXCPL_EOP) { comp_status = TLP_COMP_STATUS(dw[1]); - if (comp_status) - return -EFAULT; + if (comp_status) { + *value = pci_get_ff(PCI_SIZE_32); + return 0; + } if (value && TLP_BYTE_COUNT(dw[1]) == sizeof(u32) && |