diff options
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/serial/Makefile | 1 | ||||
| -rw-r--r-- | drivers/serial/ns16550.c | 23 | ||||
| -rw-r--r-- | drivers/serial/sandbox.c | 34 | ||||
| -rw-r--r-- | drivers/serial/serial-uclass.c | 37 | ||||
| -rw-r--r-- | drivers/serial/serial_bcm6345.c | 99 | ||||
| -rw-r--r-- | drivers/serial/serial_bcm6858.c | 300 | ||||
| -rw-r--r-- | drivers/serial/serial_omap.c | 42 |
8 files changed, 184 insertions, 360 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 3bcc61e7312..6252dd8c4b5 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -506,16 +506,10 @@ config BCM283X_PL011_SERIAL config BCM6345_SERIAL bool "Support for BCM6345 UART" - depends on DM_SERIAL && ARCH_BMIPS + depends on DM_SERIAL help Select this to enable UART on BCM6345 SoCs. -config BCM6858_SERIAL - bool "Support for BCM6858 UART" - depends on DM_SERIAL && ARCH_BCM6858 - help - Select this to enable UART on BCM6358 SoCs. - config FSL_LINFLEXUART bool "Freescale Linflex UART support" depends on DM_SERIAL diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index b6377b10768..2f8d065a4c2 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,7 +35,6 @@ obj-$(CONFIG_AR933X_UART) += serial_ar933x.o obj-$(CONFIG_ARM_DCC) += arm_dcc.o obj-$(CONFIG_ATMEL_USART) += atmel_usart.o obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o -obj-$(CONFIG_BCM6858_SERIAL) += serial_bcm6858.o obj-$(CONFIG_EFI_APP) += serial_efi.o obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o obj-$(CONFIG_MCFUART) += mcfuart.o diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 25b9d172433..f3bd8dbcdf5 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -372,6 +372,25 @@ static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config) return 0; } +static int ns16550_serial_getinfo(struct udevice *dev, + struct serial_device_info *info) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + struct ns16550_platdata *plat = com_port->plat; + + info->type = SERIAL_CHIP_16550_COMPATIBLE; +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + info->addr_space = SERIAL_ADDRESS_SPACE_IO; +#else + info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY; +#endif + info->addr = plat->base; + info->reg_width = plat->reg_width; + info->reg_shift = plat->reg_shift; + info->reg_offset = plat->reg_offset; + return 0; +} + int ns16550_serial_probe(struct udevice *dev) { struct NS16550 *const com_port = dev_get_priv(dev); @@ -446,6 +465,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); + plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); err = clk_get_by_index(dev, 0, &clk); if (!err) { @@ -478,7 +498,8 @@ const struct dm_serial_ops ns16550_serial_ops = { .pending = ns16550_serial_pending, .getc = ns16550_serial_getc, .setbrg = ns16550_serial_setbrg, - .setconfig = ns16550_serial_setconfig + .setconfig = ns16550_serial_setconfig, + .getinfo = ns16550_serial_getinfo, }; #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 4a05ea44ce9..33102fc872f 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -163,6 +163,18 @@ DEBUG_UART_FUNCS #endif /* CONFIG_DEBUG_UART_SANDBOX */ +static int sandbox_serial_getconfig(struct udevice *dev, uint *serial_config) +{ + uint config = SERIAL_DEFAULT_CONFIG; + + if (!serial_config) + return -EINVAL; + + *serial_config = config; + + return 0; +} + static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config) { u8 parity = SERIAL_GET_PARITY(serial_config); @@ -176,6 +188,26 @@ static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config) return 0; } +static int sandbox_serial_getinfo(struct udevice *dev, + struct serial_device_info *serial_info) +{ + struct serial_device_info info = { + .type = SERIAL_CHIP_UNKNOWN, + .addr_space = SERIAL_ADDRESS_SPACE_IO, + .addr = SERIAL_DEFAULT_ADDRESS, + .reg_width = 1, + .reg_offset = 0, + .reg_shift = 0, + }; + + if (!serial_info) + return -EINVAL; + + *serial_info = info; + + return 0; +} + #if CONFIG_IS_ENABLED(OF_CONTROL) static const char * const ansi_colour[] = { "black", "red", "green", "yellow", "blue", "megenta", "cyan", @@ -207,7 +239,9 @@ static const struct dm_serial_ops sandbox_serial_ops = { .putc = sandbox_serial_putc, .pending = sandbox_serial_pending, .getc = sandbox_serial_getc, + .getconfig = sandbox_serial_getconfig, .setconfig = sandbox_serial_setconfig, + .getinfo = sandbox_serial_getinfo, }; static const struct udevice_id sandbox_serial_ids[] = { diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 3ded62732d4..ffcd6d15af2 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -294,6 +294,20 @@ void serial_setbrg(void) ops->setbrg(gd->cur_serial_dev, gd->baudrate); } +int serial_getconfig(uint *config) +{ + struct dm_serial_ops *ops; + + if (!gd->cur_serial_dev) + return 0; + + ops = serial_get_ops(gd->cur_serial_dev); + if (ops->getconfig) + return ops->getconfig(gd->cur_serial_dev, config); + + return 0; +} + int serial_setconfig(uint config) { struct dm_serial_ops *ops; @@ -308,6 +322,25 @@ int serial_setconfig(uint config) return 0; } +int serial_getinfo(struct serial_device_info *info) +{ + struct dm_serial_ops *ops; + + if (!gd->cur_serial_dev) + return -ENODEV; + + if (!info) + return -EINVAL; + + info->baudrate = gd->baudrate; + + ops = serial_get_ops(gd->cur_serial_dev); + if (ops->getinfo) + return ops->getinfo(gd->cur_serial_dev, info); + + return -EINVAL; +} + void serial_stdio_init(void) { } @@ -419,12 +452,16 @@ static int serial_post_probe(struct udevice *dev) ops->pending += gd->reloc_off; if (ops->clear) ops->clear += gd->reloc_off; + if (ops->getconfig) + ops->getconfig += gd->reloc_off; if (ops->setconfig) ops->setconfig += gd->reloc_off; #if CONFIG_POST & CONFIG_SYS_POST_UART if (ops->loop) ops->loop += gd->reloc_off; #endif + if (ops->getinfo) + ops->getinfo += gd->reloc_off; #endif /* Set the baud rate */ if (ops->setbrg) { diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c index a0e709a11e9..9ad8c770d51 100644 --- a/drivers/serial/serial_bcm6345.c +++ b/drivers/serial/serial_bcm6345.c @@ -89,26 +89,26 @@ struct bcm6345_serial_priv { /* enable rx & tx operation on uart */ static void bcm6345_serial_enable(void __iomem *base) { - setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); + setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); } /* disable rx & tx operation on uart */ static void bcm6345_serial_disable(void __iomem *base) { - clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); + clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); } /* clear all unread data in rx fifo and unsent data in tx fifo */ static void bcm6345_serial_flush(void __iomem *base) { /* empty rx and tx fifo */ - setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | - UART_CTL_RSTTXFIFO_MASK); + setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | + UART_CTL_RSTTXFIFO_MASK); /* read any pending char to make sure all irq status are cleared */ - readl_be(base + UART_FIFO_REG); + readl(base + UART_FIFO_REG); } static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) @@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) bcm6345_serial_flush(base); /* set uart control config */ - clrsetbits_be32(base + UART_CTL_REG, - /* clear rx timeout */ - UART_CTL_RXTIMEOUT_MASK | - /* clear stop bits */ - UART_CTL_STOPBITS_MASK | - /* clear bits per symbol */ - UART_CTL_BITSPERSYM_MASK | - /* clear xmit break */ - UART_CTL_XMITBRK_MASK | - /* clear reserved bit */ - UART_CTL_RSVD_MASK | - /* disable parity */ - UART_CTL_RXPAREN_MASK | - UART_CTL_TXPAREN_MASK | - /* disable loopback */ - UART_CTL_LOOPBACK_MASK, - /* set timeout to 5 */ - UART_CTL_RXTIMEOUT_5 | - /* set 8 bits/symbol */ - UART_CTL_BITSPERSYM_8 | - /* set 1 stop bit */ - UART_CTL_STOPBITS_1 | - /* set parity to even */ - UART_CTL_RXPAREVEN_MASK | - UART_CTL_TXPAREVEN_MASK); + clrsetbits_32(base + UART_CTL_REG, + /* clear rx timeout */ + UART_CTL_RXTIMEOUT_MASK | + /* clear stop bits */ + UART_CTL_STOPBITS_MASK | + /* clear bits per symbol */ + UART_CTL_BITSPERSYM_MASK | + /* clear xmit break */ + UART_CTL_XMITBRK_MASK | + /* clear reserved bit */ + UART_CTL_RSVD_MASK | + /* disable parity */ + UART_CTL_RXPAREN_MASK | + UART_CTL_TXPAREN_MASK | + /* disable loopback */ + UART_CTL_LOOPBACK_MASK, + /* set timeout to 5 */ + UART_CTL_RXTIMEOUT_5 | + /* set 8 bits/symbol */ + UART_CTL_BITSPERSYM_8 | + /* set 1 stop bit */ + UART_CTL_STOPBITS_1 | + /* set parity to even */ + UART_CTL_RXPAREVEN_MASK | + UART_CTL_TXPAREVEN_MASK); /* set uart fifo config */ - clrsetbits_be32(base + UART_FIFO_CFG_REG, - /* clear fifo config */ - UART_FIFO_CFG_RX_MASK | - UART_FIFO_CFG_TX_MASK, - /* set fifo config to 4 */ - UART_FIFO_CFG_RX_4 | - UART_FIFO_CFG_TX_4); + clrsetbits_32(base + UART_FIFO_CFG_REG, + /* clear fifo config */ + UART_FIFO_CFG_RX_MASK | + UART_FIFO_CFG_TX_MASK, + /* set fifo config to 4 */ + UART_FIFO_CFG_RX_4 | + UART_FIFO_CFG_TX_4); /* set baud rate */ val = ((clk / baudrate) >> 4); @@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) val = (val >> 1); else val = (val >> 1) - 1; - writel_be(val, base + UART_BAUD_REG); + writel(val, base + UART_BAUD_REG); /* clear interrupts */ - writel_be(0, base + UART_IR_REG); + writel(0, base + UART_IR_REG); /* enable uart */ bcm6345_serial_enable(base); @@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) static int bcm6345_serial_pending(struct udevice *dev, bool input) { struct bcm6345_serial_priv *priv = dev_get_priv(dev); - u32 val = readl_be(priv->base + UART_IR_REG); + u32 val = readl(priv->base + UART_IR_REG); if (input) return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)); @@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch) struct bcm6345_serial_priv *priv = dev_get_priv(dev); u32 val; - val = readl_be(priv->base + UART_IR_REG); + val = readl(priv->base + UART_IR_REG); if (!(val & UART_IR_STAT(UART_IR_TXEMPTY))) return -EAGAIN; - writel_be(ch, priv->base + UART_FIFO_REG); + writel(ch, priv->base + UART_FIFO_REG); return 0; } @@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev) struct bcm6345_serial_priv *priv = dev_get_priv(dev); u32 val; - val = readl_be(priv->base + UART_IR_REG); + val = readl(priv->base + UART_IR_REG); if (val & UART_IR_STAT(UART_IR_RXOVER)) - setbits_be32(priv->base + UART_CTL_REG, - UART_CTL_RSTRXFIFO_MASK); + setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK); if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY))) return -EAGAIN; - val = readl_be(priv->base + UART_FIFO_REG); + val = readl(priv->base + UART_FIFO_REG); if (val & UART_FIFO_ANYERR_MASK) return -EAGAIN; @@ -277,7 +276,7 @@ static inline void _debug_uart_init(void) static inline void wait_xfered(void __iomem *base) { do { - u32 val = readl_be(base + UART_IR_REG); + u32 val = readl(base + UART_IR_REG); if (val & UART_IR_STAT(UART_IR_TXEMPTY)) break; } while (1); @@ -288,7 +287,7 @@ static inline void _debug_uart_putc(int ch) void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; wait_xfered(base); - writel_be(ch, base + UART_FIFO_REG); + writel(ch, base + UART_FIFO_REG); wait_xfered(base); } diff --git a/drivers/serial/serial_bcm6858.c b/drivers/serial/serial_bcm6858.c deleted file mode 100644 index 8aa37055f0b..00000000000 --- a/drivers/serial/serial_bcm6858.c +++ /dev/null @@ -1,300 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com> - * - * Derived from linux/drivers/tty/serial/bcm63xx_uart.c: - * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> - * Derived from linux/drivers/tty/serial/serial_bcm6345.c - * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> - */ - -#include <clk.h> -#include <dm.h> -#include <debug_uart.h> -#include <errno.h> -#include <serial.h> -#include <asm/io.h> -#include <asm/types.h> - -/* UART Control register */ -#define UART_CTL_REG 0x0 -#define UART_CTL_RXTIMEOUT_MASK 0x1f -#define UART_CTL_RXTIMEOUT_5 0x5 -#define UART_CTL_RSTRXFIFO_SHIFT 6 -#define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT) -#define UART_CTL_RSTTXFIFO_SHIFT 7 -#define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT) -#define UART_CTL_STOPBITS_SHIFT 8 -#define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT) -#define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT) -#define UART_CTL_BITSPERSYM_SHIFT 12 -#define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT) -#define UART_CTL_BITSPERSYM_8 (0x3 << UART_CTL_BITSPERSYM_SHIFT) -#define UART_CTL_XMITBRK_SHIFT 14 -#define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT) -#define UART_CTL_RSVD_SHIFT 15 -#define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT) -#define UART_CTL_RXPAREVEN_SHIFT 16 -#define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT) -#define UART_CTL_RXPAREN_SHIFT 17 -#define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT) -#define UART_CTL_TXPAREVEN_SHIFT 18 -#define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT) -#define UART_CTL_TXPAREN_SHIFT 19 -#define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT) -#define UART_CTL_LOOPBACK_SHIFT 20 -#define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT) -#define UART_CTL_RXEN_SHIFT 21 -#define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT) -#define UART_CTL_TXEN_SHIFT 22 -#define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT) -#define UART_CTL_BRGEN_SHIFT 23 -#define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT) - -/* UART Baudword register */ -#define UART_BAUD_REG 0x4 - -/* UART FIFO Config register */ -#define UART_FIFO_CFG_REG 0x8 -#define UART_FIFO_CFG_RX_SHIFT 8 -#define UART_FIFO_CFG_RX_MASK (0xf << UART_FIFO_CFG_RX_SHIFT) -#define UART_FIFO_CFG_RX_4 (0x4 << UART_FIFO_CFG_RX_SHIFT) -#define UART_FIFO_CFG_TX_SHIFT 12 -#define UART_FIFO_CFG_TX_MASK (0xf << UART_FIFO_CFG_TX_SHIFT) -#define UART_FIFO_CFG_TX_4 (0x4 << UART_FIFO_CFG_TX_SHIFT) - -/* UART Interrupt register */ -#define UART_IR_REG 0x10 -#define UART_IR_STAT(x) (1 << (x)) -#define UART_IR_TXEMPTY 5 -#define UART_IR_RXOVER 7 -#define UART_IR_RXNOTEMPTY 11 - -/* UART FIFO register */ -#define UART_FIFO_REG 0x14 -#define UART_FIFO_VALID_MASK 0xff -#define UART_FIFO_FRAMEERR_SHIFT 8 -#define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT) -#define UART_FIFO_PARERR_SHIFT 9 -#define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT) -#define UART_FIFO_BRKDET_SHIFT 10 -#define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT) -#define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \ - UART_FIFO_PARERR_MASK | \ - UART_FIFO_BRKDET_MASK) - -struct bcm6858_serial_priv { - void __iomem *base; - ulong uartclk; -}; - -/* enable rx & tx operation on uart */ -static void bcm6858_serial_enable(void __iomem *base) -{ - setbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); -} - -/* disable rx & tx operation on uart */ -static void bcm6858_serial_disable(void __iomem *base) -{ - clrbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); -} - -/* clear all unread data in rx fifo and unsent data in tx fifo */ -static void bcm6858_serial_flush(void __iomem *base) -{ - /* empty rx and tx fifo */ - setbits_le32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | - UART_CTL_RSTTXFIFO_MASK); - - /* read any pending char to make sure all irq status are cleared */ - readl(base + UART_FIFO_REG); -} - -static int bcm6858_serial_init(void __iomem *base, ulong clk, u32 baudrate) -{ - u32 val; - - /* mask all irq and flush port */ - bcm6858_serial_disable(base); - bcm6858_serial_flush(base); - - /* set uart control config */ - clrsetbits_le32(base + UART_CTL_REG, - /* clear rx timeout */ - UART_CTL_RXTIMEOUT_MASK | - /* clear stop bits */ - UART_CTL_STOPBITS_MASK | - /* clear bits per symbol */ - UART_CTL_BITSPERSYM_MASK | - /* clear xmit break */ - UART_CTL_XMITBRK_MASK | - /* clear reserved bit */ - UART_CTL_RSVD_MASK | - /* disable parity */ - UART_CTL_RXPAREN_MASK | - UART_CTL_TXPAREN_MASK | - /* disable loopback */ - UART_CTL_LOOPBACK_MASK, - /* set timeout to 5 */ - UART_CTL_RXTIMEOUT_5 | - /* set 8 bits/symbol */ - UART_CTL_BITSPERSYM_8 | - /* set 1 stop bit */ - UART_CTL_STOPBITS_1 | - /* set parity to even */ - UART_CTL_RXPAREVEN_MASK | - UART_CTL_TXPAREVEN_MASK); - - /* set uart fifo config */ - clrsetbits_le32(base + UART_FIFO_CFG_REG, - /* clear fifo config */ - UART_FIFO_CFG_RX_MASK | - UART_FIFO_CFG_TX_MASK, - /* set fifo config to 4 */ - UART_FIFO_CFG_RX_4 | - UART_FIFO_CFG_TX_4); - - /* set baud rate */ - val = ((clk / baudrate) >> 4); - if (val & 0x1) - val = (val >> 1); - else - val = (val >> 1) - 1; - writel(val, base + UART_BAUD_REG); - - /* clear interrupts */ - writel(0, base + UART_IR_REG); - - /* enable uart */ - bcm6858_serial_enable(base); - - return 0; -} - -static int bcm6858_serial_pending(struct udevice *dev, bool input) -{ - struct bcm6858_serial_priv *priv = dev_get_priv(dev); - u32 val = readl(priv->base + UART_IR_REG); - - if (input) - return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)); - else - return !(val & UART_IR_STAT(UART_IR_TXEMPTY)); -} - -static int bcm6858_serial_setbrg(struct udevice *dev, int baudrate) -{ - struct bcm6858_serial_priv *priv = dev_get_priv(dev); - - return bcm6858_serial_init(priv->base, priv->uartclk, baudrate); -} - -static int bcm6858_serial_putc(struct udevice *dev, const char ch) -{ - struct bcm6858_serial_priv *priv = dev_get_priv(dev); - u32 val; - - val = readl(priv->base + UART_IR_REG); - if (!(val & UART_IR_STAT(UART_IR_TXEMPTY))) - return -EAGAIN; - - writel(ch, priv->base + UART_FIFO_REG); - - return 0; -} - -static int bcm6858_serial_getc(struct udevice *dev) -{ - struct bcm6858_serial_priv *priv = dev_get_priv(dev); - u32 val; - - val = readl(priv->base + UART_IR_REG); - if (val & UART_IR_STAT(UART_IR_RXOVER)) - setbits_le32(priv->base + UART_CTL_REG, - UART_CTL_RSTRXFIFO_MASK); - - if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY))) - return -EAGAIN; - - val = readl(priv->base + UART_FIFO_REG); - if (val & UART_FIFO_ANYERR_MASK) - return -EAGAIN; - - return val & UART_FIFO_VALID_MASK; -} - -static int bcm6858_serial_probe(struct udevice *dev) -{ - struct bcm6858_serial_priv *priv = dev_get_priv(dev); - struct clk clk; - int ret; - - /* get address */ - priv->base = dev_remap_addr(dev); - if (!priv->base) - return -EINVAL; - - /* get clock rate */ - ret = clk_get_by_index(dev, 0, &clk); - if (ret < 0) - return ret; - priv->uartclk = clk_get_rate(&clk); - clk_free(&clk); - - /* initialize serial */ - return bcm6858_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE); -} - -static const struct dm_serial_ops bcm6858_serial_ops = { - .putc = bcm6858_serial_putc, - .pending = bcm6858_serial_pending, - .getc = bcm6858_serial_getc, - .setbrg = bcm6858_serial_setbrg, -}; - -static const struct udevice_id bcm6858_serial_ids[] = { - { .compatible = "brcm,bcm6858-uart" }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(bcm6858_serial) = { - .name = "bcm6858-uart", - .id = UCLASS_SERIAL, - .of_match = bcm6858_serial_ids, - .probe = bcm6858_serial_probe, - .priv_auto_alloc_size = sizeof(struct bcm6858_serial_priv), - .ops = &bcm6858_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -#ifdef CONFIG_DEBUG_UART_BCM6858 -static inline void _debug_uart_init(void) -{ - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; - - bcm6858_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); -} - -static inline void wait_xfered(void __iomem *base) -{ - do { - u32 val = readl(base + UART_IR_REG); - if (val & UART_IR_STAT(UART_IR_TXEMPTY)) - break; - } while (1); -} - -static inline void _debug_uart_putc(int ch) -{ - void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; - - wait_xfered(base); - writel(ch, base + UART_FIFO_REG); - wait_xfered(base); -} - -DEBUG_UART_FUNCS -#endif diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c index ee6ad9c9e59..a31d73766dd 100644 --- a/drivers/serial/serial_omap.c +++ b/drivers/serial/serial_omap.c @@ -7,7 +7,6 @@ */ #include <common.h> -#include <debug_uart.h> #include <dm.h> #include <dt-structs.h> #include <ns16550.h> @@ -20,6 +19,47 @@ #ifdef CONFIG_DEBUG_UART_OMAP +#ifndef CONFIG_SYS_NS16550_IER +#define CONFIG_SYS_NS16550_IER 0x00 +#endif + +#define UART_MCRVAL 0x00 +#define UART_LCRVAL UART_LCR_8N1 + +static inline void serial_out_shift(void *addr, int shift, int value) +{ +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + outb(value, (ulong)addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) + out_le32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + out_be32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) + writel(value, addr); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + writeb(value, addr + (1 << shift) - 1); +#else + writeb(value, addr); +#endif +} + +static inline int serial_in_shift(void *addr, int shift) +{ +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + return inb((ulong)addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) + return in_le32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + return in_be32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) + return readl(addr); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + return readb(addr + (1 << shift) - 1); +#else + return readb(addr); +#endif +} + #include <debug_uart.h> static inline void _debug_uart_init(void) |