diff options
Diffstat (limited to 'drivers/spi/zynq_spi.c')
| -rw-r--r-- | drivers/spi/zynq_spi.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index b3e0858eb94..37fa12b96b5 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -6,7 +6,6 @@ * Xilinx Zynq PS SPI controller driver (master mode only) */ -#include <common.h> #include <dm.h> #include <dm/device_compat.h> #include <log.h> @@ -54,7 +53,6 @@ struct zynq_spi_regs { u32 rxdr; /* 0x20 */ }; - /* zynq spi platform data */ struct zynq_spi_plat { struct zynq_spi_regs *regs; @@ -242,15 +240,15 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen, u8 *rx_buf = din, buf; u32 ts, status; - debug("spi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n", - dev_seq(bus), slave_plat->cs, bitlen, len, flags); + debug("spi_xfer: bus:%i cs[0]:%i bitlen:%i len:%i flags:%lx\n", + dev_seq(bus), slave_plat->cs[0], bitlen, len, flags); if (bitlen % 8) { debug("spi_xfer: Non byte aligned SPI transfer\n"); return -1; } - priv->cs = slave_plat->cs; + priv->cs = slave_plat->cs[0]; if (flags & SPI_XFER_BEGIN) spi_cs_activate(dev); |