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-rw-r--r--drivers/timer/Kconfig8
-rw-r--r--drivers/timer/Makefile1
-rw-r--r--drivers/timer/adi_sc5xx_timer.c145
-rw-r--r--drivers/timer/altera_timer.c1
-rw-r--r--drivers/timer/andes_plmt_timer.c1
-rw-r--r--drivers/timer/arc_timer.c2
-rw-r--r--drivers/timer/arm_global_timer.c2
-rw-r--r--drivers/timer/arm_twd_timer.c1
-rw-r--r--drivers/timer/ast_timer.c1
-rw-r--r--drivers/timer/atmel_pit_timer.c1
-rw-r--r--drivers/timer/atmel_tcb_timer.c1
-rw-r--r--drivers/timer/cadence-ttc.c1
-rw-r--r--drivers/timer/dw-apb-timer.c1
-rw-r--r--drivers/timer/fttmr010_timer.c1
-rw-r--r--drivers/timer/imx-gpt-timer.c2
-rw-r--r--drivers/timer/mchp-pit64b-timer.c1
-rw-r--r--drivers/timer/mpc83xx_timer.c2
-rw-r--r--drivers/timer/mtk_timer.c4
-rw-r--r--drivers/timer/nomadik-mtu-timer.c1
-rw-r--r--drivers/timer/npcm-timer.c83
-rw-r--r--drivers/timer/omap-timer.c1
-rw-r--r--drivers/timer/orion-timer.c2
-rw-r--r--drivers/timer/ostm_timer.c1
-rw-r--r--drivers/timer/riscv_aclint_timer.c2
-rw-r--r--drivers/timer/riscv_timer.c2
-rw-r--r--drivers/timer/rockchip_timer.c1
-rw-r--r--drivers/timer/sandbox_timer.c1
-rw-r--r--drivers/timer/sp804_timer.c2
-rw-r--r--drivers/timer/starfive-timer.c1
-rw-r--r--drivers/timer/stm32_timer.c2
-rw-r--r--drivers/timer/tegra-timer.c1
-rw-r--r--drivers/timer/timer-uclass.c1
-rw-r--r--drivers/timer/tsc_timer.c1
-rw-r--r--drivers/timer/xilinx-timer.c1
34 files changed, 184 insertions, 95 deletions
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 60519c3b536..6b1de82ae38 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -50,6 +50,14 @@ config TIMER_EARLY
use an early timer. These functions must be supported by your timer
driver: timer_early_get_count() and timer_early_get_rate().
+config ADI_SC5XX_TIMER
+ bool "ADI ADSP-SC5xx Timer Support"
+ depends on TIMER && (SC57X || SC58X || SC59X || SC59X_64)
+ help
+ gptimer based timer support on ADI's ADSP-SC5xx platforms. Available
+ but not required on sc59x-64-based platforms (598 and similar).
+ Required on 32-bit platforms (sc57x, sc58x, sc594 and earlier).
+
config ALTERA_TIMER
bool "Altera timer support"
depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index b93145e8d43..fb95c8899e3 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -3,6 +3,7 @@
# Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
obj-y += timer-uclass.o
+obj-$(CONFIG_ADI_SC5XX_TIMER) += adi_sc5xx_timer.o
obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
obj-$(CONFIG_$(SPL_)ANDES_PLMT_TIMER) += andes_plmt_timer.o
obj-$(CONFIG_ARC_TIMER) += arc_timer.o
diff --git a/drivers/timer/adi_sc5xx_timer.c b/drivers/timer/adi_sc5xx_timer.c
new file mode 100644
index 00000000000..11c098434a8
--- /dev/null
+++ b/drivers/timer/adi_sc5xx_timer.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2022 - Analog Devices, Inc.
+ *
+ * Written and/or maintained by Timesys Corporation
+ *
+ * Converted to driver model by Nathan Barrett-Morrison
+ *
+ * Author: Greg Malysa <greg.malysa@timesys.com>
+ * Additional Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
+ *
+ * dm timer implementation for ADI ADSP-SC5xx SoCs
+ *
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <timer.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <linux/compiler_types.h>
+
+/*
+ * Timer Configuration Register Bits
+ */
+#define TIMER_OUT_DIS 0x0800
+#define TIMER_PULSE_HI 0x0080
+#define TIMER_MODE_PWM_CONT 0x000c
+
+#define __BFP(m) u16 m; u16 __pad_##m
+
+struct gptimer3 {
+ __BFP(config);
+ u32 counter;
+ u32 period;
+ u32 width;
+ u32 delay;
+};
+
+struct gptimer3_group_regs {
+ __BFP(run);
+ __BFP(enable);
+ __BFP(disable);
+ __BFP(stop_cfg);
+ __BFP(stop_cfg_set);
+ __BFP(stop_cfg_clr);
+ __BFP(data_imsk);
+ __BFP(stat_imsk);
+ __BFP(tr_msk);
+ __BFP(tr_ie);
+ __BFP(data_ilat);
+ __BFP(stat_ilat);
+ __BFP(err_status);
+ __BFP(bcast_per);
+ __BFP(bcast_wid);
+ __BFP(bcast_dly);
+};
+
+#define MAX_TIM_LOAD 0xFFFFFFFF
+
+struct adi_gptimer_priv {
+ struct gptimer3_group_regs __iomem *timer_group;
+ struct gptimer3 __iomem *timer_base;
+ u32 prev;
+ u64 upper;
+};
+
+static u64 adi_gptimer_get_count(struct udevice *udev)
+{
+ struct adi_gptimer_priv *priv = dev_get_priv(udev);
+
+ u32 now = readl(&priv->timer_base->counter);
+
+ if (now < priv->prev)
+ priv->upper += (1ull << 32);
+
+ priv->prev = now;
+
+ return (priv->upper + (u64)now);
+}
+
+static const struct timer_ops adi_gptimer_ops = {
+ .get_count = adi_gptimer_get_count,
+};
+
+static int adi_gptimer_probe(struct udevice *udev)
+{
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(udev);
+ struct adi_gptimer_priv *priv = dev_get_priv(udev);
+ struct clk clk;
+ u16 imask;
+ int ret;
+
+ priv->timer_group = dev_remap_addr_index(udev, 0);
+ priv->timer_base = dev_remap_addr_index(udev, 1);
+ priv->upper = 0;
+ priv->prev = 0;
+
+ if (!priv->timer_group || !priv->timer_base) {
+ dev_err(udev, "Missing timer_group or timer_base reg entries\n");
+ return -ENODEV;
+ }
+
+ ret = clk_get_by_index(udev, 0, &clk);
+ if (ret < 0) {
+ dev_err(udev, "Missing clock reference for timer\n");
+ return ret;
+ }
+
+ ret = clk_enable(&clk);
+ if (ret) {
+ dev_err(udev, "Failed to enable clock\n");
+ return ret;
+ }
+
+ uc_priv->clock_rate = clk_get_rate(&clk);
+
+ /* Enable timer */
+ writew(TIMER_OUT_DIS | TIMER_MODE_PWM_CONT | TIMER_PULSE_HI,
+ &priv->timer_base->config);
+ writel(MAX_TIM_LOAD, &priv->timer_base->period);
+ writel(MAX_TIM_LOAD - 1, &priv->timer_base->width);
+
+ /* We only use timer 0 in uboot */
+ imask = readw(&priv->timer_group->data_imsk);
+ imask &= ~(1 << 0);
+ writew(imask, &priv->timer_group->data_imsk);
+ writew((1 << 0), &priv->timer_group->enable);
+
+ return 0;
+}
+
+static const struct udevice_id adi_gptimer_ids[] = {
+ { .compatible = "adi,sc5xx-gptimer" },
+ { },
+};
+
+U_BOOT_DRIVER(adi_gptimer) = {
+ .name = "adi_gptimer",
+ .id = UCLASS_TIMER,
+ .of_match = adi_gptimer_ids,
+ .priv_auto = sizeof(struct adi_gptimer_priv),
+ .probe = adi_gptimer_probe,
+ .ops = &adi_gptimer_ops,
+};
diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c
index 040dc65f48a..ece246c23d2 100644
--- a/drivers/timer/altera_timer.c
+++ b/drivers/timer/altera_timer.c
@@ -7,7 +7,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/andes_plmt_timer.c b/drivers/timer/andes_plmt_timer.c
index 42dd4b62317..20baaf61307 100644
--- a/drivers/timer/andes_plmt_timer.c
+++ b/drivers/timer/andes_plmt_timer.c
@@ -8,7 +8,6 @@
* associated with timer tick.
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
diff --git a/drivers/timer/arc_timer.c b/drivers/timer/arc_timer.c
index 497f8a04155..6ad520c10aa 100644
--- a/drivers/timer/arc_timer.c
+++ b/drivers/timer/arc_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Synopsys, Inc. All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
@@ -90,7 +89,6 @@ static int arc_timer_probe(struct udevice *dev)
return 0;
}
-
static const struct timer_ops arc_timer_ops = {
.get_count = arc_timer_get_count,
};
diff --git a/drivers/timer/arm_global_timer.c b/drivers/timer/arm_global_timer.c
index 2e50d9fbc58..b8057929f99 100644
--- a/drivers/timer/arm_global_timer.c
+++ b/drivers/timer/arm_global_timer.c
@@ -6,7 +6,7 @@
* ARM Cortext A9 global timer driver
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <clk.h>
#include <timer.h>
diff --git a/drivers/timer/arm_twd_timer.c b/drivers/timer/arm_twd_timer.c
index 40ccd165874..2b2f3591173 100644
--- a/drivers/timer/arm_twd_timer.c
+++ b/drivers/timer/arm_twd_timer.c
@@ -27,7 +27,6 @@
* Alex Zuepke <azu@sysgo.de>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <timer.h>
diff --git a/drivers/timer/ast_timer.c b/drivers/timer/ast_timer.c
index 78adc96cc59..6601cab7b16 100644
--- a/drivers/timer/ast_timer.c
+++ b/drivers/timer/ast_timer.c
@@ -3,7 +3,6 @@
* Copyright 2016 Google Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/atmel_pit_timer.c b/drivers/timer/atmel_pit_timer.c
index 5cf46f224ab..0a367a5a7f4 100644
--- a/drivers/timer/atmel_pit_timer.c
+++ b/drivers/timer/atmel_pit_timer.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c
index 8c17987c7d7..3a328b2f6c7 100644
--- a/drivers/timer/atmel_tcb_timer.c
+++ b/drivers/timer/atmel_tcb_timer.c
@@ -5,7 +5,6 @@
* Author: Clément Léger <clement.leger@bootlin.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c
index 2eff45060ad..3cffb1bb88d 100644
--- a/drivers/timer/cadence-ttc.c
+++ b/drivers/timer/cadence-ttc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 0607f751ca7..77ccb98cb8d 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <dt-structs.h>
diff --git a/drivers/timer/fttmr010_timer.c b/drivers/timer/fttmr010_timer.c
index b6289e64610..c41bbfc1d57 100644
--- a/drivers/timer/fttmr010_timer.c
+++ b/drivers/timer/fttmr010_timer.c
@@ -5,7 +5,6 @@
*
* 23/08/2022 Port to DM
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <timer.h>
diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c
index 9c3b64ae5b1..07b9fdb5e18 100644
--- a/drivers/timer/imx-gpt-timer.c
+++ b/drivers/timer/imx-gpt-timer.c
@@ -4,7 +4,7 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/timer/mchp-pit64b-timer.c b/drivers/timer/mchp-pit64b-timer.c
index c9806d7eeeb..1a5b2e6a0dc 100644
--- a/drivers/timer/mchp-pit64b-timer.c
+++ b/drivers/timer/mchp-pit64b-timer.c
@@ -7,7 +7,6 @@
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c
index 7814cb6a5d6..9da74479aaa 100644
--- a/drivers/timer/mpc83xx_timer.c
+++ b/drivers/timer/mpc83xx_timer.c
@@ -4,7 +4,7 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <irq_func.h>
diff --git a/drivers/timer/mtk_timer.c b/drivers/timer/mtk_timer.c
index 223e63f6c1a..06deb23eb99 100644
--- a/drivers/timer/mtk_timer.c
+++ b/drivers/timer/mtk_timer.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
@@ -74,7 +73,8 @@ static int mtk_timer_probe(struct udevice *dev)
return ret;
ret = clk_get_by_index(dev, 1, &parent);
- if (!ret) {
+ /* Skip setting the parent with dummy fixed-clock */
+ if (!ret && parent.dev->driver != DM_DRIVER_GET(fixed_clock)) {
ret = clk_set_parent(&clk, &parent);
if (ret)
return ret;
diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c
index 4d24de14ae6..9a05582c0d5 100644
--- a/drivers/timer/nomadik-mtu-timer.c
+++ b/drivers/timer/nomadik-mtu-timer.c
@@ -12,7 +12,6 @@
* Copyright (C) 2010 Linus Walleij for ST-Ericsson
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
diff --git a/drivers/timer/npcm-timer.c b/drivers/timer/npcm-timer.c
index 4562a6f2311..5627c2331ca 100644
--- a/drivers/timer/npcm-timer.c
+++ b/drivers/timer/npcm-timer.c
@@ -3,94 +3,53 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
-#include <clk.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
-#define NPCM_TIMER_CLOCK_RATE 1000000UL /* 1MHz timer */
-#define NPCM_TIMER_INPUT_RATE 25000000UL /* Rate of input clock */
-#define NPCM_TIMER_TDR_MASK GENMASK(23, 0)
-#define NPCM_TIMER_MAX_VAL NPCM_TIMER_TDR_MASK /* max counter value */
+#define NPCM_TIMER_CLOCK_RATE 25000000UL /* 25MHz */
/* Register offsets */
-#define TCR0 0x0 /* Timer Control and Status Register */
-#define TICR0 0x8 /* Timer Initial Count Register */
-#define TDR0 0x10 /* Timer Data Register */
+#define SECCNT 0x0 /* Seconds Counter Register */
+#define CNTR25M 0x4 /* 25MHz Counter Register */
-/* TCR fields */
-#define TCR_MODE_PERIODIC BIT(27)
-#define TCR_EN BIT(30)
-#define TCR_PRESCALE (NPCM_TIMER_INPUT_RATE / NPCM_TIMER_CLOCK_RATE - 1)
-
-enum input_clock_type {
- INPUT_CLOCK_FIXED, /* input clock rate is fixed */
- INPUT_CLOCK_NON_FIXED
-};
-
-/**
- * struct npcm_timer_priv - private data for npcm timer driver
- * npcm timer is a 24-bits down-counting timer.
- *
- * @last_count: last hw counter value
- * @counter: the value to be returned for get_count ops
- */
struct npcm_timer_priv {
void __iomem *base;
- u32 last_count;
- u64 counter;
};
static u64 npcm_timer_get_count(struct udevice *dev)
{
struct npcm_timer_priv *priv = dev_get_priv(dev);
- u32 val;
+ u64 reg_sec, reg_25m;
+ u64 counter;
- /* The timer is counting down */
- val = readl(priv->base + TDR0) & NPCM_TIMER_TDR_MASK;
- if (val <= priv->last_count)
- priv->counter += priv->last_count - val;
- else
- priv->counter += priv->last_count + (NPCM_TIMER_MAX_VAL + 1 - val);
- priv->last_count = val;
+ reg_sec = readl(priv->base + SECCNT);
+ reg_25m = readl(priv->base + CNTR25M);
+ /*
+ * When CNTR25M reaches 25M, it goes to 0 and SECCNT is increased by 1.
+ * When CNTR25M is zero, wait for CNTR25M to become non-zero in case
+ * SECCNT is not updated yet.
+ */
+ if (reg_25m == 0) {
+ while (reg_25m == 0)
+ reg_25m = readl(priv->base + CNTR25M);
+ reg_sec = readl(priv->base + SECCNT);
+ }
+ counter = reg_sec * NPCM_TIMER_CLOCK_RATE + reg_25m;
- return priv->counter;
+ return counter;
}
static int npcm_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct npcm_timer_priv *priv = dev_get_priv(dev);
- enum input_clock_type type = dev_get_driver_data(dev);
- struct clk clk;
- int ret;
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
uc_priv->clock_rate = NPCM_TIMER_CLOCK_RATE;
- if (type == INPUT_CLOCK_NON_FIXED) {
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
-
- ret = clk_set_rate(&clk, NPCM_TIMER_INPUT_RATE);
- if (ret < 0)
- return ret;
- }
-
- /*
- * Configure timer and start
- * periodic mode
- * timer clock rate = input clock / prescale
- */
- writel(0, priv->base + TCR0);
- writel(NPCM_TIMER_MAX_VAL, priv->base + TICR0);
- writel(TCR_EN | TCR_MODE_PERIODIC | TCR_PRESCALE,
- priv->base + TCR0);
-
return 0;
}
@@ -99,8 +58,8 @@ static const struct timer_ops npcm_timer_ops = {
};
static const struct udevice_id npcm_timer_ids[] = {
- { .compatible = "nuvoton,npcm845-timer", .data = INPUT_CLOCK_FIXED},
- { .compatible = "nuvoton,npcm750-timer", .data = INPUT_CLOCK_NON_FIXED},
+ { .compatible = "nuvoton,npcm845-timer"},
+ { .compatible = "nuvoton,npcm750-timer"},
{}
};
diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
index 9b6d97dae67..fda6356fdba 100644
--- a/drivers/timer/omap-timer.c
+++ b/drivers/timer/omap-timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015, Texas Instruments, Incorporated
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
index 9cab27f2e48..821b681a232 100644
--- a/drivers/timer/orion-timer.c
+++ b/drivers/timer/orion-timer.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c
index 3bf0d4647b5..314f956cdfb 100644
--- a/drivers/timer/ostm_timer.c
+++ b/drivers/timer/ostm_timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c
index 73fb8791285..35da1ea2fd2 100644
--- a/drivers/timer/riscv_aclint_timer.c
+++ b/drivers/timer/riscv_aclint_timer.c
@@ -4,7 +4,7 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
index 169c03dcb5c..1f4980ceb38 100644
--- a/drivers/timer/riscv_timer.c
+++ b/drivers/timer/riscv_timer.c
@@ -10,7 +10,7 @@
* This driver provides generic timer support for S-mode U-Boot.
*/
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index e66c49aa6bb..96c010f4dcc 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c
index 1da7e0c3a76..e8b54a02965 100644
--- a/drivers/timer/sandbox_timer.c
+++ b/drivers/timer/sandbox_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/sp804_timer.c b/drivers/timer/sp804_timer.c
index 8fd4afb15a5..3e57f4b98ba 100644
--- a/drivers/timer/sp804_timer.c
+++ b/drivers/timer/sp804_timer.c
@@ -4,7 +4,6 @@
* Copyright (C) 2022 Arm Ltd.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
@@ -30,7 +29,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define SP804_CTRL_TIMER_32BIT (1U << 1)
#define SP804_CTRL_ONESHOT (1U << 0)
-
struct sp804_timer_plat {
uintptr_t base;
};
diff --git a/drivers/timer/starfive-timer.c b/drivers/timer/starfive-timer.c
index 6ac7d7f1d0e..6b79c8858b5 100644
--- a/drivers/timer/starfive-timer.c
+++ b/drivers/timer/starfive-timer.c
@@ -4,7 +4,6 @@
* Author: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <time.h>
diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c
index 1213a14ef19..1dc21c5c1be 100644
--- a/drivers/timer/stm32_timer.c
+++ b/drivers/timer/stm32_timer.c
@@ -6,7 +6,7 @@
#define LOG_CATEGORY UCLASS_TIMER
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/timer/tegra-timer.c b/drivers/timer/tegra-timer.c
index a867c649c3a..3545424889d 100644
--- a/drivers/timer/tegra-timer.c
+++ b/drivers/timer/tegra-timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 60ff65529ab..8305f06d318 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_TIMER
-#include <common.h>
#include <clk.h>
#include <cpu.h>
#include <dm.h>
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index f86a0b86921..80c084f380d 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -6,7 +6,6 @@
* arch/x86/kernel/tsc_msr.c and arch/x86/kernel/tsc.c
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c
index 172fd9f9296..54148aa1689 100644
--- a/drivers/timer/xilinx-timer.c
+++ b/drivers/timer/xilinx-timer.c
@@ -7,7 +7,6 @@
* Michal SIMEK <monstr@monstr.eu>
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <regmap.h>