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-rw-r--r--drivers/usb/Kconfig2
-rw-r--r--drivers/usb/cdns3/gadget.c8
-rw-r--r--drivers/usb/dwc3/core.h2
-rw-r--r--drivers/usb/dwc3/ep0.c6
-rw-r--r--drivers/usb/dwc3/gadget.c10
-rw-r--r--drivers/usb/dwc3/io.h13
-rw-r--r--drivers/usb/gadget/Kconfig2
-rw-r--r--drivers/usb/tcpm/Kconfig16
-rw-r--r--drivers/usb/tcpm/Makefile4
-rw-r--r--drivers/usb/tcpm/fusb302.c1323
-rw-r--r--drivers/usb/tcpm/fusb302_reg.h177
-rw-r--r--drivers/usb/tcpm/tcpm-internal.h173
-rw-r--r--drivers/usb/tcpm/tcpm-uclass.c149
-rw-r--r--drivers/usb/tcpm/tcpm.c2288
14 files changed, 4165 insertions, 8 deletions
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 311aaa7e67f..960b6a906ac 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -85,6 +85,8 @@ source "drivers/usb/emul/Kconfig"
source "drivers/usb/phy/Kconfig"
+source "drivers/usb/tcpm/Kconfig"
+
source "drivers/usb/ulpi/Kconfig"
if USB_HOST
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index ac7e469469a..a30c40ef80e 100644
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -1637,6 +1637,14 @@ void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
else
priv_ep->trb_burst_size = 16;
+ /*
+ * The Endpoint is configured to handle a maximum packet size of
+ * max_packet_size. Hence, set priv_ep->endpoint.maxpacket to
+ * max_packet_size. This is necessary to ensure that the TD_SIZE
+ * is calculated correctly in cdns3_ep_run_transfer().
+ */
+ priv_ep->endpoint.maxpacket = max_packet_size;
+
ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
!!priv_ep->dir);
if (ret) {
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 7374ce950da..b572ea340c8 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -670,6 +670,7 @@ struct dwc3_scratchpad_array {
* @ep0_trb: dma address of ep0_trb
* @ep0_usb_req: dummy req used while handling STD USB requests
* @ep0_bounce_addr: dma address of ep0_bounce
+ * @setup_buf_addr: dma address of setup_buf
* @scratch_addr: dma address of scratchbuf
* @lock: for synchronizing
* @dev: pointer to our struct device
@@ -757,6 +758,7 @@ struct dwc3 {
dma_addr_t ep0_trb_addr;
dma_addr_t ep0_bounce_addr;
dma_addr_t scratch_addr;
+ dma_addr_t setup_buf_addr;
struct dwc3_request ep0_usb_req;
/* device lock */
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 24f516a131b..531f0b522af 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -380,7 +380,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc,
dep = dwc->eps[0];
dwc->ep0_usb_req.dep = dep;
dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
- dwc->ep0_usb_req.request.buf = dwc->setup_buf;
+ dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr;
dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
@@ -662,7 +662,7 @@ static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
dep = dwc->eps[0];
dwc->ep0_usb_req.dep = dep;
dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket;
- dwc->ep0_usb_req.request.buf = dwc->setup_buf;
+ dwc->ep0_usb_req.request.buf = (void *)dwc->setup_buf_addr;
dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl;
return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
@@ -742,6 +742,8 @@ static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
if (!dwc->gadget_driver)
goto out;
+ dwc3_invalidate_cache((uintptr_t)ctrl, sizeof(*ctrl));
+
len = le16_to_cpu(ctrl->wLength);
if (!len) {
dwc->three_stage_setup = false;
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index fe33e307d3e..e5a383407a2 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2534,6 +2534,8 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
while (left > 0) {
union dwc3_event event;
+ dwc3_invalidate_cache((uintptr_t)evt->buf, evt->length);
+
event.raw = *(u32 *) (evt->buf + evt->lpos);
dwc3_process_event_entry(dwc, &event);
@@ -2653,8 +2655,8 @@ int dwc3_gadget_init(struct dwc3 *dwc)
goto err1;
}
- dwc->setup_buf = memalign(CONFIG_SYS_CACHELINE_SIZE,
- DWC3_EP0_BOUNCE_SIZE);
+ dwc->setup_buf = dma_alloc_coherent(DWC3_EP0_BOUNCE_SIZE,
+ (unsigned long *)&dwc->setup_buf_addr);
if (!dwc->setup_buf) {
ret = -ENOMEM;
goto err2;
@@ -2701,7 +2703,7 @@ err4:
dma_free_coherent(dwc->ep0_bounce);
err3:
- kfree(dwc->setup_buf);
+ dma_free_coherent(dwc->setup_buf);
err2:
dma_free_coherent(dwc->ep0_trb);
@@ -2723,7 +2725,7 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
dma_free_coherent(dwc->ep0_bounce);
- kfree(dwc->setup_buf);
+ dma_free_coherent(dwc->setup_buf);
dma_free_coherent(dwc->ep0_trb);
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index 04791d4c9be..c1ab0288142 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
@@ -50,6 +50,17 @@ static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
static inline void dwc3_flush_cache(uintptr_t addr, int length)
{
- flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE));
+ uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
+ uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
+
+ flush_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
+}
+
+static inline void dwc3_invalidate_cache(uintptr_t addr, int length)
+{
+ uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
+ uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
+
+ invalidate_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
}
#endif /* __DRIVERS_USB_DWC3_IO_H */
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 1694ad03183..010084ef7f3 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -233,7 +233,7 @@ endif # USB_GADGET_DOWNLOAD
config USB_ETHER
bool "USB Ethernet Gadget"
- depends on NET
+ depends on NET || NET_LWIP
default y if ARCH_SUNXI && USB_MUSB_GADGET
help
Creates an Ethernet network device through a USB peripheral
diff --git a/drivers/usb/tcpm/Kconfig b/drivers/usb/tcpm/Kconfig
new file mode 100644
index 00000000000..9be4b496e82
--- /dev/null
+++ b/drivers/usb/tcpm/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config TYPEC_TCPM
+ tristate "USB Type-C Port Controller Manager"
+ depends on DM
+ help
+ The Type-C Port Controller Manager provides a USB PD and USB Type-C
+ state machine for use with Type-C Port Controllers.
+
+config TYPEC_FUSB302
+ tristate "Fairchild FUSB302 Type-C chip driver"
+ depends on DM && DM_I2C && TYPEC_TCPM
+ help
+ The Fairchild FUSB302 Type-C chip driver that works with
+ Type-C Port Controller Manager to provide USB PD and USB
+ Type-C functionalities.
diff --git a/drivers/usb/tcpm/Makefile b/drivers/usb/tcpm/Makefile
new file mode 100644
index 00000000000..668d33155bf
--- /dev/null
+++ b/drivers/usb/tcpm/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_TYPEC_TCPM) += tcpm.o tcpm-uclass.o
+obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o
diff --git a/drivers/usb/tcpm/fusb302.c b/drivers/usb/tcpm/fusb302.c
new file mode 100644
index 00000000000..fe93ff3d339
--- /dev/null
+++ b/drivers/usb/tcpm/fusb302.c
@@ -0,0 +1,1323 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2016-2017 Google, Inc
+ *
+ * Fairchild FUSB302 Type-C Chip Driver
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <dm/device_compat.h>
+#include <usb/tcpm.h>
+#include "fusb302_reg.h"
+
+#define FUSB302_MAX_MSG_LEN 0x1F
+
+enum toggling_mode {
+ TOGGLING_MODE_OFF,
+ TOGGLING_MODE_DRP,
+ TOGGLING_MODE_SNK,
+ TOGGLING_MODE_SRC,
+};
+
+enum src_current_status {
+ SRC_CURRENT_DEFAULT,
+ SRC_CURRENT_MEDIUM,
+ SRC_CURRENT_HIGH,
+};
+
+static const u8 ra_mda_value[] = {
+ [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
+ [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
+ [SRC_CURRENT_HIGH] = 18, /* 798mV */
+};
+
+static const u8 rd_mda_value[] = {
+ [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
+ [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
+ [SRC_CURRENT_HIGH] = 61, /* 2604mV */
+};
+
+struct fusb302_chip {
+ enum toggling_mode toggling_mode;
+ enum src_current_status src_current_status;
+ bool intr_togdone;
+ bool intr_bc_lvl;
+ bool intr_comp_chng;
+
+ /* port status */
+ bool vconn_on;
+ bool vbus_present;
+ enum typec_cc_polarity cc_polarity;
+ enum typec_cc_status cc1;
+ enum typec_cc_status cc2;
+};
+
+static int fusb302_i2c_write(struct udevice *dev, u8 address, u8 data)
+{
+ int ret;
+
+ ret = dm_i2c_write(dev, address, &data, 1);
+ if (ret)
+ dev_err(dev, "cannot write 0x%02x to 0x%02x, ret=%d\n",
+ data, address, ret);
+
+ return ret;
+}
+
+static int fusb302_i2c_block_write(struct udevice *dev, u8 address,
+ u8 length, const u8 *data)
+{
+ int ret;
+
+ if (!length)
+ return 0;
+
+ ret = dm_i2c_write(dev, address, data, length);
+ if (ret)
+ dev_err(dev, "cannot block write 0x%02x, len=%d, ret=%d\n",
+ address, length, ret);
+
+ return ret;
+}
+
+static int fusb302_i2c_read(struct udevice *dev, u8 address, u8 *data)
+{
+ int ret, retries;
+
+ for (retries = 0; retries < 3; retries++) {
+ ret = dm_i2c_read(dev, address, data, 1);
+ if (ret == 0)
+ return ret;
+ dev_err(dev, "cannot read %02x, ret=%d\n", address, ret);
+ }
+
+ return ret;
+}
+
+static int fusb302_i2c_block_read(struct udevice *dev, u8 address,
+ u8 length, u8 *data)
+{
+ int ret;
+
+ if (!length)
+ return 0;
+
+ ret = dm_i2c_read(dev, address, data, length);
+ if (ret)
+ dev_err(dev, "cannot block read 0x%02x, len=%d, ret=%d\n",
+ address, length, ret);
+ return ret;
+}
+
+static int fusb302_i2c_mask_write(struct udevice *dev, u8 address,
+ u8 mask, u8 value)
+{
+ int ret;
+ u8 data;
+
+ ret = fusb302_i2c_read(dev, address, &data);
+ if (ret)
+ return ret;
+ data &= ~mask;
+ data |= value;
+ ret = fusb302_i2c_write(dev, address, data);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+static int fusb302_i2c_set_bits(struct udevice *dev, u8 address, u8 set_bits)
+{
+ return fusb302_i2c_mask_write(dev, address, 0x00, set_bits);
+}
+
+static int fusb302_i2c_clear_bits(struct udevice *dev, u8 address, u8 clear_bits)
+{
+ return fusb302_i2c_mask_write(dev, address, clear_bits, 0x00);
+}
+
+static int fusb302_sw_reset(struct udevice *dev)
+{
+ int ret = fusb302_i2c_write(dev, FUSB_REG_RESET, FUSB_REG_RESET_SW_RESET);
+
+ if (ret)
+ dev_err(dev, "cannot sw reset the fusb302: %d\n", ret);
+
+ return ret;
+}
+
+static int fusb302_enable_tx_auto_retries(struct udevice *dev, u8 retry_count)
+{
+ int ret;
+
+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, retry_count |
+ FUSB_REG_CONTROL3_AUTO_RETRY);
+
+ return ret;
+}
+
+/*
+ * mask all interrupt on the chip
+ */
+static int fusb302_mask_interrupt(struct udevice *dev)
+{
+ int ret;
+
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASK, 0xFF);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_INT_MASK);
+ return ret;
+}
+
+/*
+ * initialize interrupt on the chip
+ * - unmasked interrupt: VBUS_OK
+ */
+static int fusb302_init_interrupt(struct udevice *dev)
+{
+ int ret;
+
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASK,
+ 0xFF & ~FUSB_REG_MASK_VBUSOK);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_INT_MASK);
+ return ret;
+}
+
+static int fusb302_set_power_mode(struct udevice *dev, u8 power_mode)
+{
+ int ret;
+
+ ret = fusb302_i2c_write(dev, FUSB_REG_POWER, power_mode);
+
+ return ret;
+}
+
+static int fusb302_init(struct udevice *dev)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+ u8 data;
+
+ ret = fusb302_sw_reset(dev);
+ if (ret)
+ return ret;
+ ret = fusb302_enable_tx_auto_retries(dev, FUSB_REG_CONTROL3_N_RETRIES_3);
+ if (ret)
+ return ret;
+ ret = fusb302_init_interrupt(dev);
+ if (ret)
+ return ret;
+ ret = fusb302_set_power_mode(dev, FUSB_REG_POWER_PWR_ALL);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &data);
+ if (ret)
+ return ret;
+ chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
+ ret = fusb302_i2c_read(dev, FUSB_REG_DEVICE_ID, &data);
+ if (ret)
+ return ret;
+ dev_info(dev, "fusb302 device ID: 0x%02x\n", data);
+
+ return ret;
+}
+
+static int fusb302_get_vbus(struct udevice *dev)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+
+ return chip->vbus_present ? 1 : 0;
+}
+
+static int fusb302_set_src_current(struct udevice *dev,
+ enum src_current_status status)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+
+ chip->src_current_status = status;
+ switch (status) {
+ case SRC_CURRENT_DEFAULT:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_HOST_CUR_MASK,
+ FUSB_REG_CONTROL0_HOST_CUR_DEF);
+ break;
+ case SRC_CURRENT_MEDIUM:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_HOST_CUR_MASK,
+ FUSB_REG_CONTROL0_HOST_CUR_MED);
+ break;
+ case SRC_CURRENT_HIGH:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_HOST_CUR_MASK,
+ FUSB_REG_CONTROL0_HOST_CUR_HIGH);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static int fusb302_set_toggling(struct udevice *dev,
+ enum toggling_mode mode)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+
+ /* first disable toggling */
+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_TOGGLE);
+ if (ret)
+ return ret;
+ /* mask interrupts for SRC or SNK */
+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASK,
+ FUSB_REG_MASK_BC_LVL |
+ FUSB_REG_MASK_COMP_CHNG);
+ if (ret)
+ return ret;
+ chip->intr_bc_lvl = false;
+ chip->intr_comp_chng = false;
+ /* configure toggling mode: none/snk/src/drp */
+ switch (mode) {
+ case TOGGLING_MODE_OFF:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_MODE_MASK,
+ FUSB_REG_CONTROL2_MODE_NONE);
+ break;
+ case TOGGLING_MODE_SNK:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_MODE_MASK,
+ FUSB_REG_CONTROL2_MODE_UFP);
+ break;
+ case TOGGLING_MODE_SRC:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_MODE_MASK,
+ FUSB_REG_CONTROL2_MODE_DFP);
+ break;
+ case TOGGLING_MODE_DRP:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_MODE_MASK,
+ FUSB_REG_CONTROL2_MODE_DRP);
+ break;
+ default:
+ break;
+ }
+
+ if (ret)
+ return ret;
+
+ if (mode == TOGGLING_MODE_OFF) {
+ /* mask TOGDONE interrupt */
+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASKA,
+ FUSB_REG_MASKA_TOGDONE);
+ if (ret)
+ return ret;
+ chip->intr_togdone = false;
+ } else {
+ /* Datasheet says vconn MUST be off when toggling */
+ if (chip->vconn_on)
+ dev_warn(dev, "Vconn is on during toggle start\n");
+ /* unmask TOGDONE interrupt */
+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA,
+ FUSB_REG_MASKA_TOGDONE);
+ if (ret)
+ return ret;
+ chip->intr_togdone = true;
+ /* start toggling */
+ ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL2,
+ FUSB_REG_CONTROL2_TOGGLE);
+ if (ret)
+ return ret;
+ /* during toggling, consider cc as Open */
+ chip->cc1 = TYPEC_CC_OPEN;
+ chip->cc2 = TYPEC_CC_OPEN;
+ }
+ chip->toggling_mode = mode;
+
+ return ret;
+}
+
+static const enum src_current_status cc_src_current[] = {
+ [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
+ [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
+ [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
+ [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
+ [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
+ [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
+};
+
+static int fusb302_set_cc(struct udevice *dev, enum typec_cc_status cc)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ const u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
+ FUSB_REG_SWITCHES0_CC2_PU_EN |
+ FUSB_REG_SWITCHES0_CC1_PD_EN |
+ FUSB_REG_SWITCHES0_CC2_PD_EN;
+ u8 rd_mda, switches0_data = 0x00;
+ int ret;
+
+ switch (cc) {
+ case TYPEC_CC_OPEN:
+ break;
+ case TYPEC_CC_RD:
+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
+ FUSB_REG_SWITCHES0_CC2_PD_EN;
+ break;
+ case TYPEC_CC_RP_DEF:
+ case TYPEC_CC_RP_1_5:
+ case TYPEC_CC_RP_3_0:
+ switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
+ FUSB_REG_SWITCHES0_CC1_PU_EN :
+ FUSB_REG_SWITCHES0_CC2_PU_EN;
+ break;
+ default:
+ dev_err(dev, "unsupported CC value: %s\n",
+ typec_cc_status_name[cc]);
+ ret = -EINVAL;
+ goto done;
+ }
+
+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
+ if (ret) {
+ dev_err(dev, "cannot set toggling mode: %d\n", ret);
+ goto done;
+ }
+
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0,
+ switches0_mask, switches0_data);
+ if (ret) {
+ dev_err(dev, "cannot set pull-up/-down: %d\n", ret);
+ goto done;
+ }
+ /* reset the cc status */
+ chip->cc1 = TYPEC_CC_OPEN;
+ chip->cc2 = TYPEC_CC_OPEN;
+
+ /* adjust current for SRC */
+ ret = fusb302_set_src_current(dev, cc_src_current[cc]);
+ if (ret) {
+ dev_err(dev, "cannot set src current %s: %d\n",
+ typec_cc_status_name[cc], ret);
+ goto done;
+ }
+
+ /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
+ switch (cc) {
+ case TYPEC_CC_RP_DEF:
+ case TYPEC_CC_RP_1_5:
+ case TYPEC_CC_RP_3_0:
+ rd_mda = rd_mda_value[cc_src_current[cc]];
+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
+ if (ret) {
+ dev_err(dev, "cannot set SRC measure value: %d\n", ret);
+ goto done;
+ }
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK,
+ FUSB_REG_MASK_BC_LVL |
+ FUSB_REG_MASK_COMP_CHNG,
+ FUSB_REG_MASK_BC_LVL);
+ if (ret) {
+ dev_err(dev, "cannot set SRC irq: %d\n", ret);
+ goto done;
+ }
+ chip->intr_comp_chng = true;
+ break;
+ case TYPEC_CC_RD:
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK,
+ FUSB_REG_MASK_BC_LVL |
+ FUSB_REG_MASK_COMP_CHNG,
+ FUSB_REG_MASK_COMP_CHNG);
+ if (ret) {
+ dev_err(dev, "cannot set SRC irq: %d\n", ret);
+ goto done;
+ }
+ chip->intr_bc_lvl = true;
+ break;
+ default:
+ break;
+ }
+done:
+ return ret;
+}
+
+static int fusb302_get_cc(struct udevice *dev, enum typec_cc_status *cc1,
+ enum typec_cc_status *cc2)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+
+ *cc1 = chip->cc1;
+ *cc2 = chip->cc2;
+ dev_dbg(dev, "get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1],
+ typec_cc_status_name[*cc2]);
+
+ return 0;
+}
+
+static int fusb302_set_vconn(struct udevice *dev, bool on)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+ u8 switches0_data = 0x00;
+ u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
+ FUSB_REG_SWITCHES0_VCONN_CC2;
+
+ if (chip->vconn_on == on) {
+ ret = 0;
+ dev_dbg(dev, "vconn is already %s\n", on ? "on" : "off");
+ goto done;
+ }
+ if (on) {
+ switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
+ FUSB_REG_SWITCHES0_VCONN_CC2 :
+ FUSB_REG_SWITCHES0_VCONN_CC1;
+ }
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0,
+ switches0_mask, switches0_data);
+ if (ret)
+ goto done;
+ dev_dbg(dev, "set vconn = %s\n", on ? "on" : "off");
+done:
+ return ret;
+}
+
+static int fusb302_set_vbus(struct udevice *dev, bool on, bool charge)
+{
+ return 0;
+}
+
+static int fusb302_pd_tx_flush(struct udevice *dev)
+{
+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0,
+ FUSB_REG_CONTROL0_TX_FLUSH);
+}
+
+static int fusb302_pd_rx_flush(struct udevice *dev)
+{
+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL1,
+ FUSB_REG_CONTROL1_RX_FLUSH);
+}
+
+static int fusb302_pd_set_auto_goodcrc(struct udevice *dev, bool on)
+{
+ if (on)
+ return fusb302_i2c_set_bits(dev, FUSB_REG_SWITCHES1,
+ FUSB_REG_SWITCHES1_AUTO_GCRC);
+ return fusb302_i2c_clear_bits(dev, FUSB_REG_SWITCHES1,
+ FUSB_REG_SWITCHES1_AUTO_GCRC);
+}
+
+static int fusb302_pd_set_interrupts(struct udevice *dev, bool on)
+{
+ int ret;
+ u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
+ u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
+ FUSB_REG_MASKA_HARDSENT |
+ FUSB_REG_MASKA_TX_SUCCESS |
+ FUSB_REG_MASKA_HARDRESET;
+ u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
+
+ ret = on ?
+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, mask_interrupts) :
+ fusb302_i2c_set_bits(dev, FUSB_REG_MASK, mask_interrupts);
+ if (ret)
+ return ret;
+ ret = on ?
+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, maska_interrupts) :
+ fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, maska_interrupts);
+ if (ret)
+ return ret;
+ ret = on ?
+ fusb302_i2c_clear_bits(dev, FUSB_REG_MASKB, maskb_interrupts) :
+ fusb302_i2c_set_bits(dev, FUSB_REG_MASKB, maskb_interrupts);
+ return ret;
+}
+
+static int fusb302_set_pd_rx(struct udevice *dev, bool on)
+{
+ int ret;
+
+ ret = fusb302_pd_rx_flush(dev);
+ if (ret) {
+ dev_err(dev, "cannot flush pd rx buffer: %d\n", ret);
+ goto done;
+ }
+ ret = fusb302_pd_tx_flush(dev);
+ if (ret) {
+ dev_err(dev, "cannot flush pd tx buffer: %d\n", ret);
+ goto done;
+ }
+ ret = fusb302_pd_set_auto_goodcrc(dev, on);
+ if (ret) {
+ dev_err(dev, "cannot turn %s auto GoodCRC: %d\n",
+ on ? "on" : "off", ret);
+ goto done;
+ }
+ ret = fusb302_pd_set_interrupts(dev, on);
+ if (ret) {
+ dev_err(dev, "cannot turn %s pd interrupts: %d\n",
+ on ? "on" : "off", ret);
+ goto done;
+ }
+ dev_dbg(dev, "set pd RX %s\n", on ? "on" : "off");
+done:
+ return ret;
+}
+
+static int fusb302_set_roles(struct udevice *dev, bool attached,
+ enum typec_role pwr, enum typec_data_role data)
+{
+ int ret;
+ u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
+ FUSB_REG_SWITCHES1_DATAROLE;
+ u8 switches1_data = 0x00;
+
+ if (pwr == TYPEC_SOURCE)
+ switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
+ if (data == TYPEC_HOST)
+ switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1,
+ switches1_mask, switches1_data);
+ if (ret) {
+ dev_err(dev, "unable to set pd header %s, %s, ret=%d\n",
+ typec_role_name[pwr], typec_data_role_name[data], ret);
+ goto done;
+ }
+ dev_dbg(dev, "pd header : %s, %s\n", typec_role_name[pwr],
+ typec_data_role_name[data]);
+done:
+
+ return ret;
+}
+
+static int fusb302_start_toggling(struct udevice *dev,
+ enum typec_port_type port_type,
+ enum typec_cc_status cc)
+{
+ enum toggling_mode mode = TOGGLING_MODE_OFF;
+ int ret;
+
+ switch (port_type) {
+ case TYPEC_PORT_SRC:
+ mode = TOGGLING_MODE_SRC;
+ break;
+ case TYPEC_PORT_SNK:
+ mode = TOGGLING_MODE_SNK;
+ break;
+ case TYPEC_PORT_DRP:
+ mode = TOGGLING_MODE_DRP;
+ break;
+ }
+
+ ret = fusb302_set_src_current(dev, cc_src_current[cc]);
+ if (ret) {
+ dev_err(dev, "unable to set src current %s, ret=%d",
+ typec_cc_status_name[cc], ret);
+ goto done;
+ }
+ ret = fusb302_set_toggling(dev, mode);
+ if (ret) {
+ dev_err(dev, "unable to start drp toggling: %d\n", ret);
+ goto done;
+ }
+ dev_info(dev, "fusb302 start drp toggling\n");
+done:
+
+ return ret;
+}
+
+static int fusb302_pd_send_message(struct udevice *dev,
+ const struct pd_message *msg)
+{
+ int ret;
+ /* SOP tokens */
+ u8 buf[40] = {FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1,
+ FUSB302_TKN_SYNC2};
+ u8 pos = 4;
+ int len;
+
+ len = pd_header_cnt_le(msg->header) * 4;
+ /* plug 2 for header */
+ len += 2;
+ if (len > FUSB302_MAX_MSG_LEN) {
+ dev_err(dev, "PD message too long %d (incl. header)", len);
+ return -EINVAL;
+ }
+ /* packsym tells the FUSB302 chip that the next X bytes are payload */
+ buf[pos++] = FUSB302_TKN_PACKSYM | (len & FUSB302_MAX_MSG_LEN);
+ memcpy(&buf[pos], &msg->header, sizeof(msg->header));
+ pos += sizeof(msg->header);
+
+ len -= 2;
+ memcpy(&buf[pos], msg->payload, len);
+ pos += len;
+
+ /* CRC */
+ buf[pos++] = FUSB302_TKN_JAMCRC;
+ /* EOP */
+ buf[pos++] = FUSB302_TKN_EOP;
+ /* turn tx off after sending message */
+ buf[pos++] = FUSB302_TKN_TXOFF;
+ /* start transmission */
+ buf[pos++] = FUSB302_TKN_TXON;
+
+ ret = fusb302_i2c_block_write(dev, FUSB_REG_FIFOS, pos, buf);
+ if (ret)
+ return ret;
+ dev_dbg(dev, "Send PD message (header=0x%x len=%d)\n", msg->header, len);
+
+ return ret;
+}
+
+static int fusb302_pd_send_hardreset(struct udevice *dev)
+{
+ return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3,
+ FUSB_REG_CONTROL3_SEND_HARDRESET);
+}
+
+static const char * const transmit_type_name[] = {
+ [TCPC_TX_SOP] = "SOP",
+ [TCPC_TX_SOP_PRIME] = "SOP'",
+ [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
+ [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
+ [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
+ [TCPC_TX_HARD_RESET] = "HARD_RESET",
+ [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
+ [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
+};
+
+static int fusb302_pd_transmit(struct udevice *dev, enum tcpm_transmit_type type,
+ const struct pd_message *msg, unsigned int negotiated_rev)
+{
+ int ret;
+
+ switch (type) {
+ case TCPC_TX_SOP:
+ /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */
+ ret = fusb302_enable_tx_auto_retries(dev, negotiated_rev > PD_REV20 ?
+ FUSB_REG_CONTROL3_N_RETRIES_2 :
+ FUSB_REG_CONTROL3_N_RETRIES_3);
+ if (ret)
+ dev_err(dev, "cannot update retry count: %d\n", ret);
+
+ ret = fusb302_pd_send_message(dev, msg);
+ if (ret)
+ dev_err(dev, "cannot send PD message: %d\n", ret);
+ break;
+ case TCPC_TX_HARD_RESET:
+ ret = fusb302_pd_send_hardreset(dev);
+ if (ret)
+ dev_err(dev, "cannot send hardreset: %d\n", ret);
+ break;
+ default:
+ dev_err(dev, "type %s not supported", transmit_type_name[type]);
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
+{
+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
+ return TYPEC_CC_RP_3_0;
+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
+ return TYPEC_CC_RP_1_5;
+ if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
+ return TYPEC_CC_RP_DEF;
+ return TYPEC_CC_OPEN;
+}
+
+static void fusb302_bc_lvl_handler(struct udevice *dev)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ enum typec_cc_status cc_status;
+ u8 status0, bc_lvl;
+ int ret;
+
+ if (!chip->intr_bc_lvl) {
+ dev_err(dev, "BC_LVL interrupt is turned off, abort\n");
+ goto done;
+ }
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
+ if (ret)
+ goto done;
+
+ dev_dbg(dev, "BC_LVL handler, status0 = 0x%02x\n", status0);
+ if (status0 & FUSB_REG_STATUS0_ACTIVITY)
+ dev_info(dev, "CC activities detected, delay handling\n");
+ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
+ cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
+ if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
+ if (chip->cc1 != cc_status) {
+ dev_dbg(dev, "cc1: %s -> %s\n",
+ typec_cc_status_name[chip->cc1],
+ typec_cc_status_name[cc_status]);
+ chip->cc1 = cc_status;
+ tcpm_cc_change(dev);
+ }
+ } else {
+ if (chip->cc2 != cc_status) {
+ dev_dbg(dev, "cc2: %s -> %s\n",
+ typec_cc_status_name[chip->cc2],
+ typec_cc_status_name[cc_status]);
+ chip->cc2 = cc_status;
+ tcpm_cc_change(dev);
+ }
+ }
+
+done:
+ return;
+}
+
+static int fusb302_enter_low_power_mode(struct udevice *dev,
+ bool attached, bool pd_capable)
+{
+ unsigned int reg;
+ int ret;
+
+ ret = fusb302_mask_interrupt(dev);
+ if (ret)
+ return ret;
+ if (attached && pd_capable)
+ reg = FUSB_REG_POWER_PWR_MEDIUM;
+ else if (attached)
+ reg = FUSB_REG_POWER_PWR_LOW;
+ else
+ reg = 0;
+
+ return fusb302_set_power_mode(dev, reg);
+}
+
+static const char * const cc_polarity_name[] = {
+ [TYPEC_POLARITY_CC1] = "Polarity_CC1",
+ [TYPEC_POLARITY_CC2] = "Polarity_CC2",
+};
+
+static int fusb302_set_cc_polarity_and_pull(struct udevice *dev,
+ enum typec_cc_polarity cc_polarity,
+ bool pull_up, bool pull_down)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+ u8 switches0_data = 0x00;
+ u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
+ FUSB_REG_SWITCHES1_TXCC2_EN;
+ u8 switches1_data = 0x00;
+
+ if (pull_down)
+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
+ FUSB_REG_SWITCHES0_CC2_PD_EN;
+
+ if (cc_polarity == TYPEC_POLARITY_CC1) {
+ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
+ if (chip->vconn_on)
+ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
+ if (pull_up)
+ switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
+ switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
+ } else {
+ switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
+ if (chip->vconn_on)
+ switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
+ if (pull_up)
+ switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
+ switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
+ }
+ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1,
+ switches1_mask, switches1_data);
+ if (ret)
+ return ret;
+ chip->cc_polarity = cc_polarity;
+
+ return ret;
+}
+
+static int fusb302_handle_togdone_snk(struct udevice *dev,
+ u8 togdone_result)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ int ret;
+ u8 status0;
+ u8 bc_lvl;
+ enum typec_cc_polarity cc_polarity;
+ enum typec_cc_status cc_status_active, cc1, cc2;
+
+ /* set polarity and pull_up, pull_down */
+ cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
+ TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
+ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, false, true);
+ if (ret) {
+ dev_err(dev, "cannot set cc polarity %s, ret = %d\n",
+ cc_polarity_name[cc_polarity], ret);
+ return ret;
+ }
+ /* fusb302_set_cc_polarity() has set the correct measure block */
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
+ if (ret < 0)
+ return ret;
+ bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
+ cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
+ /* restart toggling if the cc status on the active line is OPEN */
+ if (cc_status_active == TYPEC_CC_OPEN) {
+ dev_info(dev, "restart toggling as CC_OPEN detected\n");
+ ret = fusb302_set_toggling(dev, chip->toggling_mode);
+ return ret;
+ }
+ /* update tcpm with the new cc value */
+ cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
+ cc_status_active : TYPEC_CC_OPEN;
+ cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
+ cc_status_active : TYPEC_CC_OPEN;
+ if (chip->cc1 != cc1 || chip->cc2 != cc2) {
+ chip->cc1 = cc1;
+ chip->cc2 = cc2;
+ tcpm_cc_change(dev);
+ }
+ /* turn off toggling */
+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
+ if (ret) {
+ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret);
+ return ret;
+ }
+ /* unmask bc_lvl interrupt */
+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
+ if (ret) {
+ dev_err(dev, "cannot unmask bc_lcl irq, ret=%d\n", ret);
+ return ret;
+ }
+ chip->intr_bc_lvl = true;
+ dev_dbg(dev, "detected cc1=%s, cc2=%s\n",
+ typec_cc_status_name[cc1],
+ typec_cc_status_name[cc2]);
+
+ return ret;
+}
+
+/* On error returns < 0, otherwise a typec_cc_status value */
+static int fusb302_get_src_cc_status(struct udevice *dev,
+ enum typec_cc_polarity cc_polarity,
+ enum typec_cc_status *cc)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ u8 ra_mda = ra_mda_value[chip->src_current_status];
+ u8 rd_mda = rd_mda_value[chip->src_current_status];
+ u8 switches0_data, status0;
+ int ret;
+
+ /* Step 1: Set switches so that we measure the right CC pin */
+ switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
+ FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
+ FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
+ ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data);
+ if (ret < 0)
+ return ret;
+
+ fusb302_i2c_read(dev, FUSB_REG_SWITCHES0, &status0);
+ dev_dbg(dev, "get_src_cc_status switches: 0x%0x", status0);
+
+ /* Step 2: Set compararator volt to differentiate between Open and Rd */
+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
+ if (ret)
+ return ret;
+
+ udelay(100);
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
+ if (ret)
+ return ret;
+
+ dev_dbg(dev, "get_src_cc_status rd_mda status0: 0x%0x", status0);
+ if (status0 & FUSB_REG_STATUS0_COMP) {
+ *cc = TYPEC_CC_OPEN;
+ return 0;
+ }
+
+ /* Step 3: Set compararator input to differentiate between Rd and Ra. */
+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, ra_mda);
+ if (ret)
+ return ret;
+
+ udelay(100);
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
+ if (ret)
+ return ret;
+
+ dev_dbg(dev, "get_src_cc_status ra_mda status0: 0x%0x", status0);
+ if (status0 & FUSB_REG_STATUS0_COMP)
+ *cc = TYPEC_CC_RD;
+ else
+ *cc = TYPEC_CC_RA;
+
+ return 0;
+}
+
+static int fusb302_handle_togdone_src(struct udevice *dev,
+ u8 togdone_result)
+{
+ /*
+ * - set polarity (measure cc, vconn, tx)
+ * - set pull_up, pull_down
+ * - set cc1, cc2, and update to tcpm state machine
+ * - set I_COMP interrupt on
+ */
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ u8 rd_mda = rd_mda_value[chip->src_current_status];
+ enum toggling_mode toggling_mode = chip->toggling_mode;
+ enum typec_cc_polarity cc_polarity;
+ enum typec_cc_status cc1, cc2;
+ int ret;
+
+ /*
+ * The toggle-engine will stop in a src state if it sees either Ra or
+ * Rd. Determine the status for both CC pins, starting with the one
+ * where toggling stopped, as that is where the switches point now.
+ */
+ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1);
+ else
+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2);
+ if (ret)
+ return ret;
+ /* we must turn off toggling before we can measure the other pin */
+ ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
+ if (ret) {
+ dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret);
+ return ret;
+ }
+ /* get the status of the other pin */
+ if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2);
+ else
+ ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1);
+ if (ret)
+ return ret;
+
+ /* determine polarity based on the status of both pins */
+ if (cc1 == TYPEC_CC_RD && (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
+ cc_polarity = TYPEC_POLARITY_CC1;
+ } else if (cc2 == TYPEC_CC_RD &&
+ (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
+ cc_polarity = TYPEC_POLARITY_CC2;
+ } else {
+ dev_err(dev, "unexpected CC status cc1=%s, cc2=%s, restarting toggling\n",
+ typec_cc_status_name[cc1],
+ typec_cc_status_name[cc2]);
+ return fusb302_set_toggling(dev, toggling_mode);
+ }
+ /* set polarity and pull_up, pull_down */
+ ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, true, false);
+ if (ret < 0) {
+ dev_err(dev, "cannot set cc polarity %s, ret=%d\n",
+ cc_polarity_name[cc_polarity], ret);
+ return ret;
+ }
+ /* update tcpm with the new cc value */
+ if (chip->cc1 != cc1 || chip->cc2 != cc2) {
+ chip->cc1 = cc1;
+ chip->cc2 = cc2;
+ tcpm_cc_change(dev);
+ }
+ /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
+ ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
+ if (ret)
+ return ret;
+ /* unmask comp_chng interrupt */
+ ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK,
+ FUSB_REG_MASK_COMP_CHNG);
+ if (ret) {
+ dev_err(dev, "cannot unmask comp_chng irq, ret=%d\n", ret);
+ return ret;
+ }
+ chip->intr_comp_chng = true;
+ dev_dbg(dev, "detected cc1=%s, cc2=%s\n",
+ typec_cc_status_name[cc1],
+ typec_cc_status_name[cc2]);
+
+ return ret;
+}
+
+static int fusb302_handle_togdone(struct udevice *dev)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ u8 togdone_result, status1a;
+ int ret;
+
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS1A, &status1a);
+ if (ret < 0)
+ return ret;
+ togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
+ FUSB_REG_STATUS1A_TOGSS_MASK;
+ switch (togdone_result) {
+ case FUSB_REG_STATUS1A_TOGSS_SNK1:
+ case FUSB_REG_STATUS1A_TOGSS_SNK2:
+ return fusb302_handle_togdone_snk(dev, togdone_result);
+ case FUSB_REG_STATUS1A_TOGSS_SRC1:
+ case FUSB_REG_STATUS1A_TOGSS_SRC2:
+ return fusb302_handle_togdone_src(dev, togdone_result);
+ case FUSB_REG_STATUS1A_TOGSS_AA:
+ /* doesn't support */
+ dev_err(dev, "AudioAccessory not supported\n");
+ fusb302_set_toggling(dev, chip->toggling_mode);
+ break;
+ default:
+ dev_err(dev, "TOGDONE with an invalid state: %d\n",
+ togdone_result);
+ fusb302_set_toggling(dev, chip->toggling_mode);
+ break;
+ }
+ return ret;
+}
+
+static int fusb302_pd_reset(struct udevice *dev)
+{
+ return fusb302_i2c_set_bits(dev, FUSB_REG_RESET,
+ FUSB_REG_RESET_PD_RESET);
+}
+
+static int fusb302_pd_read_message(struct udevice *dev,
+ struct pd_message *msg)
+{
+ int len, ret;
+ u8 crc[4];
+ u8 token;
+
+ /* first SOP token */
+ ret = fusb302_i2c_read(dev, FUSB_REG_FIFOS, &token);
+ if (ret)
+ return ret;
+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 2,
+ (u8 *)&msg->header);
+ if (ret)
+ return ret;
+ len = pd_header_cnt_le(msg->header) * 4;
+ /* add 4 to length to include the CRC */
+ if (len > PD_MAX_PAYLOAD * 4) {
+ dev_err(dev, "PD message too long %d\n", len);
+ return -EINVAL;
+ }
+ if (len > 0) {
+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, len,
+ (u8 *)msg->payload);
+ if (ret)
+ return ret;
+ }
+ /* another 4 bytes to read CRC out */
+ ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 4, crc);
+ if (ret)
+ return ret;
+ dev_dbg(dev, "Received PD message (header=0x%x len=%d)\n", msg->header, len);
+
+ /*
+ * Check if we've read off a GoodCRC message. If so then indicate to
+ * TCPM that the previous transmission has completed. Otherwise we pass
+ * the received message over to TCPM for processing.
+ *
+ * We make this check here instead of basing the reporting decision on
+ * the IRQ event type, as it's possible for the chip to report the
+ * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
+ * to check the message type to ensure correct reporting to TCPM.
+ */
+ if (!len && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
+ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS);
+ else
+ tcpm_pd_receive(dev, msg);
+
+ return ret;
+}
+
+static void fusb302_interrupt_handle(struct udevice *dev)
+{
+ struct fusb302_chip *chip = dev_get_priv(dev);
+ u8 interrupt;
+ u8 interrupta;
+ u8 interruptb;
+ u8 status0;
+ bool vbus_present;
+ bool comp_result;
+ bool intr_togdone;
+ bool intr_bc_lvl;
+ bool intr_comp_chng;
+ struct pd_message pd_msg;
+ int ret;
+
+ /* grab a snapshot of intr flags */
+ intr_togdone = chip->intr_togdone;
+ intr_bc_lvl = chip->intr_bc_lvl;
+ intr_comp_chng = chip->intr_comp_chng;
+
+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPT, &interrupt);
+ if (ret)
+ return;
+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTA, &interrupta);
+ if (ret)
+ return;
+ ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTB, &interruptb);
+ if (ret)
+ return;
+ ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
+ if (ret)
+ return;
+
+ /*
+ * Since we are polling the IRQs, avoid printing messages when there
+ * no interrupts at all to avoid spamming the log.
+ */
+ if (interrupt != 0 || interrupta != 0 || interruptb != 0)
+ dev_dbg(dev, "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n",
+ interrupt, interrupta, interruptb, status0);
+
+ if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
+ vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
+ dev_dbg(dev, "IRQ: VBUS_OK, vbus=%s\n",
+ vbus_present ? "On" : "Off");
+ if (vbus_present != chip->vbus_present) {
+ chip->vbus_present = vbus_present;
+ tcpm_vbus_change(dev);
+ }
+ }
+
+ if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
+ dev_dbg(dev, "IRQ: TOGDONE\n");
+ ret = fusb302_handle_togdone(dev);
+ if (ret) {
+ dev_err(dev, "handle togdone error: %d\n", ret);
+ return;
+ }
+ }
+
+ if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
+ dev_dbg(dev, "IRQ: BC_LVL, handler pending\n");
+ fusb302_bc_lvl_handler(dev);
+ }
+
+ if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
+ comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
+ dev_dbg(dev, "IRQ: COMP_CHNG, comp=%s\n",
+ comp_result ? "true" : "false");
+ if (comp_result) {
+ /* cc level > Rd_threshold, detach */
+ chip->cc1 = TYPEC_CC_OPEN;
+ chip->cc2 = TYPEC_CC_OPEN;
+ tcpm_cc_change(dev);
+ }
+ }
+
+ if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
+ dev_dbg(dev, "IRQ: PD collision\n");
+ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED);
+ }
+
+ if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
+ dev_dbg(dev, "IRQ: PD retry failed\n");
+ tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED);
+ }
+
+ if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
+ dev_dbg(dev, "IRQ: PD hardreset sent\n");
+ ret = fusb302_pd_reset(dev);
+ if (ret) {
+ dev_err(dev, "cannot PD reset, ret=%d\n", ret);
+ return;
+ }
+ tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS);
+ }
+
+ if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
+ dev_dbg(dev, "IRQ: PD tx success\n");
+ ret = fusb302_pd_read_message(dev, &pd_msg);
+ if (ret) {
+ dev_err(dev, "cannot read in PD message, ret=%d\n", ret);
+ return;
+ }
+ }
+
+ if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
+ dev_dbg(dev, "IRQ: PD received hardreset\n");
+ ret = fusb302_pd_reset(dev);
+ if (ret) {
+ dev_err(dev, "cannot PD reset, ret=%d\n", ret);
+ return;
+ }
+ tcpm_pd_hard_reset(dev);
+ }
+
+ if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
+ dev_dbg(dev, "IRQ: PD sent good CRC\n");
+ ret = fusb302_pd_read_message(dev, &pd_msg);
+ if (ret) {
+ dev_err(dev, "cannot read in PD message, ret=%d\n", ret);
+ return;
+ }
+ }
+}
+
+static void fusb302_poll_event(struct udevice *dev)
+{
+ fusb302_interrupt_handle(dev);
+}
+
+static int fusb302_get_connector_node(struct udevice *dev, ofnode *connector_node)
+{
+ *connector_node = dev_read_subnode(dev, "connector");
+ if (!ofnode_valid(*connector_node)) {
+ dev_err(dev, "'connector' node is not found\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static struct dm_tcpm_ops fusb302_ops = {
+ .get_connector_node = fusb302_get_connector_node,
+ .init = fusb302_init,
+ .get_vbus = fusb302_get_vbus,
+ .set_cc = fusb302_set_cc,
+ .get_cc = fusb302_get_cc,
+ .set_vconn = fusb302_set_vconn,
+ .set_vbus = fusb302_set_vbus,
+ .set_pd_rx = fusb302_set_pd_rx,
+ .set_roles = fusb302_set_roles,
+ .start_toggling = fusb302_start_toggling,
+ .pd_transmit = fusb302_pd_transmit,
+ .poll_event = fusb302_poll_event,
+ .enter_low_power_mode = fusb302_enter_low_power_mode,
+};
+
+static const struct udevice_id fusb302_ids[] = {
+ { .compatible = "fcs,fusb302" },
+ { }
+};
+
+U_BOOT_DRIVER(fusb302) = {
+ .name = "fusb302",
+ .id = UCLASS_TCPM,
+ .of_match = fusb302_ids,
+ .ops = &fusb302_ops,
+ .priv_auto = sizeof(struct fusb302_chip),
+};
diff --git a/drivers/usb/tcpm/fusb302_reg.h b/drivers/usb/tcpm/fusb302_reg.h
new file mode 100644
index 00000000000..edc0e4b0f1e
--- /dev/null
+++ b/drivers/usb/tcpm/fusb302_reg.h
@@ -0,0 +1,177 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2016-2017 Google, Inc
+ *
+ * Fairchild FUSB302 Type-C Chip Driver
+ */
+
+#ifndef FUSB302_REG_H
+#define FUSB302_REG_H
+
+#define FUSB_REG_DEVICE_ID 0x01
+#define FUSB_REG_SWITCHES0 0x02
+#define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
+#define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
+#define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
+#define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
+#define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
+#define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
+#define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
+#define FUSB_REG_SWITCHES0_CC1_PD_EN BIT(0)
+#define FUSB_REG_SWITCHES1 0x03
+#define FUSB_REG_SWITCHES1_POWERROLE BIT(7)
+#define FUSB_REG_SWITCHES1_SPECREV1 BIT(6)
+#define FUSB_REG_SWITCHES1_SPECREV0 BIT(5)
+#define FUSB_REG_SWITCHES1_DATAROLE BIT(4)
+#define FUSB_REG_SWITCHES1_AUTO_GCRC BIT(2)
+#define FUSB_REG_SWITCHES1_TXCC2_EN BIT(1)
+#define FUSB_REG_SWITCHES1_TXCC1_EN BIT(0)
+#define FUSB_REG_MEASURE 0x04
+#define FUSB_REG_MEASURE_MDAC5 BIT(7)
+#define FUSB_REG_MEASURE_MDAC4 BIT(6)
+#define FUSB_REG_MEASURE_MDAC3 BIT(5)
+#define FUSB_REG_MEASURE_MDAC2 BIT(4)
+#define FUSB_REG_MEASURE_MDAC1 BIT(3)
+#define FUSB_REG_MEASURE_MDAC0 BIT(2)
+#define FUSB_REG_MEASURE_VBUS BIT(1)
+#define FUSB_REG_MEASURE_XXXX5 BIT(0)
+#define FUSB_REG_CONTROL0 0x06
+#define FUSB_REG_CONTROL0_TX_FLUSH BIT(6)
+#define FUSB_REG_CONTROL0_INT_MASK BIT(5)
+#define FUSB_REG_CONTROL0_HOST_CUR_MASK (0xC)
+#define FUSB_REG_CONTROL0_HOST_CUR_HIGH (0xC)
+#define FUSB_REG_CONTROL0_HOST_CUR_MED (0x8)
+#define FUSB_REG_CONTROL0_HOST_CUR_DEF (0x4)
+#define FUSB_REG_CONTROL0_TX_START BIT(0)
+#define FUSB_REG_CONTROL1 0x07
+#define FUSB_REG_CONTROL1_ENSOP2DB BIT(6)
+#define FUSB_REG_CONTROL1_ENSOP1DB BIT(5)
+#define FUSB_REG_CONTROL1_BIST_MODE2 BIT(4)
+#define FUSB_REG_CONTROL1_RX_FLUSH BIT(2)
+#define FUSB_REG_CONTROL1_ENSOP2 BIT(1)
+#define FUSB_REG_CONTROL1_ENSOP1 BIT(0)
+#define FUSB_REG_CONTROL2 0x08
+#define FUSB_REG_CONTROL2_MODE BIT(1)
+#define FUSB_REG_CONTROL2_MODE_MASK (0x6)
+#define FUSB_REG_CONTROL2_MODE_DFP (0x6)
+#define FUSB_REG_CONTROL2_MODE_UFP (0x4)
+#define FUSB_REG_CONTROL2_MODE_DRP (0x2)
+#define FUSB_REG_CONTROL2_MODE_NONE (0x0)
+#define FUSB_REG_CONTROL2_TOGGLE BIT(0)
+#define FUSB_REG_CONTROL3 0x09
+#define FUSB_REG_CONTROL3_SEND_HARDRESET BIT(6)
+#define FUSB_REG_CONTROL3_BIST_TMODE BIT(5) /* 302B Only */
+#define FUSB_REG_CONTROL3_AUTO_HARDRESET BIT(4)
+#define FUSB_REG_CONTROL3_AUTO_SOFTRESET BIT(3)
+#define FUSB_REG_CONTROL3_N_RETRIES BIT(1)
+#define FUSB_REG_CONTROL3_N_RETRIES_MASK (0x6)
+#define FUSB_REG_CONTROL3_N_RETRIES_3 (0x6)
+#define FUSB_REG_CONTROL3_N_RETRIES_2 (0x4)
+#define FUSB_REG_CONTROL3_N_RETRIES_1 (0x2)
+#define FUSB_REG_CONTROL3_AUTO_RETRY BIT(0)
+#define FUSB_REG_MASK 0x0A
+#define FUSB_REG_MASK_VBUSOK BIT(7)
+#define FUSB_REG_MASK_ACTIVITY BIT(6)
+#define FUSB_REG_MASK_COMP_CHNG BIT(5)
+#define FUSB_REG_MASK_CRC_CHK BIT(4)
+#define FUSB_REG_MASK_ALERT BIT(3)
+#define FUSB_REG_MASK_WAKE BIT(2)
+#define FUSB_REG_MASK_COLLISION BIT(1)
+#define FUSB_REG_MASK_BC_LVL BIT(0)
+#define FUSB_REG_POWER 0x0B
+#define FUSB_REG_POWER_PWR BIT(0)
+#define FUSB_REG_POWER_PWR_LOW 0x1
+#define FUSB_REG_POWER_PWR_MEDIUM 0x3
+#define FUSB_REG_POWER_PWR_HIGH 0x7
+#define FUSB_REG_POWER_PWR_ALL 0xF
+#define FUSB_REG_RESET 0x0C
+#define FUSB_REG_RESET_PD_RESET BIT(1)
+#define FUSB_REG_RESET_SW_RESET BIT(0)
+#define FUSB_REG_MASKA 0x0E
+#define FUSB_REG_MASKA_OCP_TEMP BIT(7)
+#define FUSB_REG_MASKA_TOGDONE BIT(6)
+#define FUSB_REG_MASKA_SOFTFAIL BIT(5)
+#define FUSB_REG_MASKA_RETRYFAIL BIT(4)
+#define FUSB_REG_MASKA_HARDSENT BIT(3)
+#define FUSB_REG_MASKA_TX_SUCCESS BIT(2)
+#define FUSB_REG_MASKA_SOFTRESET BIT(1)
+#define FUSB_REG_MASKA_HARDRESET BIT(0)
+#define FUSB_REG_MASKB 0x0F
+#define FUSB_REG_MASKB_GCRCSENT BIT(0)
+#define FUSB_REG_STATUS0A 0x3C
+#define FUSB_REG_STATUS0A_SOFTFAIL BIT(5)
+#define FUSB_REG_STATUS0A_RETRYFAIL BIT(4)
+#define FUSB_REG_STATUS0A_POWER BIT(2)
+#define FUSB_REG_STATUS0A_RX_SOFT_RESET BIT(1)
+#define FUSB_REG_STATUS0A_RX_HARD_RESET BIT(0)
+#define FUSB_REG_STATUS1A 0x3D
+#define FUSB_REG_STATUS1A_TOGSS BIT(3)
+#define FUSB_REG_STATUS1A_TOGSS_RUNNING 0x0
+#define FUSB_REG_STATUS1A_TOGSS_SRC1 0x1
+#define FUSB_REG_STATUS1A_TOGSS_SRC2 0x2
+#define FUSB_REG_STATUS1A_TOGSS_SNK1 0x5
+#define FUSB_REG_STATUS1A_TOGSS_SNK2 0x6
+#define FUSB_REG_STATUS1A_TOGSS_AA 0x7
+#define FUSB_REG_STATUS1A_TOGSS_POS (3)
+#define FUSB_REG_STATUS1A_TOGSS_MASK (0x7)
+#define FUSB_REG_STATUS1A_RXSOP2DB BIT(2)
+#define FUSB_REG_STATUS1A_RXSOP1DB BIT(1)
+#define FUSB_REG_STATUS1A_RXSOP BIT(0)
+#define FUSB_REG_INTERRUPTA 0x3E
+#define FUSB_REG_INTERRUPTA_OCP_TEMP BIT(7)
+#define FUSB_REG_INTERRUPTA_TOGDONE BIT(6)
+#define FUSB_REG_INTERRUPTA_SOFTFAIL BIT(5)
+#define FUSB_REG_INTERRUPTA_RETRYFAIL BIT(4)
+#define FUSB_REG_INTERRUPTA_HARDSENT BIT(3)
+#define FUSB_REG_INTERRUPTA_TX_SUCCESS BIT(2)
+#define FUSB_REG_INTERRUPTA_SOFTRESET BIT(1)
+#define FUSB_REG_INTERRUPTA_HARDRESET BIT(0)
+#define FUSB_REG_INTERRUPTB 0x3F
+#define FUSB_REG_INTERRUPTB_GCRCSENT BIT(0)
+#define FUSB_REG_STATUS0 0x40
+#define FUSB_REG_STATUS0_VBUSOK BIT(7)
+#define FUSB_REG_STATUS0_ACTIVITY BIT(6)
+#define FUSB_REG_STATUS0_COMP BIT(5)
+#define FUSB_REG_STATUS0_CRC_CHK BIT(4)
+#define FUSB_REG_STATUS0_ALERT BIT(3)
+#define FUSB_REG_STATUS0_WAKE BIT(2)
+#define FUSB_REG_STATUS0_BC_LVL_MASK 0x03
+#define FUSB_REG_STATUS0_BC_LVL_0_200 0x0
+#define FUSB_REG_STATUS0_BC_LVL_200_600 0x1
+#define FUSB_REG_STATUS0_BC_LVL_600_1230 0x2
+#define FUSB_REG_STATUS0_BC_LVL_1230_MAX 0x3
+#define FUSB_REG_STATUS0_BC_LVL1 BIT(1)
+#define FUSB_REG_STATUS0_BC_LVL0 BIT(0)
+#define FUSB_REG_STATUS1 0x41
+#define FUSB_REG_STATUS1_RXSOP2 BIT(7)
+#define FUSB_REG_STATUS1_RXSOP1 BIT(6)
+#define FUSB_REG_STATUS1_RX_EMPTY BIT(5)
+#define FUSB_REG_STATUS1_RX_FULL BIT(4)
+#define FUSB_REG_STATUS1_TX_EMPTY BIT(3)
+#define FUSB_REG_STATUS1_TX_FULL BIT(2)
+#define FUSB_REG_INTERRUPT 0x42
+#define FUSB_REG_INTERRUPT_VBUSOK BIT(7)
+#define FUSB_REG_INTERRUPT_ACTIVITY BIT(6)
+#define FUSB_REG_INTERRUPT_COMP_CHNG BIT(5)
+#define FUSB_REG_INTERRUPT_CRC_CHK BIT(4)
+#define FUSB_REG_INTERRUPT_ALERT BIT(3)
+#define FUSB_REG_INTERRUPT_WAKE BIT(2)
+#define FUSB_REG_INTERRUPT_COLLISION BIT(1)
+#define FUSB_REG_INTERRUPT_BC_LVL BIT(0)
+#define FUSB_REG_FIFOS 0x43
+
+/* Tokens defined for the FUSB302 TX FIFO */
+enum fusb302_txfifo_tokens {
+ FUSB302_TKN_TXON = 0xA1,
+ FUSB302_TKN_SYNC1 = 0x12,
+ FUSB302_TKN_SYNC2 = 0x13,
+ FUSB302_TKN_SYNC3 = 0x1B,
+ FUSB302_TKN_RST1 = 0x15,
+ FUSB302_TKN_RST2 = 0x16,
+ FUSB302_TKN_PACKSYM = 0x80,
+ FUSB302_TKN_JAMCRC = 0xFF,
+ FUSB302_TKN_EOP = 0x14,
+ FUSB302_TKN_TXOFF = 0xFE,
+};
+
+#endif
diff --git a/drivers/usb/tcpm/tcpm-internal.h b/drivers/usb/tcpm/tcpm-internal.h
new file mode 100644
index 00000000000..56144209002
--- /dev/null
+++ b/drivers/usb/tcpm/tcpm-internal.h
@@ -0,0 +1,173 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright 2015-2017 Google, Inc
+ * Copyright 2024 Collabora
+ */
+
+#ifndef __LINUX_USB_TCPM_INTERNAL_H
+#define __LINUX_USB_TCPM_INTERNAL_H
+
+#define FOREACH_TCPM_STATE(S) \
+ S(INVALID_STATE), \
+ S(TOGGLING), \
+ S(SRC_UNATTACHED), \
+ S(SRC_ATTACH_WAIT), \
+ S(SRC_ATTACHED), \
+ S(SRC_STARTUP), \
+ S(SRC_SEND_CAPABILITIES), \
+ S(SRC_SEND_CAPABILITIES_TIMEOUT), \
+ S(SRC_NEGOTIATE_CAPABILITIES), \
+ S(SRC_TRANSITION_SUPPLY), \
+ S(SRC_READY), \
+ S(SRC_WAIT_NEW_CAPABILITIES), \
+ \
+ S(SNK_UNATTACHED), \
+ S(SNK_ATTACH_WAIT), \
+ S(SNK_DEBOUNCED), \
+ S(SNK_ATTACHED), \
+ S(SNK_STARTUP), \
+ S(SNK_DISCOVERY), \
+ S(SNK_DISCOVERY_DEBOUNCE), \
+ S(SNK_DISCOVERY_DEBOUNCE_DONE), \
+ S(SNK_WAIT_CAPABILITIES), \
+ S(SNK_NEGOTIATE_CAPABILITIES), \
+ S(SNK_TRANSITION_SINK), \
+ S(SNK_TRANSITION_SINK_VBUS), \
+ S(SNK_READY), \
+ \
+ S(HARD_RESET_SEND), \
+ S(HARD_RESET_START), \
+ S(SRC_HARD_RESET_VBUS_OFF), \
+ S(SRC_HARD_RESET_VBUS_ON), \
+ S(SNK_HARD_RESET_SINK_OFF), \
+ S(SNK_HARD_RESET_WAIT_VBUS), \
+ S(SNK_HARD_RESET_SINK_ON), \
+ \
+ S(SOFT_RESET), \
+ S(SOFT_RESET_SEND), \
+ \
+ S(DR_SWAP_ACCEPT), \
+ S(DR_SWAP_CHANGE_DR), \
+ \
+ S(ERROR_RECOVERY), \
+ S(PORT_RESET), \
+ S(PORT_RESET_WAIT_OFF)
+
+#define GENERATE_TCPM_ENUM(e) e
+#define GENERATE_TCPM_STRING(s) #s
+#define TCPM_POLL_EVENT_TIME_OUT 2000
+
+enum tcpm_state {
+ FOREACH_TCPM_STATE(GENERATE_TCPM_ENUM)
+};
+
+enum pd_msg_request {
+ PD_MSG_NONE = 0,
+ PD_MSG_CTRL_REJECT,
+ PD_MSG_CTRL_WAIT,
+ PD_MSG_CTRL_NOT_SUPP,
+ PD_MSG_DATA_SINK_CAP,
+ PD_MSG_DATA_SOURCE_CAP,
+};
+
+struct tcpm_port {
+ enum typec_port_type typec_type;
+ int typec_prefer_role;
+
+ enum typec_role vconn_role;
+ enum typec_role pwr_role;
+ enum typec_data_role data_role;
+
+ struct typec_partner *partner;
+
+ enum typec_cc_status cc_req;
+ enum typec_cc_status cc1;
+ enum typec_cc_status cc2;
+ enum typec_cc_polarity polarity;
+
+ bool attached;
+ bool connected;
+ int poll_event_cnt;
+ enum typec_port_type port_type;
+
+ /*
+ * Set to true when vbus is greater than VSAFE5V min.
+ * Set to false when vbus falls below vSinkDisconnect max threshold.
+ */
+ bool vbus_present;
+
+ /*
+ * Set to true when vbus is less than VSAFE0V max.
+ * Set to false when vbus is greater than VSAFE0V max.
+ */
+ bool vbus_vsafe0v;
+
+ bool vbus_never_low;
+ bool vbus_source;
+ bool vbus_charge;
+
+ int try_role;
+
+ enum pd_msg_request queued_message;
+
+ enum tcpm_state enter_state;
+ enum tcpm_state prev_state;
+ enum tcpm_state state;
+ enum tcpm_state delayed_state;
+ unsigned long delay_ms;
+
+ bool state_machine_running;
+
+ bool tx_complete;
+ enum tcpm_transmit_status tx_status;
+
+ unsigned int negotiated_rev;
+ unsigned int message_id;
+ unsigned int caps_count;
+ unsigned int hard_reset_count;
+ bool pd_capable;
+ bool explicit_contract;
+ unsigned int rx_msgid;
+
+ /* Partner capabilities/requests */
+ u32 sink_request;
+ u32 source_caps[PDO_MAX_OBJECTS];
+ unsigned int nr_source_caps;
+ u32 sink_caps[PDO_MAX_OBJECTS];
+ unsigned int nr_sink_caps;
+
+ /*
+ * whether to wait for the Type-C device to send the DR_SWAP Message flag
+ * For Type-C device with Dual-Role Power and Dual-Role Data, the port side
+ * is used as sink + ufp, then the tcpm framework needs to wait for Type-C
+ * device to initiate DR_swap Message.
+ */
+ bool wait_dr_swap_message;
+
+ /* Local capabilities */
+ u32 src_pdo[PDO_MAX_OBJECTS];
+ unsigned int nr_src_pdo;
+ u32 snk_pdo[PDO_MAX_OBJECTS];
+ unsigned int nr_snk_pdo;
+
+ unsigned int operating_snk_mw;
+ bool update_sink_caps;
+
+ /* Requested current / voltage to the port partner */
+ u32 req_current_limit;
+ u32 req_supply_voltage;
+ /* Actual current / voltage limit of the local port */
+ u32 current_limit;
+ u32 supply_voltage;
+
+ /* port belongs to a self powered device */
+ bool self_powered;
+
+ unsigned long delay_target;
+};
+
+extern const char * const tcpm_states[];
+
+int tcpm_post_probe(struct udevice *dev);
+
+#endif
diff --git a/drivers/usb/tcpm/tcpm-uclass.c b/drivers/usb/tcpm/tcpm-uclass.c
new file mode 100644
index 00000000000..d4fe260e0db
--- /dev/null
+++ b/drivers/usb/tcpm/tcpm-uclass.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 Collabora Ltd.
+ *
+ * USB Power Delivery protocol stack.
+ */
+
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <dm/uclass.h>
+#include <linux/err.h>
+#include <usb/tcpm.h>
+#include "tcpm-internal.h"
+
+int tcpm_get_voltage(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->supply_voltage;
+}
+
+int tcpm_get_current(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->current_limit;
+}
+
+enum typec_orientation tcpm_get_orientation(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ switch (port->polarity) {
+ case TYPEC_POLARITY_CC1:
+ return TYPEC_ORIENTATION_NORMAL;
+ case TYPEC_POLARITY_CC2:
+ return TYPEC_ORIENTATION_REVERSE;
+ default:
+ return TYPEC_ORIENTATION_NONE;
+ }
+}
+
+const char *tcpm_get_state(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return tcpm_states[port->state];
+}
+
+int tcpm_get_pd_rev(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->negotiated_rev;
+}
+
+enum typec_role tcpm_get_pwr_role(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->pwr_role;
+}
+
+enum typec_data_role tcpm_get_data_role(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->data_role;
+}
+
+bool tcpm_is_connected(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return port->connected;
+}
+
+int tcpm_get(int index, struct udevice **devp)
+{
+ return uclass_get_device(UCLASS_TCPM, index, devp);
+}
+
+static int tcpm_post_bind(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ const char *cap_str;
+ ofnode node;
+ int ret;
+
+ /*
+ * USB Power Delivery (USB PD) specification requires, that communication
+ * with a sink happens within roughly 5 seconds. Otherwise the source
+ * might assume that the sink does not support USB PD. Starting to do
+ * USB PD communication after that results in a hard reset, which briefly
+ * removes any power from the USB-C port.
+ *
+ * On systems with alternative power supplies this is not an issue, but
+ * systems, which get soleley powered through their USB-C port will end
+ * up losing their power supply and doing a board level reset. The hard
+ * reset will also restart the 5 second timeout. That means a operating
+ * system initializing USB PD will put the system into a boot loop when
+ * it takes more than 5 seconds from cold boot to the operating system
+ * starting to transmit USB PD messages.
+ *
+ * The issue can be avoided by doing the initial USB PD communication
+ * in U-Boot. The operating system can then re-negotiate by doing a
+ * soft reset, which does not trigger removal of the supply voltage.
+ *
+ * Since the TCPM state machine is quite complex and depending on the
+ * remote side can take quite some time to finish, this tries to limit
+ * the automatic probing to systems probably relying on power being
+ * provided by the USB-C port(s):
+ *
+ * 1. self-powered devices won't reset when the USB-C port looses power
+ * 2. if the power is allowed to go into anything else than sink mode
+ * it is not the only power source
+ */
+ ret = drvops->get_connector_node(dev, &node);
+ if (ret)
+ return ret;
+
+ if (ofnode_read_bool(node, "self-powered"))
+ return 0;
+
+ cap_str = ofnode_read_string(node, "power-role");
+ if (!cap_str)
+ return -EINVAL;
+
+ if (strcmp("sink", cap_str))
+ return 0;
+
+ /* Do not auto-probe PD controller when PD is disabled */
+ if (ofnode_read_bool(node, "pd-disable"))
+ return 0;
+
+ dev_info(dev, "probing Type-C port manager...");
+
+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+ return 0;
+}
+
+UCLASS_DRIVER(tcpm) = {
+ .id = UCLASS_TCPM,
+ .name = "tcpm",
+ .per_device_plat_auto = sizeof(struct tcpm_port),
+ .post_bind = tcpm_post_bind,
+ .post_probe = tcpm_post_probe,
+};
diff --git a/drivers/usb/tcpm/tcpm.c b/drivers/usb/tcpm/tcpm.c
new file mode 100644
index 00000000000..0aee57cb2f4
--- /dev/null
+++ b/drivers/usb/tcpm/tcpm.c
@@ -0,0 +1,2288 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2015-2017 Google, Inc
+ *
+ * USB Power Delivery protocol stack.
+ */
+
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h>
+#include <dm/devres.h>
+#include <linux/compat.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/iopoll.h>
+#include <time.h>
+#include <usb/tcpm.h>
+#include "tcpm-internal.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const char * const tcpm_states[] = {
+ FOREACH_TCPM_STATE(GENERATE_TCPM_STRING)
+};
+
+const char * const typec_pd_rev_name[] = {
+ [PD_REV10] = "rev1",
+ [PD_REV20] = "rev2",
+ [PD_REV30] = "rev3",
+};
+
+const char * const typec_role_name[] = {
+ [TYPEC_SINK] = "sink",
+ [TYPEC_SOURCE] = "source",
+};
+
+const char * const typec_data_role_name[] = {
+ [TYPEC_DEVICE] = "device",
+ [TYPEC_HOST] = "host",
+};
+
+const char * const typec_orientation_name[] = {
+ [TYPEC_ORIENTATION_NONE] = "none",
+ [TYPEC_ORIENTATION_NORMAL] = "normal",
+ [TYPEC_ORIENTATION_REVERSE] = "reverse",
+};
+
+const char * const typec_cc_status_name[] = {
+ [TYPEC_CC_OPEN] = "open",
+ [TYPEC_CC_RA] = "ra",
+ [TYPEC_CC_RD] = "rd",
+ [TYPEC_CC_RP_DEF] = "rp-def",
+ [TYPEC_CC_RP_1_5] = "rp-1.5",
+ [TYPEC_CC_RP_3_0] = "rp-3.0",
+};
+
+static inline bool tcpm_cc_is_sink(enum typec_cc_status cc)
+{
+ return cc == TYPEC_CC_RP_DEF ||
+ cc == TYPEC_CC_RP_1_5 ||
+ cc == TYPEC_CC_RP_3_0;
+}
+
+static inline bool tcpm_port_is_sink(struct tcpm_port *port)
+{
+ bool cc1_is_snk = tcpm_cc_is_sink(port->cc1);
+ bool cc2_is_snk = tcpm_cc_is_sink(port->cc2);
+
+ return (cc1_is_snk && !cc2_is_snk) ||
+ (cc2_is_snk && !cc1_is_snk);
+}
+
+static inline bool tcpm_cc_is_source(enum typec_cc_status cc)
+{
+ return cc == TYPEC_CC_RD;
+}
+
+static inline bool tcpm_port_is_source(struct tcpm_port *port)
+{
+ bool cc1_is_src = tcpm_cc_is_source(port->cc1);
+ bool cc2_is_src = tcpm_cc_is_source(port->cc2);
+
+ return (cc1_is_src && !cc2_is_src) ||
+ (cc2_is_src && !cc1_is_src);
+}
+
+static inline bool tcpm_try_src(struct tcpm_port *port)
+{
+ return port->try_role == TYPEC_SOURCE &&
+ port->port_type == TYPEC_PORT_DRP;
+}
+
+static inline void tcpm_reset_event_cnt(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ port->poll_event_cnt = 0;
+}
+
+static enum tcpm_state tcpm_default_state(struct tcpm_port *port)
+{
+ if (port->port_type == TYPEC_PORT_DRP) {
+ if (port->try_role == TYPEC_SINK)
+ return SNK_UNATTACHED;
+ else if (port->try_role == TYPEC_SOURCE)
+ return SRC_UNATTACHED;
+ } else if (port->port_type == TYPEC_PORT_SNK) {
+ return SNK_UNATTACHED;
+ }
+ return SRC_UNATTACHED;
+}
+
+static bool tcpm_port_is_disconnected(struct tcpm_port *port)
+{
+ return (!port->attached && port->cc1 == TYPEC_CC_OPEN &&
+ port->cc2 == TYPEC_CC_OPEN) ||
+ (port->attached && ((port->polarity == TYPEC_POLARITY_CC1 &&
+ port->cc1 == TYPEC_CC_OPEN) ||
+ (port->polarity == TYPEC_POLARITY_CC2 &&
+ port->cc2 == TYPEC_CC_OPEN)));
+}
+
+static void tcpm_set_cc(struct udevice *dev, enum typec_cc_status cc)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ dev_dbg(dev, "TCPM: set cc = %d\n", cc);
+ port->cc_req = cc;
+ drvops->set_cc(dev, cc);
+}
+
+/*
+ * Determine RP value to set based on maximum current supported
+ * by a port if configured as source.
+ * Returns CC value to report to link partner.
+ */
+static enum typec_cc_status tcpm_rp_cc(struct tcpm_port *port)
+{
+ const u32 *src_pdo = port->src_pdo;
+ int nr_pdo = port->nr_src_pdo;
+ int i;
+
+ /*
+ * Search for first entry with matching voltage.
+ * It should report the maximum supported current.
+ */
+ for (i = 0; i < nr_pdo; i++) {
+ const u32 pdo = src_pdo[i];
+
+ if (pdo_type(pdo) == PDO_TYPE_FIXED &&
+ pdo_fixed_voltage(pdo) == 5000) {
+ unsigned int curr = pdo_max_current(pdo);
+
+ if (curr >= 3000)
+ return TYPEC_CC_RP_3_0;
+ else if (curr >= 1500)
+ return TYPEC_CC_RP_1_5;
+ return TYPEC_CC_RP_DEF;
+ }
+ }
+
+ return TYPEC_CC_RP_DEF;
+}
+
+static void tcpm_check_and_run_delayed_work(struct udevice *dev);
+
+static bool tcpm_transmit_helper(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ drvops->poll_event(dev);
+ udelay(500);
+ tcpm_check_and_run_delayed_work(dev);
+ return port->tx_complete;
+}
+
+static int tcpm_pd_transmit(struct udevice *dev,
+ enum tcpm_transmit_type type,
+ const struct pd_message *msg)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ u32 timeout_us = PD_T_TCPC_TX_TIMEOUT * 1000;
+ bool tx_complete;
+ int ret;
+
+ if (msg)
+ dev_dbg(dev, "TCPM: PD TX, header: %#x\n",
+ le16_to_cpu(msg->header));
+ else
+ dev_dbg(dev, "TCPM: PD TX, type: %#x\n", type);
+
+ port->tx_complete = false;
+ ret = drvops->pd_transmit(dev, type, msg, port->negotiated_rev);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * At this point we basically need to block until the TCPM controller
+ * returns successful transmission. Since this is usually done using
+ * the generic interrupt status bits, we poll for any events. That
+ * will clear the interrupt status, so we also need to process any
+ * of the incoming events. This means we will do more processing and
+ * thus let's give everything a bit more time.
+ */
+ timeout_us *= 5;
+ ret = read_poll_timeout(tcpm_transmit_helper, tx_complete,
+ !tx_complete, false, timeout_us, dev);
+ if (ret < 0) {
+ dev_err(dev, "TCPM: PD transmit data failed: %d\n", ret);
+ return ret;
+ }
+
+ switch (port->tx_status) {
+ case TCPC_TX_SUCCESS:
+ port->message_id = (port->message_id + 1) & PD_HEADER_ID_MASK;
+ break;
+ case TCPC_TX_DISCARDED:
+ ret = -EAGAIN;
+ break;
+ case TCPC_TX_FAILED:
+ default:
+ ret = -EIO;
+ break;
+ }
+
+ return ret;
+}
+
+void tcpm_pd_transmit_complete(struct udevice *dev,
+ enum tcpm_transmit_status status)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ dev_dbg(dev, "TCPM: PD TX complete, status: %u\n", status);
+ tcpm_reset_event_cnt(dev);
+ port->tx_status = status;
+ port->tx_complete = true;
+}
+
+static int tcpm_set_polarity(struct udevice *dev,
+ enum typec_cc_polarity polarity)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ int ret;
+
+ dev_dbg(dev, "TCPM: set polarity = %d\n", polarity);
+
+ if (drvops->set_polarity) {
+ ret = drvops->set_polarity(dev, polarity);
+ if (ret < 0)
+ return ret;
+ }
+
+ port->polarity = polarity;
+
+ return 0;
+}
+
+static int tcpm_set_vconn(struct udevice *dev, bool enable)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ dev_dbg(dev, "TCPM: set vconn = %d\n", enable);
+
+ ret = drvops->set_vconn(dev, enable);
+ if (!ret)
+ port->vconn_role = enable ? TYPEC_SOURCE : TYPEC_SINK;
+
+ return ret;
+}
+
+static inline u32 tcpm_get_current_limit(struct tcpm_port *port)
+{
+ switch (port->polarity ? port->cc2 : port->cc1) {
+ case TYPEC_CC_RP_1_5:
+ return 1500;
+ case TYPEC_CC_RP_3_0:
+ return 3000;
+ case TYPEC_CC_RP_DEF:
+ default:
+ return 0;
+ }
+}
+
+static int tcpm_set_current_limit(struct udevice *dev, u32 max_ma, u32 mv)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret = -EOPNOTSUPP;
+
+ dev_info(dev, "TCPM: set voltage limit = %u mV\n", mv);
+ dev_info(dev, "TCPM: set current limit = %u mA\n", max_ma);
+
+ port->supply_voltage = mv;
+ port->current_limit = max_ma;
+
+ return ret;
+}
+
+static int tcpm_set_attached_state(struct udevice *dev, bool attached)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ return drvops->set_roles(dev, attached, port->pwr_role,
+ port->data_role);
+}
+
+static int tcpm_set_roles(struct udevice *dev, bool attached,
+ enum typec_role role, enum typec_data_role data)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ ret = drvops->set_roles(dev, attached, role, data);
+ if (ret < 0)
+ return ret;
+
+ port->pwr_role = role;
+ port->data_role = data;
+
+ return 0;
+}
+
+static int tcpm_pd_send_source_caps(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ struct pd_message msg;
+ int i;
+
+ memset(&msg, 0, sizeof(msg));
+
+ if (!port->nr_src_pdo) {
+ /* No source capabilities defined, sink only */
+ msg.header = PD_HEADER_LE(PD_CTRL_REJECT,
+ port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id, 0);
+ } else {
+ msg.header = PD_HEADER_LE(PD_DATA_SOURCE_CAP,
+ port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id,
+ port->nr_src_pdo);
+ }
+
+ for (i = 0; i < port->nr_src_pdo; i++)
+ msg.payload[i] = cpu_to_le32(port->src_pdo[i]);
+
+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg);
+}
+
+static int tcpm_pd_send_sink_caps(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ struct pd_message msg;
+ unsigned int i;
+
+ memset(&msg, 0, sizeof(msg));
+
+ if (!port->nr_snk_pdo) {
+ /* No sink capabilities defined, source only */
+ msg.header = PD_HEADER_LE(PD_CTRL_REJECT,
+ port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id, 0);
+ } else {
+ msg.header = PD_HEADER_LE(PD_DATA_SINK_CAP,
+ port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id,
+ port->nr_snk_pdo);
+ }
+
+ for (i = 0; i < port->nr_snk_pdo; i++)
+ msg.payload[i] = cpu_to_le32(port->snk_pdo[i]);
+
+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg);
+}
+
+static void tcpm_state_machine(struct udevice *dev);
+
+static inline void tcpm_timer_uninit(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ port->delay_target = 0;
+}
+
+static void tcpm_timer_init(struct udevice *dev, uint32_t ms)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ unsigned long time_us = ms * 1000;
+
+ port->delay_target = timer_get_us() + time_us;
+}
+
+static void tcpm_check_and_run_delayed_work(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ /* no delayed state changes scheduled */
+ if (port->delay_target == 0)
+ return;
+
+ /* it's not yet time */
+ if (timer_get_us() < port->delay_target)
+ return;
+
+ tcpm_timer_uninit(dev);
+ tcpm_state_machine(dev);
+}
+
+static void mod_tcpm_delayed_work(struct udevice *dev, unsigned int delay_ms)
+{
+ if (delay_ms) {
+ tcpm_timer_init(dev, delay_ms);
+ } else {
+ tcpm_timer_uninit(dev);
+ tcpm_state_machine(dev);
+ }
+}
+
+static void tcpm_set_state(struct udevice *dev, enum tcpm_state state,
+ unsigned int delay_ms)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ if (delay_ms) {
+ dev_dbg(dev, "TCPM: pending state change %s -> %s @ %u ms [%s]\n",
+ tcpm_states[port->state], tcpm_states[state], delay_ms,
+ typec_pd_rev_name[port->negotiated_rev]);
+ port->delayed_state = state;
+ mod_tcpm_delayed_work(dev, delay_ms);
+ port->delay_ms = delay_ms;
+ } else {
+ dev_dbg(dev, "TCPM: state change %s -> %s\n",
+ tcpm_states[port->state], tcpm_states[state]);
+ port->delayed_state = INVALID_STATE;
+ port->prev_state = port->state;
+ port->state = state;
+ /*
+ * Don't re-queue the state machine work item if we're currently
+ * in the state machine and we're immediately changing states.
+ * tcpm_state_machine_work() will continue running the state
+ * machine.
+ */
+ if (!port->state_machine_running)
+ mod_tcpm_delayed_work(dev, 0);
+ }
+}
+
+static void tcpm_set_state_cond(struct udevice *dev, enum tcpm_state state,
+ unsigned int delay_ms)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ if (port->enter_state == port->state)
+ tcpm_set_state(dev, state, delay_ms);
+ else
+ dev_dbg(dev, "TCPM: skipped %sstate change %s -> %s [%u ms], context state %s [%s]\n",
+ delay_ms ? "delayed " : "",
+ tcpm_states[port->state], tcpm_states[state],
+ delay_ms, tcpm_states[port->enter_state],
+ typec_pd_rev_name[port->negotiated_rev]);
+}
+
+static void tcpm_queue_message(struct udevice *dev,
+ enum pd_msg_request message)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ port->queued_message = message;
+ mod_tcpm_delayed_work(dev, 0);
+}
+
+enum pdo_err {
+ PDO_NO_ERR,
+ PDO_ERR_NO_VSAFE5V,
+ PDO_ERR_VSAFE5V_NOT_FIRST,
+ PDO_ERR_PDO_TYPE_NOT_IN_ORDER,
+ PDO_ERR_FIXED_NOT_SORTED,
+ PDO_ERR_VARIABLE_BATT_NOT_SORTED,
+ PDO_ERR_DUPE_PDO,
+ PDO_ERR_PPS_APDO_NOT_SORTED,
+ PDO_ERR_DUPE_PPS_APDO,
+};
+
+static const char * const pdo_err_msg[] = {
+ [PDO_ERR_NO_VSAFE5V] =
+ " err: source/sink caps should at least have vSafe5V",
+ [PDO_ERR_VSAFE5V_NOT_FIRST] =
+ " err: vSafe5V Fixed Supply Object Shall always be the first object",
+ [PDO_ERR_PDO_TYPE_NOT_IN_ORDER] =
+ " err: PDOs should be in the following order: Fixed; Battery; Variable",
+ [PDO_ERR_FIXED_NOT_SORTED] =
+ " err: Fixed supply pdos should be in increasing order of their fixed voltage",
+ [PDO_ERR_VARIABLE_BATT_NOT_SORTED] =
+ " err: Variable/Battery supply pdos should be in increasing order of their minimum voltage",
+ [PDO_ERR_DUPE_PDO] =
+ " err: Variable/Batt supply pdos cannot have same min/max voltage",
+ [PDO_ERR_PPS_APDO_NOT_SORTED] =
+ " err: Programmable power supply apdos should be in increasing order of their maximum voltage",
+ [PDO_ERR_DUPE_PPS_APDO] =
+ " err: Programmable power supply apdos cannot have same min/max voltage and max current",
+};
+
+static enum pdo_err tcpm_caps_err(struct udevice *dev, const u32 *pdo,
+ unsigned int nr_pdo)
+{
+ unsigned int i;
+
+ /* Should at least contain vSafe5v */
+ if (nr_pdo < 1)
+ return PDO_ERR_NO_VSAFE5V;
+
+ /* The vSafe5V Fixed Supply Object Shall always be the first object */
+ if (pdo_type(pdo[0]) != PDO_TYPE_FIXED ||
+ pdo_fixed_voltage(pdo[0]) != VSAFE5V)
+ return PDO_ERR_VSAFE5V_NOT_FIRST;
+
+ for (i = 1; i < nr_pdo; i++) {
+ if (pdo_type(pdo[i]) < pdo_type(pdo[i - 1])) {
+ return PDO_ERR_PDO_TYPE_NOT_IN_ORDER;
+ } else if (pdo_type(pdo[i]) == pdo_type(pdo[i - 1])) {
+ enum pd_pdo_type type = pdo_type(pdo[i]);
+
+ switch (type) {
+ /*
+ * The remaining Fixed Supply Objects, if
+ * present, shall be sent in voltage order;
+ * lowest to highest.
+ */
+ case PDO_TYPE_FIXED:
+ if (pdo_fixed_voltage(pdo[i]) <=
+ pdo_fixed_voltage(pdo[i - 1]))
+ return PDO_ERR_FIXED_NOT_SORTED;
+ break;
+ /*
+ * The Battery Supply Objects and Variable
+ * supply, if present shall be sent in Minimum
+ * Voltage order; lowest to highest.
+ */
+ case PDO_TYPE_VAR:
+ case PDO_TYPE_BATT:
+ if (pdo_min_voltage(pdo[i]) <
+ pdo_min_voltage(pdo[i - 1]))
+ return PDO_ERR_VARIABLE_BATT_NOT_SORTED;
+ else if ((pdo_min_voltage(pdo[i]) ==
+ pdo_min_voltage(pdo[i - 1])) &&
+ (pdo_max_voltage(pdo[i]) ==
+ pdo_max_voltage(pdo[i - 1])))
+ return PDO_ERR_DUPE_PDO;
+ break;
+ /*
+ * The Programmable Power Supply APDOs, if present,
+ * shall be sent in Maximum Voltage order;
+ * lowest to highest.
+ */
+ case PDO_TYPE_APDO:
+ if (pdo_apdo_type(pdo[i]) != APDO_TYPE_PPS)
+ break;
+
+ if (pdo_pps_apdo_max_voltage(pdo[i]) <
+ pdo_pps_apdo_max_voltage(pdo[i - 1]))
+ return PDO_ERR_PPS_APDO_NOT_SORTED;
+ else if (pdo_pps_apdo_min_voltage(pdo[i]) ==
+ pdo_pps_apdo_min_voltage(pdo[i - 1]) &&
+ pdo_pps_apdo_max_voltage(pdo[i]) ==
+ pdo_pps_apdo_max_voltage(pdo[i - 1]) &&
+ pdo_pps_apdo_max_current(pdo[i]) ==
+ pdo_pps_apdo_max_current(pdo[i - 1]))
+ return PDO_ERR_DUPE_PPS_APDO;
+ break;
+ default:
+ dev_err(dev, "TCPM: Unknown pdo type\n");
+ }
+ }
+ }
+
+ return PDO_NO_ERR;
+}
+
+static int tcpm_validate_caps(struct udevice *dev, const u32 *pdo,
+ unsigned int nr_pdo)
+{
+ enum pdo_err err_index = tcpm_caps_err(dev, pdo, nr_pdo);
+
+ if (err_index != PDO_NO_ERR) {
+ dev_err(dev, "TCPM:%s\n", pdo_err_msg[err_index]);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/*
+ * PD (data, control) command handling functions
+ */
+static inline enum tcpm_state ready_state(struct tcpm_port *port)
+{
+ if (port->pwr_role == TYPEC_SOURCE)
+ return SRC_READY;
+ else
+ return SNK_READY;
+}
+
+static void tcpm_pd_data_request(struct udevice *dev,
+ const struct pd_message *msg)
+{
+ enum pd_data_msg_type type = pd_header_type_le(msg->header);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ unsigned int cnt = pd_header_cnt_le(msg->header);
+ unsigned int rev = pd_header_rev_le(msg->header);
+ unsigned int i;
+
+ switch (type) {
+ case PD_DATA_SOURCE_CAP:
+ for (i = 0; i < cnt; i++)
+ port->source_caps[i] = le32_to_cpu(msg->payload[i]);
+
+ port->nr_source_caps = cnt;
+
+ tcpm_validate_caps(dev, port->source_caps,
+ port->nr_source_caps);
+
+ /*
+ * Adjust revision in subsequent message headers, as required,
+ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't
+ * support Rev 1.0 so just do nothing in that scenario.
+ */
+ if (rev == PD_REV10)
+ break;
+
+ if (rev < PD_MAX_REV)
+ port->negotiated_rev = rev;
+
+ if ((pdo_type(port->source_caps[0]) == PDO_TYPE_FIXED) &&
+ (port->source_caps[0] & PDO_FIXED_DUAL_ROLE) &&
+ (port->source_caps[0] & PDO_FIXED_DATA_SWAP)) {
+ /* Dual role power and data, eg: self-powered Type-C */
+ port->wait_dr_swap_message = true;
+ } else {
+ /* Non-Dual role power, eg: adapter */
+ port->wait_dr_swap_message = false;
+ }
+
+ /*
+ * This message may be received even if VBUS is not
+ * present. This is quite unexpected; see USB PD
+ * specification, sections 8.3.3.6.3.1 and 8.3.3.6.3.2.
+ * However, at the same time, we must be ready to
+ * receive this message and respond to it 15ms after
+ * receiving PS_RDY during power swap operations, no matter
+ * if VBUS is available or not (USB PD specification,
+ * section 6.5.9.2).
+ * So we need to accept the message either way,
+ * but be prepared to keep waiting for VBUS after it was
+ * handled.
+ */
+ tcpm_set_state(dev, SNK_NEGOTIATE_CAPABILITIES, 0);
+ break;
+ case PD_DATA_REQUEST:
+ /*
+ * Adjust revision in subsequent message headers, as required,
+ * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't
+ * support Rev 1.0 so just reject in that scenario.
+ */
+ if (rev == PD_REV10) {
+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT);
+ break;
+ }
+
+ if (rev < PD_MAX_REV)
+ port->negotiated_rev = rev;
+
+ port->sink_request = le32_to_cpu(msg->payload[0]);
+
+ tcpm_set_state(dev, SRC_NEGOTIATE_CAPABILITIES, 0);
+ break;
+ case PD_DATA_SINK_CAP:
+ /* We don't do anything with this at the moment... */
+ for (i = 0; i < cnt; i++)
+ port->sink_caps[i] = le32_to_cpu(msg->payload[i]);
+
+ port->nr_sink_caps = cnt;
+ break;
+ default:
+ break;
+ }
+}
+
+static void tcpm_pd_ctrl_request(struct udevice *dev,
+ const struct pd_message *msg)
+{
+ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum tcpm_state next_state;
+
+ switch (type) {
+ case PD_CTRL_GOOD_CRC:
+ case PD_CTRL_PING:
+ break;
+ case PD_CTRL_GET_SOURCE_CAP:
+ switch (port->state) {
+ case SRC_READY:
+ case SNK_READY:
+ tcpm_queue_message(dev, PD_MSG_DATA_SOURCE_CAP);
+ break;
+ default:
+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT);
+ break;
+ }
+ break;
+ case PD_CTRL_GET_SINK_CAP:
+ switch (port->state) {
+ case SRC_READY:
+ case SNK_READY:
+ tcpm_queue_message(dev, PD_MSG_DATA_SINK_CAP);
+ break;
+ default:
+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT);
+ break;
+ }
+ break;
+ case PD_CTRL_GOTO_MIN:
+ break;
+ case PD_CTRL_PS_RDY:
+ switch (port->state) {
+ case SNK_TRANSITION_SINK:
+ if (port->vbus_present) {
+ tcpm_set_current_limit(dev,
+ port->req_current_limit,
+ port->req_supply_voltage);
+ port->explicit_contract = true;
+ tcpm_set_state(dev, SNK_READY, 0);
+ } else {
+ /*
+ * Seen after power swap. Keep waiting for VBUS
+ * in a transitional state.
+ */
+ tcpm_set_state(dev,
+ SNK_TRANSITION_SINK_VBUS, 0);
+ }
+ break;
+ default:
+ break;
+ }
+ break;
+ case PD_CTRL_REJECT:
+ case PD_CTRL_WAIT:
+ case PD_CTRL_NOT_SUPP:
+ switch (port->state) {
+ case SNK_NEGOTIATE_CAPABILITIES:
+ /* USB PD specification, Figure 8-43 */
+ if (port->explicit_contract)
+ next_state = SNK_READY;
+ else
+ next_state = SNK_WAIT_CAPABILITIES;
+
+ tcpm_set_state(dev, next_state, 0);
+ break;
+ default:
+ break;
+ }
+ break;
+ case PD_CTRL_ACCEPT:
+ switch (port->state) {
+ case SNK_NEGOTIATE_CAPABILITIES:
+ tcpm_set_state(dev, SNK_TRANSITION_SINK, 0);
+ break;
+ case SOFT_RESET_SEND:
+ port->message_id = 0;
+ port->rx_msgid = -1;
+ if (port->pwr_role == TYPEC_SOURCE)
+ next_state = SRC_SEND_CAPABILITIES;
+ else
+ next_state = SNK_WAIT_CAPABILITIES;
+ tcpm_set_state(dev, next_state, 0);
+ break;
+ default:
+ break;
+ }
+ break;
+ case PD_CTRL_SOFT_RESET:
+ tcpm_set_state(dev, SOFT_RESET, 0);
+ break;
+ case PD_CTRL_DR_SWAP:
+ if (port->port_type != TYPEC_PORT_DRP) {
+ tcpm_queue_message(dev, PD_MSG_CTRL_REJECT);
+ break;
+ }
+ /*
+ * 6.3.9: If an alternate mode is active, a request to swap
+ * alternate modes shall trigger a port reset.
+ */
+ switch (port->state) {
+ case SRC_READY:
+ case SNK_READY:
+ tcpm_set_state(dev, DR_SWAP_ACCEPT, 0);
+ break;
+ default:
+ tcpm_queue_message(dev, PD_MSG_CTRL_WAIT);
+ break;
+ }
+ break;
+ case PD_CTRL_PR_SWAP:
+ case PD_CTRL_VCONN_SWAP:
+ case PD_CTRL_GET_SOURCE_CAP_EXT:
+ case PD_CTRL_GET_STATUS:
+ case PD_CTRL_FR_SWAP:
+ case PD_CTRL_GET_PPS_STATUS:
+ case PD_CTRL_GET_COUNTRY_CODES:
+ /* Currently not supported */
+ dev_err(dev, "TCPM: Currently not supported type %#x\n", type);
+ tcpm_queue_message(dev, PD_MSG_CTRL_NOT_SUPP);
+ break;
+ default:
+ dev_err(dev, "TCPM: Unrecognized ctrl message type %#x\n", type);
+ break;
+ }
+}
+
+static void tcpm_pd_rx_handler(struct udevice *dev,
+ const struct pd_message *msg)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ unsigned int cnt = pd_header_cnt_le(msg->header);
+ bool remote_is_host, local_is_host;
+
+ dev_dbg(dev, "TCPM: PD RX, header: %#x [%d]\n",
+ le16_to_cpu(msg->header), port->attached);
+
+ if (port->attached) {
+ enum pd_ctrl_msg_type type = pd_header_type_le(msg->header);
+ unsigned int msgid = pd_header_msgid_le(msg->header);
+
+ /*
+ * USB PD standard, 6.6.1.2:
+ * "... if MessageID value in a received Message is the
+ * same as the stored value, the receiver shall return a
+ * GoodCRC Message with that MessageID value and drop
+ * the Message (this is a retry of an already received
+ * Message). Note: this shall not apply to the Soft_Reset
+ * Message which always has a MessageID value of zero."
+ */
+ if (msgid == port->rx_msgid && type != PD_CTRL_SOFT_RESET)
+ return;
+ port->rx_msgid = msgid;
+
+ /*
+ * If both ends believe to be DFP/host, we have a data role
+ * mismatch.
+ */
+ remote_is_host = !!(le16_to_cpu(msg->header) & PD_HEADER_DATA_ROLE);
+ local_is_host = port->data_role == TYPEC_HOST;
+ if (remote_is_host == local_is_host) {
+ dev_err(dev, "TCPM: data role mismatch, initiating error recovery\n");
+ tcpm_set_state(dev, ERROR_RECOVERY, 0);
+ } else {
+ if (cnt)
+ tcpm_pd_data_request(dev, msg);
+ else
+ tcpm_pd_ctrl_request(dev, msg);
+ }
+ }
+}
+
+void tcpm_pd_receive(struct udevice *dev, const struct pd_message *msg)
+{
+ tcpm_reset_event_cnt(dev);
+ tcpm_pd_rx_handler(dev, msg);
+}
+
+static int tcpm_pd_send_control(struct udevice *dev,
+ enum pd_ctrl_msg_type type)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ struct pd_message msg;
+
+ memset(&msg, 0, sizeof(msg));
+ msg.header = PD_HEADER_LE(type, port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id, 0);
+
+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg);
+}
+
+/*
+ * Send queued message without affecting state.
+ * Return true if state machine should go back to sleep,
+ * false otherwise.
+ */
+static bool tcpm_send_queued_message(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum pd_msg_request queued_message;
+ int max_messages = 100;
+
+ do {
+ queued_message = port->queued_message;
+ port->queued_message = PD_MSG_NONE;
+ max_messages--;
+
+ switch (queued_message) {
+ case PD_MSG_CTRL_WAIT:
+ tcpm_pd_send_control(dev, PD_CTRL_WAIT);
+ break;
+ case PD_MSG_CTRL_REJECT:
+ tcpm_pd_send_control(dev, PD_CTRL_REJECT);
+ break;
+ case PD_MSG_CTRL_NOT_SUPP:
+ tcpm_pd_send_control(dev, PD_CTRL_NOT_SUPP);
+ break;
+ case PD_MSG_DATA_SINK_CAP:
+ tcpm_pd_send_sink_caps(dev);
+ break;
+ case PD_MSG_DATA_SOURCE_CAP:
+ tcpm_pd_send_source_caps(dev);
+ break;
+ default:
+ break;
+ }
+ } while (max_messages > 0 && port->queued_message != PD_MSG_NONE);
+
+ if (!max_messages)
+ dev_err(dev, "Aborted sending of too many queued messages\n");
+
+ return false;
+}
+
+static int tcpm_pd_check_request(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ u32 pdo, rdo = port->sink_request;
+ unsigned int max, op, pdo_max, index;
+ enum pd_pdo_type type;
+
+ index = rdo_index(rdo);
+ if (!index || index > port->nr_src_pdo)
+ return -EINVAL;
+
+ pdo = port->src_pdo[index - 1];
+ type = pdo_type(pdo);
+ switch (type) {
+ case PDO_TYPE_FIXED:
+ case PDO_TYPE_VAR:
+ max = rdo_max_current(rdo);
+ op = rdo_op_current(rdo);
+ pdo_max = pdo_max_current(pdo);
+
+ if (op > pdo_max)
+ return -EINVAL;
+ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH))
+ return -EINVAL;
+
+ if (type == PDO_TYPE_FIXED)
+ dev_dbg(dev, "TCPM: Requested %u mV, %u mA for %u / %u mA\n",
+ pdo_fixed_voltage(pdo), pdo_max, op, max);
+ else
+ dev_dbg(dev, "TCPM: Requested %u -> %u mV, %u mA for %u / %u mA\n",
+ pdo_min_voltage(pdo), pdo_max_voltage(pdo),
+ pdo_max, op, max);
+ break;
+ case PDO_TYPE_BATT:
+ max = rdo_max_power(rdo);
+ op = rdo_op_power(rdo);
+ pdo_max = pdo_max_power(pdo);
+
+ if (op > pdo_max)
+ return -EINVAL;
+ if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH))
+ return -EINVAL;
+ dev_info(dev, "TCPM: Requested %u -> %u mV, %u mW for %u / %u mW\n",
+ pdo_min_voltage(pdo), pdo_max_voltage(pdo),
+ pdo_max, op, max);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+#define min_power(x, y) min(pdo_max_power(x), pdo_max_power(y))
+#define min_current(x, y) min(pdo_max_current(x), pdo_max_current(y))
+
+static int tcpm_pd_select_pdo(struct udevice *dev, int *sink_pdo,
+ int *src_pdo)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ unsigned int i, j, max_src_mv = 0, min_src_mv = 0, max_mw = 0,
+ max_mv = 0, src_mw = 0, src_ma = 0, max_snk_mv = 0,
+ min_snk_mv = 0;
+ int ret = -EINVAL;
+
+ /*
+ * Select the source PDO providing the most power which has a
+ * matchig sink cap.
+ */
+ for (i = 0; i < port->nr_source_caps; i++) {
+ u32 pdo = port->source_caps[i];
+ enum pd_pdo_type type = pdo_type(pdo);
+
+ switch (type) {
+ case PDO_TYPE_FIXED:
+ max_src_mv = pdo_fixed_voltage(pdo);
+ min_src_mv = max_src_mv;
+ break;
+ case PDO_TYPE_BATT:
+ case PDO_TYPE_VAR:
+ max_src_mv = pdo_max_voltage(pdo);
+ min_src_mv = pdo_min_voltage(pdo);
+ break;
+ case PDO_TYPE_APDO:
+ continue;
+ default:
+ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n");
+ continue;
+ }
+
+ switch (type) {
+ case PDO_TYPE_FIXED:
+ case PDO_TYPE_VAR:
+ src_ma = pdo_max_current(pdo);
+ src_mw = src_ma * min_src_mv / 1000;
+ break;
+ case PDO_TYPE_BATT:
+ src_mw = pdo_max_power(pdo);
+ break;
+ case PDO_TYPE_APDO:
+ continue;
+ default:
+ dev_err(dev, "TCPM: Invalid source PDO type, ignoring\n");
+ continue;
+ }
+
+ for (j = 0; j < port->nr_snk_pdo; j++) {
+ pdo = port->snk_pdo[j];
+
+ switch (pdo_type(pdo)) {
+ case PDO_TYPE_FIXED:
+ max_snk_mv = pdo_fixed_voltage(pdo);
+ min_snk_mv = max_snk_mv;
+ break;
+ case PDO_TYPE_BATT:
+ case PDO_TYPE_VAR:
+ max_snk_mv = pdo_max_voltage(pdo);
+ min_snk_mv = pdo_min_voltage(pdo);
+ break;
+ case PDO_TYPE_APDO:
+ continue;
+ default:
+ dev_err(dev, "TCPM: Invalid sink PDO type, ignoring\n");
+ continue;
+ }
+
+ if (max_src_mv <= max_snk_mv && min_src_mv >= min_snk_mv) {
+ /* Prefer higher voltages if available */
+ if ((src_mw == max_mw && min_src_mv > max_mv) ||
+ src_mw > max_mw) {
+ *src_pdo = i;
+ *sink_pdo = j;
+ max_mw = src_mw;
+ max_mv = min_src_mv;
+ ret = 0;
+ }
+ }
+ }
+ }
+
+ return ret;
+}
+
+static int tcpm_pd_build_request(struct udevice *dev, u32 *rdo)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ unsigned int mv, ma, mw, flags;
+ unsigned int max_ma, max_mw;
+ enum pd_pdo_type type;
+ u32 pdo, matching_snk_pdo;
+ int src_pdo_index = 0;
+ int snk_pdo_index = 0;
+ int ret;
+
+ ret = tcpm_pd_select_pdo(dev, &snk_pdo_index, &src_pdo_index);
+ if (ret < 0)
+ return ret;
+
+ pdo = port->source_caps[src_pdo_index];
+ matching_snk_pdo = port->snk_pdo[snk_pdo_index];
+ type = pdo_type(pdo);
+
+ switch (type) {
+ case PDO_TYPE_FIXED:
+ mv = pdo_fixed_voltage(pdo);
+ break;
+ case PDO_TYPE_BATT:
+ case PDO_TYPE_VAR:
+ mv = pdo_min_voltage(pdo);
+ break;
+ default:
+ dev_err(dev, "TCPM: Invalid PDO selected!\n");
+ return -EINVAL;
+ }
+
+ /* Select maximum available current within the sink pdo's limit */
+ if (type == PDO_TYPE_BATT) {
+ mw = min_power(pdo, matching_snk_pdo);
+ ma = 1000 * mw / mv;
+ } else {
+ ma = min_current(pdo, matching_snk_pdo);
+ mw = ma * mv / 1000;
+ }
+
+ flags = RDO_USB_COMM | RDO_NO_SUSPEND;
+
+ /* Set mismatch bit if offered power is less than operating power */
+ max_ma = ma;
+ max_mw = mw;
+ if (mw < port->operating_snk_mw) {
+ flags |= RDO_CAP_MISMATCH;
+ if (type == PDO_TYPE_BATT &&
+ (pdo_max_power(matching_snk_pdo) > pdo_max_power(pdo)))
+ max_mw = pdo_max_power(matching_snk_pdo);
+ else if (pdo_max_current(matching_snk_pdo) >
+ pdo_max_current(pdo))
+ max_ma = pdo_max_current(matching_snk_pdo);
+ }
+
+ dev_dbg(dev, "TCPM: cc=%d cc1=%d cc2=%d vbus=%d vconn=%s polarity=%d\n",
+ port->cc_req, port->cc1, port->cc2, port->vbus_source,
+ port->vconn_role == TYPEC_SOURCE ? "source" : "sink",
+ port->polarity);
+
+ if (type == PDO_TYPE_BATT) {
+ *rdo = RDO_BATT(src_pdo_index + 1, mw, max_mw, flags);
+
+ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mW%s\n",
+ src_pdo_index, mv, mw,
+ flags & RDO_CAP_MISMATCH ? " [mismatch]" : "");
+ } else {
+ *rdo = RDO_FIXED(src_pdo_index + 1, ma, max_ma, flags);
+
+ dev_info(dev, "TCPM: requesting PDO %d: %u mV, %u mA%s\n",
+ src_pdo_index, mv, ma,
+ flags & RDO_CAP_MISMATCH ? " [mismatch]" : "");
+ }
+
+ port->req_current_limit = ma;
+ port->req_supply_voltage = mv;
+
+ return 0;
+}
+
+static int tcpm_pd_send_request(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ struct pd_message msg;
+ int ret;
+ u32 rdo;
+
+ ret = tcpm_pd_build_request(dev, &rdo);
+ if (ret < 0)
+ return ret;
+
+ memset(&msg, 0, sizeof(msg));
+ msg.header = PD_HEADER_LE(PD_DATA_REQUEST,
+ port->pwr_role,
+ port->data_role,
+ port->negotiated_rev,
+ port->message_id, 1);
+ msg.payload[0] = cpu_to_le32(rdo);
+
+ return tcpm_pd_transmit(dev, TCPC_TX_SOP, &msg);
+}
+
+static int tcpm_set_vbus(struct udevice *dev, bool enable)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ int ret;
+
+ if (enable && port->vbus_charge)
+ return -EINVAL;
+
+ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n",
+ enable, port->vbus_charge);
+
+ ret = drvops->set_vbus(dev, enable, port->vbus_charge);
+ if (ret < 0)
+ return ret;
+
+ port->vbus_source = enable;
+ return 0;
+}
+
+static int tcpm_set_charge(struct udevice *dev, bool charge)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ if (charge && port->vbus_source)
+ return -EINVAL;
+
+ if (charge != port->vbus_charge) {
+ dev_dbg(dev, "TCPM: set vbus = %d charge = %d\n",
+ port->vbus_source, charge);
+ ret = drvops->set_vbus(dev, port->vbus_source,
+ charge);
+ if (ret < 0)
+ return ret;
+ }
+ port->vbus_charge = charge;
+ return 0;
+}
+
+static bool tcpm_start_toggling(struct udevice *dev, enum typec_cc_status cc)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ if (!drvops->start_toggling)
+ return false;
+
+ dev_dbg(dev, "TCPM: Start toggling\n");
+ ret = drvops->start_toggling(dev, port->port_type, cc);
+ return ret == 0;
+}
+
+static int tcpm_init_vbus(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ ret = drvops->set_vbus(dev, false, false);
+ port->vbus_source = false;
+ port->vbus_charge = false;
+ return ret;
+}
+
+static int tcpm_init_vconn(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ ret = drvops->set_vconn(dev, false);
+ port->vconn_role = TYPEC_SINK;
+ return ret;
+}
+
+static inline void tcpm_typec_connect(struct tcpm_port *port)
+{
+ if (!port->connected)
+ port->connected = true;
+}
+
+static int tcpm_src_attach(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum typec_cc_polarity polarity =
+ port->cc2 == TYPEC_CC_RD ? TYPEC_POLARITY_CC2
+ : TYPEC_POLARITY_CC1;
+ int ret;
+
+ if (port->attached)
+ return 0;
+
+ ret = tcpm_set_polarity(dev, polarity);
+ if (ret < 0)
+ return ret;
+
+ ret = tcpm_set_roles(dev, true, TYPEC_SOURCE, TYPEC_HOST);
+ if (ret < 0)
+ return ret;
+
+ ret = drvops->set_pd_rx(dev, true);
+ if (ret < 0)
+ goto out_disable_mux;
+
+ /*
+ * USB Type-C specification, version 1.2,
+ * chapter 4.5.2.2.8.1 (Attached.SRC Requirements)
+ * Enable VCONN only if the non-RD port is set to RA.
+ */
+ if ((polarity == TYPEC_POLARITY_CC1 && port->cc2 == TYPEC_CC_RA) ||
+ (polarity == TYPEC_POLARITY_CC2 && port->cc1 == TYPEC_CC_RA)) {
+ ret = tcpm_set_vconn(dev, true);
+ if (ret < 0)
+ goto out_disable_pd;
+ }
+
+ ret = tcpm_set_vbus(dev, true);
+ if (ret < 0)
+ goto out_disable_vconn;
+
+ port->pd_capable = false;
+
+ port->partner = NULL;
+
+ port->attached = true;
+
+ return 0;
+
+out_disable_vconn:
+ tcpm_set_vconn(dev, false);
+out_disable_pd:
+ drvops->set_pd_rx(dev, false);
+out_disable_mux:
+ dev_err(dev, "TCPM: CC connected in %s as DFP\n",
+ polarity ? "CC2" : "CC1");
+ return 0;
+}
+
+static inline void tcpm_typec_disconnect(struct tcpm_port *port)
+{
+ if (port->connected) {
+ port->partner = NULL;
+ port->connected = false;
+ }
+}
+
+static void tcpm_reset_port(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ tcpm_timer_uninit(dev);
+ tcpm_typec_disconnect(port);
+ tcpm_reset_event_cnt(dev);
+ port->wait_dr_swap_message = false;
+ port->attached = false;
+ port->pd_capable = false;
+
+ /*
+ * First Rx ID should be 0; set this to a sentinel of -1 so that
+ * we can check tcpm_pd_rx_handler() if we had seen it before.
+ */
+ port->rx_msgid = -1;
+
+ drvops->set_pd_rx(dev, false);
+ tcpm_init_vbus(dev); /* also disables charging */
+ tcpm_init_vconn(dev);
+ tcpm_set_current_limit(dev, 0, 0);
+ tcpm_set_polarity(dev, TYPEC_POLARITY_CC1);
+ tcpm_set_attached_state(dev, false);
+ port->nr_sink_caps = 0;
+}
+
+static void tcpm_detach(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ if (tcpm_port_is_disconnected(port))
+ port->hard_reset_count = 0;
+
+ if (!port->attached)
+ return;
+
+ tcpm_reset_port(dev);
+}
+
+static void tcpm_src_detach(struct udevice *dev)
+{
+ tcpm_detach(dev);
+}
+
+static int tcpm_snk_attach(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ if (port->attached)
+ return 0;
+
+ ret = tcpm_set_polarity(dev, port->cc2 != TYPEC_CC_OPEN ?
+ TYPEC_POLARITY_CC2 : TYPEC_POLARITY_CC1);
+ if (ret < 0)
+ return ret;
+
+ ret = tcpm_set_roles(dev, true, TYPEC_SINK, TYPEC_DEVICE);
+ if (ret < 0)
+ return ret;
+
+ port->pd_capable = false;
+
+ port->partner = NULL;
+
+ port->attached = true;
+ dev_info(dev, "TCPM: CC connected in %s as UFP\n",
+ port->cc1 != TYPEC_CC_OPEN ? "CC1" : "CC2");
+
+ return 0;
+}
+
+static void tcpm_snk_detach(struct udevice *dev)
+{
+ tcpm_detach(dev);
+}
+
+static inline enum tcpm_state hard_reset_state(struct tcpm_port *port)
+{
+ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT)
+ return HARD_RESET_SEND;
+ if (port->pd_capable)
+ return ERROR_RECOVERY;
+ if (port->pwr_role == TYPEC_SOURCE)
+ return SRC_UNATTACHED;
+ if (port->state == SNK_WAIT_CAPABILITIES)
+ return SNK_READY;
+ return SNK_UNATTACHED;
+}
+
+static inline enum tcpm_state unattached_state(struct tcpm_port *port)
+{
+ if (port->port_type == TYPEC_PORT_DRP) {
+ if (port->pwr_role == TYPEC_SOURCE)
+ return SRC_UNATTACHED;
+ else
+ return SNK_UNATTACHED;
+ } else if (port->port_type == TYPEC_PORT_SRC) {
+ return SRC_UNATTACHED;
+ }
+
+ return SNK_UNATTACHED;
+}
+
+static void run_state_machine(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int ret;
+
+ port->enter_state = port->state;
+ switch (port->state) {
+ case TOGGLING:
+ break;
+ /* SRC states */
+ case SRC_UNATTACHED:
+ tcpm_src_detach(dev);
+ if (tcpm_start_toggling(dev, tcpm_rp_cc(port))) {
+ tcpm_set_state(dev, TOGGLING, 0);
+ break;
+ }
+ tcpm_set_cc(dev, tcpm_rp_cc(port));
+ if (port->port_type == TYPEC_PORT_DRP)
+ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_DRP_SNK);
+ break;
+ case SRC_ATTACH_WAIT:
+ if (tcpm_port_is_source(port))
+ tcpm_set_state(dev, SRC_ATTACHED, PD_T_CC_DEBOUNCE);
+ break;
+
+ case SRC_ATTACHED:
+ ret = tcpm_src_attach(dev);
+ /*
+ * Currently, vbus control is not implemented,
+ * and the SRC detection process cannot be fully implemented.
+ */
+ tcpm_set_state(dev, SRC_READY, 0);
+ break;
+ case SRC_STARTUP:
+ port->caps_count = 0;
+ port->negotiated_rev = PD_MAX_REV;
+ port->message_id = 0;
+ port->rx_msgid = -1;
+ port->explicit_contract = false;
+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0);
+ break;
+ case SRC_SEND_CAPABILITIES:
+ port->caps_count++;
+ if (port->caps_count > PD_N_CAPS_COUNT) {
+ tcpm_set_state(dev, SRC_READY, 0);
+ break;
+ }
+ ret = tcpm_pd_send_source_caps(dev);
+ if (ret < 0) {
+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES,
+ PD_T_SEND_SOURCE_CAP);
+ } else {
+ /*
+ * Per standard, we should clear the reset counter here.
+ * However, that can result in state machine hang-ups.
+ * Reset it only in READY state to improve stability.
+ */
+ /* port->hard_reset_count = 0; */
+ port->caps_count = 0;
+ port->pd_capable = true;
+ tcpm_set_state_cond(dev, SRC_SEND_CAPABILITIES_TIMEOUT,
+ PD_T_SEND_SOURCE_CAP);
+ }
+ break;
+ case SRC_SEND_CAPABILITIES_TIMEOUT:
+ /*
+ * Error recovery for a PD_DATA_SOURCE_CAP reply timeout.
+ *
+ * PD 2.0 sinks are supposed to accept src-capabilities with a
+ * 3.0 header and simply ignore any src PDOs which the sink does
+ * not understand such as PPS but some 2.0 sinks instead ignore
+ * the entire PD_DATA_SOURCE_CAP message, causing contract
+ * negotiation to fail.
+ *
+ * After PD_N_HARD_RESET_COUNT hard-reset attempts, we try
+ * sending src-capabilities with a lower PD revision to
+ * make these broken sinks work.
+ */
+ if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) {
+ tcpm_set_state(dev, HARD_RESET_SEND, 0);
+ } else if (port->negotiated_rev > PD_REV20) {
+ port->negotiated_rev--;
+ port->hard_reset_count = 0;
+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0);
+ } else {
+ tcpm_set_state(dev, hard_reset_state(port), 0);
+ }
+ break;
+ case SRC_NEGOTIATE_CAPABILITIES:
+ ret = tcpm_pd_check_request(dev);
+ if (ret < 0) {
+ tcpm_pd_send_control(dev, PD_CTRL_REJECT);
+ if (!port->explicit_contract) {
+ tcpm_set_state(dev,
+ SRC_WAIT_NEW_CAPABILITIES, 0);
+ } else {
+ tcpm_set_state(dev, SRC_READY, 0);
+ }
+ } else {
+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT);
+ tcpm_set_state(dev, SRC_TRANSITION_SUPPLY,
+ PD_T_SRC_TRANSITION);
+ }
+ break;
+ case SRC_TRANSITION_SUPPLY:
+ /* XXX: regulator_set_voltage(vbus, ...) */
+ tcpm_pd_send_control(dev, PD_CTRL_PS_RDY);
+ port->explicit_contract = true;
+ tcpm_set_state_cond(dev, SRC_READY, 0);
+ break;
+ case SRC_READY:
+ port->hard_reset_count = 0;
+
+ tcpm_typec_connect(port);
+ break;
+ case SRC_WAIT_NEW_CAPABILITIES:
+ /* Nothing to do... */
+ break;
+
+ /* SNK states */
+ case SNK_UNATTACHED:
+ tcpm_snk_detach(dev);
+ if (tcpm_start_toggling(dev, TYPEC_CC_RD)) {
+ tcpm_set_state(dev, TOGGLING, 0);
+ break;
+ }
+ tcpm_set_cc(dev, TYPEC_CC_RD);
+ if (port->port_type == TYPEC_PORT_DRP)
+ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_DRP_SRC);
+ break;
+ case SNK_ATTACH_WAIT:
+ if ((port->cc1 == TYPEC_CC_OPEN &&
+ port->cc2 != TYPEC_CC_OPEN) ||
+ (port->cc1 != TYPEC_CC_OPEN &&
+ port->cc2 == TYPEC_CC_OPEN))
+ tcpm_set_state(dev, SNK_DEBOUNCED,
+ PD_T_CC_DEBOUNCE);
+ else if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, SNK_UNATTACHED,
+ PD_T_CC_DEBOUNCE);
+ break;
+ case SNK_DEBOUNCED:
+ if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, SNK_UNATTACHED, PD_T_PD_DEBOUNCE);
+ else if (port->vbus_present)
+ tcpm_set_state(dev, SNK_ATTACHED, 0);
+ else
+ /* Wait for VBUS, but not forever */
+ tcpm_set_state(dev, PORT_RESET, PD_T_PS_SOURCE_ON);
+ break;
+ case SNK_ATTACHED:
+ ret = tcpm_snk_attach(dev);
+ if (ret < 0)
+ tcpm_set_state(dev, SNK_UNATTACHED, 0);
+ else
+ tcpm_set_state(dev, SNK_STARTUP, 0);
+ break;
+ case SNK_STARTUP:
+ port->negotiated_rev = PD_MAX_REV;
+ port->message_id = 0;
+ port->rx_msgid = -1;
+ port->explicit_contract = false;
+ tcpm_set_state(dev, SNK_DISCOVERY, 0);
+ break;
+ case SNK_DISCOVERY:
+ if (port->vbus_present) {
+ tcpm_set_current_limit(dev,
+ tcpm_get_current_limit(port),
+ 5000);
+ tcpm_set_charge(dev, true);
+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0);
+ break;
+ }
+ /*
+ * For DRP, timeouts differ. Also, handling is supposed to be
+ * different and much more complex (dead battery detection;
+ * see USB power delivery specification, section 8.3.3.6.1.5.1).
+ */
+ tcpm_set_state(dev, hard_reset_state(port),
+ port->port_type == TYPEC_PORT_DRP ?
+ PD_T_DB_DETECT : PD_T_NO_RESPONSE);
+ break;
+ case SNK_DISCOVERY_DEBOUNCE:
+ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE_DONE,
+ PD_T_CC_DEBOUNCE);
+ break;
+ case SNK_DISCOVERY_DEBOUNCE_DONE:
+ tcpm_set_state(dev, unattached_state(port), 0);
+ break;
+ case SNK_WAIT_CAPABILITIES:
+ ret = drvops->set_pd_rx(dev, true);
+ if (ret < 0) {
+ tcpm_set_state(dev, SNK_READY, 0);
+ break;
+ }
+ /*
+ * If VBUS has never been low, and we time out waiting
+ * for source cap, try a soft reset first, in case we
+ * were already in a stable contract before this boot.
+ * Do this only once.
+ */
+ if (port->vbus_never_low) {
+ port->vbus_never_low = false;
+ tcpm_set_state(dev, SOFT_RESET_SEND,
+ PD_T_SINK_WAIT_CAP);
+ } else {
+ tcpm_set_state(dev, hard_reset_state(port),
+ PD_T_SINK_WAIT_CAP);
+ }
+ break;
+ case SNK_NEGOTIATE_CAPABILITIES:
+ port->pd_capable = true;
+ port->hard_reset_count = 0;
+ ret = tcpm_pd_send_request(dev);
+ if (ret < 0) {
+ /* Let the Source send capabilities again. */
+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0);
+ } else {
+ tcpm_set_state_cond(dev, hard_reset_state(port),
+ PD_T_SENDER_RESPONSE);
+ }
+ break;
+ case SNK_TRANSITION_SINK:
+ case SNK_TRANSITION_SINK_VBUS:
+ tcpm_set_state(dev, hard_reset_state(port),
+ PD_T_PS_TRANSITION);
+ break;
+ case SNK_READY:
+ port->update_sink_caps = false;
+ tcpm_typec_connect(port);
+ /*
+ * Here poll_event_cnt is cleared, waiting for self-powered Type-C devices
+ * to send DR_swap Messge until 1s (TCPM_POLL_EVENT_TIME_OUT * 500us)timeout
+ */
+ if (port->wait_dr_swap_message)
+ tcpm_reset_event_cnt(dev);
+
+ break;
+
+ /* Hard_Reset states */
+ case HARD_RESET_SEND:
+ tcpm_pd_transmit(dev, TCPC_TX_HARD_RESET, NULL);
+ tcpm_set_state(dev, HARD_RESET_START, 0);
+ port->wait_dr_swap_message = false;
+ break;
+ case HARD_RESET_START:
+ port->hard_reset_count++;
+ drvops->set_pd_rx(dev, false);
+ port->nr_sink_caps = 0;
+ if (port->pwr_role == TYPEC_SOURCE)
+ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_OFF,
+ PD_T_PS_HARD_RESET);
+ else
+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_OFF, 0);
+ break;
+ case SRC_HARD_RESET_VBUS_OFF:
+ tcpm_set_vconn(dev, true);
+ tcpm_set_vbus(dev, false);
+ tcpm_set_roles(dev, port->self_powered, TYPEC_SOURCE,
+ TYPEC_HOST);
+ tcpm_set_state(dev, SRC_HARD_RESET_VBUS_ON, PD_T_SRC_RECOVER);
+ break;
+ case SRC_HARD_RESET_VBUS_ON:
+ tcpm_set_vconn(dev, true);
+ tcpm_set_vbus(dev, true);
+ drvops->set_pd_rx(dev, true);
+ tcpm_set_attached_state(dev, true);
+ tcpm_set_state(dev, SRC_UNATTACHED, PD_T_PS_SOURCE_ON);
+ break;
+ case SNK_HARD_RESET_SINK_OFF:
+ tcpm_set_vconn(dev, false);
+ if (port->pd_capable)
+ tcpm_set_charge(dev, false);
+ tcpm_set_roles(dev, port->self_powered, TYPEC_SINK,
+ TYPEC_DEVICE);
+ /*
+ * VBUS may or may not toggle, depending on the adapter.
+ * If it doesn't toggle, transition to SNK_HARD_RESET_SINK_ON
+ * directly after timeout.
+ */
+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, PD_T_SAFE_0V);
+ break;
+ case SNK_HARD_RESET_WAIT_VBUS:
+ /* Assume we're disconnected if VBUS doesn't come back. */
+ tcpm_set_state(dev, SNK_UNATTACHED,
+ PD_T_SRC_RECOVER_MAX + PD_T_SRC_TURN_ON);
+ break;
+ case SNK_HARD_RESET_SINK_ON:
+ /* Note: There is no guarantee that VBUS is on in this state */
+ /*
+ * XXX:
+ * The specification suggests that dual mode ports in sink
+ * mode should transition to state PE_SRC_Transition_to_default.
+ * See USB power delivery specification chapter 8.3.3.6.1.3.
+ * This would mean to
+ * - turn off VCONN, reset power supply
+ * - request hardware reset
+ * - turn on VCONN
+ * - Transition to state PE_Src_Startup
+ * SNK only ports shall transition to state Snk_Startup
+ * (see chapter 8.3.3.3.8).
+ * Similar, dual-mode ports in source mode should transition
+ * to PE_SNK_Transition_to_default.
+ */
+ if (port->pd_capable) {
+ tcpm_set_current_limit(dev,
+ tcpm_get_current_limit(port),
+ 5000);
+ tcpm_set_charge(dev, true);
+ }
+ tcpm_set_attached_state(dev, true);
+ tcpm_set_state(dev, SNK_STARTUP, 0);
+ break;
+
+ /* Soft_Reset states */
+ case SOFT_RESET:
+ port->message_id = 0;
+ port->rx_msgid = -1;
+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT);
+ if (port->pwr_role == TYPEC_SOURCE)
+ tcpm_set_state(dev, SRC_SEND_CAPABILITIES, 0);
+ else
+ tcpm_set_state(dev, SNK_WAIT_CAPABILITIES, 0);
+ break;
+ case SOFT_RESET_SEND:
+ port->message_id = 0;
+ port->rx_msgid = -1;
+ if (tcpm_pd_send_control(dev, PD_CTRL_SOFT_RESET))
+ tcpm_set_state_cond(dev, hard_reset_state(port), 0);
+ else
+ tcpm_set_state_cond(dev, hard_reset_state(port),
+ PD_T_SENDER_RESPONSE);
+ break;
+
+ /* DR_Swap states */
+ case DR_SWAP_ACCEPT:
+ tcpm_pd_send_control(dev, PD_CTRL_ACCEPT);
+ tcpm_set_state_cond(dev, DR_SWAP_CHANGE_DR, 0);
+ break;
+ case DR_SWAP_CHANGE_DR:
+ if (port->data_role == TYPEC_HOST) {
+ tcpm_set_roles(dev, true, port->pwr_role,
+ TYPEC_DEVICE);
+ } else {
+ tcpm_set_roles(dev, true, port->pwr_role,
+ TYPEC_HOST);
+ }
+ /* DR_swap process complete, wait_dr_swap_message is cleared */
+ port->wait_dr_swap_message = false;
+ tcpm_set_state(dev, ready_state(port), 0);
+ break;
+ case ERROR_RECOVERY:
+ tcpm_set_state(dev, PORT_RESET, 0);
+ break;
+ case PORT_RESET:
+ tcpm_reset_port(dev);
+ if (port->self_powered)
+ tcpm_set_cc(dev, TYPEC_CC_OPEN);
+ else
+ tcpm_set_cc(dev, tcpm_default_state(port) == SNK_UNATTACHED ?
+ TYPEC_CC_RD : tcpm_rp_cc(port));
+ tcpm_set_state(dev, PORT_RESET_WAIT_OFF,
+ PD_T_ERROR_RECOVERY);
+ break;
+ case PORT_RESET_WAIT_OFF:
+ tcpm_set_state(dev,
+ tcpm_default_state(port),
+ port->vbus_present ? PD_T_PS_SOURCE_OFF : 0);
+ break;
+ default:
+ dev_err(dev, "TCPM: Unexpected port state %d\n", port->state);
+ break;
+ }
+}
+
+static void tcpm_state_machine(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum tcpm_state prev_state;
+
+ mutex_lock(&port->lock);
+ port->state_machine_running = true;
+
+ if (port->queued_message && tcpm_send_queued_message(dev))
+ goto done;
+
+ /* If we were queued due to a delayed state change, update it now */
+ if (port->delayed_state) {
+ dev_dbg(dev, "TCPM: state change %s -> %s [delayed %ld ms]\n",
+ tcpm_states[port->state],
+ tcpm_states[port->delayed_state], port->delay_ms);
+ port->prev_state = port->state;
+ port->state = port->delayed_state;
+ port->delayed_state = INVALID_STATE;
+ }
+
+ /*
+ * Continue running as long as we have (non-delayed) state changes
+ * to make.
+ */
+ do {
+ prev_state = port->state;
+ run_state_machine(dev);
+ if (port->queued_message)
+ tcpm_send_queued_message(dev);
+ } while (port->state != prev_state && !port->delayed_state);
+
+done:
+ port->state_machine_running = false;
+ mutex_unlock(&port->lock);
+}
+
+static void _tcpm_cc_change(struct udevice *dev, enum typec_cc_status cc1,
+ enum typec_cc_status cc2)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum typec_cc_status old_cc1, old_cc2;
+ enum tcpm_state new_state;
+
+ old_cc1 = port->cc1;
+ old_cc2 = port->cc2;
+ port->cc1 = cc1;
+ port->cc2 = cc2;
+
+ dev_dbg(dev, "TCPM: CC1: %u -> %u, CC2: %u -> %u [state %s, polarity %d, %s]\n",
+ old_cc1, cc1, old_cc2, cc2, tcpm_states[port->state],
+ port->polarity,
+ tcpm_port_is_disconnected(port) ? "disconnected" : "connected");
+
+ switch (port->state) {
+ case TOGGLING:
+ if (tcpm_port_is_source(port))
+ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0);
+ else if (tcpm_port_is_sink(port))
+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0);
+ break;
+ case SRC_UNATTACHED:
+ case SRC_ATTACH_WAIT:
+ if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, SRC_UNATTACHED, 0);
+ else if (cc1 != old_cc1 || cc2 != old_cc2)
+ tcpm_set_state(dev, SRC_ATTACH_WAIT, 0);
+ break;
+ case SRC_ATTACHED:
+ case SRC_SEND_CAPABILITIES:
+ case SRC_READY:
+ if (tcpm_port_is_disconnected(port) ||
+ !tcpm_port_is_source(port))
+ tcpm_set_state(dev, SRC_UNATTACHED, 0);
+ break;
+ case SNK_UNATTACHED:
+ if (tcpm_port_is_sink(port))
+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0);
+ break;
+ case SNK_ATTACH_WAIT:
+ if ((port->cc1 == TYPEC_CC_OPEN &&
+ port->cc2 != TYPEC_CC_OPEN) ||
+ (port->cc1 != TYPEC_CC_OPEN &&
+ port->cc2 == TYPEC_CC_OPEN))
+ new_state = SNK_DEBOUNCED;
+ else if (tcpm_port_is_disconnected(port))
+ new_state = SNK_UNATTACHED;
+ else
+ break;
+ if (new_state != port->delayed_state)
+ tcpm_set_state(dev, SNK_ATTACH_WAIT, 0);
+ break;
+ case SNK_DEBOUNCED:
+ if (tcpm_port_is_disconnected(port))
+ new_state = SNK_UNATTACHED;
+ else if (port->vbus_present)
+ new_state = tcpm_try_src(port) ? INVALID_STATE : SNK_ATTACHED;
+ else
+ new_state = SNK_UNATTACHED;
+ if (new_state != port->delayed_state)
+ tcpm_set_state(dev, SNK_DEBOUNCED, 0);
+ break;
+ case SNK_READY:
+ if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, unattached_state(port), 0);
+ else if (!port->pd_capable &&
+ (cc1 != old_cc1 || cc2 != old_cc2))
+ tcpm_set_current_limit(dev,
+ tcpm_get_current_limit(port),
+ 5000);
+ break;
+
+ case SNK_DISCOVERY:
+ /* CC line is unstable, wait for debounce */
+ if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, SNK_DISCOVERY_DEBOUNCE, 0);
+ break;
+ case SNK_DISCOVERY_DEBOUNCE:
+ break;
+
+ case PORT_RESET:
+ case PORT_RESET_WAIT_OFF:
+ /*
+ * State set back to default mode once the timer completes.
+ * Ignore CC changes here.
+ */
+ break;
+ default:
+ /*
+ * While acting as sink and auto vbus discharge is enabled, Allow disconnect
+ * to be driven by vbus disconnect.
+ */
+ if (tcpm_port_is_disconnected(port))
+ tcpm_set_state(dev, unattached_state(port), 0);
+ break;
+ }
+}
+
+static void _tcpm_pd_vbus_on(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ dev_dbg(dev, "TCPM: VBUS on event\n");
+ port->vbus_present = true;
+ /*
+ * When vbus_present is true i.e. Voltage at VBUS is greater than VSAFE5V implicitly
+ * states that vbus is not at VSAFE0V, hence clear the vbus_vsafe0v flag here.
+ */
+ port->vbus_vsafe0v = false;
+
+ switch (port->state) {
+ case SNK_TRANSITION_SINK_VBUS:
+ port->explicit_contract = true;
+ tcpm_set_state(dev, SNK_READY, 0);
+ break;
+ case SNK_DISCOVERY:
+ tcpm_set_state(dev, SNK_DISCOVERY, 0);
+ break;
+ case SNK_DEBOUNCED:
+ tcpm_set_state(dev, SNK_ATTACHED, 0);
+ break;
+ case SNK_HARD_RESET_WAIT_VBUS:
+ tcpm_set_state(dev, SNK_HARD_RESET_SINK_ON, 0);
+ break;
+ case SRC_ATTACHED:
+ tcpm_set_state(dev, SRC_STARTUP, 0);
+ break;
+ case SRC_HARD_RESET_VBUS_ON:
+ tcpm_set_state(dev, SRC_STARTUP, 0);
+ break;
+
+ case PORT_RESET:
+ case PORT_RESET_WAIT_OFF:
+ /*
+ * State set back to default mode once the timer completes.
+ * Ignore vbus changes here.
+ */
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void _tcpm_pd_vbus_off(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ dev_dbg(dev, "TCPM: VBUS off event\n");
+ port->vbus_present = false;
+ port->vbus_never_low = false;
+ switch (port->state) {
+ case SNK_HARD_RESET_SINK_OFF:
+ tcpm_set_state(dev, SNK_HARD_RESET_WAIT_VBUS, 0);
+ break;
+ case HARD_RESET_SEND:
+ break;
+ case SNK_ATTACH_WAIT:
+ tcpm_set_state(dev, SNK_UNATTACHED, 0);
+ break;
+
+ case SNK_NEGOTIATE_CAPABILITIES:
+ break;
+
+ case PORT_RESET_WAIT_OFF:
+ tcpm_set_state(dev, tcpm_default_state(port), 0);
+ break;
+
+ case PORT_RESET:
+ /*
+ * State set back to default mode once the timer completes.
+ * Ignore vbus changes here.
+ */
+ break;
+
+ default:
+ if (port->pwr_role == TYPEC_SINK && port->attached)
+ tcpm_set_state(dev, SNK_UNATTACHED, 0);
+ break;
+ }
+}
+
+void tcpm_cc_change(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ enum typec_cc_status cc1, cc2;
+
+ tcpm_reset_event_cnt(dev);
+ if (drvops->get_cc(dev, &cc1, &cc2) == 0)
+ _tcpm_cc_change(dev, cc1, cc2);
+}
+
+void tcpm_vbus_change(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ bool vbus;
+
+ tcpm_reset_event_cnt(dev);
+ vbus = drvops->get_vbus(dev);
+ if (vbus)
+ _tcpm_pd_vbus_on(dev);
+ else
+ _tcpm_pd_vbus_off(dev);
+}
+
+void tcpm_pd_hard_reset(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ tcpm_reset_event_cnt(dev);
+ dev_dbg(dev, "TCPM: Received hard reset\n");
+
+ /* If a hard reset message is received during the port reset process,
+ * we should ignore it, that is, do not set port->state to HARD_RESET_START.
+ */
+ if (port->state == PORT_RESET || port->state == PORT_RESET_WAIT_OFF)
+ return;
+
+ /*
+ * If we keep receiving hard reset requests, executing the hard reset
+ * must have failed. Revert to error recovery if that happens.
+ */
+ tcpm_set_state(dev,
+ port->hard_reset_count < PD_N_HARD_RESET_COUNT ?
+ HARD_RESET_START : ERROR_RECOVERY,
+ 0);
+}
+
+static void tcpm_init(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ enum typec_cc_status cc1, cc2;
+
+ drvops->init(dev);
+
+ tcpm_reset_port(dev);
+
+ /*
+ * XXX
+ * Should possibly wait for VBUS to settle if it was enabled locally
+ * since tcpm_reset_port() will disable VBUS.
+ */
+ port->vbus_present = drvops->get_vbus(dev);
+ if (port->vbus_present)
+ port->vbus_never_low = true;
+
+ /*
+ * 1. When vbus_present is true, voltage on VBUS is already at VSAFE5V.
+ * So implicitly vbus_vsafe0v = false.
+ *
+ * 2. When vbus_present is false and TCPC does NOT support querying
+ * vsafe0v status, then, it's best to assume vbus is at VSAFE0V i.e.
+ * vbus_vsafe0v is true.
+ *
+ * 3. When vbus_present is false and TCPC does support querying vsafe0v,
+ * then, query tcpc for vsafe0v status.
+ */
+ if (port->vbus_present)
+ port->vbus_vsafe0v = false;
+ else
+ port->vbus_vsafe0v = true;
+
+ tcpm_set_state(dev, tcpm_default_state(port), 0);
+
+ if (drvops->get_cc(dev, &cc1, &cc2) == 0)
+ _tcpm_cc_change(dev, cc1, cc2);
+}
+
+static int tcpm_fw_get_caps(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ ofnode node;
+ const char *cap_str;
+ int ret;
+ u32 mw;
+
+ ret = drvops->get_connector_node(dev, &node);
+ if (ret)
+ return ret;
+
+ cap_str = ofnode_read_string(node, "power-role");
+ if (!cap_str)
+ return -EINVAL;
+
+ if (!strcmp("dual", cap_str))
+ port->typec_type = TYPEC_PORT_DRP;
+ else if (!strcmp("source", cap_str))
+ port->typec_type = TYPEC_PORT_SRC;
+ else if (!strcmp("sink", cap_str))
+ port->typec_type = TYPEC_PORT_SNK;
+ else
+ return -EINVAL;
+
+ port->port_type = port->typec_type;
+
+ if (port->port_type == TYPEC_PORT_SNK)
+ goto sink;
+
+ /* Get source pdos */
+ ret = ofnode_read_size(node, "source-pdos") / sizeof(u32);
+ if (ret <= 0)
+ return -EINVAL;
+
+ port->nr_src_pdo = min(ret, PDO_MAX_OBJECTS);
+ ret = ofnode_read_u32_array(node, "source-pdos",
+ port->src_pdo, port->nr_src_pdo);
+ if (ret || tcpm_validate_caps(dev, port->src_pdo, port->nr_src_pdo))
+ return -EINVAL;
+
+ if (port->port_type == TYPEC_PORT_SRC)
+ return 0;
+
+ /* Get the preferred power role for DRP */
+ cap_str = ofnode_read_string(node, "try-power-role");
+ if (!cap_str)
+ return -EINVAL;
+
+ if (!strcmp("sink", cap_str))
+ port->typec_prefer_role = TYPEC_SINK;
+ else if (!strcmp("source", cap_str))
+ port->typec_prefer_role = TYPEC_SOURCE;
+ else
+ return -EINVAL;
+
+ if (port->typec_prefer_role < 0)
+ return -EINVAL;
+sink:
+ /* Get sink pdos */
+ ret = ofnode_read_size(node, "sink-pdos") / sizeof(u32);
+ if (ret <= 0)
+ return -EINVAL;
+
+ port->nr_snk_pdo = min(ret, PDO_MAX_OBJECTS);
+ ret = ofnode_read_u32_array(node, "sink-pdos",
+ port->snk_pdo, port->nr_snk_pdo);
+ if (ret || tcpm_validate_caps(dev, port->snk_pdo, port->nr_snk_pdo))
+ return -EINVAL;
+
+ if (ofnode_read_u32_array(node, "op-sink-microwatt", &mw, 1))
+ return -EINVAL;
+ port->operating_snk_mw = mw / 1000;
+
+ port->self_powered = ofnode_read_bool(node, "self-powered");
+
+ return 0;
+}
+
+static int tcpm_port_init(struct udevice *dev)
+{
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+ int err;
+
+ err = tcpm_fw_get_caps(dev);
+ if (err < 0) {
+ dev_err(dev, "TCPM: please check the dts config: %d\n", err);
+ return err;
+ }
+
+ port->try_role = port->typec_prefer_role;
+ port->port_type = port->typec_type;
+
+ tcpm_init(dev);
+
+ dev_info(dev, "TCPM: init finished\n");
+
+ return 0;
+}
+
+static void tcpm_poll_event(struct udevice *dev)
+{
+ const struct dm_tcpm_ops *drvops = dev_get_driver_ops(dev);
+ struct tcpm_port *port = dev_get_uclass_plat(dev);
+
+ if (!drvops->get_vbus(dev))
+ return;
+
+ while (port->poll_event_cnt < TCPM_POLL_EVENT_TIME_OUT) {
+ if (!port->wait_dr_swap_message &&
+ (port->state == SNK_READY || port->state == SRC_READY))
+ break;
+
+ drvops->poll_event(dev);
+ port->poll_event_cnt++;
+ udelay(500);
+ tcpm_check_and_run_delayed_work(dev);
+ }
+
+ if (port->state != SNK_READY && port->state != SRC_READY)
+ dev_warn(dev, "TCPM: exit in state %s\n",
+ tcpm_states[port->state]);
+
+ /*
+ * At this time, call the callback function of the respective pd chip
+ * to enter the low-power mode. In order to reduce the time spent on
+ * the PD chip driver as much as possible, the tcpm framework does not
+ * fully process the communication initiated by the device,so it should
+ * be noted that we can disable the internal oscillator, etc., but do
+ * not turn off the power of the transceiver module, otherwise the
+ * self-powered Type-C device will initiate a Message(eg: self-powered
+ * Type-C hub initiates a SINK capability request(PD_CTRL_GET_SINK_CAP))
+ * and the pd chip cannot reply to GoodCRC, causing the self-powered Type-C
+ * device to switch vbus to vSafe5v, or even turn off vbus.
+ */
+ if (!drvops->enter_low_power_mode)
+ return;
+
+ if (drvops->enter_low_power_mode(dev, port->attached, port->pd_capable))
+ dev_err(dev, "TCPM: failed to enter low power\n");
+ else
+ dev_info(dev, "TCPM: PD chip enter low power mode\n");
+}
+
+int tcpm_post_probe(struct udevice *dev)
+{
+ int ret = tcpm_port_init(dev);
+
+ if (ret < 0) {
+ dev_err(dev, "failed to tcpm port init\n");
+ return ret;
+ }
+
+ tcpm_poll_event(dev);
+
+ return 0;
+}
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-02 14:50:28 +0000