diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/block/blk-uclass.c | 11 | ||||
| -rw-r--r-- | drivers/core/tag.c | 4 | ||||
| -rw-r--r-- | drivers/core/uclass.c | 20 | ||||
| -rw-r--r-- | drivers/mmc/Makefile | 5 | ||||
| -rw-r--r-- | drivers/mmc/mmc-uclass.c | 23 | ||||
| -rw-r--r-- | drivers/mmc/mmc_bootdev.c | 62 | ||||
| -rw-r--r-- | drivers/spi/atmel-quadspi.c | 3 | ||||
| -rw-r--r-- | drivers/sysreset/Kconfig | 15 | ||||
| -rw-r--r-- | drivers/sysreset/Makefile | 1 | ||||
| -rw-r--r-- | drivers/sysreset/sysreset_at91.c | 71 | ||||
| -rw-r--r-- | drivers/timer/Kconfig | 23 | ||||
| -rw-r--r-- | drivers/timer/Makefile | 5 | ||||
| -rw-r--r-- | drivers/timer/ag101p_timer.c | 117 | ||||
| -rw-r--r-- | drivers/timer/atcpit100_timer.c | 112 | ||||
| -rw-r--r-- | drivers/usb/host/Makefile | 4 | ||||
| -rw-r--r-- | drivers/usb/host/usb_bootdev.c | 61 | ||||
| -rw-r--r-- | drivers/watchdog/Makefile | 1 | ||||
| -rw-r--r-- | drivers/watchdog/ftwdt010_wdt.c | 92 |
18 files changed, 291 insertions, 339 deletions
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index f1e4a856467..21c5209bb63 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -509,6 +509,13 @@ int blk_get_from_parent(struct udevice *parent, struct udevice **devp) return 0; } +const char *blk_get_devtype(struct udevice *dev) +{ + struct udevice *parent = dev_get_parent(dev); + + return uclass_get_name(device_get_uclass_id(parent)); +}; + int blk_find_max_devnum(enum if_type if_type) { struct udevice *dev; @@ -741,6 +748,10 @@ static int blk_post_probe(struct udevice *dev) struct blk_desc *desc = dev_get_uclass_plat(dev); part_init(desc); + + if (desc->part_type != PART_TYPE_UNKNOWN && + part_create_block_devices(dev)) + debug("*** creating partitions failed\n"); } return 0; diff --git a/drivers/core/tag.c b/drivers/core/tag.c index 6829bcd8806..22999193a5a 100644 --- a/drivers/core/tag.c +++ b/drivers/core/tag.c @@ -29,7 +29,7 @@ int dev_tag_set_ptr(struct udevice *dev, enum dm_tag_t tag, void *ptr) node = calloc(sizeof(*node), 1); if (!node) - return -ENOSPC; + return -ENOMEM; node->dev = dev; node->tag = tag; @@ -53,7 +53,7 @@ int dev_tag_set_val(struct udevice *dev, enum dm_tag_t tag, ulong val) node = calloc(sizeof(*node), 1); if (!node) - return -ENOSPC; + return -ENOMEM; node->dev = dev; node->tag = tag; diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index 2578803b7a4..08d9ed82de2 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -180,14 +180,15 @@ void uclass_set_priv(struct uclass *uc, void *priv) uc->priv_ = priv; } -enum uclass_id uclass_get_by_name_len(const char *name, int len) +enum uclass_id uclass_get_by_namelen(const char *name, int len) { int i; for (i = 0; i < UCLASS_COUNT; i++) { struct uclass_driver *uc_drv = lists_uclass_lookup(i); - if (uc_drv && !strncmp(uc_drv->name, name, len)) + if (uc_drv && !strncmp(uc_drv->name, name, len) && + strlen(uc_drv->name) == len) return i; } @@ -196,7 +197,7 @@ enum uclass_id uclass_get_by_name_len(const char *name, int len) enum uclass_id uclass_get_by_name(const char *name) { - return uclass_get_by_name_len(name, strlen(name)); + return uclass_get_by_namelen(name, strlen(name)); } int dev_get_uclass_index(struct udevice *dev, struct uclass **ucp) @@ -273,8 +274,8 @@ int uclass_find_next_device(struct udevice **devp) return 0; } -int uclass_find_device_by_name(enum uclass_id id, const char *name, - struct udevice **devp) +int uclass_find_device_by_namelen(enum uclass_id id, const char *name, int len, + struct udevice **devp) { struct uclass *uc; struct udevice *dev; @@ -288,7 +289,8 @@ int uclass_find_device_by_name(enum uclass_id id, const char *name, return ret; uclass_foreach_dev(dev, uc) { - if (!strcmp(dev->name, name)) { + if (!strncmp(dev->name, name, len) && + strlen(dev->name) == len) { *devp = dev; return 0; } @@ -297,6 +299,12 @@ int uclass_find_device_by_name(enum uclass_id id, const char *name, return -ENODEV; } +int uclass_find_device_by_name(enum uclass_id id, const char *name, + struct udevice **devp) +{ + return uclass_find_device_by_namelen(id, name, strlen(name), devp); +} + int uclass_find_next_free_seq(struct uclass *uc) { struct udevice *dev; diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 17ebc04203e..96275093022 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -5,6 +5,11 @@ obj-y += mmc.o obj-$(CONFIG_$(SPL_)DM_MMC) += mmc-uclass.o + +ifdef CONFIG_$(SPL_TPL_)DM_MMC +obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += mmc_bootdev.o +endif + obj-$(CONFIG_$(SPL_)MMC_WRITE) += mmc_write.o obj-$(CONFIG_MMC_PWRSEQ) += mmc-pwrseq.o obj-$(CONFIG_MMC_SDHCI_ADMA_HELPERS) += sdhci-adma.o diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 57da788ad80..688bdc06d42 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY UCLASS_MMC #include <common.h> +#include <bootdev.h> #include <log.h> #include <mmc.h> #include <dm.h> @@ -315,6 +316,20 @@ int mmc_get_next_devnum(void) return blk_find_max_devnum(IF_TYPE_MMC); } +int mmc_get_blk(struct udevice *dev, struct udevice **blkp) +{ + struct udevice *blk; + int ret; + + device_find_first_child_by_uclass(dev, UCLASS_BLK, &blk); + ret = device_probe(blk); + if (ret) + return ret; + *blkp = blk; + + return 0; +} + struct blk_desc *mmc_get_blk_desc(struct mmc *mmc) { struct blk_desc *desc; @@ -406,6 +421,10 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) mmc->cfg = cfg; mmc->priv = dev; + ret = bootdev_setup_for_dev(dev, "mmc_bootdev"); + if (ret) + return log_msg_ret("bootdev", ret); + /* the following chunk was from mmc_register() */ /* Setup dsr related values */ @@ -424,12 +443,16 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) int mmc_unbind(struct udevice *dev) { struct udevice *bdev; + int ret; device_find_first_child_by_uclass(dev, UCLASS_BLK, &bdev); if (bdev) { device_remove(bdev, DM_REMOVE_NORMAL); device_unbind(bdev); } + ret = bootdev_unbind_dev(dev); + if (ret) + return log_msg_ret("bootdev", ret); return 0; } diff --git a/drivers/mmc/mmc_bootdev.c b/drivers/mmc/mmc_bootdev.c new file mode 100644 index 00000000000..b4f41fb3a67 --- /dev/null +++ b/drivers/mmc/mmc_bootdev.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Bootdevice for MMC + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <bootdev.h> +#include <dm.h> +#include <mmc.h> + +static int mmc_get_bootflow(struct udevice *dev, struct bootflow_iter *iter, + struct bootflow *bflow) +{ + struct udevice *mmc_dev = dev_get_parent(dev); + struct udevice *blk; + int ret; + + ret = mmc_get_blk(mmc_dev, &blk); + /* + * If there is no media, indicate that no more partitions should be + * checked + */ + if (ret == -EOPNOTSUPP) + ret = -ESHUTDOWN; + if (ret) + return log_msg_ret("blk", ret); + assert(blk); + ret = bootdev_find_in_blk(dev, blk, iter, bflow); + if (ret) + return log_msg_ret("find", ret); + + return 0; +} + +static int mmc_bootdev_bind(struct udevice *dev) +{ + struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev); + + ucp->prio = BOOTDEVP_0_INTERNAL_FAST; + + return 0; +} + +struct bootdev_ops mmc_bootdev_ops = { + .get_bootflow = mmc_get_bootflow, +}; + +static const struct udevice_id mmc_bootdev_ids[] = { + { .compatible = "u-boot,bootdev-mmc" }, + { } +}; + +U_BOOT_DRIVER(mmc_bootdev) = { + .name = "mmc_bootdev", + .id = UCLASS_BOOTDEV, + .ops = &mmc_bootdev_ops, + .bind = mmc_bootdev_bind, + .of_match = mmc_bootdev_ids, +}; diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 098298336da..cb64119f972 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -438,6 +438,9 @@ static bool atmel_qspi_supports_op(struct spi_slave *slave, { struct atmel_qspi *aq = dev_get_priv(slave->dev->parent); + if (!spi_mem_default_supports_op(slave, op)) + return false; + if (aq->caps->octal) { if (atmel_qspi_sama7g5_find_mode(op) < 0) return false; diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f6d60038b89..25dd02c7049 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -77,6 +77,21 @@ config SYSRESET_OCTEON This enables the system reset driver support for Marvell Octeon SoCs. +config SYSRESET_AT91 + bool "Enable support for Microchip/Atmel reset driver" + depends on ARCH_AT91 + select SYSRESET_SPL_AT91 if SPL && SPL_SYSRESET + help + This enables the system reset driver support for Microchip/Atmel + SoCs. + +config SYSRESET_SPL_AT91 + bool "Enable support for Microchip/Atmel reset driver in SPL" + depends on ARCH_AT91 + help + This enables the system reset driver support for Microchip/Atmel + SoCs in SPL. + config SYSRESET_PSCI bool "Enable support for PSCI System Reset" depends on ARM_PSCI_FW diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 8e00be07794..0ed3bbf356a 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -20,5 +20,6 @@ obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o +obj-$(CONFIG_SYSRESET_$(SPL_TPL_)AT91) += sysreset_at91.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_at91.c b/drivers/sysreset/sysreset_at91.c new file mode 100644 index 00000000000..24b87ee987d --- /dev/null +++ b/drivers/sysreset/sysreset_at91.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries + */ + +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <asm/arch/at91_rstc.h> +#include <clk.h> +#include <common.h> +#include <cpu_func.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <dm/device-internal.h> +#include <sysreset.h> + +static int at91_sysreset_request(struct udevice *dev, enum sysreset_t type) +{ + at91_rstc_t *rstc = (at91_rstc_t *)dev_get_priv(dev); + + writel(AT91_RSTC_KEY + | AT91_RSTC_CR_PROCRST /* Processor Reset */ + | AT91_RSTC_CR_PERRST /* Peripheral Reset */ +#ifdef CONFIG_AT91RESET_EXTRST + | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */ +#endif + , &rstc->cr); + + return -EINPROGRESS; +} + +static int at91_sysreset_probe(struct udevice *dev) +{ + struct clk slck; + void *priv; + int ret; + + priv = dev_remap_addr(dev); + if (!priv) + return -EINVAL; + + dev_set_priv(dev, priv); + + ret = clk_get_by_index(dev, 0, &slck); + if (ret) + return ret; + + ret = clk_prepare_enable(&slck); + if (ret) + return ret; + + return 0; +} + +static struct sysreset_ops at91_sysreset = { + .request = at91_sysreset_request, +}; + +static const struct udevice_id a91_sysreset_ids[] = { + { .compatible = "atmel,sama5d3-rstc" }, + { .compatible = "microchip,sam9x60-rstc" }, + { } +}; + +U_BOOT_DRIVER(sysreset_at91) = { + .id = UCLASS_SYSRESET, + .name = "at91_reset", + .ops = &at91_sysreset, + .probe = at91_sysreset_probe, + .of_match = a91_sysreset_ids, +}; diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 8fad59b81aa..92050179c28 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -40,12 +40,6 @@ config TIMER_EARLY use an early timer. These functions must be supported by your timer driver: timer_early_get_count() and timer_early_get_rate(). -config AG101P_TIMER - bool "AG101P timer support" - depends on TIMER && NDS32 - help - Select this to enable a timer for AG01P devices. - config ALTERA_TIMER bool "Altera timer support" depends on TIMER @@ -96,6 +90,15 @@ config ATMEL_PIT_TIMER it is designed to offer maximum accuracy and efficient management, even for systems with long response time. +config SPL_ATMEL_PIT_TIMER + bool "Atmel periodic interval timer support in SPL" + depends on SPL_TIMER + help + Select this to enable a periodic interval timer for Atmel devices, + it is designed to offer maximum accuracy and efficient management, + even for systems with long response time. + Select this to be available in SPL. + config ATMEL_TCB_TIMER bool "Atmel timer counter support" depends on TIMER @@ -104,6 +107,14 @@ config ATMEL_TCB_TIMER Select this to enable the use of the timer counter as a monotonic counter. +config SPL_ATMEL_TCB_TIMER + bool "Atmel timer counter support in SPL" + depends on SPL_TIMER + depends on ARCH_AT91 + help + Select this to enable the use of the timer counter as a monotonic + counter in SPL. + config CADENCE_TTC_TIMER bool "Cadence TTC (Triple Timer Counter)" depends on TIMER diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index 58da6c1e846..35cc490db1e 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -3,14 +3,13 @@ # Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> obj-y += timer-uclass.o -obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o -obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o -obj-$(CONFIG_ATMEL_TCB_TIMER) += atmel_tcb_timer.o +obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o +obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o diff --git a/drivers/timer/ag101p_timer.c b/drivers/timer/ag101p_timer.c deleted file mode 100644 index 27cf9b02471..00000000000 --- a/drivers/timer/ag101p_timer.c +++ /dev/null @@ -1,117 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Andestech ATFTMR010 timer driver - * - * (C) Copyright 2016 - * Rick Chen, NDS32 Software Engineering, rick@andestech.com - */ -#include <common.h> -#include <dm.h> -#include <errno.h> -#include <timer.h> -#include <linux/io.h> - -/* - * Timer Control Register - */ -#define T3_UPDOWN (1 << 11) -#define T2_UPDOWN (1 << 10) -#define T1_UPDOWN (1 << 9) -#define T3_OFENABLE (1 << 8) -#define T3_CLOCK (1 << 7) -#define T3_ENABLE (1 << 6) -#define T2_OFENABLE (1 << 5) -#define T2_CLOCK (1 << 4) -#define T2_ENABLE (1 << 3) -#define T1_OFENABLE (1 << 2) -#define T1_CLOCK (1 << 1) -#define T1_ENABLE (1 << 0) - -/* - * Timer Interrupt State & Mask Registers - */ -#define T3_OVERFLOW (1 << 8) -#define T3_MATCH2 (1 << 7) -#define T3_MATCH1 (1 << 6) -#define T2_OVERFLOW (1 << 5) -#define T2_MATCH2 (1 << 4) -#define T2_MATCH1 (1 << 3) -#define T1_OVERFLOW (1 << 2) -#define T1_MATCH2 (1 << 1) -#define T1_MATCH1 (1 << 0) - -struct atftmr_timer_regs { - u32 t1_counter; /* 0x00 */ - u32 t1_load; /* 0x04 */ - u32 t1_match1; /* 0x08 */ - u32 t1_match2; /* 0x0c */ - u32 t2_counter; /* 0x10 */ - u32 t2_load; /* 0x14 */ - u32 t2_match1; /* 0x18 */ - u32 t2_match2; /* 0x1c */ - u32 t3_counter; /* 0x20 */ - u32 t3_load; /* 0x24 */ - u32 t3_match1; /* 0x28 */ - u32 t3_match2; /* 0x2c */ - u32 cr; /* 0x30 */ - u32 int_state; /* 0x34 */ - u32 int_mask; /* 0x38 */ -}; - -struct atftmr_timer_plat { - struct atftmr_timer_regs *regs; -}; - -static u64 atftmr_timer_get_count(struct udevice *dev) -{ - struct atftmr_timer_plat *plat = dev_get_plat(dev); - struct atftmr_timer_regs *const regs = plat->regs; - u32 val; - val = readl(®s->t3_counter); - return timer_conv_64(val); -} - -static int atftmr_timer_probe(struct udevice *dev) -{ - struct atftmr_timer_plat *plat = dev_get_plat(dev); - struct atftmr_timer_regs *const regs = plat->regs; - u32 cr; - writel(0, ®s->t3_load); - writel(0, ®s->t3_counter); - writel(TIMER_LOAD_VAL, ®s->t3_match1); - writel(TIMER_LOAD_VAL, ®s->t3_match2); - /* disable interrupts */ - writel(T3_MATCH1|T3_MATCH2|T3_OVERFLOW , ®s->int_mask); - cr = readl(®s->cr); - cr |= (T3_ENABLE|T3_UPDOWN); - writel(cr, ®s->cr); - return 0; -} - -static int atftme_timer_of_to_plat(struct udevice *dev) -{ - struct atftmr_timer_plat *plat = dev_get_plat(dev); - plat->regs = map_physmem(dev_read_addr(dev), - sizeof(struct atftmr_timer_regs), - MAP_NOCACHE); - return 0; -} - -static const struct timer_ops ag101p_timer_ops = { - .get_count = atftmr_timer_get_count, -}; - -static const struct udevice_id ag101p_timer_ids[] = { - { .compatible = "andestech,attmr010" }, - {} -}; - -U_BOOT_DRIVER(altera_timer) = { - .name = "ag101p_timer", - .id = UCLASS_TIMER, - .of_match = ag101p_timer_ids, - .of_to_plat = atftme_timer_of_to_plat, - .plat_auto = sizeof(struct atftmr_timer_plat), - .probe = atftmr_timer_probe, - .ops = &ag101p_timer_ops, -}; diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c deleted file mode 100644 index fbc7fac1bba..00000000000 --- a/drivers/timer/atcpit100_timer.c +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Andestech ATCPIT100 timer driver - * - * (C) Copyright 2016 - * Rick Chen, NDS32 Software Engineering, rick@andestech.com - */ -#include <common.h> -#include <dm.h> -#include <errno.h> -#include <timer.h> -#include <linux/io.h> - -#define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2))) - -/* - * Definition of register offsets - */ - -/* ID and Revision Register */ -#define ID_REV 0x0 - -/* Configuration Register */ -#define CFG 0x10 - -/* Interrupt Enable Register */ -#define INT_EN 0x14 -#define CH_INT_EN(c , i) ((1<<i)<<(4*c)) - -/* Interrupt Status Register */ -#define INT_STA 0x18 -#define CH_INT_STA(c , i) ((1<<i)<<(4*c)) - -/* Channel Enable Register */ -#define CH_EN 0x1C -#define CH_TMR_EN(c , t) ((1<<t)<<(4*c)) - -/* Ch n Control REgister */ -#define CH_CTL(n) (0x20+0x10*n) -/* Channel clock source , bit 3 , 0:External clock , 1:APB clock */ -#define APB_CLK (1<<3) -/* Channel mode , bit 0~2 */ -#define TMR_32 1 -#define TMR_16 2 -#define TMR_8 3 -#define PWM 4 - -#define CH_REL(n) (0x24+0x10*n) -#define CH_CNT(n) (0x28+0x10*n) - -struct atctmr_timer_regs { - u32 id_rev; /* 0x00 */ - u32 reservd[3]; /* 0x04 ~ 0x0c */ - u32 cfg; /* 0x10 */ - u32 int_en; /* 0x14 */ - u32 int_st; /* 0x18 */ - u32 ch_en; /* 0x1c */ - u32 ch0_ctrl; /* 0x20 */ - u32 ch0_reload; /* 0x24 */ - u32 ch0_cntr; /* 0x28 */ - u32 reservd1; /* 0x2c */ - u32 ch1_ctrl; /* 0x30 */ - u32 ch1_reload; /* 0x34 */ - u32 int_mask; /* 0x38 */ -}; - -struct atcpit_timer_plat { - u32 *regs; -}; - -static u64 atcpit_timer_get_count(struct udevice *dev) -{ - struct atcpit_timer_plat *plat = dev_get_plat(dev); - u32 val; - val = ~(REG32_TMR(CH_CNT(1))+0xffffffff); - return timer_conv_64(val); -} - -static int atcpit_timer_probe(struct udevice *dev) -{ - struct atcpit_timer_plat *plat = dev_get_plat(dev); - REG32_TMR(CH_REL(1)) = 0xffffffff; - REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32; - REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0); - return 0; -} - -static int atcpit_timer_of_to_plat(struct udevice *dev) -{ - struct atcpit_timer_plat *plat = dev_get_plat(dev); - plat->regs = map_physmem(dev_read_addr(dev), 0x100 , MAP_NOCACHE); - return 0; -} - -static const struct timer_ops atcpit_timer_ops = { - .get_count = atcpit_timer_get_count, -}; - -static const struct udevice_id atcpit_timer_ids[] = { - { .compatible = "andestech,atcpit100" }, - {} -}; - -U_BOOT_DRIVER(atcpit100_timer) = { - .name = "atcpit100_timer", - .id = UCLASS_TIMER, - .of_match = atcpit_timer_ids, - .of_to_plat = atcpit_timer_of_to_plat, - .plat_auto = sizeof(struct atcpit_timer_plat), - .probe = atcpit_timer_probe, - .ops = &atcpit_timer_ops, -}; diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index a4472da9f18..7785b3744ef 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -8,6 +8,10 @@ obj-y += usb-uclass.o obj-$(CONFIG_SANDBOX) += usb-sandbox.o endif +ifdef CONFIG_$(SPL_TPL_)USB_STORAGE +obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += usb_bootdev.o +endif + # ohci obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o obj-$(CONFIG_USB_ATMEL) += ohci-at91.o diff --git a/drivers/usb/host/usb_bootdev.c b/drivers/usb/host/usb_bootdev.c new file mode 100644 index 00000000000..b85f699933d --- /dev/null +++ b/drivers/usb/host/usb_bootdev.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Bootdevice for USB + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <bootdev.h> +#include <dm.h> +#include <usb.h> + +static int usb_get_bootflow(struct udevice *dev, struct bootflow_iter *iter, + struct bootflow *bflow) +{ + struct udevice *blk; + int ret; + + ret = bootdev_get_sibling_blk(dev, &blk); + /* + * If there is no media, indicate that no more partitions should be + * checked + */ + if (ret == -EOPNOTSUPP) + ret = -ESHUTDOWN; + if (ret) + return log_msg_ret("blk", ret); + assert(blk); + ret = bootdev_find_in_blk(dev, blk, iter, bflow); + if (ret) + return log_msg_ret("find", ret); + + return 0; +} + +static int usb_bootdev_bind(struct udevice *dev) +{ + struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev); + + ucp->prio = BOOTDEVP_3_SCAN_SLOW; + + return 0; +} + +struct bootdev_ops usb_bootdev_ops = { + .get_bootflow = usb_get_bootflow, +}; + +static const struct udevice_id usb_bootdev_ids[] = { + { .compatible = "u-boot,bootdev-usb" }, + { } +}; + +U_BOOT_DRIVER(usb_bootdev) = { + .name = "usb_bootdev", + .id = UCLASS_BOOTDEV, + .ops = &usb_bootdev_ops, + .bind = usb_bootdev_bind, + .of_match = usb_bootdev_ids, +}; diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 1089cd21f50..c0b4c9fa438 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -4,7 +4,6 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-$(CONFIG_WDT_AT91) += at91sam9_wdt.o -obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o ifneq (,$(filter $(SOC), mx25 mx31 mx35 mx5 mx6 mx7 vf610)) obj-y += imx_watchdog.o else diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c deleted file mode 100644 index 6aed41642de..00000000000 --- a/drivers/watchdog/ftwdt010_wdt.c +++ /dev/null @@ -1,92 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Watchdog driver for the FTWDT010 Watch Dog Driver - * - * (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com) - * Based on sa1100_wdt.c by Oleg Drokin <green@crimea.edu> - * Based on SoftDog driver by Alan Cox <alan@redhat.com> - * - * Copyright (C) 2011 Andes Technology Corporation - * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> - * - * 27/11/2004 Initial release, Faraday. - * 12/01/2011 Port to u-boot, Macpaul Lin. - */ - -#include <common.h> -#include <log.h> -#include <watchdog.h> -#include <asm/io.h> -#include <faraday/ftwdt010_wdt.h> - -/* - * Set the watchdog time interval. - * Counter is 32 bit. - */ -int ftwdt010_wdt_settimeout(unsigned int timeout) -{ - unsigned int reg; - - struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE; - - debug("Activating WDT..\n"); - - /* Check if disabled */ - if (readl(&wd->wdcr) & ~FTWDT010_WDCR_ENABLE) { - printf("sorry, watchdog is disabled\n"); - return -1; - } - - /* - * In a 66MHz system, - * if you set WDLOAD as 0x03EF1480 (66000000) - * the reset timer is 1 second. - */ - reg = FTWDT010_WDLOAD(timeout * FTWDT010_TIMEOUT_FACTOR); - - writel(reg, &wd->wdload); - - return 0; -} - -void ftwdt010_wdt_reset(void) -{ - struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE; - - /* clear control register */ - writel(0, &wd->wdcr); - - /* Write Magic number */ - writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart); - - /* Enable WDT */ - writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr); -} - -void ftwdt010_wdt_disable(void) -{ - struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE; - - debug("Deactivating WDT..\n"); - - /* - * It was defined with CONFIG_WATCHDOG_NOWAYOUT in Linux - * - * Shut off the timer. - * Lock it in if it's a module and we defined ...NOWAYOUT - */ - writel(0, &wd->wdcr); -} - -#if defined(CONFIG_HW_WATCHDOG) -void hw_watchdog_reset(void) -{ - ftwdt010_wdt_reset(); -} - -void hw_watchdog_init(void) -{ - /* set timer in ms */ - ftwdt010_wdt_settimeout(CONFIG_FTWDT010_HW_TIMEOUT * 1000); -} -#endif |