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-rw-r--r--drivers/gpio/da8xx_gpio.c35
-rw-r--r--drivers/gpio/omap_gpio.c11
-rw-r--r--drivers/i2c/Makefile1
-rw-r--r--drivers/i2c/i2c-uclass.c8
-rw-r--r--drivers/i2c/mxs_i2c.c319
-rw-r--r--drivers/i2c/omap24xx_i2c.c16
-rw-r--r--drivers/mmc/davinci_mmc.c199
-rw-r--r--drivers/mmc/omap_hsmmc.c14
-rw-r--r--drivers/power/regulator/pbias_regulator.c4
9 files changed, 248 insertions, 359 deletions
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 1a1d37ae2a4..b0d49cb46f0 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -13,6 +13,7 @@
#include <asm/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
+#include <dt-bindings/gpio/gpio.h>
#ifndef CONFIG_DM_GPIO
static struct gpio_registry {
@@ -429,20 +430,27 @@ int gpio_set_value(unsigned int gpio, int value)
static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned int offset)
{
struct davinci_gpio_bank *bank = dev_get_priv(dev);
+ unsigned int addr;
- /* The device tree is not broken into banks but the infrastructure is
+ /*
+ * The device tree is not broken into banks but the infrastructure is
* expecting it this way, so we'll first include the 0x10 offset, then
* calculate the bank manually based on the offset.
+ * Casting 'addr' as Unsigned long is needed to make the math work.
*/
-
- return ((struct davinci_gpio *)bank->base) + 0x10 + (offset >> 5);
+ addr = ((unsigned long)(struct davinci_gpio *)bank->base) +
+ 0x10 + (0x28 * (offset >> 5));
+ return (struct davinci_gpio *)addr;
}
static int davinci_gpio_direction_input(struct udevice *dev, unsigned int offset)
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_direction_input(base, offset);
+ /*
+ * Fetch the address based on GPIO, but only pass the masked low 32-bits
+ */
+ _gpio_direction_input(base, (offset & 0x1f));
return 0;
}
@@ -451,7 +459,7 @@ static int davinci_gpio_direction_output(struct udevice *dev, unsigned int offse
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_direction_output(base, offset, value);
+ _gpio_direction_output(base, (offset & 0x1f), value);
return 0;
}
@@ -459,7 +467,7 @@ static int davinci_gpio_get_value(struct udevice *dev, unsigned int offset)
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- return _gpio_get_value(base, offset);
+ return _gpio_get_value(base, (offset & 0x1f));
}
static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset,
@@ -467,7 +475,7 @@ static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset,
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_set_value(base, offset, value);
+ _gpio_set_value(base, (offset & 0x1f), value);
return 0;
}
@@ -485,12 +493,25 @@ static int davinci_gpio_get_function(struct udevice *dev, unsigned int offset)
return GPIOF_OUTPUT;
}
+static int davinci_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ desc->offset = args->args[0];
+
+ if (args->args[1] & GPIO_ACTIVE_LOW)
+ desc->flags = GPIOD_ACTIVE_LOW;
+ else
+ desc->flags = 0;
+ return 0;
+}
+
static const struct dm_gpio_ops gpio_davinci_ops = {
.direction_input = davinci_gpio_direction_input,
.direction_output = davinci_gpio_direction_output,
.get_value = davinci_gpio_get_value,
.set_value = davinci_gpio_set_value,
.get_function = davinci_gpio_get_function,
+ .xlate = davinci_gpio_xlate,
};
static int davinci_gpio_probe(struct udevice *dev)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 651f6994e41..555eba26622 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -288,11 +288,9 @@ static int omap_gpio_probe(struct udevice *dev)
struct gpio_bank *bank = dev_get_priv(dev);
struct omap_gpio_platdata *plat = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- int banknum;
char name[18], *str;
- banknum = plat->bank_index;
- sprintf(name, "GPIO%d_", banknum + 1);
+ sprintf(name, "gpio@%4x_", (unsigned int)plat->base);
str = strdup(name);
if (!str)
return -ENOMEM;
@@ -337,6 +335,7 @@ static int omap_gpio_bind(struct udevice *dev)
}
#endif
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static const struct udevice_id omap_gpio_ids[] = {
{ .compatible = "ti,omap3-gpio" },
{ .compatible = "ti,omap4-gpio" },
@@ -344,7 +343,6 @@ static const struct udevice_id omap_gpio_ids[] = {
{ }
};
-#if CONFIG_IS_ENABLED(OF_CONTROL)
static int omap_gpio_ofdata_to_platdata(struct udevice *dev)
{
struct omap_gpio_platdata *plat = dev_get_platdata(dev);
@@ -363,14 +361,15 @@ U_BOOT_DRIVER(gpio_omap) = {
.name = "gpio_omap",
.id = UCLASS_GPIO,
#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ .of_match = omap_gpio_ids,
.ofdata_to_platdata = of_match_ptr(omap_gpio_ofdata_to_platdata),
- .bind = dm_scan_fdt_dev,
.platdata_auto_alloc_size = sizeof(struct omap_gpio_platdata),
+#endif
#else
.bind = omap_gpio_bind,
#endif
.ops = &gpio_omap_ops,
- .of_match = omap_gpio_ids,
.probe = omap_gpio_probe,
.priv_auto_alloc_size = sizeof(struct gpio_bank),
.flags = DM_FLAG_PRE_RELOC,
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index da368cc02a0..f2cbe78c53b 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
-obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 5e58dd0916c..c5a3c4e2016 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -562,7 +562,7 @@ int i2c_deblock(struct udevice *bus)
return ops->deblock(bus);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
{
int addr;
@@ -584,7 +584,7 @@ int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
static int i2c_post_probe(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
@@ -597,7 +597,7 @@ static int i2c_post_probe(struct udevice *dev)
static int i2c_child_post_bind(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
if (!dev_of_valid(dev))
@@ -612,7 +612,7 @@ UCLASS_DRIVER(i2c) = {
.id = UCLASS_I2C,
.name = "i2c",
.flags = DM_UC_FLAG_SEQ_ALIAS,
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.post_bind = dm_scan_fdt_dev,
#endif
.post_probe = i2c_post_probe,
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
deleted file mode 100644
index 6766d375479..00000000000
--- a/drivers/i2c/mxs_i2c.c
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Freescale i.MX28 I2C Driver
- *
- * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
- * on behalf of DENX Software Engineering GmbH
- *
- * Partly based on Linux kernel i2c-mxs.c driver:
- * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
- *
- * Which was based on a (non-working) driver which was:
- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <i2c.h>
-#include <linux/errno.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/sys_proto.h>
-
-#define MXS_I2C_MAX_TIMEOUT 1000000
-
-static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap)
-{
- if (adap->hwadapnr == 0)
- return (struct mxs_i2c_regs *)MXS_I2C0_BASE;
- else
- return (struct mxs_i2c_regs *)MXS_I2C1_BASE;
-}
-
-static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
- uint32_t timing0;
-
- timing0 = readl(&i2c_regs->hw_i2c_timing0);
- /*
- * This is a reverse version of the algorithm presented in
- * i2c_set_bus_speed(). Please refer there for details.
- */
- return clk / ((((timing0 >> 16) - 3) * 2) + 38);
-}
-
-static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- /*
- * The timing derivation algorithm. There is no documentation for this
- * algorithm available, it was derived by using the scope and fiddling
- * with constants until the result observed on the scope was good enough
- * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
- * possible to assume the algorithm works for other frequencies as well.
- *
- * Note it was necessary to cap the frequency on both ends as it's not
- * possible to configure completely arbitrary frequency for the I2C bus
- * clock.
- */
- uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
- uint32_t base = ((clk / speed) - 38) / 2;
- uint16_t high_count = base + 3;
- uint16_t low_count = base - 3;
- uint16_t rcv_count = (high_count * 3) / 4;
- uint16_t xmit_count = low_count / 4;
-
- if (speed > 540000) {
- printf("MXS I2C: Speed too high (%d Hz)\n", speed);
- return -EINVAL;
- }
-
- if (speed < 12000) {
- printf("MXS I2C: Speed too low (%d Hz)\n", speed);
- return -EINVAL;
- }
-
- writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0);
- writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1);
-
- writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) |
- (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET),
- &i2c_regs->hw_i2c_timing2);
-
- return 0;
-}
-
-static void mxs_i2c_reset(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- int ret;
- int speed = mxs_i2c_get_bus_speed(adap);
-
- ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
- if (ret) {
- debug("MXS I2C: Block reset timeout\n");
- return;
- }
-
- writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
- I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
- I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
- &i2c_regs->hw_i2c_ctrl1_clr);
-
- writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set);
-
- mxs_i2c_set_bus_speed(adap, speed);
-}
-
-static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
-
- writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
- I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
- (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET),
- &i2c_regs->hw_i2c_queuecmd);
-
- writel((chip << 1) | 1, &i2c_regs->hw_i2c_data);
-
- writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
- (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) |
- I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd);
-
- writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
-}
-
-static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buf, int blen, int stop)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t data, tmp;
- int i, remain, off;
- int timeout = MXS_I2C_MAX_TIMEOUT;
-
- if ((alen > 4) || (alen == 0)) {
- debug("MXS I2C: Invalid address length\n");
- return -EINVAL;
- }
-
- if (stop)
- stop = I2C_QUEUECMD_POST_SEND_STOP;
-
- writel(I2C_QUEUECMD_PRE_SEND_START |
- I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
- ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
- &i2c_regs->hw_i2c_queuecmd);
-
- data = (chip << 1) << 24;
-
- for (i = 0; i < alen; i++) {
- data >>= 8;
- data |= ((char *)&addr)[alen - i - 1] << 24;
- if ((i & 3) == 2)
- writel(data, &i2c_regs->hw_i2c_data);
- }
-
- off = i;
- for (; i < off + blen; i++) {
- data >>= 8;
- data |= buf[i - off] << 24;
- if ((i & 3) == 2)
- writel(data, &i2c_regs->hw_i2c_data);
- }
-
- remain = 24 - ((i & 3) * 8);
- if (remain)
- writel(data >> remain, &i2c_regs->hw_i2c_data);
-
- writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
-
- while (--timeout) {
- tmp = readl(&i2c_regs->hw_i2c_queuestat);
- if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
- break;
- }
-
- if (!timeout) {
- debug("MXS I2C: Failed transmitting data!\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t tmp;
- int timeout = MXS_I2C_MAX_TIMEOUT;
-
- for (;;) {
- tmp = readl(&i2c_regs->hw_i2c_ctrl1);
- if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) {
- debug("MXS I2C: No slave ACK\n");
- goto err;
- }
-
- if (tmp & (
- I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
- I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) {
- debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp);
- goto err;
- }
-
- if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)
- break;
-
- if (!timeout--) {
- debug("MXS I2C: Operation timed out\n");
- goto err;
- }
-
- udelay(1);
- }
-
- return 0;
-
-err:
- mxs_i2c_reset(adap);
- return 1;
-}
-
-static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip,
- uint addr, int alen, uint8_t *buffer,
- int len)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t tmp = 0;
- int timeout = MXS_I2C_MAX_TIMEOUT;
- int ret;
- int i;
-
- ret = mxs_i2c_write(adap, chip, addr, alen, NULL, 0, 0);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- mxs_i2c_setup_read(adap, chip, len);
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret) {
- debug("MXS I2C: Failed reading address\n");
- return ret;
- }
-
- for (i = 0; i < len; i++) {
- if (!(i & 3)) {
- while (--timeout) {
- tmp = readl(&i2c_regs->hw_i2c_queuestat);
- if (!(tmp & I2C_QUEUESTAT_RD_QUEUE_EMPTY))
- break;
- }
-
- if (!timeout) {
- debug("MXS I2C: Failed receiving data!\n");
- return -ETIMEDOUT;
- }
-
- tmp = readl(&i2c_regs->hw_i2c_queuedata);
- }
- buffer[i] = tmp & 0xff;
- tmp >>= 8;
- }
-
- return 0;
-}
-
-static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip,
- uint addr, int alen, uint8_t *buffer,
- int len)
-{
- int ret;
- ret = mxs_i2c_write(adap, chip, addr, alen, buffer, len, 1);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret)
- debug("MXS I2C: Failed writing address\n");
-
- return ret;
-}
-
-static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
-{
- int ret;
- ret = mxs_i2c_write(adap, chip, 0, 1, NULL, 0, 1);
- if (!ret)
- ret = mxs_i2c_wait_for_ack(adap);
- mxs_i2c_reset(adap);
- return ret;
-}
-
-static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
-{
- mxs_i2c_reset(adap);
- mxs_i2c_set_bus_speed(adap, speed);
-
- return;
-}
-
-U_BOOT_I2C_ADAP_COMPLETE(mxs0, mxs_i2c_init, mxs_i2c_probe,
- mxs_i2c_if_read, mxs_i2c_if_write,
- mxs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED, 0, 0)
-U_BOOT_I2C_ADAP_COMPLETE(mxs1, mxs_i2c_init, mxs_i2c_probe,
- mxs_i2c_if_read, mxs_i2c_if_write,
- mxs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED, 0, 1)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 0759585c9e1..54bf35e552e 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -890,6 +890,7 @@ static int omap_i2c_probe(struct udevice *bus)
return 0;
}
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
{
struct omap_i2c *priv = dev_get_priv(bus);
@@ -901,23 +902,26 @@ static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
return 0;
}
-static const struct dm_i2c_ops omap_i2c_ops = {
- .xfer = omap_i2c_xfer,
- .probe_chip = omap_i2c_probe_chip,
- .set_bus_speed = omap_i2c_set_bus_speed,
-};
-
static const struct udevice_id omap_i2c_ids[] = {
{ .compatible = "ti,omap3-i2c" },
{ .compatible = "ti,omap4-i2c" },
{ }
};
+#endif
+
+static const struct dm_i2c_ops omap_i2c_ops = {
+ .xfer = omap_i2c_xfer,
+ .probe_chip = omap_i2c_probe_chip,
+ .set_bus_speed = omap_i2c_set_bus_speed,
+};
U_BOOT_DRIVER(i2c_omap) = {
.name = "i2c_omap",
.id = UCLASS_I2C,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.of_match = omap_i2c_ids,
.ofdata_to_platdata = omap_i2c_ofdata_to_platdata,
+#endif
.probe = omap_i2c_probe,
.priv_auto_alloc_size = sizeof(struct omap_i2c),
.ops = &omap_i2c_ops,
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index d7cb88a40ab..0d63279db00 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -7,13 +7,15 @@
#include <config.h>
#include <common.h>
-#include <command.h>
+#include <dm.h>
#include <errno.h>
#include <mmc.h>
+#include <command.h>
#include <part.h>
#include <malloc.h>
#include <asm/io.h>
#include <asm/arch/sdmmc_defs.h>
+#include <asm-generic/gpio.h>
#define DAVINCI_MAX_BLOCKS (32)
#define WATCHDOG_COUNT (100000)
@@ -23,10 +25,40 @@
#define set_bit(addr, val) set_val((addr), (get_val(addr) | (val)))
#define clear_bit(addr, val) set_val((addr), (get_val(addr) & ~(val)))
+#ifdef CONFIG_DM_MMC
+struct davinci_of_data {
+ const char *name;
+ u8 version;
+};
+
+/* Davinci MMC board definitions */
+struct davinci_mmc_priv {
+ struct davinci_mmc_regs *reg_base; /* Register base address */
+ uint input_clk; /* Input clock to MMC controller */
+ uint version; /* MMC Controller version */
+ struct gpio_desc cd_gpio; /* Card Detect GPIO */
+ struct gpio_desc wp_gpio; /* Write Protect GPIO */
+};
+
+struct davinci_mmc_plat
+{
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+#endif
+
/* Set davinci clock prescalar value based on the required clock in HZ */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static void dmmc_set_clock(struct mmc *mmc, uint clock)
{
struct davinci_mmc *host = mmc->priv;
+#else
+
+static void davinci_mmc_set_clock(struct udevice *dev, uint clock)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+#endif
struct davinci_mmc_regs *regs = host->reg_base;
uint clkrt, sysclk2, act_clock;
@@ -120,13 +152,19 @@ static int dmmc_check_status(volatile struct davinci_mmc_regs *regs,
}
/*
- * Sends a command out on the bus. Takes the mmc pointer,
+ * Sends a command out on the bus. Takes the device pointer,
* a command pointer, and an optional data pointer.
*/
-static int
-dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static int dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
struct davinci_mmc *host = mmc->priv;
+#else
+static int
+davinci_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+#endif
volatile struct davinci_mmc_regs *regs = host->reg_base;
uint mmcstatus, status_rdy, status_err;
uint i, cmddata, bytes_left = 0;
@@ -312,9 +350,15 @@ dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
}
/* Initialize Davinci MMC controller */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int dmmc_init(struct mmc *mmc)
{
struct davinci_mmc *host = mmc->priv;
+#else
+static int davinci_dm_mmc_init(struct udevice *dev)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+#endif
struct davinci_mmc_regs *regs = host->reg_base;
/* Clear status registers explicitly - soft reset doesn't clear it
@@ -347,11 +391,19 @@ static int dmmc_init(struct mmc *mmc)
}
/* Set buswidth or clock as indicated by the MMC framework */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int dmmc_set_ios(struct mmc *mmc)
{
struct davinci_mmc *host = mmc->priv;
struct davinci_mmc_regs *regs = host->reg_base;
+#else
+static int davinci_mmc_set_ios(struct udevice *dev)
+{
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+ struct davinci_mmc_regs *regs = host->reg_base;
+#endif
/* Set the bus width */
if (mmc->bus_width == 4)
set_bit(&regs->mmcctl, MMCCTL_WIDTH_4_BIT);
@@ -359,21 +411,65 @@ static int dmmc_set_ios(struct mmc *mmc)
clear_bit(&regs->mmcctl, MMCCTL_WIDTH_4_BIT);
/* Set clock speed */
- if (mmc->clock)
+ if (mmc->clock) {
+#if !CONFIG_IS_ENABLED(DM_MMC)
dmmc_set_clock(mmc, mmc->clock);
-
+#else
+ davinci_mmc_set_clock(dev, mmc->clock);
+#endif
+ }
return 0;
}
+#if !CONFIG_IS_ENABLED(DM_MMC)
static const struct mmc_ops dmmc_ops = {
- .send_cmd = dmmc_send_cmd,
- .set_ios = dmmc_set_ios,
- .init = dmmc_init,
+ .send_cmd = dmmc_send_cmd,
+ .set_ios = dmmc_set_ios,
+ .init = dmmc_init,
+};
+#else
+
+static int davinci_mmc_getcd(struct udevice *dev)
+{
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+ value = dm_gpio_get_value(&priv->cd_gpio);
+#endif
+ /* if no CD return as 1 */
+ if (value < 0)
+ return 1;
+
+ return value;
+}
+
+static int davinci_mmc_getwp(struct udevice *dev)
+{
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+
+ value = dm_gpio_get_value(&priv->wp_gpio);
+#endif
+ /* if no WP return as 0 */
+ if (value < 0)
+ return 0;
+
+ return value;
+}
+
+static const struct dm_mmc_ops davinci_mmc_ops = {
+ .send_cmd = davinci_mmc_send_cmd,
+ .set_ios = davinci_mmc_set_ios,
+ .get_cd = davinci_mmc_getcd,
+ .get_wp = davinci_mmc_getwp,
};
+#endif
+#if !CONFIG_IS_ENABLED(DM_MMC)
/* Called from board_mmc_init during startup. Can be called multiple times
- * depending on the number of slots available on board and controller
- */
+* depending on the number of slots available on board and controller
+*/
int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
{
host->cfg.name = "davinci";
@@ -389,3 +485,84 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
return 0;
}
+#else
+
+
+static int davinci_mmc_probe(struct udevice *dev)
+{
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+ struct mmc_config *cfg = &plat->cfg;
+ struct davinci_of_data *data =
+ (struct davinci_of_data *)dev_get_driver_data(dev);
+ cfg->f_min = 200000;
+ cfg->f_max = 25000000;
+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+ cfg->host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
+ cfg->b_max = DAVINCI_MAX_BLOCKS;
+
+ if (data) {
+ cfg->name = data->name;
+ priv->version = data->version;
+ }
+
+ priv->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev);
+ priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID);
+
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ /* These GPIOs are optional */
+ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
+ gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
+#endif
+
+ upriv->mmc = &plat->mmc;
+
+ return davinci_dm_mmc_init(dev);
+}
+
+static int davinci_mmc_bind(struct udevice *dev)
+{
+ struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+
+const struct davinci_of_data davinci_mmc_host_info[] = {
+ {
+ .name = "dm6441-mmc",
+ .version = MMC_CTLR_VERSION_1,
+ },
+ {
+ .name = "da830-mmc",
+ .version = MMC_CTLR_VERSION_2,
+ },
+ {},
+};
+
+static const struct udevice_id davinci_mmc_ids[] = {
+ {
+ .compatible = "ti,dm6441-mmc",
+ .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_1]
+ },
+ {
+ .compatible = "ti,da830-mmc",
+ .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_2]
+ },
+ {},
+};
+
+U_BOOT_DRIVER(davinci_mmc_drv) = {
+ .name = "davinci_mmc",
+ .id = UCLASS_MMC,
+ .of_match = davinci_mmc_ids,
+#if CONFIG_BLK
+ .bind = davinci_mmc_bind,
+#endif
+ .probe = davinci_mmc_probe,
+ .ops = &davinci_mmc_ops,
+ .platdata_auto_alloc_size = sizeof(struct davinci_mmc_plat),
+ .priv_auto_alloc_size = sizeof(struct davinci_mmc_priv),
+};
+#endif
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index caaa9146049..4d171f457ec 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -1365,9 +1365,10 @@ static int omap_hsmmc_set_ios(struct udevice *dev)
static int omap_hsmmc_getcd(struct udevice *dev)
{
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
value = dm_gpio_get_value(&priv->cd_gpio);
+#endif
/* if no CD return as 1 */
if (value < 0)
return 1;
@@ -1379,10 +1380,11 @@ static int omap_hsmmc_getcd(struct udevice *dev)
static int omap_hsmmc_getwp(struct udevice *dev)
{
+ int value = 0;
+#if CONFIG_IS_ENABLED(DM_GPIO)
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
value = dm_gpio_get_value(&priv->wp_gpio);
+#endif
/* if no WP return as 0 */
if (value < 0)
return 0;
@@ -1901,10 +1903,12 @@ static int omap_hsmmc_probe(struct udevice *dev)
device_get_supply_regulator(dev, "pbias-supply",
&priv->pbias_supply);
#endif
-#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL)
+#if defined(OMAP_HSMMC_USE_GPIO)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_GPIO)
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
#endif
+#endif
mmc->dev = dev;
upriv->mmc = mmc;
diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c
index 8f06e27b898..366f97b38b7 100644
--- a/drivers/power/regulator/pbias_regulator.c
+++ b/drivers/power/regulator/pbias_regulator.c
@@ -108,6 +108,10 @@ static struct dm_pmic_ops pbias_ops = {
static const struct udevice_id pbias_ids[] = {
{ .compatible = "ti,pbias-dra7" },
+ { .compatible = "ti,pbias-omap2" },
+ { .compatible = "ti,pbias-omap3" },
+ { .compatible = "ti,pbias-omap4" },
+ { .compatible = "ti,pbias-omap5" },
{ }
};