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-rw-r--r--drivers/ddr/Kconfig5
-rw-r--r--drivers/ddr/fsl/Kconfig13
-rw-r--r--drivers/misc/Kconfig14
-rw-r--r--drivers/mmc/Kconfig4
-rw-r--r--drivers/mmc/fsl_esdhc.c3
-rw-r--r--drivers/mtd/Kconfig3
-rw-r--r--drivers/net/Kconfig5
-rw-r--r--drivers/net/designware.h8
-rw-r--r--drivers/pci/Kconfig30
-rw-r--r--drivers/pci/Makefile1
-rw-r--r--drivers/pci/pci_sh4.c82
-rw-r--r--drivers/pwm/Kconfig5
-rw-r--r--drivers/usb/gadget/Kconfig5
-rw-r--r--drivers/watchdog/Kconfig4
-rw-r--r--drivers/watchdog/designware_wdt.c21
15 files changed, 91 insertions, 112 deletions
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index eec9d480b09..738b7884012 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -30,5 +30,10 @@ config DDR_SPD
For memory controllers that can utilize it, add enable support for
using the JEDEC SDP standard.
+config SYS_SPD_BUS_NUM
+ int "I2C bus number for DDR SPD"
+ depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY
+ default 0
+
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index fe69bef3d3a..d93ed8d2feb 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -10,6 +10,12 @@ config SYS_FSL_MMDC
help
Select Freescale Multi Mode DDR controller (MMDC).
+config SYS_FSL_DDR_EMU
+ bool
+ help
+ Specify emulator support for DDR. Some DDR features such as deskew
+ training are not available.
+
if SYS_FSL_DDR || SYS_FSL_MMDC
config SYS_FSL_DDR_BE
@@ -169,6 +175,13 @@ config ECC_INIT_VIA_DDRCONTROLLER
Use the DDR controller to auto initialize memory. If not enabled,
the DMA controller is responsible for doing this.
+config SYS_DDR_RAW_TIMING
+ bool "Get DDR timing information from something other than SPD"
+ help
+ This is common with soldered DDR chips onboard without SPD. DDR raw
+ timing parameters are extracted from datasheet and hard-coded into
+ header files or board specific files.
+
endif
menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)"
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 28d5da49ff1..92264e5935b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -275,6 +275,20 @@ config FSL_SEC_MON
Security Monitor can be transitioned on any security failures,
like software violations or hardware security violations.
+choice
+ prompt "Security monitor interaction endianess"
+ depends on FSL_SEC_MON
+ default SYS_FSL_SEC_MON_BE if PPC
+ default SYS_FSL_SEC_MON_LE
+
+config SYS_FSL_SEC_MON_LE
+ bool "Security monitor interactions are little endian"
+
+config SYS_FSL_SEC_MON_BE
+ bool "Security monitor interactions are big endian"
+
+endchoice
+
config IRQ
bool "Interrupt controller"
help
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 5a87db6be08..53a6b0093d1 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -844,6 +844,10 @@ config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH
depends on FSL_ESDHC
default 1
+config ESDHC_DETECT_QUIRK
+ bool "QIXIS-based eSDHC quirk detection"
+ depends on FSL_ESDHC && FSL_QIXIS
+
config FSL_ESDHC_IMX
bool "Freescale/NXP i.MX eSDHC controller support"
help
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 4e7bfdfaa7e..b49a7b425b9 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -30,6 +30,7 @@
#include <linux/iopoll.h>
#include <linux/dma-mapping.h>
#include <sdhci.h>
+#include "../../board/freescale/common/qixis.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -773,7 +774,7 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
struct fsl_esdhc *regs = priv->esdhc_regs;
#ifdef CONFIG_ESDHC_DETECT_QUIRK
- if (CONFIG_ESDHC_DETECT_QUIRK)
+ if (qixis_esdhc_detect_quirk())
return 1;
#endif
if (esdhc_read32(&regs->prsstat) & PRSSTAT_CINS)
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index d0ab7c18c64..3d1f6e43fd5 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -168,6 +168,9 @@ config STM32_FLASH
This is the driver of embedded flash for some STMicroelectronics
STM32 MCU.
+config SAMSUNG_ONENAND
+ bool "Samsung OneNAND driver support"
+
config USE_SYS_MAX_FLASH_BANKS
bool "Enable Max number of Flash memory banks"
help
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 56f9416a48d..40b5c8274e9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -312,6 +312,7 @@ config ETH_DESIGNWARE_MESON8B
config ETH_DESIGNWARE_SOCFPGA
select REGMAP
select SYSCON
+ select DW_ALTDESCRIPTOR
bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
depends on DM_ETH && ETH_DESIGNWARE
help
@@ -326,6 +327,10 @@ config ETH_DESIGNWARE_S700
This provides glue layer to use Synopsys Designware Ethernet MAC
present on Actions S700 SoC.
+config DW_ALTDESCRIPTOR
+ bool "Designware Ethernet MAC uses alternate (enhanced) descriptors"
+ depends on ETH_DESIGNWARE
+
config ETHOC
bool "OpenCores 10/100 Mbps Ethernet MAC"
help
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index ddc3d4f1506..3793d550980 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -85,10 +85,8 @@ struct eth_dma_regs {
#define DW_DMA_BASE_OFFSET (0x1000)
-/* Default DMA Burst length */
-#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
-#endif
+/* DMA Burst length */
+#define GMAC_DEFAULT_DMA_PBL 8
/* Bus mode register definitions */
#define FIXEDBURST (1 << 16)
@@ -96,7 +94,7 @@ struct eth_dma_regs {
#define PRIORXTX_31 (2 << 14)
#define PRIORXTX_21 (1 << 14)
#define PRIORXTX_11 (0 << 14)
-#define DMA_PBL (CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
+#define DMA_PBL (GMAC_DEFAULT_DMA_PBL << 8)
#define RXHIGHPRIO (1 << 1)
#define DMAMAC_SRST (1 << 0)
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index fd2203420c3..436acca898e 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -48,6 +48,10 @@ config PCI_REGION_MULTI_ENTRY
region type. This helps to add support for SoC's like OcteonTX/TX2
where every peripheral is on the PCI bus.
+config PCI_CONFIG_HOST_BRIDGE
+ bool "Configure PCI host bridges"
+ default y if X86
+
config PCI_MAP_SYSTEM_MEMORY
bool "Map local system memory from a virtual base address"
depends on MIPS
@@ -81,6 +85,10 @@ config PCI_ARID
support on PCI devices. This helps to skip some devices in BDF
scan that are not present.
+config PCI_SCAN_SHOW
+ bool "Show PCI devices during startup"
+ depends on PCIE_IMX
+
config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support"
help
@@ -97,6 +105,10 @@ config PCIE_ECAM_SYNQUACER
Note that this must be configured when boot because Linux driver
expects the PCIe RC has been configured in the bootloader.
+config PCI_GT64120
+ bool "GT64120 PCI support"
+ depends on MIPS
+
config PCI_PHYTIUM
bool "Phytium PCIe support"
help
@@ -121,8 +133,12 @@ config PCIE_DW_SIFIVE
Say Y here if you want to enable PCIe controller support on
FU740.
+config SYS_FSL_PCI_VER_3_X
+ bool
+
config PCIE_FSL
bool "FSL PowerPC PCIe support"
+ select SYS_FSL_PCI_VER_3_X if ARCH_T2080 || ARCH_T4240
help
Say Y here if you want to enable PCIe controller support on FSL
PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs.
@@ -134,6 +150,10 @@ config PCI_MPC85XX
Say Y here if you want to enable PCI controller support on FSL
PowerPC MPC85xx SoC.
+config PCI_MSC01
+ bool "MSC01 PCI support"
+ depends on TARGET_MALTA
+
config PCI_RCAR_GEN2
bool "Renesas RCar Gen2 PCIe driver"
depends on RCAR_32
@@ -159,6 +179,12 @@ config PCI_SANDBOX
the device tree but the normal PCI scan technique is used to find
then.
+config SH7751_PCI
+ bool "SH7751 PCI controller support"
+ depends on SH
+ help
+ SuperH PCI Bridge Configuration
+
config PCI_TEGRA
bool "Tegra PCI support"
depends on ARCH_TEGRA
@@ -254,6 +280,10 @@ config FSL_PCIE_EP_COMPAT
This compatible is used to find pci controller ep node in Kernel DT
to complete fixup.
+config PCIE_IMX
+ bool "i.MX PCIe support"
+ depends on ARCH_MX6
+
config PCIE_INTEL_FPGA
bool "Intel FPGA PCIe support"
help
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 04f623652f0..cfcd6fd6c52 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_PCIE_IMX) += pcie_imx.o
obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o
obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o
-obj-$(CONFIG_SH4_PCI) += pci_sh4.o
obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c
deleted file mode 100644
index aac9be055e2..00000000000
--- a/drivers/pci/pci_sh4.c
+++ /dev/null
@@ -1,82 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SH4 PCI Controller (PCIC) for U-Boot.
- * (C) Dustin McIntire (dustin@sensoria.com)
- * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
- *
- * u-boot/arch/sh/cpu/sh4/pci-sh4.c
- */
-
-#include <common.h>
-#include <linux/delay.h>
-
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <pci.h>
-
-int pci_sh4_init(struct pci_controller *hose)
-{
- hose->first_busno = 0;
- hose->region_count = 0;
- hose->last_busno = 0xff;
-
- /* PCI memory space */
- pci_set_region(hose->regions + 0,
- CONFIG_PCI_MEM_BUS,
- CONFIG_PCI_MEM_PHYS,
- CONFIG_PCI_MEM_SIZE,
- PCI_REGION_MEM);
- hose->region_count++;
-
- /* PCI IO space */
- pci_set_region(hose->regions + 1,
- CONFIG_PCI_IO_BUS,
- CONFIG_PCI_IO_PHYS,
- CONFIG_PCI_IO_SIZE,
- PCI_REGION_IO);
- hose->region_count++;
-
-#if defined(CONFIG_PCI_SYS_BUS)
- /* PCI System Memory space */
- pci_set_region(hose->regions + 2,
- CONFIG_PCI_SYS_BUS,
- CONFIG_PCI_SYS_PHYS,
- CONFIG_PCI_SYS_SIZE,
- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
- hose->region_count++;
-#endif
-
- udelay(1000);
-
- pci_set_ops(hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- pci_sh4_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- pci_sh4_write_config_dword);
-
- pci_register_hose(hose);
-
- udelay(1000);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- hose->last_busno = pci_hose_scan(hose);
- return 0;
-}
-
-int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
-{
- return 0;
-}
-
-#ifdef CONFIG_PCI_SCAN_SHOW
-int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
-{
- return 1;
-}
-#endif /* CONFIG_PCI_SCAN_SHOW */
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index cb54e67faeb..8fd5a2e2051 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -84,6 +84,11 @@ config PWM_SANDBOX
useful. The PWM can be enabled but is not connected to any outputs
so this is not very useful.
+config PWM_S5P
+ bool "Enable non-DM support for S5P PWM"
+ depends on (S5P || ARCH_NEXELL)
+ default y
+
config PWM_SIFIVE
bool "Enable support for SiFive PWM"
depends on DM_PWM
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index d81a9c5a100..350036f2083 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -92,6 +92,11 @@ config USB_GADGET_DWC2_OTG
if USB_GADGET_DWC2_OTG
+config USB_GADGET_DWC2_OTG_PHY
+ bool "DesignWare USB2.0 HS OTG PHY"
+ help
+ Enable the DesignWare USB2.0 HS OTG physical device interface.
+
config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width"
help
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c3eb8a8aec1..532ada89c1b 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -64,8 +64,8 @@ config ULP_WATCHDOG
config DESIGNWARE_WATCHDOG
bool "Designware watchdog timer support"
- select HW_WATCHDOG if !WDT
- default y if WDT && ROCKCHIP_RK3399
+ depends on WDT
+ default y if ROCKCHIP_RK3399
help
Enable this to support Designware Watchdog Timer IP, present e.g.
on Altera SoCFPGA SoCs.
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index cfec29bd158..cad756aeaf2 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base)
writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR);
}
-#if !CONFIG_IS_ENABLED(WDT)
-void hw_watchdog_reset(void)
-{
- designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE);
-}
-
-void hw_watchdog_init(void)
-{
- /* reset to disable the watchdog */
- hw_watchdog_reset();
- /* set timer in miliseconds */
- designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE,
- CONFIG_DW_WDT_CLOCK_KHZ,
- CONFIG_WATCHDOG_TIMEOUT_MSECS);
- /* enable the watchdog */
- designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE);
- /* reset the watchdog */
- hw_watchdog_reset();
-}
-#else
static int designware_wdt_reset(struct udevice *dev)
{
struct designware_wdt_priv *priv = dev_get_priv(dev);
@@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = {
.ops = &designware_wdt_ops,
.flags = DM_FLAG_PRE_RELOC,
};
-#endif
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-02 21:10:34 +0000