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-rw-r--r--drivers/ata/ahci.c34
-rw-r--r--drivers/ata/dwc_ahsata.c82
-rw-r--r--drivers/ata/dwc_ahsata_priv.h2
-rw-r--r--drivers/clk/clk_boston.c19
-rw-r--r--drivers/net/Kconfig14
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/sandbox-lwip.c85
-rw-r--r--drivers/net/sandbox.c250
-rw-r--r--drivers/pci/Kconfig10
-rw-r--r--drivers/pci/pci_auto.c16
-rw-r--r--drivers/pci/pcie_xilinx.c53
11 files changed, 307 insertions, 259 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index b532b3b7339..38e953ee79c 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -420,7 +420,7 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
{
- phys_addr_t pa = virt_to_phys((void *)pp->cmd_tbl);
+ phys_addr_t pa = virt_to_phys(pp->cmd_tbl);
pp->cmd_slot->opts = cpu_to_le32(opts);
pp->cmd_slot->status = 0;
@@ -449,7 +449,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
{
struct ahci_ioports *pp = &(uc_priv->port[port]);
void __iomem *port_mmio = pp->port_mmio;
- u64 dma_addr;
+ phys_addr_t dma_addr;
u32 port_status;
void __iomem *mem;
@@ -472,34 +472,32 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
* First item in chunk of DMA memory: 32-slot command table,
* 32 bytes each in size
*/
- pp->cmd_slot =
- (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem);
- debug("cmd_slot = %p\n", pp->cmd_slot);
- mem += (AHCI_CMD_SLOT_SZ + 224);
+ pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
+ mem += AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT;
/*
* Second item: Received-FIS area
*/
- pp->rx_fis = virt_to_phys((void *)mem);
+ pp->rx_fis = mem;
mem += AHCI_RX_FIS_SZ;
/*
* Third item: data area for storing a single command
* and its scatter-gather table
*/
- pp->cmd_tbl = virt_to_phys((void *)mem);
- debug("cmd_tbl_dma = %lx\n", pp->cmd_tbl);
+ pp->cmd_tbl = mem;
mem += AHCI_CMD_TBL_HDR;
- pp->cmd_tbl_sg =
- (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
-
- dma_addr = (ulong)pp->cmd_slot;
- writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR);
- writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI);
- dma_addr = (ulong)pp->rx_fis;
- writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR);
- writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI);
+ pp->cmd_tbl_sg = (struct ahci_sg *)(mem);
+
+ dma_addr = virt_to_phys(pp->cmd_slot);
+ debug("cmd_slot_dma = 0x%08llx\n", (u64)dma_addr);
+ writel_with_flush(lower_32_bits(dma_addr), port_mmio + PORT_LST_ADDR);
+ writel_with_flush(upper_32_bits(dma_addr), port_mmio + PORT_LST_ADDR_HI);
+ dma_addr = virt_to_phys(pp->rx_fis);
+ debug("rx_fis_dma = 0x%08llx\n", (u64)dma_addr);
+ writel_with_flush(lower_32_bits(dma_addr), port_mmio + PORT_FIS_ADDR);
+ writel_with_flush(upper_32_bits(dma_addr), port_mmio + PORT_FIS_ADDR_HI);
#ifdef CONFIG_SUNXI_AHCI
sunxi_dma_init(port_mmio);
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index 203f98edffc..d225289fe6e 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -7,6 +7,7 @@
#include <ahci.h>
#include <blk.h>
#include <bootdev.h>
+#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
#include <dwc_ahsata.h>
@@ -19,9 +20,11 @@
#include <sata.h>
#include <asm/cache.h>
#include <asm/io.h>
+#if IS_ENABLED(CONFIG_ARCH_MX5) || IS_ENABLED(CONFIG_ARCH_MX6)
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/sata.h>
+#endif
#include <linux/bitops.h>
#include <linux/ctype.h>
#include <linux/delay.h>
@@ -116,13 +119,12 @@ static int ahci_setup_oobr(struct ahci_uc_priv *uc_priv, int clk)
return 0;
}
-static int ahci_host_init(struct ahci_uc_priv *uc_priv)
+static int ahci_host_init(struct ahci_uc_priv *uc_priv, int clk)
{
u32 tmp, cap_save, num_ports;
int i, j, timeout = 1000;
struct sata_port_regs *port_mmio = NULL;
struct sata_host_regs *host_mmio = uc_priv->mmio_base;
- int clk = mxc_get_clock(MXC_SATA_CLK);
cap_save = readl(&host_mmio->cap);
cap_save |= SATA_HOST_CAP_SSS;
@@ -330,6 +332,7 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
{
struct ahci_ioports *pp = &uc_priv->port[port];
struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
+ phys_addr_t pa = virt_to_phys(buf);
u32 sg_count, max_bytes;
int i;
@@ -341,9 +344,8 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
}
for (i = 0; i < sg_count; i++) {
- ahci_sg->addr =
- cpu_to_le32((u32)buf + i * max_bytes);
- ahci_sg->addr_hi = 0;
+ ahci_sg->addr = cpu_to_le32(lower_32_bits(pa));
+ ahci_sg->addr_hi = cpu_to_le32(upper_32_bits(pa));
ahci_sg->flags_size = cpu_to_le32(0x3fffff &
(buf_len < max_bytes
? (buf_len - 1)
@@ -359,14 +361,14 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 cmd_slot, u32 opts)
{
struct ahci_cmd_hdr *cmd_hdr = (struct ahci_cmd_hdr *)(pp->cmd_slot +
AHCI_CMD_SLOT_SZ * cmd_slot);
+ phys_addr_t pa = virt_to_phys(pp->cmd_tbl);
memset(cmd_hdr, 0, AHCI_CMD_SLOT_SZ);
cmd_hdr->opts = cpu_to_le32(opts);
cmd_hdr->status = 0;
- pp->cmd_slot->tbl_addr = cpu_to_le32((u32)pp->cmd_tbl & 0xffffffff);
+ pp->cmd_slot->tbl_addr = cpu_to_le32(lower_32_bits(pa));
#ifdef CONFIG_PHYS_64BIT
- pp->cmd_slot->tbl_addr_hi =
- cpu_to_le32((u32)(((pp->cmd_tbl) >> 16) >> 16));
+ pp->cmd_slot->tbl_addr_hi = cpu_to_le32(upper_32_bits(pa));
#endif
}
@@ -404,7 +406,7 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port,
}
ahci_fill_cmd_slot(pp, cmd_slot, opts);
- flush_cache((int)(pp->cmd_slot), AHCI_PORT_PRIV_DMA_SZ);
+ flush_cache((ulong)(pp->cmd_slot), AHCI_PORT_PRIV_DMA_SZ);
writel_with_flush(1 << cmd_slot, &port_mmio->ci);
if (waiting_for_cmd_completed((u8 *)&port_mmio->ci, 10000,
@@ -412,8 +414,8 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port,
printf("timeout exit!\n");
return -1;
}
- invalidate_dcache_range((int)(pp->cmd_slot),
- (int)(pp->cmd_slot)+AHCI_PORT_PRIV_DMA_SZ);
+ invalidate_dcache_range((ulong)(pp->cmd_slot),
+ (ulong)(pp->cmd_slot) + AHCI_PORT_PRIV_DMA_SZ);
debug("ahci_exec_ata_cmd: %d byte transferred.\n",
pp->cmd_slot->status);
if (!is_write)
@@ -441,8 +443,9 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
{
struct ahci_ioports *pp = &uc_priv->port[port];
struct sata_port_regs *port_mmio = pp->port_mmio;
+ phys_addr_t dma_addr;
u32 port_status;
- u32 mem;
+ void *mem;
int timeout = 10000000;
debug("Enter start port: %d\n", port);
@@ -453,22 +456,20 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
return -1;
}
- mem = (u32)malloc(AHCI_PORT_PRIV_DMA_SZ + 1024);
+ mem = memalign(2048, AHCI_PORT_PRIV_DMA_SZ);
if (!mem) {
printf("No mem for table!\n");
return -ENOMEM;
}
- mem = (mem + 0x400) & (~0x3ff); /* Aligned to 1024-bytes */
- memset((u8 *)mem, 0, AHCI_PORT_PRIV_DMA_SZ);
+ memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ);
/*
* First item in chunk of DMA memory: 32-slot command table,
* 32 bytes each in size
*/
pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
- debug("cmd_slot = 0x%x\n", (unsigned int) pp->cmd_slot);
- mem += (AHCI_CMD_SLOT_SZ * DWC_AHSATA_MAX_CMD_SLOTS);
+ mem += AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT;
/*
* Second item: Received-FIS area, 256-Byte aligned
@@ -481,14 +482,19 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
* and its scatter-gather table
*/
pp->cmd_tbl = mem;
- debug("cmd_tbl_dma = 0x%lx\n", pp->cmd_tbl);
-
mem += AHCI_CMD_TBL_HDR;
+ pp->cmd_tbl_sg = (struct ahci_sg *)mem;
writel_with_flush(0x00004444, &port_mmio->dmacr);
- pp->cmd_tbl_sg = (struct ahci_sg *)mem;
- writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb);
- writel_with_flush(pp->rx_fis, &port_mmio->fb);
+ dma_addr = virt_to_phys(pp->cmd_slot);
+ debug("cmd_slot_dma = 0x%08llx\n", (u64)dma_addr);
+ writel_with_flush(lower_32_bits(dma_addr), &port_mmio->clb);
+ writel_with_flush(upper_32_bits(dma_addr), &port_mmio->clbu);
+ dma_addr = virt_to_phys(pp->cmd_slot);
+ debug("rx_fis_slot_dma = 0x%08llx\n", (u64)dma_addr);
+ writel_with_flush(lower_32_bits(dma_addr), &port_mmio->fb);
+ writel_with_flush(upper_32_bits(dma_addr), &port_mmio->fbu);
+
/* Enable FRE */
writel_with_flush((SATA_PORT_CMD_FRE | readl(&port_mmio->cmd)),
@@ -910,17 +916,41 @@ int dwc_ahsata_scan(struct udevice *dev)
int dwc_ahsata_probe(struct udevice *dev)
{
struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct clk_bulk clk_bulk __maybe_unused;
+ struct clk clk __maybe_unused;
+ int sataclk;
int ret;
-#if defined(CONFIG_MX6)
+#if IS_ENABLED(CONFIG_MX6)
setup_sata();
#endif
+#if IS_ENABLED(CONFIG_MX5) || IS_ENABLED(CONFIG_MX6)
+ sataclk = mxc_get_clock(MXC_SATA_CLK);
+#else
+ ret = clk_get_bulk(dev, &clk_bulk);
+ if (ret)
+ return ret;
+
+ ret = clk_enable_bulk(&clk_bulk);
+ if (ret)
+ return ret;
+
+ ret = clk_get_by_name(dev, "sata", &clk);
+ if (ret)
+ return ret;
+
+ sataclk = clk_get_rate(&clk);
+#endif
+ if (IS_ERR_VALUE(sataclk)) {
+ log_err("Unable to get SATA clock rate\n");
+ return -EINVAL;
+ }
uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI;
uc_priv->mmio_base = dev_read_addr_ptr(dev);
/* initialize adapter */
- ret = ahci_host_init(uc_priv);
+ ret = ahci_host_init(uc_priv, sataclk);
if (ret)
return ret;
@@ -962,7 +992,6 @@ U_BOOT_DRIVER(dwc_ahsata_blk) = {
.ops = &dwc_ahsata_blk_ops,
};
-#if CONFIG_IS_ENABLED(DWC_AHSATA_AHCI)
struct ahci_ops dwc_ahsata_ahci_ops = {
.port_status = dwc_ahsata_port_status,
.reset = dwc_ahsata_bus_reset,
@@ -970,7 +999,9 @@ struct ahci_ops dwc_ahsata_ahci_ops = {
};
static const struct udevice_id dwc_ahsata_ahci_ids[] = {
+ { .compatible = "fsl,imx53-ahci" },
{ .compatible = "fsl,imx6q-ahci" },
+ { .compatible = "fsl,imx6qp-ahci" },
{ }
};
@@ -981,4 +1012,3 @@ U_BOOT_DRIVER(dwc_ahsata_ahci) = {
.ops = &dwc_ahsata_ahci_ops,
.probe = dwc_ahsata_probe,
};
-#endif
diff --git a/drivers/ata/dwc_ahsata_priv.h b/drivers/ata/dwc_ahsata_priv.h
index 5b0579ae115..0c2cd5446b5 100644
--- a/drivers/ata/dwc_ahsata_priv.h
+++ b/drivers/ata/dwc_ahsata_priv.h
@@ -7,8 +7,6 @@
#ifndef __DWC_AHSATA_PRIV_H__
#define __DWC_AHSATA_PRIV_H__
-#define DWC_AHSATA_MAX_CMD_SLOTS 32
-
/* Max host controller numbers */
#define SATA_HC_MAX_NUM 4
/* Max command queue depth per host controller */
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 030ff7cc58e..71e030f463e 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -58,17 +58,21 @@ const struct clk_ops clk_boston_ops = {
.get_rate = clk_boston_get_rate,
};
-static int clk_boston_of_to_plat(struct udevice *dev)
+static int clk_boston_probe(struct udevice *dev)
{
struct clk_boston *state = dev_get_plat(dev);
struct udevice *syscon;
int err;
- err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
- "regmap", &syscon);
- if (err) {
- pr_err("unable to find syscon device\n");
- return err;
+ if (dev->parent && device_get_uclass_id(dev->parent) == UCLASS_SYSCON) {
+ syscon = dev->parent;
+ } else {
+ err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+ "regmap", &syscon);
+ if (err) {
+ pr_err("unable to find syscon device\n");
+ return err;
+ }
}
state->regmap = syscon_get_regmap(syscon);
@@ -91,7 +95,8 @@ U_BOOT_DRIVER(clk_boston) = {
.name = "boston_clock",
.id = UCLASS_CLK,
.of_match = clk_boston_match,
- .of_to_plat = clk_boston_of_to_plat,
+ .probe = clk_boston_probe,
.plat_auto = sizeof(struct clk_boston),
.ops = &clk_boston_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a0a7890bd26..4434d364777 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -48,7 +48,6 @@ config DM_DSA
bool "Enable Driver Model for DSA switches"
depends on DM_MDIO
depends on PHY_FIXED
- depends on !NET_LWIP
help
Enable driver model for DSA switches
@@ -358,7 +357,7 @@ config ESSEDMA
config ETH_SANDBOX
depends on SANDBOX
- depends on NET
+ depends on NET || NET_LWIP
default y
bool "Sandbox: Mocked Ethernet driver"
help
@@ -367,17 +366,6 @@ config ETH_SANDBOX
This driver is particularly useful in the test/dm/eth.c tests
-config ETH_SANDBOX_LWIP
- depends on SANDBOX
- depends on NET_LWIP
- default y
- bool "Sandbox: Mocked Ethernet driver (for NET_LWIP)"
- help
- This driver is meant as a replacement for ETH_SANDBOX when
- the network stack is NET_LWIP rather than NET. It currently
- does nothing, i.e. it drops the sent packets and never receives
- data.
-
config ETH_SANDBOX_RAW
depends on SANDBOX
depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 3244d39036d..67bba3a8536 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -41,7 +41,6 @@ obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o
obj-$(CONFIG_ETH_SANDBOX) += sandbox.o
obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-bus.o
obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o
-obj-$(CONFIG_ETH_SANDBOX_LWIP) += sandbox-lwip.o
obj-$(CONFIG_FEC_MXC) += fec_mxc.o
obj-$(CONFIG_FMAN_ENET) += fm/
obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
diff --git a/drivers/net/sandbox-lwip.c b/drivers/net/sandbox-lwip.c
deleted file mode 100644
index 3721033c310..00000000000
--- a/drivers/net/sandbox-lwip.c
+++ /dev/null
@@ -1,85 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2015 National Instruments
- *
- * (C) Copyright 2015
- * Joe Hershberger <joe.hershberger@ni.com>
- */
-
-#include <dm.h>
-#include <log.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/eth.h>
-#include <asm/global_data.h>
-#include <asm/test.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int sb_lwip_eth_start(struct udevice *dev)
-{
- debug("eth_sandbox_lwip: Start\n");
-
- return 0;
-}
-
-static int sb_lwip_eth_send(struct udevice *dev, void *packet, int length)
-{
- debug("eth_sandbox_lwip: Send packet %d\n", length);
-
- return -ENOTSUPP;
-}
-
-static int sb_lwip_eth_recv(struct udevice *dev, int flags, uchar **packetp)
-{
- return -EAGAIN;
-}
-
-static int sb_lwip_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
-{
- return 0;
-}
-
-static void sb_lwip_eth_stop(struct udevice *dev)
-{
-}
-
-static int sb_lwip_eth_write_hwaddr(struct udevice *dev)
-{
- return 0;
-}
-
-static const struct eth_ops sb_eth_ops = {
- .start = sb_lwip_eth_start,
- .send = sb_lwip_eth_send,
- .recv = sb_lwip_eth_recv,
- .free_pkt = sb_lwip_eth_free_pkt,
- .stop = sb_lwip_eth_stop,
- .write_hwaddr = sb_lwip_eth_write_hwaddr,
-};
-
-static int sb_lwip_eth_remove(struct udevice *dev)
-{
- return 0;
-}
-
-static int sb_lwip_eth_of_to_plat(struct udevice *dev)
-{
- return 0;
-}
-
-static const struct udevice_id sb_eth_ids[] = {
- { .compatible = "sandbox,eth" },
- { }
-};
-
-U_BOOT_DRIVER(eth_sandbox) = {
- .name = "eth_lwip_sandbox",
- .id = UCLASS_ETH,
- .of_match = sb_eth_ids,
- .of_to_plat = sb_lwip_eth_of_to_plat,
- .remove = sb_lwip_eth_remove,
- .ops = &sb_eth_ops,
- .priv_auto = 0,
- .plat_auto = sizeof(struct eth_pdata),
-};
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index fe3627db6e3..2011fd31f41 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -9,13 +9,84 @@
#include <dm.h>
#include <log.h>
#include <malloc.h>
-#include <net.h>
#include <asm/eth.h>
#include <asm/global_data.h>
#include <asm/test.h>
+#include <asm/types.h>
+
+/*
+ * Structure definitions for network protocols. Since this file is used for
+ * both NET and NET_LWIP, and given that the two network stacks do have
+ * conflicting types (for instance struct icmp_hdr), it is on purpose that the
+ * structures are defined locally with minimal dependencies -- <asm/types.h> is
+ * included for the bit types and that's it.
+ */
+
+#define ETHADDR_LEN 6
+#define IP4_LEN 4
+
+struct ethhdr {
+ u8 dst[ETHADDR_LEN];
+ u8 src[ETHADDR_LEN];
+ u16 protlen;
+} __attribute__((packed));
+
+#define ETHHDR_SIZE (sizeof(struct ethhdr))
+
+struct arphdr {
+ u16 htype;
+ u16 ptype;
+ u8 hlen;
+ u8 plen;
+ u16 op;
+} __attribute__((packed));
+
+#define ARPHDR_SIZE (sizeof(struct arphdr))
+
+#define ARP_REQUEST 1
+#define ARP_REPLY 2
+
+struct arpdata {
+ u8 sha[ETHADDR_LEN];
+ u32 spa;
+ u8 tha[ETHADDR_LEN];
+ u32 tpa;
+} __attribute__((packed));
+
+#define ARPDATA_SIZE (sizeof(struct arpdata))
+
+struct iphdr {
+ u8 hl_v;
+ u8 tos;
+ u16 len;
+ u16 id;
+ u16 off;
+ u8 ttl;
+ u8 prot;
+ u16 sum;
+ u32 src;
+ u32 dst;
+} __attribute__((packed));
+
+#define IPHDR_SIZE (sizeof(struct iphdr))
+
+struct icmphdr {
+ u8 type;
+ u8 code;
+ u16 checksum;
+ u16 id;
+ u16 sequence;
+} __attribute__((packed));
+
+#define ICMPHDR_SIZE (sizeof(struct icmphdr))
+
+#define ICMP_ECHO_REQUEST 8
+#define ICMP_ECHO_REPLY 0
+#define IPPROTO_ICMP 1
DECLARE_GLOBAL_DATA_PTR;
+static const u8 null_ethaddr[6];
static bool skip_timeout;
/*
@@ -59,17 +130,19 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet,
unsigned int len)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
- struct ethernet_hdr *eth = packet;
- struct arp_hdr *arp;
- struct ethernet_hdr *eth_recv;
- struct arp_hdr *arp_recv;
-
- if (ntohs(eth->et_protlen) != PROT_ARP)
+ struct ethhdr *eth = packet;
+ struct arphdr *arp;
+ struct arpdata *arpd;
+ struct ethhdr *eth_recv;
+ struct arphdr *arp_recv;
+ struct arpdata *arp_recvd;
+
+ if (ntohs(eth->protlen) != PROT_ARP)
return -EAGAIN;
- arp = packet + ETHER_HDR_SIZE;
+ arp = packet + ETHHDR_SIZE;
- if (ntohs(arp->ar_op) != ARPOP_REQUEST)
+ if (ntohs(arp->op) != ARP_REQUEST)
return -EAGAIN;
/* Don't allow the buffer to overrun */
@@ -77,27 +150,29 @@ int sandbox_eth_arp_req_to_reply(struct udevice *dev, void *packet,
return 0;
/* store this as the assumed IP of the fake host */
- priv->fake_host_ipaddr = net_read_ip(&arp->ar_tpa);
+ arpd = (struct arpdata *)(arp + 1);
+ priv->fake_host_ipaddr.s_addr = arpd->tpa;
/* Formulate a fake response */
eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
- memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN);
- memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
- eth_recv->et_protlen = htons(PROT_ARP);
-
- arp_recv = (void *)eth_recv + ETHER_HDR_SIZE;
- arp_recv->ar_hrd = htons(ARP_ETHER);
- arp_recv->ar_pro = htons(PROT_IP);
- arp_recv->ar_hln = ARP_HLEN;
- arp_recv->ar_pln = ARP_PLEN;
- arp_recv->ar_op = htons(ARPOP_REPLY);
- memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN);
- net_write_ip(&arp_recv->ar_spa, priv->fake_host_ipaddr);
- memcpy(&arp_recv->ar_tha, &arp->ar_sha, ARP_HLEN);
- net_copy_ip(&arp_recv->ar_tpa, &arp->ar_spa);
-
- priv->recv_packet_length[priv->recv_packets] =
- ETHER_HDR_SIZE + ARP_HDR_SIZE;
+ memcpy(eth_recv->dst, eth->src, ETHADDR_LEN);
+ memcpy(eth_recv->src, priv->fake_host_hwaddr, ETHADDR_LEN);
+ eth_recv->protlen = htons(PROT_ARP);
+
+ arp_recv = (void *)eth_recv + ETHHDR_SIZE;
+ arp_recv->htype = htons(ARP_ETHER);
+ arp_recv->ptype = htons(PROT_IP);
+ arp_recv->hlen = ETHADDR_LEN;
+ arp_recv->plen = IP4_LEN;
+ arp_recv->op = htons(ARP_REPLY);
+ arp_recvd = (struct arpdata *)(arp_recv + 1);
+ memcpy(&arp_recvd->sha, priv->fake_host_hwaddr, ETHADDR_LEN);
+ arp_recvd->spa = priv->fake_host_ipaddr.s_addr;
+ memcpy(&arp_recvd->tha, &arpd->sha, ETHADDR_LEN);
+ arp_recvd->tpa = arpd->spa;
+
+ priv->recv_packet_length[priv->recv_packets] = ETHHDR_SIZE +
+ ARPHDR_SIZE + ARPDATA_SIZE;
++priv->recv_packets;
return 0;
@@ -114,22 +189,22 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
unsigned int len)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
- struct ethernet_hdr *eth = packet;
- struct ip_udp_hdr *ip;
- struct icmp_hdr *icmp;
- struct ethernet_hdr *eth_recv;
- struct ip_udp_hdr *ipr;
- struct icmp_hdr *icmpr;
-
- if (ntohs(eth->et_protlen) != PROT_IP)
+ struct ethhdr *eth = packet;
+ struct iphdr *ip;
+ struct icmphdr *icmp;
+ struct ethhdr *eth_recv;
+ struct iphdr *ipr;
+ struct icmphdr *icmpr;
+
+ if (ntohs(eth->protlen) != PROT_IP)
return -EAGAIN;
- ip = packet + ETHER_HDR_SIZE;
+ ip = packet + ETHHDR_SIZE;
- if (ip->ip_p != IPPROTO_ICMP)
+ if (ip->prot != IPPROTO_ICMP)
return -EAGAIN;
- icmp = (struct icmp_hdr *)&ip->udp_src;
+ icmp = (struct icmphdr *)(ip + 1);
if (icmp->type != ICMP_ECHO_REQUEST)
return -EAGAIN;
@@ -141,19 +216,19 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
/* reply to the ping */
eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
memcpy(eth_recv, packet, len);
- ipr = (void *)eth_recv + ETHER_HDR_SIZE;
- icmpr = (struct icmp_hdr *)&ipr->udp_src;
- memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN);
- memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
- ipr->ip_sum = 0;
- ipr->ip_off = 0;
- net_copy_ip((void *)&ipr->ip_dst, &ip->ip_src);
- net_write_ip((void *)&ipr->ip_src, priv->fake_host_ipaddr);
- ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE);
+ ipr = (void *)eth_recv + ETHHDR_SIZE;
+ icmpr = (struct icmphdr *)(ipr + 1);
+ memcpy(eth_recv->dst, eth->src, ETHADDR_LEN);
+ memcpy(eth_recv->src, priv->fake_host_hwaddr, ETHADDR_LEN);
+ ipr->sum = 0;
+ ipr->off = 0;
+ ipr->dst = ip->src;
+ ipr->src = priv->fake_host_ipaddr.s_addr;
+ ipr->sum = compute_ip_checksum(ipr, IPHDR_SIZE);
icmpr->type = ICMP_ECHO_REPLY;
icmpr->checksum = 0;
- icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE);
+ icmpr->checksum = compute_ip_checksum(icmpr, ICMPHDR_SIZE);
priv->recv_packet_length[priv->recv_packets] = len;
++priv->recv_packets;
@@ -171,8 +246,9 @@ int sandbox_eth_ping_req_to_reply(struct udevice *dev, void *packet,
int sandbox_eth_recv_arp_req(struct udevice *dev)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
- struct ethernet_hdr *eth_recv;
- struct arp_hdr *arp_recv;
+ struct ethhdr *eth_recv;
+ struct arphdr *arp_recv;
+ struct arpdata *arp_recvd;
/* Don't allow the buffer to overrun */
if (priv->recv_packets >= PKTBUFSRX)
@@ -180,23 +256,24 @@ int sandbox_eth_recv_arp_req(struct udevice *dev)
/* Formulate a fake request */
eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
- memcpy(eth_recv->et_dest, net_bcast_ethaddr, ARP_HLEN);
- memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
- eth_recv->et_protlen = htons(PROT_ARP);
-
- arp_recv = (void *)eth_recv + ETHER_HDR_SIZE;
- arp_recv->ar_hrd = htons(ARP_ETHER);
- arp_recv->ar_pro = htons(PROT_IP);
- arp_recv->ar_hln = ARP_HLEN;
- arp_recv->ar_pln = ARP_PLEN;
- arp_recv->ar_op = htons(ARPOP_REQUEST);
- memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, ARP_HLEN);
- net_write_ip(&arp_recv->ar_spa, priv->fake_host_ipaddr);
- memcpy(&arp_recv->ar_tha, net_null_ethaddr, ARP_HLEN);
- net_write_ip(&arp_recv->ar_tpa, net_ip);
+ memcpy(eth_recv->dst, net_bcast_ethaddr, ETHADDR_LEN);
+ memcpy(eth_recv->src, priv->fake_host_hwaddr, ETHADDR_LEN);
+ eth_recv->protlen = htons(PROT_ARP);
+
+ arp_recv = (void *)eth_recv + ETHHDR_SIZE;
+ arp_recv->htype = htons(ARP_ETHER);
+ arp_recv->ptype = htons(PROT_IP);
+ arp_recv->hlen = ETHADDR_LEN;
+ arp_recv->plen = IP4_LEN;
+ arp_recv->op = htons(ARP_REQUEST);
+ arp_recvd = (struct arpdata *)(arp_recv + 1);
+ memcpy(&arp_recvd->sha, priv->fake_host_hwaddr, ETHADDR_LEN);
+ arp_recvd->spa = priv->fake_host_ipaddr.s_addr;
+ memcpy(&arp_recvd->tha, null_ethaddr, ETHADDR_LEN);
+ arp_recvd->tpa = net_ip.s_addr;
priv->recv_packet_length[priv->recv_packets] =
- ETHER_HDR_SIZE + ARP_HDR_SIZE;
+ ETHHDR_SIZE + ARPHDR_SIZE + ARPDATA_SIZE;
++priv->recv_packets;
return 0;
@@ -212,9 +289,10 @@ int sandbox_eth_recv_arp_req(struct udevice *dev)
int sandbox_eth_recv_ping_req(struct udevice *dev)
{
struct eth_sandbox_priv *priv = dev_get_priv(dev);
- struct ethernet_hdr *eth_recv;
- struct ip_udp_hdr *ipr;
- struct icmp_hdr *icmpr;
+ struct eth_pdata *pdata = dev_get_plat(dev);
+ struct ethhdr *eth_recv;
+ struct iphdr *ipr;
+ struct icmphdr *icmpr;
/* Don't allow the buffer to overrun */
if (priv->recv_packets >= PKTBUFSRX)
@@ -223,31 +301,31 @@ int sandbox_eth_recv_ping_req(struct udevice *dev)
/* Formulate a fake ping */
eth_recv = (void *)priv->recv_packet_buffer[priv->recv_packets];
- memcpy(eth_recv->et_dest, net_ethaddr, ARP_HLEN);
- memcpy(eth_recv->et_src, priv->fake_host_hwaddr, ARP_HLEN);
- eth_recv->et_protlen = htons(PROT_IP);
+ memcpy(eth_recv->dst, pdata->enetaddr, ETHADDR_LEN);
+ memcpy(eth_recv->src, priv->fake_host_hwaddr, ETHADDR_LEN);
+ eth_recv->protlen = htons(PROT_IP);
- ipr = (void *)eth_recv + ETHER_HDR_SIZE;
- ipr->ip_hl_v = 0x45;
- ipr->ip_len = htons(IP_ICMP_HDR_SIZE);
- ipr->ip_off = htons(IP_FLAGS_DFRAG);
- ipr->ip_p = IPPROTO_ICMP;
- ipr->ip_sum = 0;
- net_write_ip(&ipr->ip_src, priv->fake_host_ipaddr);
- net_write_ip(&ipr->ip_dst, net_ip);
- ipr->ip_sum = compute_ip_checksum(ipr, IP_HDR_SIZE);
+ ipr = (void *)eth_recv + ETHHDR_SIZE;
+ ipr->hl_v = 0x45;
+ ipr->len = htons(IPHDR_SIZE + ICMPHDR_SIZE);
+ ipr->off = htons(IP_FLAGS_DFRAG);
+ ipr->prot = IPPROTO_ICMP;
+ ipr->sum = 0;
+ ipr->src = priv->fake_host_ipaddr.s_addr;
+ ipr->dst = net_ip.s_addr;
+ ipr->sum = compute_ip_checksum(ipr, IPHDR_SIZE);
- icmpr = (struct icmp_hdr *)&ipr->udp_src;
+ icmpr = (struct icmphdr *)(ipr + 1);
icmpr->type = ICMP_ECHO_REQUEST;
icmpr->code = 0;
icmpr->checksum = 0;
- icmpr->un.echo.id = 0;
- icmpr->un.echo.sequence = htons(1);
- icmpr->checksum = compute_ip_checksum(icmpr, ICMP_HDR_SIZE);
+ icmpr->id = 0;
+ icmpr->sequence = htons(1);
+ icmpr->checksum = compute_ip_checksum(icmpr, ICMPHDR_SIZE);
priv->recv_packet_length[priv->recv_packets] =
- ETHER_HDR_SIZE + IP_ICMP_HDR_SIZE;
+ ETHHDR_SIZE + IPHDR_SIZE + ICMPHDR_SIZE;
++priv->recv_packets;
return 0;
@@ -398,7 +476,7 @@ static int sb_eth_write_hwaddr(struct udevice *dev)
debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name,
pdata->enetaddr);
- memcpy(priv->fake_host_hwaddr, pdata->enetaddr, ARP_HLEN);
+ memcpy(priv->fake_host_hwaddr, pdata->enetaddr, ETHADDR_LEN);
return 0;
}
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 4f876d39875..409049137cc 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -67,6 +67,7 @@ config PCI_CONFIG_HOST_BRIDGE
config PCI_MAP_SYSTEM_MEMORY
bool "Map local system memory from a virtual base address"
depends on MIPS
+ default y if !ARCH_MAP_SYSMEM
help
Say Y if base address of system memory is being used as a virtual address
instead of a physical address (e.g. on MIPS). The PCI core will then remap
@@ -75,6 +76,15 @@ config PCI_MAP_SYSTEM_MEMORY
This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
being used as virtual address.
+config PCI_BRIDGE_MEM_ALIGNMENT
+ hex "Alignment boundary of PCI memory resource allocation"
+ default 0x10000 if TARGET_BOSTON
+ default 0x100000
+ help
+ Specify a boundary for alignment of PCI memory resource allocation,
+ this is normally 0x100000 (1MB) but can be reduced to accommodate
+ hardware with tight bridge range if hardware allows.
+
config PCI_SRIOV
bool "Enable Single Root I/O Virtualization support for PCI"
help
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index e68e31a8227..4a1c782be36 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -373,8 +373,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_mem, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -388,8 +388,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
}
if (pci_prefetch) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_prefetch, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_prefetch, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -466,8 +466,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr));
if (pci_mem) {
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_mem, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
((pci_mem->bus_lower - 1) >> 16) &
@@ -481,8 +481,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
&prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
- /* Round memory allocator to 1MB boundary */
- pciauto_region_align(pci_prefetch, 0x100000);
+ /* Round memory allocator */
+ pciauto_region_align(pci_prefetch, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT,
(((pci_prefetch->bus_lower - 1) >> 16) &
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index a674ab04bee..63058e8e7c5 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -18,14 +18,19 @@
*/
struct xilinx_pcie {
void *cfg_base;
+ pci_size_t size;
+ int first_busno;
};
/* Register definitions */
-#define XILINX_PCIE_REG_PSCR 0x144
-#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
-#define XILINX_PCIE_REG_RPSC 0x148
-#define XILINX_PCIE_REG_RPSC_BEN BIT(0)
-
+#define XILINX_PCIE_REG_BRIDGE_INFO 0x130
+#define XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_SHIFT 16
+#define XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_MASK (0x7 << 16)
+#define XILINX_PCIE_REG_INT_MASK 0x13c
+#define XILINX_PCIE_REG_PSCR 0x144
+#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
+#define XILINX_PCIE_REG_RPSC 0x148
+#define XILINX_PCIE_REG_RPSC_BEN BIT(0)
/**
* pcie_xilinx_link_up() - Check whether the PCIe link is up
* @pcie: Pointer to the PCI controller state
@@ -61,14 +66,18 @@ static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress)
{
struct xilinx_pcie *pcie = dev_get_priv(udev);
- unsigned int bus = PCI_BUS(bdf);
+ unsigned int bus = PCI_BUS(bdf) - pcie->first_busno;
unsigned int dev = PCI_DEV(bdf);
unsigned int func = PCI_FUNC(bdf);
+ int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
void *addr;
if ((bus > 0) && !pcie_xilinx_link_up(pcie))
return -ENODEV;
+ if (bus > num_buses)
+ return -ENODEV;
+
/*
* Busses 0 (host-PCIe bridge) & 1 (its immediate child) are
* limited to a single device each.
@@ -142,20 +151,37 @@ static int pcie_xilinx_of_to_plat(struct udevice *dev)
struct xilinx_pcie *pcie = dev_get_priv(dev);
fdt_addr_t addr;
fdt_size_t size;
- u32 rpsc;
addr = dev_read_addr_size(dev, &size);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
- pcie->cfg_base = devm_ioremap(dev, addr, size);
- if (IS_ERR(pcie->cfg_base))
- return PTR_ERR(pcie->cfg_base);
+ pcie->cfg_base = map_physmem(addr, size, MAP_NOCACHE);
+ if (!pcie->cfg_base)
+ return -ENOMEM;
+ pcie->size = size;
+ return 0;
+}
- /* Enable the Bridge enable bit */
- rpsc = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+static int pci_xilinx_probe(struct udevice *dev)
+{
+ struct xilinx_pcie *pcie = dev_get_priv(dev);
+ u32 rpsc;
+ int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
+
+ pcie->first_busno = dev_seq(dev);
+
+ /* Disable all interrupts */
+ writel(0, pcie->cfg_base + XILINX_PCIE_REG_INT_MASK);
+
+ /* Enable the bridge */
+ rpsc = readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
rpsc |= XILINX_PCIE_REG_RPSC_BEN;
- __raw_writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+ writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+
+ /* Enable access to all possible subordinate buses */
+ writel((0 << 0) | (1 << 8) | (num_buses << 16),
+ pcie->cfg_base + PCI_PRIMARY_BUS);
return 0;
}
@@ -176,5 +202,6 @@ U_BOOT_DRIVER(pcie_xilinx) = {
.of_match = pcie_xilinx_ids,
.ops = &pcie_xilinx_ops,
.of_to_plat = pcie_xilinx_of_to_plat,
+ .probe = pci_xilinx_probe,
.priv_auto = sizeof(struct xilinx_pcie),
};
generated by cgit v1.2.3 (git 2.0.4) at 2025-09-25 13:33:31 +0000