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-rw-r--r--drivers/misc/Kconfig6
-rw-r--r--drivers/net/gmac_rockchip.c69
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-px30.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3036.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3066.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3128.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3188.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk322x.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3288.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3308.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3328.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3368.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3399.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3568.c1
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3588.c1
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rockchip-core.c5
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rockchip.h1
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rv1108.c2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rv1126.c1
19 files changed, 73 insertions, 35 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 0911d2fc0cc..ffc5868c0dd 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -104,7 +104,11 @@ config ROCKCHIP_OTP
config ROCKCHIP_IODOMAIN
bool "Rockchip IO-domain driver support"
depends on DM_REGULATOR && ARCH_ROCKCHIP
- default y if ROCKCHIP_RK3328 || ROCKCHIP_RK3568
+ default y if ROCKCHIP_PX30
+ default y if ROCKCHIP_RK3308
+ default y if ROCKCHIP_RK3328
+ default y if ROCKCHIP_RK3399
+ default y if ROCKCHIP_RK3568
help
Enable support for IO-domains in Rockchip SoCs. It is necessary
for the IO-domain setting of the SoC to match the voltage supplied
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 8cfeeffe95b..c8cfe7448d4 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -151,26 +151,51 @@ static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
+ struct dw_eth_pdata *dw_pdata = dev_get_plat(priv->dev);
+ struct eth_pdata *eth_pdata = &dw_pdata->eth_pdata;
struct rk3288_grf *grf;
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
int clk;
- switch (priv->phydev->speed) {
- case 10:
- clk = RK3288_GMAC_CLK_SEL_2_5M;
- break;
- case 100:
- clk = RK3288_GMAC_CLK_SEL_25M;
- break;
- case 1000:
- clk = RK3288_GMAC_CLK_SEL_125M;
- break;
- default:
- debug("Unknown phy speed: %d\n", priv->phydev->speed);
- return -EINVAL;
- }
+ if (eth_pdata->phy_interface == PHY_INTERFACE_MODE_RMII) {
+ switch (priv->phydev->speed) {
+ case 10:
+ rk_clrsetreg(&grf->soc_con1,
+ RK3288_RMII_CLK_SEL_MASK |
+ RK3288_GMAC_SPEED_MASK,
+ RK3288_RMII_CLK_SEL_2_5M |
+ RK3288_GMAC_SPEED_10M);
+ break;
+ case 100:
+ rk_clrsetreg(&grf->soc_con1,
+ RK3288_RMII_CLK_SEL_MASK |
+ RK3288_GMAC_SPEED_MASK,
+ RK3288_RMII_CLK_SEL_25M |
+ RK3288_GMAC_SPEED_100M);
+ break;
+ default:
+ debug("Unknown phy speed: %d\n", priv->phydev->speed);
+ return -EINVAL;
+ }
+ } else {
+ switch (priv->phydev->speed) {
+ case 10:
+ clk = RK3288_GMAC_CLK_SEL_2_5M;
+ break;
+ case 100:
+ clk = RK3288_GMAC_CLK_SEL_25M;
+ break;
+ case 1000:
+ clk = RK3288_GMAC_CLK_SEL_125M;
+ break;
+
+ default:
+ debug("Unknown phy speed: %d\n", priv->phydev->speed);
+ return -EINVAL;
+ }
- grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
- rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);
+ rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);
+ }
return 0;
}
@@ -401,6 +426,17 @@ static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_plat *pdata)
pdata->tx_delay << RK3228_CLK_TX_DL_CFG_GMAC_SHIFT);
}
+static void rk3288_gmac_set_to_rmii(struct gmac_rockchip_plat *pdata)
+{
+ struct rk3288_grf *grf;
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ rk_clrsetreg(&grf->soc_con1,
+ RK3288_GMAC_PHY_INTF_SEL_MASK | RK3288_RMII_MODE_MASK,
+ RK3288_GMAC_PHY_INTF_SEL_RMII | RK3288_RMII_MODE);
+}
+
static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_plat *pdata)
{
struct rk3288_grf *grf;
@@ -703,6 +739,7 @@ const struct rk_gmac_ops rk3228_gmac_ops = {
const struct rk_gmac_ops rk3288_gmac_ops = {
.fix_mac_speed = rk3288_gmac_fix_mac_speed,
.set_to_rgmii = rk3288_gmac_set_to_rgmii,
+ .set_to_rmii = rk3288_gmac_set_to_rmii,
};
const struct rk_gmac_ops rk3308_gmac_ops = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c
index cc7885bae40..4595d8a4a23 100644
--- a/drivers/pinctrl/rockchip/pinctrl-px30.c
+++ b/drivers/pinctrl/rockchip/pinctrl-px30.c
@@ -324,7 +324,7 @@ static struct rockchip_pin_bank px30_pin_banks[] = {
),
};
-static struct rockchip_pin_ctrl px30_pin_ctrl = {
+static const struct rockchip_pin_ctrl px30_pin_ctrl = {
.pin_banks = px30_pin_banks,
.nr_banks = ARRAY_SIZE(px30_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index b14386ccd93..8d0c0e0b655 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -80,7 +80,7 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
PIN_BANK(2, 32, "gpio2"),
};
-static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3036_pin_ctrl = {
.pin_banks = rk3036_pin_banks,
.nr_banks = ARRAY_SIZE(rk3036_pin_banks),
.grf_mux_offset = 0xa8,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3066.c b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
index 60e088a9a6f..f773f2a3dab 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3066.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
@@ -82,7 +82,7 @@ static struct rockchip_pin_bank rk3066_pin_banks[] = {
PIN_BANK(6, 16, "gpio6"),
};
-static struct rockchip_pin_ctrl rk3066_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3066_pin_ctrl = {
.pin_banks = rk3066_pin_banks,
.nr_banks = ARRAY_SIZE(rk3066_pin_banks),
.grf_mux_offset = 0xa8,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index d00fc3da8b2..9f9c358694a 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -171,7 +171,7 @@ static struct rockchip_pin_bank rk3128_pin_banks[] = {
PIN_BANK(3, 32, "gpio3"),
};
-static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3128_pin_ctrl = {
.pin_banks = rk3128_pin_banks,
.nr_banks = ARRAY_SIZE(rk3128_pin_banks),
.grf_mux_offset = 0xa8,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 83db51f66ae..3a93db5622d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -105,7 +105,7 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
PIN_BANK(3, 32, "gpio3"),
};
-static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3188_pin_ctrl = {
.pin_banks = rk3188_pin_banks,
.nr_banks = ARRAY_SIZE(rk3188_pin_banks),
.grf_mux_offset = 0x60,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index b804597c048..a80978685d4 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -257,7 +257,7 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
PIN_BANK(3, 32, "gpio3"),
};
-static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3228_pin_ctrl = {
.pin_banks = rk3228_pin_banks,
.nr_banks = ARRAY_SIZE(rk3228_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 3870c1b7a34..d3ad1f70e5d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -212,7 +212,7 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
PIN_BANK(8, 16, "gpio8"),
};
-static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3288_pin_ctrl = {
.pin_banks = rk3288_pin_banks,
.nr_banks = ARRAY_SIZE(rk3288_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
index 2cd91b10a3b..5c0e34a7baa 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
@@ -421,7 +421,7 @@ static struct rockchip_pin_bank rk3308_pin_banks[] = {
IOMUX_8WIDTH_2BIT),
};
-static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3308_pin_ctrl = {
.pin_banks = rk3308_pin_banks,
.nr_banks = ARRAY_SIZE(rk3308_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index dd0dc2eff27..1834df6c3d1 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -330,7 +330,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
0),
};
-static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3328_pin_ctrl = {
.pin_banks = rk3328_pin_banks,
.nr_banks = ARRAY_SIZE(rk3328_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 9ae06ed19e9..aaf24719a16 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -152,7 +152,7 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
PIN_BANK(3, 32, "gpio3"),
};
-static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3368_pin_ctrl = {
.pin_banks = rk3368_pin_banks,
.nr_banks = ARRAY_SIZE(rk3368_pin_banks),
.grf_mux_offset = 0x0,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index b7a5092c032..928ed59aec6 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -279,7 +279,7 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
),
};
-static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk3399_pin_ctrl = {
.pin_banks = rk3399_pin_banks,
.nr_banks = ARRAY_SIZE(rk3399_pin_banks),
.grf_mux_offset = 0xe000,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index 5deedc648a4..c8a91b8bb6e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -345,7 +345,6 @@ static struct rockchip_pin_bank rk3568_pin_banks[] = {
static const struct rockchip_pin_ctrl rk3568_pin_ctrl = {
.pin_banks = rk3568_pin_banks,
.nr_banks = ARRAY_SIZE(rk3568_pin_banks),
- .nr_pins = 160,
.grf_mux_offset = 0x0,
.pmu_mux_offset = 0x0,
.iomux_routes = rk3568_mux_route_data,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
index 98ababc7c90..fd8e617b910 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3588.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
@@ -324,7 +324,6 @@ static struct rockchip_pin_bank rk3588_pin_banks[] = {
static const struct rockchip_pin_ctrl rk3588_pin_ctrl = {
.pin_banks = rk3588_pin_banks,
.nr_banks = ARRAY_SIZE(rk3588_pin_banks),
- .nr_pins = 160,
.set_mux = rk3588_set_mux,
.set_pull = rk3588_set_pull,
.set_drive = rk3588_set_drive,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index d449d07d32e..4de67aba1c3 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -532,6 +532,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
struct rockchip_pin_bank *bank;
int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+ u32 ctrl_nr_pins = 0;
grf_offs = ctrl->grf_mux_offset;
pmu_offs = ctrl->pmu_mux_offset;
@@ -543,8 +544,8 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
int bank_pins = 0;
bank->priv = priv;
- bank->pin_base = ctrl->nr_pins;
- ctrl->nr_pins += bank->nr_pins;
+ bank->pin_base = ctrl_nr_pins;
+ ctrl_nr_pins += bank->nr_pins;
/* calculate iomux and drv offsets */
for (j = 0; j < 4; j++) {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 5e3c9c90760..ba684baed24 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -503,7 +503,6 @@ struct rockchip_mux_route_data {
struct rockchip_pin_ctrl {
struct rockchip_pin_bank *pin_banks;
u32 nr_banks;
- u32 nr_pins;
int grf_mux_offset;
int pmu_mux_offset;
int grf_drv_offset;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 3eff5f59598..780da1e946e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -263,7 +263,7 @@ static struct rockchip_pin_bank rv1108_pin_banks[] = {
PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
};
-static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
+static const struct rockchip_pin_ctrl rv1108_pin_ctrl = {
.pin_banks = rv1108_pin_banks,
.nr_banks = ARRAY_SIZE(rv1108_pin_banks),
.grf_mux_offset = 0x10,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
index efa2408b204..3878a5420dc 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1126.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -381,7 +381,6 @@ static struct rockchip_pin_bank rv1126_pin_banks[] = {
static const struct rockchip_pin_ctrl rv1126_pin_ctrl = {
.pin_banks = rv1126_pin_banks,
.nr_banks = ARRAY_SIZE(rv1126_pin_banks),
- .nr_pins = 130,
.grf_mux_offset = 0x10004, /* mux offset from GPIO0_D0 */
.pmu_mux_offset = 0x0,
.iomux_routes = rv1126_mux_route_data,
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-10 02:43:42 +0000