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-rw-r--r--drivers/clk/clk-hsdk-cgu.c9
-rw-r--r--drivers/mtd/nand/raw/brcmnand/brcmnand.c9
-rw-r--r--drivers/sysreset/Kconfig6
-rw-r--r--drivers/sysreset/Makefile1
-rw-r--r--drivers/sysreset/sysreset_resetctl.c48
-rw-r--r--drivers/video/rockchip/rk_edp.c1
-rw-r--r--drivers/video/rockchip/rk_lvds.c3
-rw-r--r--drivers/video/simple_panel.c1
8 files changed, 73 insertions, 5 deletions
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 6eaafdeaf99..3035c5fb38e 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -67,6 +67,7 @@
#define CGU_TUN_IDIV_TUN 0x380
#define CGU_TUN_IDIV_ROM 0x390
#define CGU_TUN_IDIV_PWM 0x3A0
+#define CGU_TUN_IDIV_TIMER 0x3B0
#define CGU_HDMI_IDIV_APB 0x480
#define CGU_SYS_IDIV_APB 0x180
#define CGU_SYS_IDIV_AXI 0x190
@@ -123,12 +124,12 @@
#define MIN_PLL_RATE 100000000 /* 100 MHz */
#define PARENT_RATE_33 33333333 /* fixed clock - xtal */
#define PARENT_RATE_27 27000000 /* fixed clock - xtal */
-#define CGU_MAX_CLOCKS 26
+#define CGU_MAX_CLOCKS 27
#define CGU_SYS_CLOCKS 16
#define MAX_AXI_CLOCKS 4
-#define CGU_TUN_CLOCKS 3
+#define CGU_TUN_CLOCKS 4
#define MAX_TUN_CLOCKS 6
struct hsdk_tun_idiv_cfg {
@@ -147,7 +148,8 @@ static const struct hsdk_tun_clk_cfg tun_clk_cfg = {
{ 600000000, 600000000, 600000000, 600000000, 750000000, 600000000 }, {
{ CGU_TUN_IDIV_TUN, { 24, 12, 8, 6, 6, 4 } },
{ CGU_TUN_IDIV_ROM, { 4, 4, 4, 4, 5, 4 } },
- { CGU_TUN_IDIV_PWM, { 8, 8, 8, 8, 10, 8 } }
+ { CGU_TUN_IDIV_PWM, { 8, 8, 8, 8, 10, 8 } },
+ { CGU_TUN_IDIV_TIMER, { 12, 12, 12, 12, 15, 12 } }
}
};
@@ -316,6 +318,7 @@ static const struct hsdk_cgu_clock_map clock_map[] = {
{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_TUN, &sdt_pll_dat, idiv_get, tun_clk_set, idiv_off },
{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_ROM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_PWM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
+ { CGU_TUN_PLL, 0, CGU_TUN_IDIV_TIMER, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
{ CGU_HDMI_PLL, 0, 0, &hdmi_pll_dat, pll_get, pll_set, NULL },
{ CGU_HDMI_PLL, 0, CGU_HDMI_IDIV_APB, &hdmi_pll_dat, idiv_get, idiv_set, idiv_off }
};
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 5232328e1e4..7bdebf58699 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2714,6 +2714,14 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc)
}
#endif /* __UBOOT__ */
+ /* No chip-selects could initialize properly */
+ if (list_empty(&ctrl->host_list)) {
+ ret = -ENODEV;
+ goto err;
+ }
+
+ return 0;
+
err:
#ifndef __UBOOT__
clk_disable_unprepare(ctrl->clk);
@@ -2722,7 +2730,6 @@ err:
clk_disable(ctrl->clk);
#endif /* __UBOOT__ */
return ret;
-
}
EXPORT_SYMBOL_GPL(brcmnand_probe);
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index f09e138bb8c..4be74334047 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -101,6 +101,12 @@ config SYSRESET_WATCHDOG
help
Reboot support for generic watchdog reset.
+config SYSRESET_RESETCTL
+ bool "Enable support for reset controller reboot driver"
+ select DM_RESET
+ help
+ Reboot support using generic reset controller.
+
config SYSRESET_X86
bool "Enable support for x86 processor reboot driver"
depends on X86
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 51af68fad3b..3ed4bab9e37 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -16,5 +16,6 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
+obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c
new file mode 100644
index 00000000000..b8203ba6059
--- /dev/null
+++ b/drivers/sysreset/sysreset_resetctl.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <reset.h>
+
+struct resetctl_reboot_priv {
+ struct reset_ctl_bulk resets;
+};
+
+static int resetctl_reboot_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct resetctl_reboot_priv *priv = dev_get_priv(dev);
+
+ return reset_assert_bulk(&priv->resets);
+}
+
+static struct sysreset_ops resetctl_reboot_ops = {
+ .request = resetctl_reboot_request,
+};
+
+int resetctl_reboot_probe(struct udevice *dev)
+{
+ struct resetctl_reboot_priv *priv = dev_get_priv(dev);
+
+ return reset_get_bulk(dev, &priv->resets);
+}
+
+static const struct udevice_id resetctl_reboot_ids[] = {
+ { .compatible = "resetctl-reboot" },
+ { }
+};
+
+U_BOOT_DRIVER(resetctl_reboot) = {
+ .id = UCLASS_SYSRESET,
+ .name = "resetctl_reboot",
+ .of_match = resetctl_reboot_ids,
+ .ops = &resetctl_reboot_ops,
+ .priv_auto_alloc_size = sizeof(struct resetctl_reboot_priv),
+ .probe = resetctl_reboot_probe,
+};
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 8703df0ec08..cf84b886e72 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -18,6 +18,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/edp_rk3288.h>
#include <asm/arch-rockchip/grf_rk3288.h>
+#include <asm/arch-rockchip/hardware.h>
#include <dt-bindings/clock/rk3288-cru.h>
#define MAX_CR_LOOP 5
diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c
index cf5c0439b1a..79e24baf53b 100644
--- a/drivers/video/rockchip/rk_lvds.c
+++ b/drivers/video/rockchip/rk_lvds.c
@@ -13,8 +13,9 @@
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/lvds_rk3288.h>
#include <asm/arch-rockchip/grf_rk3288.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/lvds_rk3288.h>
#include <dt-bindings/clock/rk3288-cru.h>
#include <dt-bindings/video/rk3288.h>
diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c
index c3c0e847327..57228111175 100644
--- a/drivers/video/simple_panel.c
+++ b/drivers/video/simple_panel.c
@@ -105,6 +105,7 @@ static const struct udevice_id simple_panel_ids[] = {
{ .compatible = "auo,b133xtn01" },
{ .compatible = "auo,b116xw03" },
{ .compatible = "auo,b133htn01" },
+ { .compatible = "boe,nv140fhmn49" },
{ .compatible = "lg,lb070wv8" },
{ }
};
generated by cgit v1.2.3 (git 2.0.4) at 2025-09-29 22:10:21 +0000