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-rw-r--r--drivers/mmc/renesas-sdhi.c34
-rw-r--r--drivers/net/ravb.c4
-rw-r--r--drivers/spi/renesas_rpc_spi.c8
3 files changed, 23 insertions, 23 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 03e360ec1a2..82237ef3dbd 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -885,28 +885,28 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
struct tmio_sd_plat *plat = dev_get_plat(dev);
/* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
- if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
+ if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
(renesas_get_cpu_rev_integer() <= 1)) ||
- ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 1) &&
(renesas_get_cpu_rev_fraction() <= 2)) ||
- (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
- ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
+ (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77970) ||
+ ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77980) &&
(renesas_get_cpu_rev_integer() <= 1)) ||
- (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
+ (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77995))
plat->cfg.host_caps &= ~MMC_MODE_HS400;
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
- if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
+ if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
(renesas_get_cpu_rev_integer() >= 2)) ||
- ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 1) &&
(renesas_get_cpu_rev_fraction() == 2)) ||
- (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
+ (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77965))
priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7);
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
- if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 1) &&
(renesas_get_cpu_rev_fraction() > 2)) {
priv->adjust_hs400_enable = true;
@@ -917,12 +917,12 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
}
/* M3W+ bad taps */
- if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 3))
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
/* M3N can use HS400 with manual adjustment */
- if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) {
+ if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77965) {
priv->adjust_hs400_enable = true;
priv->adjust_hs400_offset = 3;
priv->adjust_hs400_calib_table =
@@ -930,7 +930,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
}
/* E3 can use HS400 with manual adjustment */
- if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) {
+ if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77990) {
priv->adjust_hs400_enable = true;
priv->adjust_hs400_offset = 3;
priv->adjust_hs400_calib_table =
@@ -938,9 +938,9 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
}
/* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */
- if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
+ if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
(renesas_get_cpu_rev_integer() <= 2)) ||
- ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 1) &&
(renesas_get_cpu_rev_fraction() <= 3)))
priv->nrtaps = 4;
@@ -948,9 +948,9 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
priv->nrtaps = 8;
#endif
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
- if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
+ if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
(renesas_get_cpu_rev_integer() <= 1)) ||
- ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
+ ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
(renesas_get_cpu_rev_integer() == 1) &&
(renesas_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
@@ -958,7 +958,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
/* V3M handles SD0H differently than other Gen3 SoCs */
- if (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970)
+ if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77970)
priv->needs_clkh_fallback = true;
else
priv->needs_clkh_fallback = false;
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 733f08ad4ea..4764bca7082 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -392,8 +392,8 @@ static int ravb_dmac_init(struct udevice *dev)
writel(0x00222210, eth->iobase + RAVB_REG_TGC);
/* Delay CLK: 2ns (not applicable on R-Car E3/D3) */
- if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) ||
- (renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
+ if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77990) ||
+ (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77995))
return 0;
if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) {
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index 165c0a1351a..8aff2238645 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -212,11 +212,11 @@ static u32 rpc_spi_get_strobe_delay(void)
* 7: On other R-Car Gen3
* 15: On R-Car Gen4
*/
- if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
+ if (cpu_type == RENESAS_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
return RPC_PHYCNT_STRTIM(6);
- else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 ||
- cpu_type == RMOBILE_CPU_TYPE_R8A779G0 ||
- cpu_type == RMOBILE_CPU_TYPE_R8A779H0)
+ else if (cpu_type == RENESAS_CPU_TYPE_R8A779F0 ||
+ cpu_type == RENESAS_CPU_TYPE_R8A779G0 ||
+ cpu_type == RENESAS_CPU_TYPE_R8A779H0)
return RPC_PHYCNT_STRTIM2(15);
else
#endif
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-24 19:53:57 +0000