diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/bios_emulator/besys.c | 20 | ||||
-rw-r--r-- | drivers/bios_emulator/include/x86emu.h | 2 | ||||
-rw-r--r-- | drivers/cache/cache-sifive-ccache.c | 33 | ||||
-rw-r--r-- | drivers/clk/renesas/clk-rcar-gen3.c | 19 | ||||
-rw-r--r-- | drivers/core/uclass.c | 11 | ||||
-rw-r--r-- | drivers/iommu/apple_dart.c | 18 | ||||
-rw-r--r-- | drivers/mtd/spi/spi-nor-core.c | 200 | ||||
-rw-r--r-- | drivers/pinctrl/Kconfig | 8 | ||||
-rw-r--r-- | drivers/pinctrl/rockchip/Kconfig | 7 | ||||
-rw-r--r-- | drivers/scsi/scsi.c | 2 | ||||
-rw-r--r-- | drivers/spi/Kconfig | 12 | ||||
-rw-r--r-- | drivers/spi/zynq_qspi.c | 2 | ||||
-rw-r--r-- | drivers/spi/zynqmp_gqspi.c | 6 | ||||
-rw-r--r-- | drivers/video/vesa.c | 9 |
14 files changed, 191 insertions, 158 deletions
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 2fd794f76c6..23392d3c86e 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -49,6 +49,7 @@ #define __io #include <asm/io.h> +#include <pci.h> #include "biosemui.h" /*------------------------- Global Variables ------------------------------*/ @@ -434,32 +435,27 @@ static u32 BE_accessReg(int regOffset, u32 value, int func) if ((function == _BE_env.vgaInfo.function) && (device == _BE_env.vgaInfo.device) && (bus == _BE_env.vgaInfo.bus)) { + pci_dev_t bdf = PCI_BDF(bus, device, function); switch (func) { case REG_READ_BYTE: - pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset, - &val8); + pci_read_config_byte(bdf, regOffset, &val8); return val8; case REG_READ_WORD: - pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset, - &val16); + pci_read_config_word(bdf, regOffset, &val16); return val16; case REG_READ_DWORD: - pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset, - &val32); + pci_read_config_dword(bdf, regOffset, &val32); return val32; case REG_WRITE_BYTE: - pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset, - value); + pci_write_config_byte(bdf, regOffset, value); return 0; case REG_WRITE_WORD: - pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset, - value); + pci_write_config_word(bdf, regOffset, value); return 0; case REG_WRITE_DWORD: - pci_write_config_dword(_BE_env.vgaInfo.pcidev, - regOffset, value); + pci_write_config_dword(bdf, regOffset, value); return 0; } diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h index d2650a8d160..cfdcd7b3e10 100644 --- a/drivers/bios_emulator/include/x86emu.h +++ b/drivers/bios_emulator/include/x86emu.h @@ -54,7 +54,7 @@ typedef u16 X86EMU_pioAddr; #if defined(CONFIG_ARM) #define GAS_LINE_COMMENT "@" -#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_X86) +#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_X86) || defined(CONFIG_RISCV) #define GAS_LINE_COMMENT "#" #elif defined (CONFIG_SH) #define GAS_LINE_COMMENT "!" diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c index cc00b80f60b..2ff5ca701d6 100644 --- a/drivers/cache/cache-sifive-ccache.c +++ b/drivers/cache/cache-sifive-ccache.c @@ -14,8 +14,17 @@ #define SIFIVE_CCACHE_WAY_ENABLE 0x008 +#define SIFIVE_CCACHE_TRUNKCLOCKGATE 0x1000 +#define SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE BIT(0) +#define SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE BIT(1) + struct sifive_ccache { void __iomem *base; + bool has_cg; +}; + +struct sifive_ccache_quirks { + bool has_cg; }; static int sifive_ccache_enable(struct udevice *dev) @@ -30,6 +39,14 @@ static int sifive_ccache_enable(struct udevice *dev) writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE); + if (priv->has_cg) { + /* enable clock gating bits */ + config = readl(priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE); + config &= ~(SIFIVE_CCACHE_TRUNKCLOCKGATE_DISABLE | + SIFIVE_CCACHE_REGIONCLOCKGATE_DISABLE); + writel(config, priv->base + SIFIVE_CCACHE_TRUNKCLOCKGATE); + } + return 0; } @@ -50,7 +67,9 @@ static const struct cache_ops sifive_ccache_ops = { static int sifive_ccache_probe(struct udevice *dev) { struct sifive_ccache *priv = dev_get_priv(dev); + const struct sifive_ccache_quirks *quirk = (void *)dev_get_driver_data(dev); + priv->has_cg = quirk->has_cg; priv->base = dev_read_addr_ptr(dev); if (!priv->base) return -EINVAL; @@ -58,10 +77,18 @@ static int sifive_ccache_probe(struct udevice *dev) return 0; } +static const struct sifive_ccache_quirks fu540_ccache = { + .has_cg = false, +}; + +static const struct sifive_ccache_quirks ccache0 = { + .has_cg = true, +}; + static const struct udevice_id sifive_ccache_ids[] = { - { .compatible = "sifive,fu540-c000-ccache" }, - { .compatible = "sifive,fu740-c000-ccache" }, - { .compatible = "sifive,ccache0" }, + { .compatible = "sifive,fu540-c000-ccache", .data = (ulong)&fu540_ccache }, + { .compatible = "sifive,fu740-c000-ccache", .data = (ulong)&fu540_ccache }, + { .compatible = "sifive,ccache0", .data = (ulong)&ccache0 }, {} }; diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index 4f1dfbc174a..aa38c0f7dd0 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -579,23 +579,24 @@ int gen3_cpg_bind(struct udevice *parent) struct cpg_mssr_info *info = (struct cpg_mssr_info *)dev_get_driver_data(parent); struct udevice *cdev, *rdev; - struct driver *drv; + struct driver *cdrv, *rdrv; int ret; - drv = lists_driver_lookup_name("clk_gen3"); - if (!drv) + cdrv = lists_driver_lookup_name("clk_gen3"); + if (!cdrv) return -ENOENT; - ret = device_bind_with_driver_data(parent, drv, "clk_gen3", (ulong)info, + + rdrv = lists_driver_lookup_name("rst_gen3"); + if (!rdrv) + return -ENOENT; + + ret = device_bind_with_driver_data(parent, cdrv, "clk_gen3", (ulong)info, dev_ofnode(parent), &cdev); if (ret) return ret; - drv = lists_driver_lookup_name("rst_gen3"); - if (!drv) - return -ENOENT; - - ret = device_bind_with_driver_data(parent, drv, "rst_gen3", (ulong)cdev, + ret = device_bind_with_driver_data(parent, rdrv, "rst_gen3", (ulong)cdev, dev_ofnode(parent), &rdev); if (ret) device_unbind(cdev); diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index 7ae0884a75e..f846a35d6b2 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -304,6 +304,17 @@ int uclass_find_device_by_name(enum uclass_id id, const char *name, return uclass_find_device_by_namelen(id, name, strlen(name), devp); } +struct udevice *uclass_try_first_device(enum uclass_id id) +{ + struct uclass *uc; + + uc = uclass_find(id); + if (!uc || list_empty(&uc->dev_head)) + return NULL; + + return list_first_entry(&uc->dev_head, struct udevice, uclass_node); +} + int uclass_find_next_free_seq(struct uclass *uc) { struct udevice *dev; diff --git a/drivers/iommu/apple_dart.c b/drivers/iommu/apple_dart.c index 611ac7cd6de..3e9e7819e51 100644 --- a/drivers/iommu/apple_dart.c +++ b/drivers/iommu/apple_dart.c @@ -73,6 +73,8 @@ struct apple_dart_priv { u64 *l1, *l2; int bypass, shift; + struct lmb io_lmb; + dma_addr_t dvabase; dma_addr_t dvaend; @@ -123,7 +125,7 @@ static dma_addr_t apple_dart_map(struct udevice *dev, void *addr, size_t size) off = (phys_addr_t)addr - paddr; psize = ALIGN(size + off, DART_PAGE_SIZE); - dva = lmb_alloc(psize, DART_PAGE_SIZE); + dva = io_lmb_alloc(&priv->io_lmb, psize, DART_PAGE_SIZE); idx = dva / DART_PAGE_SIZE; for (i = 0; i < psize / DART_PAGE_SIZE; i++) { @@ -159,7 +161,7 @@ static void apple_dart_unmap(struct udevice *dev, dma_addr_t addr, size_t size) (unsigned long)&priv->l2[idx + i]); priv->flush_tlb(priv); - lmb_free(dva, psize); + io_lmb_free(&priv->io_lmb, dva, psize); } static struct iommu_ops apple_dart_ops = { @@ -173,7 +175,7 @@ static int apple_dart_probe(struct udevice *dev) dma_addr_t addr; phys_addr_t l2; int ntte, nl1, nl2; - int sid, i; + int ret, sid, i; u32 params2, params4; priv->base = dev_read_addr_ptr(dev); @@ -212,7 +214,13 @@ static int apple_dart_probe(struct udevice *dev) priv->dvabase = DART_PAGE_SIZE; priv->dvaend = SZ_4G - DART_PAGE_SIZE; - lmb_add(priv->dvabase, priv->dvaend - priv->dvabase); + ret = io_lmb_setup(&priv->io_lmb); + if (ret) + return ret; + ret = io_lmb_add(&priv->io_lmb, priv->dvabase, + priv->dvaend - priv->dvabase); + if (ret) + return -EINVAL; /* Disable translations. */ for (sid = 0; sid < priv->nsid; sid++) @@ -294,6 +302,8 @@ static int apple_dart_remove(struct udevice *dev) } priv->flush_tlb(priv); + io_lmb_teardown(&priv->io_lmb); + return 0; } diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f5c9868bbca..ec841fb13bd 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1134,12 +1134,10 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) offset /= 2; if (nor->flags & SNOR_F_HAS_STACKED) { - if (offset >= (mtd->size / 2)) { - offset = offset - (mtd->size / 2); + if (offset >= (mtd->size / 2)) nor->spi->flags |= SPI_XFER_U_PAGE; - } else { + else nor->spi->flags &= ~SPI_XFER_U_PAGE; - } } #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(nor, addr); @@ -1588,23 +1586,22 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); if ((nor->flags & SNOR_F_HAS_PARALLEL) && (offset & 1)) { - /* We can hit this case when we use file system like ubifs */ + /* We can hit this case when we use file system like ubifs */ from--; len++; is_ofst_odd = true; } while (len) { - if (nor->addr_width == 3) { - if (nor->flags & SNOR_F_HAS_PARALLEL) { - bank = (u32)from / (SZ_16M << 0x01); - rem_bank_len = ((SZ_16M << 0x01) * - (bank + 1)) - from; - } else { - bank = (u32)from / SZ_16M; - rem_bank_len = (SZ_16M * (bank + 1)) - from; - } - } + bank = (u32)from / SZ_16M; + if (nor->flags & SNOR_F_HAS_PARALLEL) + bank /= 2; + + rem_bank_len = SZ_16M * (bank + 1); + if (nor->flags & SNOR_F_HAS_PARALLEL) + rem_bank_len *= 2; + rem_bank_len -= from; + offset = from; if (nor->flags & SNOR_F_HAS_STACKED) { @@ -1619,13 +1616,11 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, if (nor->flags & SNOR_F_HAS_PARALLEL) offset /= 2; - if (nor->addr_width == 3) { #ifdef CONFIG_SPI_FLASH_BAR - ret = write_bar(nor, offset); - if (ret < 0) - return log_ret(ret); + ret = write_bar(nor, offset); + if (ret < 0) + return log_ret(ret); #endif - } if (len < rem_bank_len) read_len = len; @@ -1635,10 +1630,6 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, if (read_len == 0) return -EIO; - ret = spi_nor_wait_till_ready(nor); - if (ret) - goto read_err; - ret = nor->read(nor, offset, read_len, buf); if (ret == 0) { /* We shouldn't see 0-length reads */ @@ -1977,9 +1968,9 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, return ret; *retlen += 1; /* We've written only one actual byte */ - ++buf; - --len; - ++to; + buf++; + len--; + to++; } for (i = 0; i < len; ) { @@ -1999,7 +1990,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, page_offset = do_div(aux, nor->page_size); } - offset = (to + i); + offset = to + i; if (nor->flags & SNOR_F_HAS_PARALLEL) offset /= 2; @@ -2012,21 +2003,16 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, } } - if (nor->addr_width == 3) { #ifdef CONFIG_SPI_FLASH_BAR - ret = write_bar(nor, offset); - if (ret < 0) - return ret; + ret = write_bar(nor, offset); + if (ret < 0) + return ret; #endif - } + /* the size of data remaining on the first page */ page_remain = min_t(size_t, nor->page_size - page_offset, len - i); - ret = spi_nor_wait_till_ready(nor); - if (ret) - goto write_err; - write_enable(nor); /* * On DTR capable flashes like Micron Xcella the writes cannot @@ -2086,10 +2072,6 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, if (ret) goto write_err; - ret = write_disable(nor); - if (ret) - goto write_err; - *retlen += written; i += written; } @@ -2130,10 +2112,6 @@ static int macronix_quad_enable(struct spi_nor *nor) if (ret) return ret; - ret = write_disable(nor); - if (ret) - return ret; - ret = read_sr(nor); if (!(ret > 0 && (ret & SR_QUAD_EN_MX))) { dev_err(nor->dev, "Macronix Quad bit not set\n"); @@ -2195,7 +2173,7 @@ static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 addr_base, return -EINVAL; } - return write_disable(nor); + return 0; } #endif @@ -3069,13 +3047,6 @@ static int spi_nor_init_params(struct spi_nor *nor, const struct flash_info *info, struct spi_nor_flash_parameter *params) { -#if CONFIG_IS_ENABLED(DM_SPI) && CONFIG_IS_ENABLED(SPI_ADVANCE) - struct udevice *dev = nor->spi->dev; - u64 flash_size[SNOR_FLASH_CNT_MAX] = {0}; - u32 idx = 0, i = 0; - int rc; -#endif - /* Set legacy flash parameters as default. */ memset(params, 0, sizeof(*params)); @@ -3194,62 +3165,71 @@ static int spi_nor_init_params(struct spi_nor *nor, spi_nor_post_sfdp_fixups(nor, params); } -#if CONFIG_IS_ENABLED(DM_SPI) && CONFIG_IS_ENABLED(SPI_ADVANCE) - /* - * The flashes that are connected in stacked mode should be of same make. - * Except the flash size all other properties are identical for all the - * flashes connected in stacked mode. - * The flashes that are connected in parallel mode should be identical. - */ - while (i < SNOR_FLASH_CNT_MAX) { - rc = ofnode_read_u64_index(dev_ofnode(dev), "stacked-memories", - idx, &flash_size[i]); - if (rc == -EINVAL) { - break; - } else if (rc == -EOVERFLOW) { - idx++; - } else { - idx++; - i++; - if (!(nor->flags & SNOR_F_HAS_STACKED)) - nor->flags |= SNOR_F_HAS_STACKED; - if (!(nor->spi->flags & SPI_XFER_STACKED)) - nor->spi->flags |= SPI_XFER_STACKED; + +#if CONFIG_IS_ENABLED(DM_SPI) + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + u64 flash_size[SNOR_FLASH_CNT_MAX] = { 0 }; + struct udevice *dev = nor->spi->dev; + u32 idx = 0, i = 0; + int rc; + + /* + * The flashes that are connected in stacked mode should be of same make. + * Except the flash size all other properties are identical for all the + * flashes connected in stacked mode. + * The flashes that are connected in parallel mode should be identical. + */ + while (i < SNOR_FLASH_CNT_MAX) { + rc = ofnode_read_u64_index(dev_ofnode(dev), "stacked-memories", + idx, &flash_size[i]); + if (rc == -EINVAL) { + break; + } else if (rc == -EOVERFLOW) { + idx++; + } else { + idx++; + i++; + if (!(nor->flags & SNOR_F_HAS_STACKED)) + nor->flags |= SNOR_F_HAS_STACKED; + if (!(nor->spi->flags & SPI_XFER_STACKED)) + nor->spi->flags |= SPI_XFER_STACKED; + } } - } - i = 0; - idx = 0; - while (i < SNOR_FLASH_CNT_MAX) { - rc = ofnode_read_u64_index(dev_ofnode(dev), "parallel-memories", - idx, &flash_size[i]); - if (rc == -EINVAL) { - break; - } else if (rc == -EOVERFLOW) { - idx++; - } else { - idx++; - i++; - if (!(nor->flags & SNOR_F_HAS_PARALLEL)) - nor->flags |= SNOR_F_HAS_PARALLEL; + i = 0; + idx = 0; + while (i < SNOR_FLASH_CNT_MAX) { + rc = ofnode_read_u64_index(dev_ofnode(dev), "parallel-memories", + idx, &flash_size[i]); + if (rc == -EINVAL) { + break; + } else if (rc == -EOVERFLOW) { + idx++; + } else { + idx++; + i++; + if (!(nor->flags & SNOR_F_HAS_PARALLEL)) + nor->flags |= SNOR_F_HAS_PARALLEL; + } } - } - if (nor->flags & (SNOR_F_HAS_STACKED | SNOR_F_HAS_PARALLEL)) { - params->size = 0; - for (idx = 0; idx < SNOR_FLASH_CNT_MAX; idx++) - params->size += flash_size[idx]; - } - /* - * In parallel-memories the erase operation is - * performed on both the flashes simultaneously - * so, double the erasesize. - */ - if (nor->flags & SNOR_F_HAS_PARALLEL) { - nor->mtd.erasesize <<= 1; - params->page_size <<= 1; + if (nor->flags & (SNOR_F_HAS_STACKED | SNOR_F_HAS_PARALLEL)) { + params->size = 0; + for (idx = 0; idx < SNOR_FLASH_CNT_MAX; idx++) + params->size += flash_size[idx]; + } + /* + * In parallel-memories the erase operation is + * performed on both the flashes simultaneously + * so, double the erasesize. + */ + if (nor->flags & SNOR_F_HAS_PARALLEL) { + nor->mtd.erasesize <<= 1; + params->page_size <<= 1; + } } #endif + spi_nor_late_init_fixups(nor, params); return 0; @@ -3599,19 +3579,6 @@ static int spi_nor_select_erase(struct spi_nor *nor, mtd->erasesize = info->sector_size; } - if ((JEDEC_MFR(info) == SNOR_MFR_SST) && info->flags & SECT_4K) { - nor->erase_opcode = SPINOR_OP_BE_4K; - /* - * In parallel-memories the erase operation is - * performed on both the flashes simultaneously - * so, double the erasesize. - */ - if (nor->flags & SNOR_F_HAS_PARALLEL) - mtd->erasesize = 4096 * 2; - else - mtd->erasesize = 4096; - } - return 0; } @@ -4606,7 +4573,6 @@ int spi_nor_scan(struct spi_nor *nor) #else /* Configure the BAR - discover bank cmds and read current bank */ nor->addr_width = 3; - set_4byte(nor, info, 0); ret = read_bar(nor, info); if (ret < 0) return ret; diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index a1d53cfbdbe..6ee7dc1cce8 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -127,6 +127,14 @@ config SPL_PINCTRL_GENERIC This option is an SPL-variant of the PINCTRL_GENERIC option. See the help of PINCTRL_GENERIC for details. +config TPL_PINCTRL_GENERIC + bool "Support generic pin controllers in TPL" + depends on TPL_PINCTRL_FULL + default y + help + This option is a TPL-variant of the PINCTRL_GENERIC option. + See the help of PINCTRL_GENERIC for details. + config SPL_PINMUX bool "Support pin multiplexing controllers in SPL" depends on SPL_PINCTRL_GENERIC diff --git a/drivers/pinctrl/rockchip/Kconfig b/drivers/pinctrl/rockchip/Kconfig index dc4ba34ae5d..8aa9dcac358 100644 --- a/drivers/pinctrl/rockchip/Kconfig +++ b/drivers/pinctrl/rockchip/Kconfig @@ -14,4 +14,11 @@ config SPL_PINCTRL_ROCKCHIP help This option is an SPL-variant of the PINCTRL_ROCKCHIP option. +config TPL_PINCTRL_ROCKCHIP + bool "Support Rockchip pin controllers in TPL" + depends on ARCH_ROCKCHIP && TPL_PINCTRL_GENERIC + default y + help + This option is a TPL-variant of the PINCTRL_ROCKCHIP option. + endif diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 51cacf34792..bcdeda95ed1 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -309,6 +309,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, ((unsigned long)pccb->pdata[5] << 16) | ((unsigned long)pccb->pdata[6] << 8) | ((unsigned long)pccb->pdata[7]); + *capacity += 1; return 0; } @@ -332,6 +333,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, ((uint64_t)pccb->pdata[5] << 16) | ((uint64_t)pccb->pdata[6] << 8) | ((uint64_t)pccb->pdata[7]); + *capacity += 1; *blksz = ((uint64_t)pccb->pdata[8] << 56) | ((uint64_t)pccb->pdata[9] << 48) | diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index fa817ec4883..fd5cb3694f6 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -20,12 +20,6 @@ menuconfig SPI if SPI -config SPI_ADVANCE - bool "Enable the advance feature" - help - Enable the SPI advance feature support. By default this is disabled. - If you intend to use the advance feature support you should enable. - config DM_SPI bool "Enable Driver Model for SPI drivers" depends on DM @@ -615,6 +609,12 @@ config ZYNQMP_GQSPI This option is used to enable ZynqMP QSPI controller driver which is used to communicate with qspi flash devices. +config SPI_STACKED_PARALLEL + bool "Enable support for stacked or parallel memories" + help + Enable support for stacked/or parallel memories. This functionality + may appear on Xilinx hardware. By default this is disabled. + endif # if DM_SPI config FSL_ESPI diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 4aad3248d9e..e43dbb40c4a 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -813,7 +813,7 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, priv->is_parallel = false; priv->is_stacked = false; - slave->flags &= ~SPI_XFER_MASK; + slave->flags &= ~SPI_XFER_LOWER; spi_release_bus(slave); return 0; diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 1d19b2606c5..4251bf28cd3 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -870,8 +870,8 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave, priv->bus = 0; if (priv->is_parallel) { - if (slave->flags & SPI_XFER_MASK) - priv->bus = (slave->flags & SPI_XFER_MASK) >> 8; + if (slave->flags & SPI_XFER_LOWER) + priv->bus = 1; if (zynqmp_qspi_update_stripe(op)) priv->stripe = 1; } @@ -890,7 +890,7 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave, zynqmp_qspi_chipselect(priv, 0); priv->is_parallel = false; - slave->flags &= ~SPI_XFER_MASK; + slave->flags &= ~SPI_XFER_LOWER; return ret; } diff --git a/drivers/video/vesa.c b/drivers/video/vesa.c index ab756ac8ea1..e96f6747a6f 100644 --- a/drivers/video/vesa.c +++ b/drivers/video/vesa.c @@ -8,21 +8,26 @@ #include <pci.h> #include <vesa.h> #include <video.h> +#if defined(CONFIG_X86) #include <asm/mtrr.h> +#endif static int vesa_video_probe(struct udevice *dev) { - struct video_uc_plat *plat = dev_get_uclass_plat(dev); - ulong fbbase; int ret; ret = vesa_setup_video(dev, NULL); if (ret) return log_ret(ret); +#if defined(CONFIG_X86) + struct video_uc_plat *plat = dev_get_uclass_plat(dev); + ulong fbbase; + /* Use write-combining for the graphics memory, 256MB */ fbbase = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base; mtrr_set_next_var(MTRR_TYPE_WRCOMB, fbbase, 256 << 20); +#endif return 0; } |