diff options
Diffstat (limited to 'drivers')
54 files changed, 798 insertions, 839 deletions
diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h index c06a51ecd43..6b74fc5f16b 100644 --- a/drivers/clk/mpc83xx_clk.h +++ b/drivers/clk/mpc83xx_clk.h @@ -321,7 +321,7 @@ static inline u32 get_pci_sync_in(immap_t *im) } /** - * get_csb_clk() - Read the CSB (Coheren System Bus) clock speed + * get_csb_clk() - Read the CSB (Coherent System Bus) clock speed * @im: Pointer to the MPC83xx main register map in question * * Return: The CSB clock speed value as a 32-bit number. diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index a093027eb0e..12966d02a22 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -5,20 +5,20 @@ config CLK_RENESAS Enable support for clock present on Renesas SoCs. config CLK_RCAR - bool "Renesas RCar clock driver support" + bool "Renesas R-Car clock driver support" help - Enable common code for clocks on Renesas RCar SoCs. + Enable common code for clocks on Renesas R-Car SoCs. config CLK_RCAR_CPG_LIB bool "CPG/MSSR library functions" config CLK_RCAR_GEN2 - bool "Renesas RCar Gen2 clock driver" + bool "Renesas R-Car Gen2 clock driver" def_bool y if RCAR_32 depends on CLK_RENESAS select CLK_RCAR help - Enable this to support the clocks on Renesas RCar Gen2 SoC. + Enable this to support the clocks on Renesas R-Car Gen2 SoC. config CLK_R8A7790 bool "Renesas R8A7790 clock driver" @@ -51,14 +51,14 @@ config CLK_R8A7794 Enable this to support the clocks on Renesas R8A7794 SoC. config CLK_RCAR_GEN3 - bool "Renesas RCar Gen3 and Gen4 clock driver" + bool "Renesas R-Car Gen3 and Gen4 clock driver" def_bool y if RCAR_64 depends on CLK_RENESAS select CLK_RCAR select CLK_RCAR_CPG_LIB select DM_RESET help - Enable this to support the clocks on Renesas RCar Gen3 and Gen4 SoCs. + Enable this to support the clocks on Renesas R-Car Gen3 and Gen4 SoCs. config CLK_R8A774A1 bool "Renesas R8A774A1 clock driver" diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 89f2d966746..9b6fce4675c 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen2 CPG MSSR driver + * Renesas R-Car Gen2 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index aa38c0f7dd0..375cc4a4930 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index 2e98e262fb0..70fa8ff2871 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -39,7 +39,6 @@ enum clk_ids { CLK_PLL6, CLK_PLL7, CLK_PLL1_DIV2, - CLK_PLL2_DIV2, CLK_PLL3_DIV2, CLK_PLL4_DIV2, CLK_PLL4_DIV5, @@ -82,7 +81,6 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = { DEF_BASE(".pll7", CLK_PLL7, CLK_TYPE_GEN4_PLL7, CLK_MAIN), DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1), - DEF_FIXED(".pll2_div2", CLK_PLL2_DIV2, CLK_PLL2, 2, 1), DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 2, 1), DEF_FIXED(".pll4_div2", CLK_PLL4_DIV2, CLK_PLL4, 2, 1), DEF_FIXED(".pll4_div5", CLK_PLL4_DIV5, CLK_PLL4, 5, 1), @@ -106,10 +104,10 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = { DEF_RATE(".oco", CLK_OCO, 32768), /* Core Clock Outputs */ - DEF_GEN4_Z("zc0", R8A779H0_CLK_ZC0, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 0), - DEF_GEN4_Z("zc1", R8A779H0_CLK_ZC1, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 8), - DEF_GEN4_Z("zc2", R8A779H0_CLK_ZC2, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 32), - DEF_GEN4_Z("zc3", R8A779H0_CLK_ZC3, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 40), + DEF_GEN4_Z("zc0", R8A779H0_CLK_ZC0, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 0), + DEF_GEN4_Z("zc1", R8A779H0_CLK_ZC1, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 8), + DEF_GEN4_Z("zc2", R8A779H0_CLK_ZC2, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 32), + DEF_GEN4_Z("zc3", R8A779H0_CLK_ZC3, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 40), DEF_FIXED("s0d2", R8A779H0_CLK_S0D2, CLK_S0, 2, 1), DEF_FIXED("s0d3", R8A779H0_CLK_S0D3, CLK_S0, 3, 1), DEF_FIXED("s0d4", R8A779H0_CLK_S0D4, CLK_S0, 4, 1), diff --git a/drivers/clk/renesas/rcar-cpg-lib.c b/drivers/clk/renesas/rcar-cpg-lib.c index 8862fbc7579..ea33bfd3239 100644 --- a/drivers/clk/renesas/rcar-cpg-lib.c +++ b/drivers/clk/renesas/rcar-cpg-lib.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index 35bad7f5f73..39ff4541c1e 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h index 71e409f3eb0..d5db14baf06 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.h +++ b/drivers/clk/renesas/renesas-cpg-mssr.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017-2018 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/tegra/tegra-car-clk.c b/drivers/clk/tegra/tegra-car-clk.c index 1d61f8dc378..880dd4f6ece 100644 --- a/drivers/clk/tegra/tegra-car-clk.c +++ b/drivers/clk/tegra/tegra-car-clk.c @@ -10,6 +10,9 @@ #include <asm/arch/clock.h> #include <asm/arch-tegra/clk_rst.h> +#define TEGRA_CAR_CLK_PLL BIT(0) +#define TEGRA_CAR_CLK_PERIPH BIT(1) + static int tegra_car_clk_request(struct clk *clk) { debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, @@ -20,24 +23,41 @@ static int tegra_car_clk_request(struct clk *clk) * varies per SoC) are the peripheral clocks, which use a numbering * scheme that matches HW registers 1:1. There are other clock IDs * beyond this that are assigned arbitrarily by the Tegra CAR DT - * binding. Due to the implementation of this driver, it currently - * only supports the peripheral IDs. + * binding. */ - if (clk->id >= PERIPH_ID_COUNT) - return -EINVAL; + if (clk->id < PERIPH_ID_COUNT) { + clk->data |= TEGRA_CAR_CLK_PERIPH; + return 0; + } - return 0; + /* If check for periph failed, then check for PLL clock id */ + int id = clk_id_to_pll_id(clk->id); + + if (clock_id_is_pll(id)) { + clk->id = id; + clk->data |= TEGRA_CAR_CLK_PLL; + return 0; + } + + return -EINVAL; } static ulong tegra_car_clk_get_rate(struct clk *clk) { - enum clock_id parent; - debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, clk->id); - parent = clock_get_periph_parent(clk->id); - return clock_get_periph_rate(clk->id, parent); + if (clk->data & TEGRA_CAR_CLK_PLL) + return clock_get_rate(clk->id); + + if (clk->data & TEGRA_CAR_CLK_PERIPH) { + enum clock_id parent; + + parent = clock_get_periph_parent(clk->id); + return clock_get_periph_rate(clk->id, parent); + } + + return -1U; } static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) @@ -47,6 +67,9 @@ static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate, clk->dev, clk->id); + if (clk->data & TEGRA_CAR_CLK_PLL) + return 0; + parent = clock_get_periph_parent(clk->id); return clock_adjust_periph_pll_div(clk->id, parent, rate, NULL); } @@ -56,6 +79,9 @@ static int tegra_car_clk_enable(struct clk *clk) debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, clk->id); + if (clk->data & TEGRA_CAR_CLK_PLL) + return 0; + clock_enable(clk->id); return 0; @@ -66,6 +92,9 @@ static int tegra_car_clk_disable(struct clk *clk) debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, clk->id); + if (clk->data & TEGRA_CAR_CLK_PLL) + return 0; + clock_disable(clk->id); return 0; @@ -83,6 +112,9 @@ static int tegra_car_clk_probe(struct udevice *dev) { debug("%s(dev=%p)\n", __func__, dev); + clock_init(); + clock_verify(); + return 0; } diff --git a/drivers/ddr/imx/phy/Makefile b/drivers/ddr/imx/phy/Makefile index 592d0c6ebad..95c93ba16d5 100644 --- a/drivers/ddr/imx/phy/Makefile +++ b/drivers/ddr/imx/phy/Makefile @@ -5,5 +5,5 @@ # ifdef CONFIG_XPL_BUILD -obj-$(CONFIG_IMX_SNPS_DDR_PHY) += helper.o ddrphy_utils.o ddrphy_train.o ddrphy_csr.o +obj-$(CONFIG_IMX_SNPS_DDR_PHY) += helper.o ddrphy_utils.o ddrphy_train.o endif diff --git a/drivers/ddr/imx/phy/ddrphy_csr.c b/drivers/ddr/imx/phy/ddrphy_csr.c deleted file mode 100644 index 67dd4e7059f..00000000000 --- a/drivers/ddr/imx/phy/ddrphy_csr.c +++ /dev/null @@ -1,732 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2018 NXP - */ - -#include <linux/kernel.h> -#include <asm/arch/ddr.h> - -/* ddr phy trained csr */ -struct dram_cfg_param ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - -uint32_t ddrphy_trained_csr_num = ARRAY_SIZE(ddrphy_trained_csr); diff --git a/drivers/ddr/imx/phy/ddrphy_train.c b/drivers/ddr/imx/phy/ddrphy_train.c index 2a2161dec33..1a2d071d6f1 100644 --- a/drivers/ddr/imx/phy/ddrphy_train.c +++ b/drivers/ddr/imx/phy/ddrphy_train.c @@ -90,7 +90,8 @@ int ddr_cfg_phy(struct dram_timing_info *dram_timing) } /* save the ddr PHY trained CSR in memory for low power use */ - ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); + ddrphy_trained_csr_save(dram_timing->ddrphy_trained_csr, + dram_timing->ddrphy_trained_csr_num); return 0; } diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c index c1fc800f191..b0dfc3a0b4f 100644 --- a/drivers/ddr/imx/phy/helper.c +++ b/drivers/ddr/imx/phy/helper.c @@ -181,7 +181,7 @@ void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved saved_timing->ddrc_cfg_num = timing_info->ddrc_cfg_num; saved_timing->ddrphy_cfg_num = timing_info->ddrphy_cfg_num; - saved_timing->ddrphy_trained_csr_num = ddrphy_trained_csr_num; + saved_timing->ddrphy_trained_csr_num = timing_info->ddrphy_trained_csr_num; saved_timing->ddrphy_pie_num = timing_info->ddrphy_pie_num; /* save the fsp table */ @@ -209,9 +209,9 @@ void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved /* save the ddrphy csr */ saved_timing->ddrphy_trained_csr = cfg; - for (i = 0; i < ddrphy_trained_csr_num; i++) { - cfg->reg = ddrphy_trained_csr[i].reg; - cfg->val = ddrphy_trained_csr[i].val; + for (i = 0; i < timing_info->ddrphy_trained_csr_num; i++) { + cfg->reg = timing_info->ddrphy_trained_csr[i].reg; + cfg->val = timing_info->ddrphy_trained_csr[i].val; cfg++; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 92a8597420a..f4a453e1cdd 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -358,10 +358,10 @@ config PCF8575_GPIO chips are from NXP and TI. config RCAR_GPIO - bool "Renesas RCar GPIO driver" + bool "Renesas R-Car GPIO driver" depends on DM_GPIO && ARCH_RENESAS help - This driver supports the GPIO banks on Renesas RCar SoCs. + This driver supports the GPIO banks on Renesas R-Car SoCs. config RZA1_GPIO bool "Renesas RZ/A1 GPIO driver" diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 52067fa7c1f..cdae6825736 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -504,16 +504,16 @@ config SYS_I2C_OMAP24XX Add support for the OMAP2+ I2C driver. config SYS_I2C_RCAR_I2C - bool "Renesas RCar I2C driver" + bool "Renesas R-Car I2C driver" depends on (RCAR_GEN2 || RCAR_64) && DM_I2C help - Support for Renesas RCar I2C controller. + Support for Renesas R-Car I2C controller. config SYS_I2C_RCAR_IIC - bool "Renesas RCar Gen3 IIC driver" + bool "Renesas R-Car Gen3 IIC driver" depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C help - Support for Renesas RCar Gen3 IIC controller. + Support for Renesas R-Car Gen3 IIC controller. config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c index 2aa0f5fbfae..e019d06be41 100644 --- a/drivers/i2c/rcar_iic.c +++ b/drivers/i2c/rcar_iic.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar IIC driver + * Renesas R-Car IIC driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/misc/gsc.c b/drivers/misc/gsc.c index dee0bdd9663..72a13abaaee 100644 --- a/drivers/misc/gsc.c +++ b/drivers/misc/gsc.c @@ -310,6 +310,7 @@ static int gsc_hwmon(struct udevice *dev) printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10)); break; case 1: /* prescaled voltage */ + case 3: if (val != 0xffff) printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); break; @@ -330,6 +331,9 @@ static int gsc_hwmon(struct udevice *dev) printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000); break; + case 4: /* revolutions per minute */ + printf("%-8s: %drpm\n", label, val * 30); + break; } } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index efe98354a0f..799586891af 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -750,7 +750,7 @@ static int mmc_send_op_cond(struct mmc *mmc) { int err, i; int timeout = 1000; - uint start; + ulong start; /* Some cards seem to need this */ mmc_go_idle(mmc); @@ -844,7 +844,8 @@ int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, bool send_status) { - unsigned int status, start; + ulong start; + unsigned int status; struct mmc_cmd cmd; int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS; bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) && diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 92afa6adcda..556f07eaf8f 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -571,7 +571,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) int i, ret = 0, sret; u32 caps, reg; - /* Only supported on Renesas RCar */ + /* Only supported on Renesas R-Car */ if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS)) return -EINVAL; diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index f489fb70766..657aba75148 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -64,7 +64,7 @@ #define TMIO_SD_CLKCTL_DIV4 BIT(0) /* SDCLK = CLK / 4 */ #define TMIO_SD_CLKCTL_DIV2 0 /* SDCLK = CLK / 2 */ #define TMIO_SD_CLKCTL_DIV1 BIT(10) /* SDCLK = CLK */ -#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (RCar ver.) */ +#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (R-Car ver.) */ #define TMIO_SD_CLKCTL_OFFEN BIT(9) /* stop SDCLK when unused */ #define TMIO_SD_CLKCTL_SCLKEN BIT(8) /* SDCLK output enable */ #define TMIO_SD_SIZE 0x04c /* block size */ @@ -90,7 +90,7 @@ #define TMIO_SD_VOLT_180 (2 << 0)/* 1.8V signal */ #define TMIO_SD_DMA_MODE 0x410 #define TMIO_SD_DMA_MODE_DIR_RD BIT(16) /* 1: from device, 0: to dev */ -#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* RCar, 64bit */ +#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* R-Car, 64bit */ #define TMIO_SD_DMA_MODE_ADDR_INC BIT(0) /* 1: address inc, 0: fixed */ #define TMIO_SD_DMA_CTL 0x414 #define TMIO_SD_DMA_CTL_START BIT(0) /* start DMA (auto cleared) */ @@ -128,9 +128,9 @@ struct tmio_sd_priv { #define TMIO_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */ #define TMIO_SD_CAP_64BIT BIT(3) /* Controller is 64bit */ #define TMIO_SD_CAP_16BIT BIT(4) /* Controller is 16bit */ -#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas RCar version of IP */ -#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas RCar version of IP */ -#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas RCar UHS/SDR modes */ +#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas R-Car version of IP */ +#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas R-Car version of IP */ +#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas R-Car UHS/SDR modes */ #define TMIO_SD_CAP_RCAR \ (TMIO_SD_CAP_RCAR_GEN2 | TMIO_SD_CAP_RCAR_GEN3) struct udevice *vqmmc_dev; diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 678bbde89e6..c71c1e5547c 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -194,11 +194,11 @@ config ALTERA_QSPI "Embedded Peripherals IP User Guide" of Altera. config RENESAS_RPC_HF - bool "Renesas RCar Gen3 RPC HyperFlash driver" + bool "Renesas R-Car Gen3 RPC HyperFlash driver" depends on RCAR_GEN3 && DM_MTD help This enables access to HyperFlash memory through the Renesas - RCar Gen3 RPC controller. + R-Car Gen3 RPC controller. config HBMC_AM654 bool "HyperBus controller driver for AM65x SoC" diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c index 03545822b07..50a6191d9c2 100644 --- a/drivers/mtd/renesas_rpc_hf.c +++ b/drivers/mtd/renesas_rpc_hf.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 RPC HyperFlash driver + * Renesas R-Car Gen3 RPC HyperFlash driver * * Copyright (C) 2016 Renesas Electronics Corporation * Copyright (C) 2016 Cogent Embedded, Inc. diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 7d2170ae72c..54b08482b91 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1503,4 +1503,5 @@ U_BOOT_DRIVER(fecmxc_gem) = { .ops = &fecmxc_ops, .priv_auto = sizeof(struct fec_priv), .plat_auto = sizeof(struct eth_pdata), + .flags = DM_FLAG_ACTIVE_DMA, }; diff --git a/drivers/net/rswitch.c b/drivers/net/rswitch.c index 8e1b6e2f6f6..57eff748c90 100644 --- a/drivers/net/rswitch.c +++ b/drivers/net/rswitch.c @@ -837,6 +837,7 @@ static int rswitch_send(struct udevice *dev, void *packet, int len) /* Update TX descriptor */ rswitch_flush_dcache((uintptr_t)packet, len); + rswitch_invalidate_dcache((uintptr_t)desc, sizeof(*desc)); memset(desc, 0x0, sizeof(*desc)); desc->die_dt = DT_FSINGLE; desc->info_ds = len; @@ -1112,6 +1113,9 @@ static int rswitch_bind(struct udevice *parent) return -ENOENT; ofnode_for_each_subnode(node, ports_np) { + if (!ofnode_is_enabled(node)) + continue; + ret = device_bind_with_driver_data(parent, drv, ofnode_get_name(node), (ulong)priv, node, &dev); diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 876a5fa57ee..41901433e8c 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -189,19 +189,19 @@ config PCI_MSC01 depends on TARGET_MALTA config PCI_RCAR_GEN2 - bool "Renesas RCar Gen2 PCIe driver" + bool "Renesas R-Car Gen2 PCIe driver" depends on RCAR_32 help Say Y here if you want to enable PCIe controller support on - Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is + Renesas R-Car Gen2 SoCs. The PCIe controller on R-Car Gen2 is also used to access EHCI USB controller on the SoC. config PCI_RCAR_GEN3 - bool "Renesas RCar Gen3 PCIe driver" + bool "Renesas R-Car Gen3 PCIe driver" depends on RCAR_GEN3 help Say Y here if you want to enable PCIe controller support on - Renesas RCar Gen3 SoCs. + Renesas R-Car Gen3 SoCs. config PCI_SANDBOX bool "Sandbox PCI support" diff --git a/drivers/pci/pci-rcar-gen2.c b/drivers/pci/pci-rcar-gen2.c index 12c31e74087..08d5c4fbb8b 100644 --- a/drivers/pci/pci-rcar-gen2.c +++ b/drivers/pci/pci-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen2 PCIEC driver + * Renesas R-Car Gen2 PCIEC driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 76878246f1e..d4b4037ce19 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 PCIEC driver + * Renesas R-Car Gen3 PCIEC driver * * Copyright (C) 2018-2019 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c index f9428c7ad12..be736629d51 100644 --- a/drivers/phy/phy-rcar-gen2.c +++ b/drivers/phy/phy-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen2 USB PHY driver + * Renesas R-Car Gen2 USB PHY driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c index b278f995f37..8c004eaf4c6 100644 --- a/drivers/phy/phy-rcar-gen3.c +++ b/drivers/phy/phy-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 USB PHY driver + * Renesas R-Car Gen3 USB PHY driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index 57e88604aa2..560f7275454 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -11,35 +11,46 @@ config PINCTRL_PFC both the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_PFC_FULL + bool "Renesas pin control drivers (full size)" + depends on PINCTRL_PFC + help + By default the pin multiplexing tables used by U-Boot are reduced + to keep the size of the bootloader low. Enable this option to use + full pin multiplexing tables the same way they are included in the + Linux kernel. This includes pin multiplexing options for Audio, CAN, + CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no + U-Boot driver. + config PINCTRL_PFC_R8A7790 - bool "Renesas RCar Gen2 R8A7790 pin control driver" + bool "Renesas R-Car Gen2 R8A7790 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7790 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7790 SoCs. config PINCTRL_PFC_R8A7791 - bool "Renesas RCar Gen2 R8A7791 pin control driver" + bool "Renesas R-Car Gen2 R8A7791 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7791 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7791 SoCs. config PINCTRL_PFC_R8A7792 - bool "Renesas RCar Gen2 R8A7792 pin control driver" + bool "Renesas R-Car Gen2 R8A7792 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7792 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7792 SoCs. config PINCTRL_PFC_R8A7793 - bool "Renesas RCar Gen2 R8A7793 pin control driver" + bool "Renesas R-Car Gen2 R8A7793 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7793 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7793 SoCs. config PINCTRL_PFC_R8A7794 - bool "Renesas RCar Gen2 R8A7794 pin control driver" + bool "Renesas R-Car Gen2 R8A7794 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7794 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7794 SoCs. config PINCTRL_PFC_R8A774A1 bool "Renesas RZ/G2 R8A774A1 pin control driver" @@ -66,76 +77,76 @@ config PINCTRL_PFC_R8A774E1 Support pin multiplexing control on Renesas RZ/G2H R8A774E1 SoCs. config PINCTRL_PFC_R8A77951 - bool "Renesas RCar Gen3 R8A7795 pin control driver" + bool "Renesas R-Car Gen3 R8A7795 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A7795 SoCs. config PINCTRL_PFC_R8A77960 - bool "Renesas RCar Gen3 R8A77960 pin control driver" + bool "Renesas R-Car Gen3 R8A77960 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77960 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77960 SoCs. config PINCTRL_PFC_R8A77961 - bool "Renesas RCar Gen3 R8A77961 pin control driver" + bool "Renesas R-Car Gen3 R8A77961 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77961 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77961 SoCs. config PINCTRL_PFC_R8A77965 - bool "Renesas RCar Gen3 R8A77965 pin control driver" + bool "Renesas R-Car Gen3 R8A77965 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77965 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77965 SoCs. config PINCTRL_PFC_R8A77970 - bool "Renesas RCar Gen3 R8A77970 pin control driver" + bool "Renesas R-Car Gen3 R8A77970 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77970 SoCs. config PINCTRL_PFC_R8A77980 - bool "Renesas RCar Gen3 R8A77980 pin control driver" + bool "Renesas R-Car Gen3 R8A77980 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77980 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77980 SoCs. config PINCTRL_PFC_R8A77990 - bool "Renesas RCar Gen3 R8A77990 pin control driver" + bool "Renesas R-Car Gen3 R8A77990 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77990 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77990 SoCs. config PINCTRL_PFC_R8A77995 - bool "Renesas RCar Gen3 R8A77995 pin control driver" + bool "Renesas R-Car Gen3 R8A77995 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77995 SoCs. config PINCTRL_PFC_R8A779A0 - bool "Renesas RCar Gen3 R8A779A0 pin control driver" + bool "Renesas R-Car Gen3 R8A779A0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A779A0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A779A0 SoCs. config PINCTRL_PFC_R8A779F0 - bool "Renesas RCar Gen4 R8A779F0 pin control driver" + bool "Renesas R-Car Gen4 R8A779F0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779F0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779F0 SoCs. config PINCTRL_PFC_R8A779G0 - bool "Renesas RCar Gen4 R8A779G0 pin control driver" + bool "Renesas R-Car Gen4 R8A779G0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779G0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779G0 SoCs. config PINCTRL_PFC_R8A779H0 - bool "Renesas RCar Gen4 R8A779H0 pin control driver" + bool "Renesas R-Car Gen4 R8A779H0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779H0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779H0 SoCs. config PINCTRL_RZA1 bool "Renesas RZ/A1 R7S72100 pin control driver" diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c index acd6b01f497..4d6ce06cf16 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7790.c +++ b/drivers/pinctrl/renesas/pfc-r8a7790.c @@ -1745,6 +1745,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { /* CLK A */ @@ -1795,6 +1796,8 @@ static const unsigned int audio_clkout_d_pins[] = { static const unsigned int audio_clkout_d_mux[] = { AUDIO_CLKOUT_D_MARK, }; +#endif + /* - AVB -------------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { RCAR_GP_PIN(3, 11), @@ -1870,6 +1873,8 @@ static const unsigned int avb_gmii_mux[] = { AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, AVB_COL_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN0 ----------------------------------------------------------------- */ static const unsigned int can0_data_pins[] = { /* CAN0 RX */ @@ -2048,6 +2053,8 @@ static const unsigned int du2_clk_in_pins[] = { static const unsigned int du2_clk_in_mux[] = { DU_DOTCLKIN2_MARK, }; +#endif + /* - ETH -------------------------------------------------------------------- */ static const unsigned int eth_link_pins[] = { /* LINK */ @@ -2363,6 +2370,8 @@ static const unsigned int iic3_pins[] = { static const unsigned int iic3_mux[] = { IIC3_SCL_MARK, IIC3_SDA_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ */ @@ -2392,6 +2401,7 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A7790 /* - MLB+ ------------------------------------------------------------------- */ @@ -2441,6 +2451,8 @@ static const unsigned int mmc1_ctrl_pins[] = { static const unsigned int mmc1_ctrl_mux[] = { MMC1_CLK_MARK, MMC1_CMD_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -2769,6 +2781,8 @@ static const unsigned int pwm6_pins[] = { static const unsigned int pwm6_mux[] = { PWM6_MARK, }; +#endif + /* - QSPI ------------------------------------------------------------------- */ static const unsigned int qspi_ctrl_pins[] = { /* SPCLK, SSL */ @@ -3394,6 +3408,8 @@ static const unsigned int sdhi3_wp_pins[] = { static const unsigned int sdhi3_wp_mux[] = { SD3_WP_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA0 */ @@ -3577,6 +3593,8 @@ static const unsigned int ssi9_ctrl_pins[] = { static const unsigned int ssi9_ctrl_mux[] = { SSI_SCK9_MARK, SSI_WS9_MARK, }; +#endif + /* - TPU0 ------------------------------------------------------------------- */ static const unsigned int tpu0_to0_pins[] = { /* TO */ @@ -3630,6 +3648,8 @@ static const unsigned int usb2_pins[] = { static const unsigned int usb2_mux[] = { USB2_PWEN_MARK, USB2_OVC_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { /* B */ @@ -4024,6 +4044,7 @@ static const unsigned int vin3_clk_pins[] = { static const unsigned int vin3_clk_mux[] = { VI3_CLK_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[311]; @@ -4032,6 +4053,7 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a), SH_PFC_PIN_GROUP(audio_clk_b), SH_PFC_PIN_GROUP(audio_clk_c), @@ -4039,12 +4061,14 @@ static const struct { SH_PFC_PIN_GROUP(audio_clkout_b), SH_PFC_PIN_GROUP(audio_clkout_c), SH_PFC_PIN_GROUP(audio_clkout_d), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can0_data_c), @@ -4063,6 +4087,7 @@ static const struct { SH_PFC_PIN_GROUP(du0_clk_in), SH_PFC_PIN_GROUP(du1_clk_in), SH_PFC_PIN_GROUP(du2_clk_in), +#endif SH_PFC_PIN_GROUP(eth_link), SH_PFC_PIN_GROUP(eth_magic), SH_PFC_PIN_GROUP(eth_mdio), @@ -4106,10 +4131,12 @@ static const struct { SH_PFC_PIN_GROUP(iic2_d), SH_PFC_PIN_GROUP(iic2_e), SH_PFC_PIN_GROUP(iic3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), SH_PFC_PIN_GROUP(intc_irq3), +#endif BUS_DATA_PIN_GROUP(mmc0_data, 1), BUS_DATA_PIN_GROUP(mmc0_data, 4), BUS_DATA_PIN_GROUP(mmc0_data, 8), @@ -4118,6 +4145,7 @@ static const struct { BUS_DATA_PIN_GROUP(mmc1_data, 4), BUS_DATA_PIN_GROUP(mmc1_data, 8), SH_PFC_PIN_GROUP(mmc1_ctrl), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -4165,6 +4193,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm4), SH_PFC_PIN_GROUP(pwm5), SH_PFC_PIN_GROUP(pwm6), +#endif SH_PFC_PIN_GROUP(qspi_ctrl), BUS_DATA_PIN_GROUP(qspi_data, 2), BUS_DATA_PIN_GROUP(qspi_data, 4), @@ -4257,6 +4286,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi3_ctrl), SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi0129_ctrl), SH_PFC_PIN_GROUP(ssi1_data), @@ -4283,6 +4313,7 @@ static const struct { SH_PFC_PIN_GROUP(ssi8_c_data), SH_PFC_PIN_GROUP(ssi9_data), SH_PFC_PIN_GROUP(ssi9_ctrl), +#endif SH_PFC_PIN_GROUP(tpu0_to0), SH_PFC_PIN_GROUP(tpu0_to1), SH_PFC_PIN_GROUP(tpu0_to2), @@ -4292,6 +4323,7 @@ static const struct { SH_PFC_PIN_GROUP(usb1), SH_PFC_PIN_GROUP_SUBSET(usb1_pwen, usb1, 0, 1), SH_PFC_PIN_GROUP(usb2), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 24), BUS_DATA_PIN_GROUP(vin0_data, 20), SH_PFC_PIN_GROUP(vin0_data18), @@ -4343,6 +4375,7 @@ static const struct { SH_PFC_PIN_GROUP(vin3_field), SH_PFC_PIN_GROUP(vin3_clkenb), SH_PFC_PIN_GROUP(vin3_clk), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A7790 .automotive = { @@ -4351,6 +4384,7 @@ static const struct { #endif /* CONFIG_PINCTRL_PFC_R8A7790 */ }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a", "audio_clk_b", @@ -4360,6 +4394,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout_c", "audio_clkout_d", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4370,6 +4405,7 @@ static const char * const avb_groups[] = { "avb_gmii", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data", "can0_data_b", @@ -4408,6 +4444,7 @@ static const char * const du1_groups[] = { static const char * const du2_groups[] = { "du2_clk_in", }; +#endif static const char * const eth_groups[] = { "eth_link", @@ -4485,12 +4522,14 @@ static const char * const iic3_groups[] = { "iic3", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", "intc_irq2", "intc_irq3", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A7790 static const char * const mlb_groups[] = { @@ -4512,6 +4551,7 @@ static const char * const mmc1_groups[] = { "mmc1_ctrl", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4591,6 +4631,7 @@ static const char * const pwm5_groups[] = { static const char * const pwm6_groups[] = { "pwm6", }; +#endif static const char * const qspi_groups[] = { "qspi_ctrl", @@ -4729,6 +4770,7 @@ static const char * const sdhi3_groups[] = { "sdhi3_wp", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi0129_ctrl", @@ -4757,6 +4799,7 @@ static const char * const ssi_groups[] = { "ssi9_data", "ssi9_ctrl", }; +#endif static const char * const tpu0_groups[] = { "tpu0_to0", @@ -4779,6 +4822,7 @@ static const char * const usb2_groups[] = { "usb2", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data24", "vin0_data20", @@ -4841,6 +4885,7 @@ static const char * const vin3_groups[] = { "vin3_clkenb", "vin3_clk", }; +#endif static const struct { struct sh_pfc_function common[58]; @@ -4849,8 +4894,11 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), @@ -4858,6 +4906,7 @@ static const struct { SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), SH_PFC_FUNCTION(du2), +#endif SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -4869,9 +4918,12 @@ static const struct { SH_PFC_FUNCTION(iic1), SH_PFC_FUNCTION(iic2), SH_PFC_FUNCTION(iic3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc), +#endif SH_PFC_FUNCTION(mmc0), SH_PFC_FUNCTION(mmc1), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -4883,6 +4935,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -4898,15 +4951,19 @@ static const struct { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(sdhi3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tpu0), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(usb2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), SH_PFC_FUNCTION(vin2), SH_PFC_FUNCTION(vin3), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A7790 .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c index fa94a51e5e7..c6d761bb378 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7791.c +++ b/drivers/pinctrl/renesas/pfc-r8a7791.c @@ -1802,6 +1802,7 @@ static const unsigned int adi_chsel2_b_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - Audio Clock ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { /* CLK */ @@ -1847,6 +1848,7 @@ static const unsigned int audio_clkout_pins[] = { static const unsigned int audio_clkout_mux[] = { AUDIO_CLKOUT_MARK, }; +#endif /* - AVB -------------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { @@ -1924,6 +1926,7 @@ static const unsigned int avb_gmii_mux[] = { AVB_COL_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN -------------------------------------------------------------------- */ static const unsigned int can0_data_pins[] = { @@ -2160,6 +2163,8 @@ static const unsigned int du1_clk_in_c_pins[] = { static const unsigned int du1_clk_in_c_mux[] = { DU1_DOTCLKIN_C_MARK, }; +#endif + /* - ETH -------------------------------------------------------------------- */ static const unsigned int eth_link_pins[] = { /* LINK */ @@ -2553,6 +2558,8 @@ static const unsigned int i2c8_c_pins[] = { static const unsigned int i2c8_c_mux[] = { IIC1_SCL_C_MARK, IIC1_SDA_C_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ */ @@ -2582,6 +2589,7 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) /* - MLB+ ------------------------------------------------------------------- */ @@ -2623,6 +2631,8 @@ static const unsigned int mmc_ctrl_pins[] = { static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3192,6 +3202,8 @@ static const unsigned int pwm6_pins[] = { static const unsigned int pwm6_mux[] = { PWM6_MARK, }; +#endif + /* - QSPI ------------------------------------------------------------------- */ static const unsigned int qspi_ctrl_pins[] = { /* SPCLK, SSL */ @@ -3872,6 +3884,7 @@ static const unsigned int sdhi2_wp_mux[] = { SD2_WP_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA */ @@ -4124,6 +4137,7 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif /* - TPU -------------------------------------------------------------------- */ static const unsigned int tpu_to0_pins[] = { @@ -4169,6 +4183,8 @@ static const unsigned int usb1_mux[] = { USB1_PWEN_MARK, USB1_OVC_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { /* B */ @@ -4424,6 +4440,7 @@ static const unsigned int vin2_clk_pins[] = { static const unsigned int vin2_clk_mux[] = { VI2_CLK_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[346]; @@ -4432,17 +4449,20 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a), SH_PFC_PIN_GROUP(audio_clk_b), SH_PFC_PIN_GROUP(audio_clk_b_b), SH_PFC_PIN_GROUP(audio_clk_c), SH_PFC_PIN_GROUP(audio_clkout), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can0_data_c), @@ -4469,6 +4489,7 @@ static const struct { SH_PFC_PIN_GROUP(du1_clk_in), SH_PFC_PIN_GROUP(du1_clk_in_b), SH_PFC_PIN_GROUP(du1_clk_in_c), +#endif SH_PFC_PIN_GROUP(eth_link), SH_PFC_PIN_GROUP(eth_magic), SH_PFC_PIN_GROUP(eth_mdio), @@ -4524,15 +4545,18 @@ static const struct { SH_PFC_PIN_GROUP(i2c8), SH_PFC_PIN_GROUP(i2c8_b), SH_PFC_PIN_GROUP(i2c8_c), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), SH_PFC_PIN_GROUP(intc_irq3), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), BUS_DATA_PIN_GROUP(mmc_data, 8, _b), SH_PFC_PIN_GROUP(mmc_ctrl), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -4614,6 +4638,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm5), SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6), +#endif SH_PFC_PIN_GROUP(qspi_ctrl), BUS_DATA_PIN_GROUP(qspi_data, 2), BUS_DATA_PIN_GROUP(qspi_data, 4), @@ -4712,6 +4737,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi2_ctrl), SH_PFC_PIN_GROUP(sdhi2_cd), SH_PFC_PIN_GROUP(sdhi2_wp), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi0_data_b), SH_PFC_PIN_GROUP(ssi0129_ctrl), @@ -4740,12 +4766,14 @@ static const struct { SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(ssi9_ctrl), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tpu_to0), SH_PFC_PIN_GROUP(tpu_to1), SH_PFC_PIN_GROUP(tpu_to2), SH_PFC_PIN_GROUP(tpu_to3), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 24), BUS_DATA_PIN_GROUP(vin0_data, 20), SH_PFC_PIN_GROUP(vin0_data18), @@ -4778,6 +4806,7 @@ static const struct { SH_PFC_PIN_GROUP(vin2_field), SH_PFC_PIN_GROUP(vin2_clkenb), SH_PFC_PIN_GROUP(vin2_clk), +#endif }, #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { @@ -4807,6 +4836,7 @@ static const char * const adi_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a", "audio_clk_b", @@ -4814,6 +4844,7 @@ static const char * const audio_clk_groups[] = { "audio_clk_c", "audio_clkout", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4824,6 +4855,7 @@ static const char * const avb_groups[] = { "avb_gmii", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data", "can0_data_b", @@ -4887,6 +4919,7 @@ static const char * const du1_groups[] = { "du1_clk_in_b", "du1_clk_in_c", }; +#endif static const char * const eth_groups[] = { "eth_link", @@ -4976,12 +5009,14 @@ static const char * const i2c8_groups[] = { "i2c8_c", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", "intc_irq2", "intc_irq3", }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) static const char * const mlb_groups[] = { @@ -4997,6 +5032,7 @@ static const char * const mmc_groups[] = { "mmc_ctrl", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -5107,6 +5143,7 @@ static const char * const pwm5_groups[] = { static const char * const pwm6_groups[] = { "pwm6", }; +#endif static const char * const qspi_groups[] = { "qspi_ctrl", @@ -5254,6 +5291,7 @@ static const char * const sdhi2_groups[] = { "sdhi2_wp", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi0_data_b", @@ -5284,6 +5322,7 @@ static const char * const ssi_groups[] = { "ssi9_ctrl", "ssi9_ctrl_b", }; +#endif static const char * const tpu_groups[] = { "tpu_to0", @@ -5299,6 +5338,7 @@ static const char * const usb1_groups[] = { "usb1", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data24", "vin0_data20", @@ -5339,6 +5379,7 @@ static const char * const vin2_groups[] = { "vin2_clkenb", "vin2_clk", }; +#endif static const struct { struct sh_pfc_function common[58]; @@ -5347,14 +5388,18 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), +#endif SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -5366,8 +5411,11 @@ static const struct { SH_PFC_FUNCTION(i2c4), SH_PFC_FUNCTION(i2c7), SH_PFC_FUNCTION(i2c8), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -5378,6 +5426,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -5398,13 +5447,17 @@ static const struct { SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), SH_PFC_FUNCTION(vin2), +#endif }, #if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7792.c b/drivers/pinctrl/renesas/pfc-r8a7792.c index 7c1e6d40749..d2ff1d9d1a6 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7792.c +++ b/drivers/pinctrl/renesas/pfc-r8a7792.c @@ -831,6 +831,8 @@ static const unsigned int avb_avtp_match_pins[] = { static const unsigned int avb_avtp_match_mux[] = { AVB_AVTP_MATCH_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN -------------------------------------------------------------------- */ static const unsigned int can0_data_pins[] = { /* TX, RX */ @@ -996,6 +998,8 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; +#endif + /* - LBSC ------------------------------------------------------------------- */ static const unsigned int lbsc_cs0_pins[] = { /* CS0# */ @@ -1053,6 +1057,8 @@ static const unsigned int lbsc_ex_cs5_pins[] = { static const unsigned int lbsc_ex_cs5_mux[] = { EX_CS5_N_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -1111,6 +1117,8 @@ static const unsigned int msiof1_tx_pins[] = { static const unsigned int msiof1_tx_mux[] = { MSIOF1_TXD_MARK, }; +#endif + /* - QSPI ------------------------------------------------------------------- */ static const unsigned int qspi_ctrl_pins[] = { /* SPCLK, SSL */ @@ -1231,6 +1239,8 @@ static const unsigned int sdhi0_wp_pins[] = { static const unsigned int sdhi0_wp_mux[] = { SD0_WP_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { /* B */ @@ -1645,6 +1655,7 @@ static const unsigned int vin5_clk_pins[] = { static const unsigned int vin5_clk_mux[] = { VI5_CLK_MARK, }; +#endif static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_link), @@ -1654,6 +1665,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), SH_PFC_PIN_GROUP(avb_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can1_data), SH_PFC_PIN_GROUP(can_clk), @@ -1672,6 +1684,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), SH_PFC_PIN_GROUP(intc_irq3), +#endif SH_PFC_PIN_GROUP(lbsc_cs0), SH_PFC_PIN_GROUP(lbsc_cs1), SH_PFC_PIN_GROUP(lbsc_ex_cs0), @@ -1680,6 +1693,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(lbsc_ex_cs3), SH_PFC_PIN_GROUP(lbsc_ex_cs4), SH_PFC_PIN_GROUP(lbsc_ex_cs5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_rx), @@ -1688,6 +1702,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof1_sync), SH_PFC_PIN_GROUP(msiof1_rx), SH_PFC_PIN_GROUP(msiof1_tx), +#endif SH_PFC_PIN_GROUP(qspi_ctrl), BUS_DATA_PIN_GROUP(qspi_data, 2), BUS_DATA_PIN_GROUP(qspi_data, 4), @@ -1706,6 +1721,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(sdhi0_ctrl), SH_PFC_PIN_GROUP(sdhi0_cd), SH_PFC_PIN_GROUP(sdhi0_wp), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 24), BUS_DATA_PIN_GROUP(vin0_data, 20), SH_PFC_PIN_GROUP(vin0_data18), @@ -1762,6 +1778,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin5_field), SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), +#endif }; static const char * const avb_groups[] = { @@ -1774,6 +1791,7 @@ static const char * const avb_groups[] = { "avb_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data", "can_clk", @@ -1807,6 +1825,7 @@ static const char * const intc_groups[] = { "intc_irq2", "intc_irq3", }; +#endif static const char * const lbsc_groups[] = { "lbsc_cs0", @@ -1819,6 +1838,7 @@ static const char * const lbsc_groups[] = { "lbsc_ex_cs5", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -1832,6 +1852,7 @@ static const char * const msiof1_groups[] = { "msiof1_rx", "msiof1_tx", }; +#endif static const char * const qspi_groups[] = { "qspi_ctrl", @@ -1869,6 +1890,7 @@ static const char * const sdhi0_groups[] = { "sdhi0_wp", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data24", "vin0_data20", @@ -1942,29 +1964,36 @@ static const char * const vin5_groups[] = { "vin5_clkenb", "vin5_clk", }; +#endif static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), SH_PFC_FUNCTION(intc), +#endif SH_PFC_FUNCTION(lbsc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), +#endif SH_PFC_FUNCTION(qspi), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif2), SH_PFC_FUNCTION(scif3), SH_PFC_FUNCTION(sdhi0), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), SH_PFC_FUNCTION(vin2), SH_PFC_FUNCTION(vin3), SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c index 2f550218182..a1fa1776bae 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7794.c +++ b/drivers/pinctrl/renesas/pfc-r8a7794.c @@ -1500,6 +1500,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - Audio Clock ------------------------------------------------------------ */ static const unsigned int audio_clka_pins[] = { /* CLKA */ @@ -1592,6 +1593,8 @@ static const unsigned int audio_clkout_c_pins[] = { static const unsigned int audio_clkout_c_mux[] = { AUDIO_CLKOUT_C_MARK, }; +#endif + /* - AVB -------------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { RCAR_GP_PIN(3, 26), @@ -1668,6 +1671,7 @@ static const unsigned int avb_gmii_mux[] = { AVB_COL_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN -------------------------------------------------------------------- */ static const unsigned int can0_data_pins[] = { /* TX, RX */ @@ -1950,6 +1954,8 @@ static const unsigned int du1_disp_pins[] = { static const unsigned int du1_disp_mux[] = { DU1_DISP_MARK }; +#endif + /* - ETH -------------------------------------------------------------------- */ static const unsigned int eth_link_pins[] = { /* LINK */ @@ -2316,6 +2322,8 @@ static const unsigned int i2c5_d_pins[] = { static const unsigned int i2c5_d_mux[] = { I2C5_SCL_D_MARK, I2C5_SDA_D_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ0 */ @@ -2387,6 +2395,8 @@ static const unsigned int intc_irq9_pins[] = { static const unsigned int intc_irq9_mux[] = { IRQ9_MARK, }; +#endif + /* - MMCIF ------------------------------------------------------------------ */ static const unsigned int mmc_data_pins[] = { /* D[0:7] */ @@ -2406,6 +2416,8 @@ static const unsigned int mmc_ctrl_pins[] = { static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -2722,6 +2734,8 @@ static const unsigned int pwm6_b_pins[] = { static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +#endif + /* - QSPI ------------------------------------------------------------------- */ static const unsigned int qspi_ctrl_pins[] = { /* SPCLK, SSL */ @@ -3299,6 +3313,8 @@ static const unsigned int sdhi2_wp_pins[] = { static const unsigned int sdhi2_wp_mux[] = { SD2_WP_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA0 */ @@ -3538,6 +3554,8 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif + /* - TPU -------------------------------------------------------------------- */ static const unsigned int tpu_to0_pins[] = { RCAR_GP_PIN(3, 31), @@ -3629,6 +3647,8 @@ static const unsigned int usb1_mux[] = { USB1_PWEN_MARK, USB1_OVC_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { /* B */ @@ -3761,8 +3781,10 @@ static const unsigned int vin1_clk_pins[] = { static const unsigned int vin1_clk_mux[] = { VI1_CLK_MARK, }; +#endif static const struct sh_pfc_pin_group pinmux_groups[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clka), SH_PFC_PIN_GROUP(audio_clka_b), SH_PFC_PIN_GROUP(audio_clka_c), @@ -3776,12 +3798,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(audio_clkout), SH_PFC_PIN_GROUP(audio_clkout_b), SH_PFC_PIN_GROUP(audio_clkout_c), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can0_data_c), @@ -3812,6 +3836,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du1_oddf), SH_PFC_PIN_GROUP(du1_cde), SH_PFC_PIN_GROUP(du1_disp), +#endif SH_PFC_PIN_GROUP(eth_link), SH_PFC_PIN_GROUP(eth_magic), SH_PFC_PIN_GROUP(eth_mdio), @@ -3862,6 +3887,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c5_b), SH_PFC_PIN_GROUP(i2c5_c), SH_PFC_PIN_GROUP(i2c5_d), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), @@ -3872,10 +3898,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(intc_irq7), SH_PFC_PIN_GROUP(intc_irq8), SH_PFC_PIN_GROUP(intc_irq9), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), SH_PFC_PIN_GROUP(mmc_ctrl), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -3923,6 +3951,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm5_c), SH_PFC_PIN_GROUP(pwm6), SH_PFC_PIN_GROUP(pwm6_b), +#endif SH_PFC_PIN_GROUP(qspi_ctrl), BUS_DATA_PIN_GROUP(qspi_data, 2), BUS_DATA_PIN_GROUP(qspi_data, 4), @@ -4006,6 +4035,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(sdhi2_ctrl), SH_PFC_PIN_GROUP(sdhi2_cd), SH_PFC_PIN_GROUP(sdhi2_wp), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi0129_ctrl), SH_PFC_PIN_GROUP(ssi1_data), @@ -4040,6 +4070,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(ssi9_ctrl), SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tpu_to0), SH_PFC_PIN_GROUP(tpu_to0_b), SH_PFC_PIN_GROUP(tpu_to0_c), @@ -4054,6 +4085,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(tpu_to3_c), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 24), BUS_DATA_PIN_GROUP(vin0_data, 20), SH_PFC_PIN_GROUP(vin0_data18), @@ -4072,8 +4104,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin1_field), SH_PFC_PIN_GROUP(vin1_clkenb), SH_PFC_PIN_GROUP(vin1_clk), +#endif }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clka", "audio_clka_b", @@ -4089,6 +4123,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout_b", "audio_clkout_c", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4099,6 +4134,7 @@ static const char * const avb_groups[] = { "avb_gmii", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data", "can0_data_b", @@ -4163,6 +4199,7 @@ static const char * const du1_groups[] = { "du1_cde", "du1_disp", }; +#endif static const char * const eth_groups[] = { "eth_link", @@ -4244,6 +4281,7 @@ static const char * const i2c5_groups[] = { "i2c5_d", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", @@ -4256,6 +4294,7 @@ static const char * const intc_groups[] = { "intc_irq8", "intc_irq9", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -4264,6 +4303,7 @@ static const char * const mmc_groups[] = { "mmc_ctrl", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4340,6 +4380,7 @@ static const char * const pwm6_groups[] = { "pwm6", "pwm6_b", }; +#endif static const char * const qspi_groups[] = { "qspi_ctrl", @@ -4484,6 +4525,7 @@ static const char * const sdhi2_groups[] = { "sdhi2_wp", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi0129_ctrl", @@ -4520,6 +4562,7 @@ static const char * const ssi_groups[] = { "ssi9_data_b", "ssi9_ctrl_b", }; +#endif static const char * const tpu_groups[] = { "tpu_to0", @@ -4544,6 +4587,7 @@ static const char * const usb1_groups[] = { "usb1", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data24", "vin0_data20", @@ -4567,15 +4611,20 @@ static const char * const vin1_groups[] = { "vin1_clkenb", "vin1_clk", }; +#endif static const struct sh_pfc_function pinmux_functions[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), +#endif SH_PFC_FUNCTION(eth), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -4586,8 +4635,11 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c4), SH_PFC_FUNCTION(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -4598,6 +4650,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -4618,12 +4671,16 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c index 1cfdc335041..8ddcbfbbd64 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77951.c +++ b/drivers/pinctrl/renesas/pfc-r8a77951.c @@ -1563,6 +1563,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------ */ static const unsigned int audio_clk_a_a_pins[] = { /* CLK A */ @@ -1683,6 +1684,7 @@ static const unsigned int audio_clkout3_b_pins[] = { static const unsigned int audio_clkout3_b_mux[] = { AUDIO_CLKOUT3_B_MARK, }; +#endif /* - EtherAVB --------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { @@ -1770,6 +1772,7 @@ static const unsigned int avb_avtp_capture_b_mux[] = { AVB_AVTP_CAPTURE_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN ------------------------------------------------------------------ */ static const unsigned int can0_data_a_pins[] = { /* TX, RX */ @@ -1824,6 +1827,7 @@ static const unsigned int canfd1_data_pins[] = { static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77951 /* - DRIF0 --------------------------------------------------------------- */ @@ -2042,6 +2046,7 @@ static const unsigned int drif3_data1_b_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77951 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2122,6 +2127,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -2409,6 +2415,7 @@ static const unsigned int i2c6_c_mux[] = { SDA6_C_MARK, SCL6_C_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -2452,6 +2459,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77951 /* - MLB+ ------------------------------------------------------------------- */ @@ -2463,6 +2471,7 @@ static const unsigned int mlb_3pin_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77951 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3259,6 +3268,7 @@ static const unsigned int pwm6_b_pins[] = { static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -3687,6 +3697,7 @@ static const unsigned int sdhi3_ds_mux[] = { SD3_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA */ @@ -3863,6 +3874,7 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif /* - TMU -------------------------------------------------------------------- */ static const unsigned int tmu_tclk1_a_pins[] = { @@ -3966,6 +3978,7 @@ static const unsigned int usb30_mux[] = { USB30_PWEN_MARK, USB30_OVC_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN4 ------------------------------------------------------------------- */ static const unsigned int vin4_data18_a_pins[] = { RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), @@ -4145,6 +4158,7 @@ static const unsigned int vin5_clk_mux[] = { /* CLK */ VI5_CLK_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[328]; @@ -4153,6 +4167,7 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a_a), SH_PFC_PIN_GROUP(audio_clk_a_b), SH_PFC_PIN_GROUP(audio_clk_a_c), @@ -4170,6 +4185,7 @@ static const struct { SH_PFC_PIN_GROUP(audio_clkout2_b), SH_PFC_PIN_GROUP(audio_clkout3_a), SH_PFC_PIN_GROUP(audio_clkout3_b), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), @@ -4181,6 +4197,7 @@ static const struct { SH_PFC_PIN_GROUP(avb_avtp_capture_a), SH_PFC_PIN_GROUP(avb_avtp_match_b), SH_PFC_PIN_GROUP(avb_avtp_capture_b), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data_a), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can1_data), @@ -4196,6 +4213,7 @@ static const struct { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(hscif0_ctrl), @@ -4234,6 +4252,7 @@ static const struct { SH_PFC_PIN_GROUP(i2c6_a), SH_PFC_PIN_GROUP(i2c6_b), SH_PFC_PIN_GROUP(i2c6_c), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), @@ -4352,6 +4371,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), BUS_DATA_PIN_GROUP(qspi0_data, 4), @@ -4415,6 +4435,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(sdhi3_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi01239_ctrl), SH_PFC_PIN_GROUP(ssi1_data_a), @@ -4440,6 +4461,7 @@ static const struct { SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(ssi9_ctrl_a), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tmu_tclk1_a), SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), @@ -4453,6 +4475,7 @@ static const struct { SH_PFC_PIN_GROUP(usb2), SH_PFC_PIN_GROUP(usb2_ch3), SH_PFC_PIN_GROUP(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin4_data, 8, _a), BUS_DATA_PIN_GROUP(vin4_data, 10, _a), BUS_DATA_PIN_GROUP(vin4_data, 12, _a), @@ -4481,6 +4504,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_field), SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77951 .automotive = { @@ -4519,6 +4543,7 @@ static const struct { #endif /* CONFIG_PINCTRL_PFC_R8A77951 */ }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a_a", "audio_clk_a_b", @@ -4538,6 +4563,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout3_a", "audio_clkout3_b", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4553,6 +4579,7 @@ static const char * const avb_groups[] = { "avb_avtp_capture_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data_a", "can0_data_b", @@ -4574,6 +4601,7 @@ static const char * const canfd0_groups[] = { static const char * const canfd1_groups[] = { "canfd1_data", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77951 static const char * const drif0_groups[] = { @@ -4619,6 +4647,7 @@ static const char * const drif3_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77951 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4629,6 +4658,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -4701,6 +4731,7 @@ static const char * const i2c6_groups[] = { "i2c6_c", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -4709,6 +4740,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77951 static const char * const mlb_3pin_groups[] = { @@ -4716,6 +4748,7 @@ static const char * const mlb_3pin_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77951 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4860,6 +4893,7 @@ static const char * const pwm6_groups[] = { "pwm6_a", "pwm6_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -4966,6 +5000,7 @@ static const char * const sdhi3_groups[] = { "sdhi3_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi01239_ctrl", @@ -4993,6 +5028,7 @@ static const char * const ssi_groups[] = { "ssi9_ctrl_a", "ssi9_ctrl_b", }; +#endif static const char * const tmu_groups[] = { "tmu_tclk1_a", @@ -5028,6 +5064,7 @@ static const char * const usb30_groups[] = { "usb30", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin4_groups[] = { "vin4_data8_a", "vin4_data10_a", @@ -5061,6 +5098,7 @@ static const char * const vin5_groups[] = { "vin5_clkenb", "vin5_clk", }; +#endif static const struct { struct sh_pfc_function common[55]; @@ -5069,14 +5107,18 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), @@ -5088,6 +5130,7 @@ static const struct { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), @@ -5100,6 +5143,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), @@ -5114,7 +5158,9 @@ static const struct { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(sdhi3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), @@ -5122,8 +5168,10 @@ static const struct { SH_PFC_FUNCTION(usb2), SH_PFC_FUNCTION(usb2_ch3), SH_PFC_FUNCTION(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77951 .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index a289397fb8f..7bc9fb709ea 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -1568,6 +1568,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------ */ static const unsigned int audio_clk_a_a_pins[] = { /* CLK A */ @@ -1689,6 +1690,7 @@ static const unsigned int audio_clkout3_b_pins[] = { static const unsigned int audio_clkout3_b_mux[] = { AUDIO_CLKOUT3_B_MARK, }; +#endif /* - EtherAVB --------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { @@ -1776,6 +1778,7 @@ static const unsigned int avb_avtp_capture_b_mux[] = { AVB_AVTP_CAPTURE_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN ------------------------------------------------------------------ */ static const unsigned int can0_data_a_pins[] = { /* TX, RX */ @@ -1830,6 +1833,7 @@ static const unsigned int canfd1_data_pins[] = { static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) /* - DRIF0 --------------------------------------------------------------- */ @@ -2048,6 +2052,7 @@ static const unsigned int drif3_data1_b_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2128,6 +2133,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -2415,6 +2421,7 @@ static const unsigned int i2c6_c_mux[] = { SDA6_C_MARK, SCL6_C_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -2458,6 +2465,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) /* - MLB+ ------------------------------------------------------------------- */ @@ -2469,6 +2477,7 @@ static const unsigned int mlb_3pin_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3266,6 +3275,7 @@ static const unsigned int pwm6_b_pins[] = { static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -3679,6 +3689,7 @@ static const unsigned int sdhi3_ds_mux[] = { SD3_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA */ @@ -3855,6 +3866,7 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif /* - TMU -------------------------------------------------------------------- */ static const unsigned int tmu_tclk1_a_pins[] = { @@ -3942,6 +3954,7 @@ static const unsigned int usb30_mux[] = { USB30_PWEN_MARK, USB30_OVC_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN4 ------------------------------------------------------------------- */ static const unsigned int vin4_data18_a_pins[] = { RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), @@ -4121,6 +4134,7 @@ static const unsigned int vin5_clk_mux[] = { /* CLK */ VI5_CLK_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[324]; @@ -4129,6 +4143,7 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a_a), SH_PFC_PIN_GROUP(audio_clk_a_b), SH_PFC_PIN_GROUP(audio_clk_a_c), @@ -4146,6 +4161,7 @@ static const struct { SH_PFC_PIN_GROUP(audio_clkout2_b), SH_PFC_PIN_GROUP(audio_clkout3_a), SH_PFC_PIN_GROUP(audio_clkout3_b), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), @@ -4157,6 +4173,7 @@ static const struct { SH_PFC_PIN_GROUP(avb_avtp_capture_a), SH_PFC_PIN_GROUP(avb_avtp_match_b), SH_PFC_PIN_GROUP(avb_avtp_capture_b), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data_a), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can1_data), @@ -4172,6 +4189,7 @@ static const struct { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(hscif0_ctrl), @@ -4210,6 +4228,7 @@ static const struct { SH_PFC_PIN_GROUP(i2c6_a), SH_PFC_PIN_GROUP(i2c6_b), SH_PFC_PIN_GROUP(i2c6_c), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), @@ -4328,6 +4347,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), BUS_DATA_PIN_GROUP(qspi0_data, 4), @@ -4389,6 +4409,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(sdhi3_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi01239_ctrl), SH_PFC_PIN_GROUP(ssi1_data_a), @@ -4414,6 +4435,7 @@ static const struct { SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(ssi9_ctrl_a), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tmu_tclk1_a), SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), @@ -4425,6 +4447,7 @@ static const struct { SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), SH_PFC_PIN_GROUP(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin4_data, 8, _a), BUS_DATA_PIN_GROUP(vin4_data, 10, _a), BUS_DATA_PIN_GROUP(vin4_data, 12, _a), @@ -4453,6 +4476,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_field), SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), +#endif }, #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) .automotive = { @@ -4491,6 +4515,7 @@ static const struct { #endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */ }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a_a", "audio_clk_a_b", @@ -4510,6 +4535,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout3_a", "audio_clkout3_b", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4525,6 +4551,7 @@ static const char * const avb_groups[] = { "avb_avtp_capture_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data_a", "can0_data_b", @@ -4546,6 +4573,7 @@ static const char * const canfd0_groups[] = { static const char * const canfd1_groups[] = { "canfd1_data", }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) static const char * const drif0_groups[] = { @@ -4591,6 +4619,7 @@ static const char * const drif3_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4601,6 +4630,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -4673,6 +4703,7 @@ static const char * const i2c6_groups[] = { "i2c6_c", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -4681,6 +4712,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) static const char * const mlb_3pin_groups[] = { @@ -4688,6 +4720,7 @@ static const char * const mlb_3pin_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4832,6 +4865,7 @@ static const char * const pwm6_groups[] = { "pwm6_a", "pwm6_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -4933,6 +4967,7 @@ static const char * const sdhi3_groups[] = { "sdhi3_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi01239_ctrl", @@ -4960,6 +4995,7 @@ static const char * const ssi_groups[] = { "ssi9_ctrl_a", "ssi9_ctrl_b", }; +#endif static const char * const tmu_groups[] = { "tmu_tclk1_a", @@ -4987,6 +5023,7 @@ static const char * const usb30_groups[] = { "usb30", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin4_groups[] = { "vin4_data8_a", "vin4_data10_a", @@ -5020,6 +5057,7 @@ static const char * const vin5_groups[] = { "vin5_clkenb", "vin5_clk", }; +#endif static const struct { struct sh_pfc_function common[52]; @@ -5028,14 +5066,18 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), @@ -5047,6 +5089,7 @@ static const struct { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), @@ -5059,6 +5102,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(scif0), @@ -5072,14 +5116,18 @@ static const struct { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(sdhi3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), +#endif }, #if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961) .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index 2852ae64ec0..97fde005de6 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -1572,6 +1572,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------ */ static const unsigned int audio_clk_a_a_pins[] = { /* CLK A */ @@ -1693,6 +1694,7 @@ static const unsigned int audio_clkout3_b_pins[] = { static const unsigned int audio_clkout3_b_mux[] = { AUDIO_CLKOUT3_B_MARK, }; +#endif /* - EtherAVB --------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { @@ -1780,6 +1782,7 @@ static const unsigned int avb_avtp_capture_b_mux[] = { AVB_AVTP_CAPTURE_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN ------------------------------------------------------------------ */ static const unsigned int can0_data_a_pins[] = { /* TX, RX */ @@ -1845,6 +1848,7 @@ static const unsigned int canfd1_data_pins[] = { static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77965 /* - DRIF0 --------------------------------------------------------------- */ @@ -2122,6 +2126,7 @@ static const unsigned int drif3_data1_b_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2217,6 +2222,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -2566,6 +2572,7 @@ static const unsigned int i2c6_c_mux[] = { SDA6_C_MARK, SCL6_C_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -2609,6 +2616,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77965 /* - MLB+ ------------------------------------------------------------------- */ @@ -2620,6 +2628,7 @@ static const unsigned int mlb_3pin_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -3416,6 +3425,7 @@ static const unsigned int pwm6_b_pins[] = { static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -3884,6 +3894,7 @@ static const unsigned int sdhi3_ds_mux[] = { SD3_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA */ @@ -4060,6 +4071,7 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif /* - TMU -------------------------------------------------------------------- */ static const unsigned int tmu_tclk1_a_pins[] = { @@ -4158,6 +4170,7 @@ static const unsigned int usb30_mux[] = { USB30_PWEN_MARK, USB30_OVC_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN4 ------------------------------------------------------------------- */ static const unsigned int vin4_data18_a_pins[] = { RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), @@ -4355,6 +4368,7 @@ static const unsigned int vin5_clk_pins[] = { static const unsigned int vin5_clk_mux[] = { VI5_CLK_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[326]; @@ -4363,6 +4377,7 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a_a), SH_PFC_PIN_GROUP(audio_clk_a_b), SH_PFC_PIN_GROUP(audio_clk_a_c), @@ -4380,6 +4395,7 @@ static const struct { SH_PFC_PIN_GROUP(audio_clkout2_b), SH_PFC_PIN_GROUP(audio_clkout3_a), SH_PFC_PIN_GROUP(audio_clkout3_b), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), @@ -4391,6 +4407,7 @@ static const struct { SH_PFC_PIN_GROUP(avb_avtp_capture_a), SH_PFC_PIN_GROUP(avb_avtp_match_b), SH_PFC_PIN_GROUP(avb_avtp_capture_b), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data_a), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can1_data), @@ -4406,6 +4423,7 @@ static const struct { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(hscif0_ctrl), @@ -4444,6 +4462,7 @@ static const struct { SH_PFC_PIN_GROUP(i2c6_a), SH_PFC_PIN_GROUP(i2c6_b), SH_PFC_PIN_GROUP(i2c6_c), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), @@ -4562,6 +4581,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), BUS_DATA_PIN_GROUP(qspi0_data, 4), @@ -4625,6 +4645,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(sdhi3_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi01239_ctrl), SH_PFC_PIN_GROUP(ssi1_data_a), @@ -4650,6 +4671,7 @@ static const struct { SH_PFC_PIN_GROUP(ssi9_data_b), SH_PFC_PIN_GROUP(ssi9_ctrl_a), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tmu_tclk1_a), SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), @@ -4661,6 +4683,7 @@ static const struct { SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), SH_PFC_PIN_GROUP(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin4_data, 8, _a), BUS_DATA_PIN_GROUP(vin4_data, 10, _a), BUS_DATA_PIN_GROUP(vin4_data, 12, _a), @@ -4689,6 +4712,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_field), SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77965 .automotive = { @@ -4727,6 +4751,7 @@ static const struct { #endif /* CONFIG_PINCTRL_PFC_R8A77965 */ }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a_a", "audio_clk_a_b", @@ -4746,6 +4771,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout3_a", "audio_clkout3_b", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4761,6 +4787,7 @@ static const char * const avb_groups[] = { "avb_avtp_capture_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data_a", "can0_data_b", @@ -4782,6 +4809,7 @@ static const char * const canfd0_groups[] = { static const char * const canfd1_groups[] = { "canfd1_data", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77965 static const char * const drif0_groups[] = { @@ -4827,6 +4855,7 @@ static const char * const drif3_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4837,6 +4866,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -4909,6 +4939,7 @@ static const char * const i2c6_groups[] = { "i2c6_c", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -4917,6 +4948,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77965 static const char * const mlb_3pin_groups[] = { @@ -4924,6 +4956,7 @@ static const char * const mlb_3pin_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77965 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -5068,6 +5101,7 @@ static const char * const pwm6_groups[] = { "pwm6_a", "pwm6_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -5173,6 +5207,7 @@ static const char * const sdhi3_groups[] = { "sdhi3_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi01239_ctrl", @@ -5200,6 +5235,7 @@ static const char * const ssi_groups[] = { "ssi9_ctrl_a", "ssi9_ctrl_b", }; +#endif static const char * const tmu_groups[] = { "tmu_tclk1_a", @@ -5227,6 +5263,7 @@ static const char * const usb30_groups[] = { "usb30", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin4_groups[] = { "vin4_data8_a", "vin4_data10_a", @@ -5260,6 +5297,7 @@ static const char * const vin5_groups[] = { "vin5_clkenb", "vin5_clk", }; +#endif static const struct { struct sh_pfc_function common[53]; @@ -5268,14 +5306,18 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), @@ -5287,6 +5329,7 @@ static const struct { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), @@ -5299,6 +5342,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), @@ -5313,14 +5357,18 @@ static const struct { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(sdhi3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77965 .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c index 00ebbbc7120..3a0a310c5fe 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77970.c +++ b/drivers/pinctrl/renesas/pfc-r8a77970.c @@ -817,6 +817,7 @@ static const unsigned int avb0_avtp_match_mux[] = { AVB0_AVTP_MATCH_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CANFD Clock ------------------------------------------------------------ */ static const unsigned int canfd_clk_a_pins[] = { /* CANFD_CLK */ @@ -911,6 +912,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -1056,6 +1058,7 @@ static const unsigned int i2c4_mux[] = { SDA4_MARK, SCL4_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -1099,6 +1102,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -1122,6 +1126,7 @@ static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -1367,6 +1372,7 @@ static const unsigned int pwm4_b_pins[] = { static const unsigned int pwm4_b_mux[] = { PWM4_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -1583,6 +1589,7 @@ static const unsigned int tmu_tclk2_b_mux[] = { TCLK2_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), @@ -1674,6 +1681,7 @@ static const unsigned int vin1_clk_mux[] = { /* CLK */ VI1_CLK_MARK, }; +#endif static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb0_link), @@ -1685,6 +1693,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb0_avtp_pps), SH_PFC_PIN_GROUP(avb0_avtp_capture), SH_PFC_PIN_GROUP(avb0_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(canfd_clk_a), SH_PFC_PIN_GROUP(canfd_clk_b), SH_PFC_PIN_GROUP(canfd0_data_a), @@ -1696,6 +1705,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), SH_PFC_PIN_GROUP(hscif0_ctrl), @@ -1714,16 +1724,19 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c3_a), SH_PFC_PIN_GROUP(i2c3_b), SH_PFC_PIN_GROUP(i2c4), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), SH_PFC_PIN_GROUP(mmc_ctrl), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -1758,6 +1771,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm3_b), SH_PFC_PIN_GROUP(pwm4_a), SH_PFC_PIN_GROUP(pwm4_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2), SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4), @@ -1790,6 +1804,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), SH_PFC_PIN_GROUP(tmu_tclk2_b), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 8), BUS_DATA_PIN_GROUP(vin0_data, 10), BUS_DATA_PIN_GROUP(vin0_data, 12), @@ -1804,6 +1819,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin1_field), SH_PFC_PIN_GROUP(vin1_clkenb), SH_PFC_PIN_GROUP(vin1_clk), +#endif }; static const char * const avb0_groups[] = { @@ -1818,6 +1834,7 @@ static const char * const avb0_groups[] = { "avb0_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const canfd_clk_groups[] = { "canfd_clk_a", "canfd_clk_b", @@ -1840,6 +1857,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -1886,6 +1904,7 @@ static const char * const i2c4_groups[] = { "i2c4", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -1894,6 +1913,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -1902,6 +1922,7 @@ static const char * const mmc_groups[] = { "mmc_ctrl", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -1962,6 +1983,7 @@ static const char * const pwm4_groups[] = { "pwm4_a", "pwm4_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -2022,6 +2044,7 @@ static const char * const tmu_groups[] = { "tmu_tclk2_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data8", "vin0_data10", @@ -2041,13 +2064,16 @@ static const char * const vin1_groups[] = { "vin1_clkenb", "vin1_clk", }; +#endif static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb0), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(canfd_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), @@ -2057,8 +2083,11 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c4), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -2068,6 +2097,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm3), SH_PFC_FUNCTION(pwm4), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(rpc), @@ -2077,8 +2107,10 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(scif3), SH_PFC_FUNCTION(scif4), SH_PFC_FUNCTION(tmu), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c index e3fc4045741..59f4bdde202 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77980.c +++ b/drivers/pinctrl/renesas/pfc-r8a77980.c @@ -929,6 +929,7 @@ static const unsigned int avb_avtp_match_mux[] = { AVB_AVTP_MATCH_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CANFD0 ----------------------------------------------------------------- */ static const unsigned int canfd0_data_a_pins[] = { /* CANFD0_TX, CANFD0_RX */ @@ -1046,6 +1047,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - GETHER ----------------------------------------------------------------- */ static const unsigned int gether_link_a_pins[] = { @@ -1319,6 +1321,7 @@ static const unsigned int i2c5_mux[] = { SDA5_MARK, SCL5_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -1362,6 +1365,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -1406,6 +1410,7 @@ static const unsigned int mmc_ds_mux[] = { MMC_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* MSIOF0_SCK */ @@ -1661,6 +1666,7 @@ static const unsigned int pwm4_b_pins[] = { static const unsigned int pwm4_b_mux[] = { PWM4_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -1907,6 +1913,7 @@ static const unsigned int tpu_to3_mux[] = { TPU0TO3_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN0 ------------------------------------------------------------------- */ static const unsigned int vin0_data_pins[] = { RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), @@ -2032,6 +2039,7 @@ static const unsigned int vin1_clk_pins[] = { static const unsigned int vin1_clk_mux[] = { VI1_CLK_MARK, }; +#endif static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_link), @@ -2043,6 +2051,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_avtp_pps), SH_PFC_PIN_GROUP(avb_avtp_capture), SH_PFC_PIN_GROUP(avb_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(canfd0_data_a), SH_PFC_PIN_GROUP(canfd0_data_b), SH_PFC_PIN_GROUP(canfd1_data), @@ -2055,6 +2064,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_oddf), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(gether_link_a), SH_PFC_PIN_GROUP(gether_phy_int_a), SH_PFC_PIN_GROUP(gether_mdio_a), @@ -2087,12 +2097,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c3), SH_PFC_PIN_GROUP(i2c4), SH_PFC_PIN_GROUP(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), @@ -2100,6 +2112,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_cd), SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(mmc_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -2134,6 +2147,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm3_b), SH_PFC_PIN_GROUP(pwm4_a), SH_PFC_PIN_GROUP(pwm4_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2), SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4), @@ -2170,6 +2184,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(tpu_to1), SH_PFC_PIN_GROUP(tpu_to2), SH_PFC_PIN_GROUP(tpu_to3), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin0_data, 8), BUS_DATA_PIN_GROUP(vin0_data, 10), BUS_DATA_PIN_GROUP(vin0_data, 12), @@ -2188,6 +2203,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin1_field), SH_PFC_PIN_GROUP(vin1_clkenb), SH_PFC_PIN_GROUP(vin1_clk), +#endif }; static const char * const avb_groups[] = { @@ -2202,6 +2218,7 @@ static const char * const avb_groups[] = { "avb_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const canfd0_groups[] = { "canfd0_data_a", "canfd0_data_b", @@ -2225,6 +2242,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const gether_groups[] = { "gether_link_a", @@ -2291,6 +2309,7 @@ static const char * const i2c5_groups[] = { "i2c5", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -2299,6 +2318,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -2310,6 +2330,7 @@ static const char * const mmc_groups[] = { "mmc_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -2370,6 +2391,7 @@ static const char * const pwm4_groups[] = { "pwm4_a", "pwm4_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -2437,6 +2459,7 @@ static const char * const tpu_groups[] = { "tpu_to3", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin0_groups[] = { "vin0_data8", "vin0_data10", @@ -2460,13 +2483,16 @@ static const char * const vin1_groups[] = { "vin1_clkenb", "vin1_clk", }; +#endif static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(canfd_clk), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(gether), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -2478,8 +2504,11 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c4), SH_PFC_FUNCTION(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -2489,6 +2518,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm3), SH_PFC_FUNCTION(pwm4), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(rpc), @@ -2499,8 +2529,10 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(tpu), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index e3a9c5e053d..75b7429bc0d 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -1314,6 +1314,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { /* CLK A */ @@ -1476,6 +1477,7 @@ static const unsigned int audio_clkout3_c_pins[] = { static const unsigned int audio_clkout3_c_mux[] = { AUDIO_CLKOUT3_C_MARK, }; +#endif /* - EtherAVB --------------------------------------------------------------- */ static const unsigned int avb_link_pins[] = { @@ -1549,6 +1551,7 @@ static const unsigned int avb_avtp_capture_mux[] = { AVB_AVTP_CAPTURE_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN ------------------------------------------------------------------ */ static const unsigned int can0_data_pins[] = { /* TX, RX */ @@ -1596,6 +1599,7 @@ static const unsigned int canfd1_data_pins[] = { static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77990 /* - DRIF0 --------------------------------------------------------------- */ @@ -1792,6 +1796,7 @@ static const unsigned int drif3_data1_b_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77990 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -1879,6 +1884,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - HSCIF0 --------------------------------------------------*/ static const unsigned int hscif0_data_a_pins[] = { @@ -2300,6 +2306,7 @@ static const unsigned int i2c7_b_mux[] = { SCL7_B_MARK, SDA7_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -2343,6 +2350,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77990 /* - MLB+ ------------------------------------------------------------------- */ @@ -2354,6 +2362,7 @@ static const unsigned int mlb_3pin_mux[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77990 */ +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -2823,6 +2832,7 @@ static const unsigned int pwm6_b_pins[] = { static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -3293,6 +3303,7 @@ static const unsigned int sdhi3_ds_mux[] = { SD3_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI -------------------------------------------------------------------- */ static const unsigned int ssi0_data_pins[] = { /* SDATA */ @@ -3482,6 +3493,7 @@ static const unsigned int ssi9_ctrl_b_pins[] = { static const unsigned int ssi9_ctrl_b_mux[] = { SSI_SCK9_B_MARK, SSI_WS9_B_MARK, }; +#endif /* - TMU -------------------------------------------------------------------- */ static const unsigned int tmu_tclk1_a_pins[] = { @@ -3567,6 +3579,7 @@ static const unsigned int usb30_id_mux[] = { USB3HS0_ID_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN4 ------------------------------------------------------------------- */ static const unsigned int vin4_data18_a_pins[] = { RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), @@ -3786,6 +3799,7 @@ static const unsigned int vin5_clk_b_pins[] = { static const unsigned int vin5_clk_b_mux[] = { VI5_CLK_B_MARK, }; +#endif static const struct { struct sh_pfc_pin_group common[261]; @@ -3794,6 +3808,7 @@ static const struct { #endif } pinmux_groups = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a), SH_PFC_PIN_GROUP(audio_clk_b_a), SH_PFC_PIN_GROUP(audio_clk_b_b), @@ -3812,6 +3827,7 @@ static const struct { SH_PFC_PIN_GROUP(audio_clkout3_a), SH_PFC_PIN_GROUP(audio_clkout3_b), SH_PFC_PIN_GROUP(audio_clkout3_c), +#endif SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), SH_PFC_PIN_GROUP(avb_phy_int), @@ -3819,6 +3835,7 @@ static const struct { SH_PFC_PIN_GROUP(avb_avtp_pps), SH_PFC_PIN_GROUP(avb_avtp_match), SH_PFC_PIN_GROUP(avb_avtp_capture), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can1_data), SH_PFC_PIN_GROUP(can_clk), @@ -3833,6 +3850,7 @@ static const struct { SH_PFC_PIN_GROUP(du_disp_cde), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(hscif0_data_a), SH_PFC_PIN_GROUP(hscif0_clk_a), SH_PFC_PIN_GROUP(hscif0_ctrl_a), @@ -3879,6 +3897,7 @@ static const struct { SH_PFC_PIN_GROUP(i2c6_b), SH_PFC_PIN_GROUP(i2c7_a), SH_PFC_PIN_GROUP(i2c7_b), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), @@ -3936,6 +3955,7 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2), SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4), @@ -3995,6 +4015,7 @@ static const struct { SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(sdhi3_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi0_data), SH_PFC_PIN_GROUP(ssi01239_ctrl), SH_PFC_PIN_GROUP(ssi1_data), @@ -4016,6 +4037,7 @@ static const struct { SH_PFC_PIN_GROUP(ssi9_data), SH_PFC_PIN_GROUP(ssi9_ctrl_a), SH_PFC_PIN_GROUP(ssi9_ctrl_b), +#endif SH_PFC_PIN_GROUP(tmu_tclk1_a), SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), @@ -4025,6 +4047,7 @@ static const struct { SH_PFC_PIN_GROUP(usb0_id), SH_PFC_PIN_GROUP(usb30), SH_PFC_PIN_GROUP(usb30_id), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin4_data, 8, _a), BUS_DATA_PIN_GROUP(vin4_data, 10, _a), BUS_DATA_PIN_GROUP(vin4_data, 12, _a), @@ -4055,6 +4078,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_clkenb_a), SH_PFC_PIN_GROUP(vin5_clk_a), SH_PFC_PIN_GROUP(vin5_clk_b), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77990 .automotive = { @@ -4084,6 +4108,7 @@ static const struct { #endif /* CONFIG_PINCTRL_PFC_R8A77990 */ }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a", "audio_clk_b_a", @@ -4104,6 +4129,7 @@ static const char * const audio_clk_groups[] = { "audio_clkout3_b", "audio_clkout3_c", }; +#endif static const char * const avb_groups[] = { "avb_link", @@ -4115,6 +4141,7 @@ static const char * const avb_groups[] = { "avb_avtp_capture", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data", }; @@ -4134,6 +4161,7 @@ static const char * const canfd0_groups[] = { static const char * const canfd1_groups[] = { "canfd1_data", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77990 static const char * const drif0_groups[] = { @@ -4170,6 +4198,7 @@ static const char * const drif3_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77990 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4181,6 +4210,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data_a", @@ -4261,6 +4291,7 @@ static const char * const i2c7_groups[] = { "i2c7_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -4269,6 +4300,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77990 static const char * const mlb_3pin_groups[] = { @@ -4276,6 +4308,7 @@ static const char * const mlb_3pin_groups[] = { }; #endif /* CONFIG_PINCTRL_PFC_R8A77990 */ +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -4359,6 +4392,7 @@ static const char * const pwm6_groups[] = { "pwm6_a", "pwm6_b", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -4458,6 +4492,7 @@ static const char * const sdhi3_groups[] = { "sdhi3_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi0_data", "ssi01239_ctrl", @@ -4481,6 +4516,7 @@ static const char * const ssi_groups[] = { "ssi9_ctrl_a", "ssi9_ctrl_b", }; +#endif static const char * const tmu_groups[] = { "tmu_tclk1_a", @@ -4500,6 +4536,7 @@ static const char * const usb30_groups[] = { "usb30_id", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin4_groups[] = { "vin4_data8_a", "vin4_data10_a", @@ -4535,6 +4572,7 @@ static const char * const vin5_groups[] = { "vin5_clk_a", "vin5_clk_b", }; +#endif static const struct { struct sh_pfc_function common[50]; @@ -4543,14 +4581,18 @@ static const struct { #endif } pinmux_functions = { .common = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(hscif2), @@ -4562,6 +4604,7 @@ static const struct { SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), SH_PFC_FUNCTION(i2c7), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), @@ -4574,6 +4617,7 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(rpc), @@ -4587,12 +4631,16 @@ static const struct { SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tmu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb30), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), +#endif }, #ifdef CONFIG_PINCTRL_PFC_R8A77990 .automotive = { diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c index d3e2d842fa5..6fe2d743418 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -955,6 +955,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ------------------------------------------------------------- */ static const unsigned int audio_clk_a_pins[] = { /* CLK A */ @@ -984,6 +985,7 @@ static const unsigned int audio_clkout1_pins[] = { static const unsigned int audio_clkout1_mux[] = { AUDIO_CLKOUT1_MARK, }; +#endif /* - EtherAVB --------------------------------------------------------------- */ static const unsigned int avb0_link_pins[] = { @@ -1078,6 +1080,7 @@ static const unsigned int avb0_avtp_capture_b_mux[] = { AVB0_AVTP_CAPTURE_B_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CAN ------------------------------------------------------------------ */ static const unsigned int can0_data_a_pins[] = { /* TX, RX */ @@ -1213,6 +1216,7 @@ static const unsigned int du_disp_pins[] = { static const unsigned int du_disp_mux[] = { DU_DISP_MARK, }; +#endif /* - I2C -------------------------------------------------------------------- */ static const unsigned int i2c0_pins[] = { @@ -1288,6 +1292,7 @@ static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* SCK */ @@ -1682,6 +1687,7 @@ static const unsigned int pwm3_c_pins[] = { static const unsigned int pwm3_c_mux[] = { PWM3_C_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -1929,6 +1935,7 @@ static const unsigned int scif_clk_mux[] = { SCIF_CLK_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI ---------------------------------------------------------------*/ static const unsigned int ssi3_data_pins[] = { /* SDATA */ @@ -1972,6 +1979,7 @@ static const unsigned int ssi4_data_b_pins[] = { static const unsigned int ssi4_data_b_mux[] = { SSI_SDATA4_B_MARK, }; +#endif /* - USB0 ------------------------------------------------------------------- */ static const unsigned int usb0_pins[] = { @@ -1982,6 +1990,7 @@ static const unsigned int usb0_mux[] = { USB0_PWEN_MARK, USB0_OVC_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - VIN4 ------------------------------------------------------------------- */ static const unsigned int vin4_data18_pins[] = { RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), @@ -2061,12 +2070,15 @@ static const unsigned int vin4_clk_pins[] = { static const unsigned int vin4_clk_mux[] = { VI4_CLK_MARK, }; +#endif static const struct sh_pfc_pin_group pinmux_groups[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clk_a), SH_PFC_PIN_GROUP(audio_clk_b), SH_PFC_PIN_GROUP(audio_clkout), SH_PFC_PIN_GROUP(audio_clkout1), +#endif SH_PFC_PIN_GROUP(avb0_link), SH_PFC_PIN_GROUP(avb0_magic), SH_PFC_PIN_GROUP(avb0_phy_int), @@ -2079,6 +2091,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb0_avtp_pps_b), SH_PFC_PIN_GROUP(avb0_avtp_match_b), SH_PFC_PIN_GROUP(avb0_avtp_capture_b), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(can0_data_a), SH_PFC_PIN_GROUP(can0_data_b), SH_PFC_PIN_GROUP(can1_data_a), @@ -2094,6 +2107,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_disp_cde), SH_PFC_PIN_GROUP(du_cde), SH_PFC_PIN_GROUP(du_disp), +#endif SH_PFC_PIN_GROUP(i2c0), SH_PFC_PIN_GROUP(i2c1), SH_PFC_PIN_GROUP(i2c2_a), @@ -2105,6 +2119,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), SH_PFC_PIN_GROUP(mmc_ctrl), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -2148,6 +2163,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm3_a), SH_PFC_PIN_GROUP(pwm3_b), SH_PFC_PIN_GROUP(pwm3_c), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2), SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4), @@ -2185,13 +2201,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif5_data_b), SH_PFC_PIN_GROUP(scif5_clk_b), SH_PFC_PIN_GROUP(scif_clk), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi3_data), SH_PFC_PIN_GROUP(ssi34_ctrl), SH_PFC_PIN_GROUP(ssi4_ctrl_a), SH_PFC_PIN_GROUP(ssi4_data_a), SH_PFC_PIN_GROUP(ssi4_ctrl_b), SH_PFC_PIN_GROUP(ssi4_data_b), +#endif SH_PFC_PIN_GROUP(usb0), +#ifdef CONFIG_PINCTRL_PFC_FULL BUS_DATA_PIN_GROUP(vin4_data, 8), BUS_DATA_PIN_GROUP(vin4_data, 10), BUS_DATA_PIN_GROUP(vin4_data, 12), @@ -2203,14 +2222,17 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin4_field), SH_PFC_PIN_GROUP(vin4_clkenb), SH_PFC_PIN_GROUP(vin4_clk), +#endif }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clk_a", "audio_clk_b", "audio_clkout", "audio_clkout1", }; +#endif static const char * const avb0_groups[] = { "avb0_link", @@ -2227,6 +2249,7 @@ static const char * const avb0_groups[] = { "avb0_avtp_capture_b", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const can0_groups[] = { "can0_data_a", "can0_data_b", @@ -2256,6 +2279,7 @@ static const char * const du_groups[] = { "du_cde", "du_disp", }; +#endif static const char * const i2c0_groups[] = { "i2c0", @@ -2285,6 +2309,7 @@ static const char * const mmc_groups[] = { "mmc_ctrl", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -2351,6 +2376,7 @@ static const char * const pwm3_groups[] = { "pwm3_b", "pwm3_c", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -2419,6 +2445,7 @@ static const char * const scif_clk_groups[] = { "scif_clk", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi3_data", "ssi34_ctrl", @@ -2427,11 +2454,13 @@ static const char * const ssi_groups[] = { "ssi4_ctrl_b", "ssi4_data_b", }; +#endif static const char * const usb0_groups[] = { "usb0", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const vin4_groups[] = { "vin4_data8", "vin4_data10", @@ -2445,22 +2474,28 @@ static const char * const vin4_groups[] = { "vin4_clkenb", "vin4_clk", }; +#endif static const struct sh_pfc_function pinmux_functions[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb0), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(i2c0), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(mlb_3pin), SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -2469,6 +2504,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm3), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(rpc), @@ -2479,9 +2515,13 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(scif4), SH_PFC_FUNCTION(scif5), SH_PFC_FUNCTION(scif_clk), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(usb0), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(vin4), +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c index 6f898385027..39690bd5d07 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c @@ -1697,6 +1697,7 @@ static const unsigned int avb5_avtp_match_mux[] = { AVB5_AVTP_MATCH_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CANFD0 ----------------------------------------------------------------- */ static const unsigned int canfd0_data_pins[] = { /* CANFD0_TX, CANFD0_RX */ @@ -1817,6 +1818,7 @@ static const unsigned int du_oddf_pins[] = { static const unsigned int du_oddf_mux[] = { DU_ODDF_DISP_CDE_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -1973,6 +1975,7 @@ static const unsigned int i2c6_mux[] = { SDA6_MARK, SCL6_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -2016,6 +2019,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -2060,6 +2064,7 @@ static const unsigned int mmc_ds_mux[] = { MMC_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* MSIOF0_SCK */ @@ -2368,6 +2373,7 @@ static const unsigned int pwm4_pins[] = { static const unsigned int pwm4_mux[] = { PWM4_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -2651,6 +2657,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb5_avtp_capture), SH_PFC_PIN_GROUP(avb5_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(canfd0_data), SH_PFC_PIN_GROUP(canfd1_data), SH_PFC_PIN_GROUP(canfd2_data), @@ -2665,6 +2672,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(du_clk_out), SH_PFC_PIN_GROUP(du_sync), SH_PFC_PIN_GROUP(du_oddf), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), @@ -2687,12 +2695,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c5), SH_PFC_PIN_GROUP(i2c6), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), @@ -2702,6 +2712,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(mmc_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -2744,6 +2755,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm2), SH_PFC_PIN_GROUP(pwm3), SH_PFC_PIN_GROUP(pwm4), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), @@ -2852,6 +2864,7 @@ static const char * const avb5_groups[] = { "avb5_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const canfd0_groups[] = { "canfd0_data", }; @@ -2894,6 +2907,7 @@ static const char * const du_groups[] = { "du_sync", "du_oddf", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -2947,6 +2961,7 @@ static const char * const i2c6_groups[] = { "i2c6", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -2955,6 +2970,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -2966,6 +2982,7 @@ static const char * const mmc_groups[] = { "mmc_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -3039,6 +3056,7 @@ static const char * const pwm3_groups[] = { static const char * const pwm4_groups[] = { "pwm4", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -3105,6 +3123,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb4), SH_PFC_FUNCTION(avb5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(canfd2), @@ -3116,6 +3135,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -3130,10 +3150,13 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c5), SH_PFC_FUNCTION(i2c6), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), @@ -3146,6 +3169,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm3), SH_PFC_FUNCTION(pwm4), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), diff --git a/drivers/pinctrl/renesas/pfc-r8a779f0.c b/drivers/pinctrl/renesas/pfc-r8a779f0.c index eec50210d92..2b629135f69 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779f0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779f0.c @@ -654,6 +654,7 @@ static const unsigned int i2c5_mux[] = { SDA5_MARK, SCL5_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_pins[] = { /* IRQ0 */ @@ -697,6 +698,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -741,6 +743,7 @@ static const unsigned int mmc_ds_mux[] = { MMC_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* MSIOF0_SCK */ @@ -916,6 +919,7 @@ static const unsigned int msiof3_rxd_pins[] = { static const unsigned int msiof3_rxd_mux[] = { MSIOF3_RXD_MARK, }; +#endif /* - PCIE ------------------------------------------------------------------- */ static const unsigned int pcie0_clkreq_n_pins[] = { @@ -1308,12 +1312,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c3), SH_PFC_PIN_GROUP(i2c4), SH_PFC_PIN_GROUP(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0), SH_PFC_PIN_GROUP(intc_ex_irq1), SH_PFC_PIN_GROUP(intc_ex_irq2), SH_PFC_PIN_GROUP(intc_ex_irq3), SH_PFC_PIN_GROUP(intc_ex_irq4), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), BUS_DATA_PIN_GROUP(mmc_data, 8), @@ -1321,6 +1327,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_cd), SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(mmc_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -1345,6 +1352,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof3_ss2), SH_PFC_PIN_GROUP(msiof3_txd), SH_PFC_PIN_GROUP(msiof3_rxd), +#endif SH_PFC_PIN_GROUP(pcie0_clkreq_n), SH_PFC_PIN_GROUP(pcie1_clkreq_n), SH_PFC_PIN_GROUP(qspi0_ctrl), @@ -1446,6 +1454,7 @@ static const char * const i2c5_groups[] = { "i2c5", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0", "intc_ex_irq1", @@ -1454,6 +1463,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -1465,6 +1475,7 @@ static const char * const mmc_groups[] = { "mmc_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -1500,6 +1511,7 @@ static const char * const msiof3_groups[] = { "msiof3_txd", "msiof3_rxd", }; +#endif static const char * const pcie_groups[] = { "pcie0_clkreq_n", @@ -1596,12 +1608,16 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c3), SH_PFC_FUNCTION(i2c4), SH_PFC_FUNCTION(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), +#endif SH_PFC_FUNCTION(pcie), SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c index 2a39d1c8884..f411be8b879 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c @@ -1237,6 +1237,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ----------------------------------------- */ static const unsigned int audio_clkin_pins[] = { /* CLK IN */ @@ -1252,6 +1253,7 @@ static const unsigned int audio_clkout_pins[] = { static const unsigned int audio_clkout_mux[] = { AUDIO_CLKOUT_MARK, }; +#endif /* - AVB0 ------------------------------------------------ */ static const unsigned int avb0_link_pins[] = { @@ -1487,6 +1489,7 @@ static const unsigned int avb2_avtp_match_mux[] = { AVB2_AVTP_MATCH_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CANFD0 ----------------------------------------------------------------- */ static const unsigned int canfd0_data_pins[] = { /* CANFD0_TX, CANFD0_RX */ @@ -1575,6 +1578,7 @@ static const unsigned int can_clk_pins[] = { static const unsigned int can_clk_mux[] = { CAN_CLK_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -1766,6 +1770,7 @@ static const unsigned int i2c5_mux[] = { SDA5_MARK, SCL5_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_a_pins[] = { /* IRQ0_A */ @@ -1849,6 +1854,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -1893,6 +1899,7 @@ static const unsigned int mmc_ds_mux[] = { MMC_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* MSIOF0_SCK */ @@ -2156,6 +2163,7 @@ static const unsigned int msiof5_rxd_pins[] = { static const unsigned int msiof5_rxd_mux[] = { MSIOF5_RXD_MARK, }; +#endif /* - PCIE ------------------------------------------------------------------- */ static const unsigned int pcie0_clkreq_n_pins[] = { @@ -2176,6 +2184,7 @@ static const unsigned int pcie1_clkreq_n_mux[] = { PCIE1_CLKREQ_N_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - PWM0 ------------------------------------------------------------------- */ static const unsigned int pwm0_pins[] = { /* PWM0 */ @@ -2281,6 +2290,7 @@ static const unsigned int pwm9_pins[] = { static const unsigned int pwm9_mux[] = { PWM9_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -2471,6 +2481,7 @@ static const unsigned int scif_clk2_mux[] = { SCIF_CLK2_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI ------------------------------------------------- */ static const unsigned int ssi_data_pins[] = { /* SSI_SD */ @@ -2486,6 +2497,7 @@ static const unsigned int ssi_ctrl_pins[] = { static const unsigned int ssi_ctrl_mux[] = { SSI_SCK_MARK, SSI_WS_MARK, }; +#endif /* - TPU -------------------------------------------------------------------- */ static const unsigned int tpu_to0_a_pins[] = { @@ -2618,9 +2630,10 @@ static const unsigned int tsn0_avtp_match_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clkin), SH_PFC_PIN_GROUP(audio_clkout), - +#endif SH_PFC_PIN_GROUP(avb0_link), SH_PFC_PIN_GROUP(avb0_magic), SH_PFC_PIN_GROUP(avb0_phy_int), @@ -2651,6 +2664,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb2_avtp_capture), SH_PFC_PIN_GROUP(avb2_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(canfd0_data), SH_PFC_PIN_GROUP(canfd1_data), SH_PFC_PIN_GROUP(canfd2_data), @@ -2661,6 +2675,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(canfd6_data), SH_PFC_PIN_GROUP(canfd7_data), SH_PFC_PIN_GROUP(can_clk), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), @@ -2688,6 +2703,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c4), SH_PFC_PIN_GROUP(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0_a), SH_PFC_PIN_GROUP(intc_ex_irq0_b), SH_PFC_PIN_GROUP(intc_ex_irq1_a), @@ -2699,6 +2715,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(intc_ex_irq4_a), SH_PFC_PIN_GROUP(intc_ex_irq4_b), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), @@ -2708,6 +2725,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(mmc_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -2749,10 +2767,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof5_ss2), SH_PFC_PIN_GROUP(msiof5_txd), SH_PFC_PIN_GROUP(msiof5_rxd), +#endif SH_PFC_PIN_GROUP(pcie0_clkreq_n), SH_PFC_PIN_GROUP(pcie1_clkreq_n), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(pwm0), SH_PFC_PIN_GROUP(pwm1_a), SH_PFC_PIN_GROUP(pwm1_b), @@ -2765,6 +2785,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm7), SH_PFC_PIN_GROUP(pwm8), SH_PFC_PIN_GROUP(pwm9), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), @@ -2794,8 +2815,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif_clk), SH_PFC_PIN_GROUP(scif_clk2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi_data), SH_PFC_PIN_GROUP(ssi_ctrl), +#endif SH_PFC_PIN_GROUP(tpu_to0_a), SH_PFC_PIN_GROUP(tpu_to0_b), @@ -2816,10 +2839,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(tsn0_avtp_match), }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clkin", "audio_clkout", }; +#endif static const char * const avb0_groups[] = { "avb0_link", @@ -2857,6 +2882,7 @@ static const char * const avb2_groups[] = { "avb2_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const canfd0_groups[] = { "canfd0_data", }; @@ -2893,6 +2919,7 @@ static const char * const canfd7_groups[] = { static const char * const can_clk_groups[] = { "can_clk", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -2948,6 +2975,7 @@ static const char * const i2c5_groups[] = { "i2c5", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0_a", "intc_ex_irq0_b", @@ -2961,6 +2989,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4_b", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -2972,6 +3001,7 @@ static const char * const mmc_groups[] = { "mmc_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -3025,12 +3055,14 @@ static const char * const msiof5_groups[] = { "msiof5_txd", "msiof5_rxd", }; +#endif static const char * const pcie_groups[] = { "pcie0_clkreq_n", "pcie1_clkreq_n", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const pwm0_groups[] = { "pwm0", }; @@ -3072,6 +3104,7 @@ static const char * const pwm8_groups[] = { static const char * const pwm9_groups[] = { "pwm9", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -3123,10 +3156,12 @@ static const char * const scif_clk2_groups[] = { "scif_clk2", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi_data", "ssi_ctrl", }; +#endif static const char * const tpu_groups[] = { "tpu_to0_a", @@ -3151,12 +3186,15 @@ static const char * const tsn0_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb0), SH_PFC_FUNCTION(avb1), SH_PFC_FUNCTION(avb2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(canfd2), @@ -3166,6 +3204,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(canfd6), SH_PFC_FUNCTION(canfd7), SH_PFC_FUNCTION(can_clk), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -3179,19 +3218,24 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c4), SH_PFC_FUNCTION(i2c5), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), SH_PFC_FUNCTION(msiof4), SH_PFC_FUNCTION(msiof5), +#endif SH_PFC_FUNCTION(pcie), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(pwm0), SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm2), @@ -3202,6 +3246,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm7), SH_PFC_FUNCTION(pwm8), SH_PFC_FUNCTION(pwm9), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), @@ -3213,7 +3258,9 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(scif_clk2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tpu), diff --git a/drivers/pinctrl/renesas/pfc-r8a779h0.c b/drivers/pinctrl/renesas/pfc-r8a779h0.c index bfabf0c379a..87af037a8d3 100644 --- a/drivers/pinctrl/renesas/pfc-r8a779h0.c +++ b/drivers/pinctrl/renesas/pfc-r8a779h0.c @@ -1193,6 +1193,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_NOGP_ALL(), }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - AUDIO CLOCK ----------------------------------------- */ static const unsigned int audio_clkin_pins[] = { /* CLK IN */ @@ -1208,6 +1209,7 @@ static const unsigned int audio_clkout_pins[] = { static const unsigned int audio_clkout_mux[] = { AUDIO_CLKOUT_MARK, }; +#endif /* - AVB0 ------------------------------------------------ */ static const unsigned int avb0_link_pins[] = { @@ -1491,6 +1493,7 @@ static const unsigned int avb2_avtp_match_mux[] = { AVB2_AVTP_MATCH_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - CANFD0 ----------------------------------------------------------------- */ static const unsigned int canfd0_data_pins[] = { /* CANFD0_TX, CANFD0_RX */ @@ -1535,6 +1538,7 @@ static const unsigned int can_clk_pins[] = { static const unsigned int can_clk_mux[] = { CAN_CLK_MARK, }; +#endif /* - HSCIF0 ----------------------------------------------------------------- */ static const unsigned int hscif0_data_pins[] = { @@ -1708,6 +1712,7 @@ static const unsigned int i2c3_mux[] = { SDA3_MARK, SCL3_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - INTC-EX ---------------------------------------------------------------- */ static const unsigned int intc_ex_irq0_a_pins[] = { /* IRQ0_A */ @@ -1791,6 +1796,7 @@ static const unsigned int intc_ex_irq5_pins[] = { static const unsigned int intc_ex_irq5_mux[] = { IRQ5_MARK, }; +#endif /* - MMC -------------------------------------------------------------------- */ static const unsigned int mmc_data_pins[] = { @@ -1835,6 +1841,7 @@ static const unsigned int mmc_ds_mux[] = { MMC_DS_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { /* MSIOF0_SCK */ @@ -2098,6 +2105,7 @@ static const unsigned int msiof5_rxd_pins[] = { static const unsigned int msiof5_rxd_mux[] = { MSIOF5_RXD_MARK, }; +#endif /* - PCIE ------------------------------------------------------------------- */ static const unsigned int pcie0_clkreq_n_pins[] = { @@ -2109,6 +2117,7 @@ static const unsigned int pcie0_clkreq_n_mux[] = { PCIE0_CLKREQ_N_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - PWM0 --------------------------------------------------------------------- */ static const unsigned int pwm0_a_pins[] = { /* PWM0_A */ @@ -2209,6 +2218,7 @@ static const unsigned int pwm4_pins[] = { static const unsigned int pwm4_mux[] = { PWM4_MARK, }; +#endif /* - QSPI0 ------------------------------------------------------------------ */ static const unsigned int qspi0_ctrl_pins[] = { @@ -2399,6 +2409,7 @@ static const unsigned int scif_clk2_mux[] = { SCIF_CLK2_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_FULL /* - SSI ------------------------------------------------- */ static const unsigned int ssi_data_pins[] = { /* SSI_SD */ @@ -2414,6 +2425,7 @@ static const unsigned int ssi_ctrl_pins[] = { static const unsigned int ssi_ctrl_mux[] = { SSI_SCK_MARK, SSI_WS_MARK, }; +#endif /* - TPU --------------------------------------------------------------------- */ static const unsigned int tpu_to0_a_pins[] = { @@ -2475,8 +2487,10 @@ static const unsigned int tpu_to3_b_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(audio_clkin), SH_PFC_PIN_GROUP(audio_clkout), +#endif SH_PFC_PIN_GROUP(avb0_link), SH_PFC_PIN_GROUP(avb0_magic), @@ -2510,11 +2524,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb2_avtp_capture), SH_PFC_PIN_GROUP(avb2_avtp_match), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(canfd0_data), SH_PFC_PIN_GROUP(canfd1_data), SH_PFC_PIN_GROUP(canfd2_data), SH_PFC_PIN_GROUP(canfd3_data), SH_PFC_PIN_GROUP(can_clk), +#endif SH_PFC_PIN_GROUP(hscif0_data), SH_PFC_PIN_GROUP(hscif0_clk), @@ -2540,6 +2556,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(i2c2), SH_PFC_PIN_GROUP(i2c3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(intc_ex_irq0_a), SH_PFC_PIN_GROUP(intc_ex_irq0_b), SH_PFC_PIN_GROUP(intc_ex_irq1_a), @@ -2551,6 +2568,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(intc_ex_irq4_a), SH_PFC_PIN_GROUP(intc_ex_irq4_b), SH_PFC_PIN_GROUP(intc_ex_irq5), +#endif BUS_DATA_PIN_GROUP(mmc_data, 1), BUS_DATA_PIN_GROUP(mmc_data, 4), @@ -2560,6 +2578,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(mmc_ds), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -2601,9 +2620,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof5_ss2), SH_PFC_PIN_GROUP(msiof5_txd), SH_PFC_PIN_GROUP(msiof5_rxd), +#endif SH_PFC_PIN_GROUP(pcie0_clkreq_n), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(pwm0_a), SH_PFC_PIN_GROUP(pwm0_b), SH_PFC_PIN_GROUP(pwm1_a), @@ -2616,6 +2637,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(pwm3_b), SH_PFC_PIN_GROUP(pwm3_c), SH_PFC_PIN_GROUP(pwm4), +#endif SH_PFC_PIN_GROUP(qspi0_ctrl), BUS_DATA_PIN_GROUP(qspi0_data, 2), @@ -2645,8 +2667,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif_clk), SH_PFC_PIN_GROUP(scif_clk2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_PIN_GROUP(ssi_data), SH_PFC_PIN_GROUP(ssi_ctrl), +#endif SH_PFC_PIN_GROUP(tpu_to0_a), SH_PFC_PIN_GROUP(tpu_to0_b), @@ -2658,10 +2682,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(tpu_to3_b), }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const audio_clk_groups[] = { "audio_clkin", "audio_clkout", }; +#endif static const char * const avb0_groups[] = { "avb0_link", @@ -2701,6 +2727,7 @@ static const char * const avb2_groups[] = { "avb2_avtp_match", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const canfd0_groups[] = { "canfd0_data", }; @@ -2720,6 +2747,7 @@ static const char * const canfd3_groups[] = { static const char * const can_clk_groups[] = { "can_clk", }; +#endif static const char * const hscif0_groups[] = { "hscif0_data", @@ -2767,6 +2795,7 @@ static const char * const i2c3_groups[] = { "i2c3", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const intc_ex_groups[] = { "intc_ex_irq0_a", "intc_ex_irq0_b", @@ -2780,6 +2809,7 @@ static const char * const intc_ex_groups[] = { "intc_ex_irq4_b", "intc_ex_irq5", }; +#endif static const char * const mmc_groups[] = { "mmc_data1", @@ -2791,6 +2821,7 @@ static const char * const mmc_groups[] = { "mmc_ds", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const msiof0_groups[] = { "msiof0_clk", "msiof0_sync", @@ -2844,11 +2875,13 @@ static const char * const msiof5_groups[] = { "msiof5_txd", "msiof5_rxd", }; +#endif static const char * const pcie_groups[] = { "pcie0_clkreq_n", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const pwm0_groups[] = { "pwm0_a", "pwm0_b", @@ -2875,6 +2908,7 @@ static const char * const pwm3_groups[] = { static const char * const pwm4_groups[] = { "pwm4", }; +#endif static const char * const qspi0_groups[] = { "qspi0_ctrl", @@ -2926,10 +2960,12 @@ static const char * const scif_clk2_groups[] = { "scif_clk2", }; +#ifdef CONFIG_PINCTRL_PFC_FULL static const char * const ssi_groups[] = { "ssi_data", "ssi_ctrl", }; +#endif static const char * const tpu_groups[] = { "tpu_to0_a", @@ -2943,17 +2979,21 @@ static const char * const tpu_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(audio_clk), +#endif SH_PFC_FUNCTION(avb0), SH_PFC_FUNCTION(avb1), SH_PFC_FUNCTION(avb2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(canfd0), SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(canfd2), SH_PFC_FUNCTION(canfd3), SH_PFC_FUNCTION(can_clk), +#endif SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -2965,24 +3005,30 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(i2c2), SH_PFC_FUNCTION(i2c3), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(intc_ex), +#endif SH_PFC_FUNCTION(mmc), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(msiof0), SH_PFC_FUNCTION(msiof1), SH_PFC_FUNCTION(msiof2), SH_PFC_FUNCTION(msiof3), SH_PFC_FUNCTION(msiof4), SH_PFC_FUNCTION(msiof5), +#endif SH_PFC_FUNCTION(pcie), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(pwm0), SH_PFC_FUNCTION(pwm1), SH_PFC_FUNCTION(pwm2), SH_PFC_FUNCTION(pwm3), SH_PFC_FUNCTION(pwm4), +#endif SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), @@ -2994,7 +3040,9 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(scif_clk2), +#ifdef CONFIG_PINCTRL_PFC_FULL SH_PFC_FUNCTION(ssi), +#endif SH_PFC_FUNCTION(tpu), }; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b27ad9a77e..c4f4a8d78df 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -920,7 +920,7 @@ config SCIF_CONSOLE depends on SH || ARCH_RENESAS help Select this to enable Renesas SCIF UART. To operate serial ports - on systems with RCar or SH SoCs, say Y to this option. If unsure, + on systems with R-Car or SH SoCs, say Y to this option. If unsure, say N. choice diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index fd5cb3694f6..96ea033082b 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -420,7 +420,7 @@ config RENESAS_RPC_SPI imply SPI_FLASH_SFDP_SUPPORT help Enable the Renesas RPC SPI driver, used to access SPI NOR flash - on Renesas RCar Gen3 SoCs. This uses driver model and requires a + on Renesas R-Car Gen3 SoCs. This uses driver model and requires a device tree binding to operate. config ROCKCHIP_SFC diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 9ab39a188b2..2c9b0ada87b 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -115,6 +115,9 @@ struct mxc_spi_slave { #if defined(MXC_ECSPI) u32 cfg_reg; #endif +#if CONFIG_IS_ENABLED(CLK) + struct clk clk; +#endif int gpio; int ss_pol; unsigned int max_hz; @@ -214,7 +217,11 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) #ifdef MXC_ECSPI static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) { +#if CONFIG_IS_ENABLED(CLK) + u32 clk_src = clk_get_rate(&mxcs->clk); +#else u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); +#endif s32 reg_ctrl, reg_config; u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0; u32 pre_div = 0, post_div = 0; @@ -599,14 +606,13 @@ static int mxc_spi_probe(struct udevice *bus) return -ENODEV; #if CONFIG_IS_ENABLED(CLK) - struct clk clk; - ret = clk_get_by_index(bus, 0, &clk); + ret = clk_get_by_index(bus, 0, &mxcs->clk); if (ret) return ret; - clk_enable(&clk); + clk_enable(&mxcs->clk); - mxcs->max_hz = clk_get_rate(&clk); + mxcs->max_hz = clk_get_rate(&mxcs->clk); #else int node = dev_of_offset(bus); const void *blob = gd->fdt_blob; diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c index f1e6f9f4e01..7103d786c7e 100644 --- a/drivers/spi/renesas_rpc_spi.c +++ b/drivers/spi/renesas_rpc_spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 RPC QSPI driver + * Renesas R-Car Gen3 RPC QSPI driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 010084ef7f3..c815764c2bc 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -115,10 +115,10 @@ config USB_GADGET_DWC2_OTG USB_GADGET to be enabled. config USB_RENESAS_USBHS - bool "Renesas RCar USB2.0 HS controller (gadget mode)" + bool "Renesas R-Car USB2.0 HS controller (gadget mode)" select USB_GADGET_DUALSPEED help - The Renesas Rcar USB 2.0 high-speed gadget controller + The Renesas R-Car USB 2.0 high-speed gadget controller integrated into Salvator and Kingfisher boards. Select this option if you want the driver to operate in Peripheral mode. This option requires USB_GADGET to be enabled. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index bb5893d56db..24786a2bc91 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -103,12 +103,12 @@ config USB_XHCI_PCI Enables support for the PCI-based xHCI controller. config USB_XHCI_RCAR - bool "Renesas RCar USB 3.0 support" + bool "Renesas R-Car USB 3.0 support" default y depends on ARCH_RENESAS help Choose this option to add support for USB 3.0 driver on Renesas - RCar Gen3 SoCs. + R-Car Gen3 SoCs. config USB_XHCI_STI bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller" diff --git a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h index 8db88f0dcfa..7c909b4697a 100644 --- a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h +++ b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h @@ -1,5 +1,5 @@ /* - * Renesas RCar xHCI controller firmware version 3 + * Renesas R-Car xHCI controller firmware version 3 * * Copyright (c) 2014, Renesas Electronics Corporation * All rights reserved. diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index 38c5928faed..b72807053c4 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * - * Renesas RCar USB HOST xHCI Controller + * Renesas R-Car USB HOST xHCI Controller */ #include <clk.h> diff --git a/drivers/video/zynqmp/zynqmp_dpsub.c b/drivers/video/zynqmp/zynqmp_dpsub.c index 76abfeac443..52af23c3c83 100644 --- a/drivers/video/zynqmp/zynqmp_dpsub.c +++ b/drivers/video/zynqmp/zynqmp_dpsub.c @@ -11,6 +11,7 @@ #include <dm.h> #include <errno.h> #include <generic-phy.h> +#include <reset.h> #include <stdlib.h> #include <video.h> #include <wait_bit.h> @@ -2093,10 +2094,15 @@ static int zynqmp_dpsub_probe(struct udevice *dev) { struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct zynqmp_dpsub_priv *priv = dev_get_priv(dev); + struct reset_ctl_bulk resets; struct clk clk; int ret; int mode = RGBA8888; + ret = reset_get_bulk(dev, &resets); + if (!ret) + reset_deassert_bulk(&resets); + ret = clk_get_by_name(dev, "dp_apb_clk", &clk); if (ret < 0) { dev_err(dev, "failed to get clock\n"); |