diff options
Diffstat (limited to 'drivers')
28 files changed, 208 insertions, 16 deletions
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index b303fabe0f0..83c055a26ef 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -111,6 +111,14 @@ config HBMC_AM654 source "drivers/mtd/nand/Kconfig" +config SYS_NAND_MAX_CHIPS + int "NAND max chips" + depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \ + SPL_OMAP3_ID_NAND + default 1 + help + The maximum number of NAND chips per device to be supported. + source "drivers/mtd/spi/Kconfig" source "drivers/mtd/ubi/Kconfig" diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index bb8cffcabce..790ee344038 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -109,6 +109,10 @@ config KEYSTONE_RBL_NAND depends on ARCH_KEYSTONE def_bool y +config SPL_NAND_LOAD + def_bool y + depends on NAND_DAVINCI && ARCH_DAVINCI && SPL_NAND_SUPPORT + config NAND_DENALI bool select SYS_NAND_SELF_INIT @@ -122,6 +126,22 @@ config NAND_DENALI_DT Enable the driver for NAND flash on platforms using a Denali NAND controller as a DT device. +config NAND_FSL_ELBC + bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver" + depends on FSL_ELBC + help + Enable the Freescale Enhanced Local Bus Controller FCM NAND driver. + +config NAND_FSL_IFC + bool "Support Freescale Integrated Flash Controller NAND driver" + help + Enable the Freescale Integrated Flash Controller NAND driver. + +config NAND_LPC32XX_MLC + bool "Support LPC32XX_MLC controller" + help + Enable the LPC32XX MLC NAND controller. + config NAND_LPC32XX_SLC bool "Support LPC32XX_SLC controller" help @@ -136,9 +156,10 @@ config NAND_OMAP_GPMC do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 and BCH16 ECC algorithms. +if NAND_OMAP_GPMC + config NAND_OMAP_GPMC_PREFETCH bool "Enable GPMC Prefetch" - depends on NAND_OMAP_GPMC default y help On OMAP platforms that use the GPMC controller @@ -147,7 +168,7 @@ config NAND_OMAP_GPMC_PREFETCH config NAND_OMAP_ELM bool "Enable ELM driver for OMAPxx and AMxx platforms." - depends on NAND_OMAP_GPMC && !OMAP34XX + depends on !OMAP34XX help ELM controller is used for ECC error detection (not ECC calculation) of BCH4, BCH8 and BCH16 ECC algorithms. @@ -156,6 +177,104 @@ config NAND_OMAP_ELM detection. However ECC calculation on such plaforms would still be done by GPMC controller. +choice + prompt "ECC scheme" + default NAND_OMAP_ECCSCHEME_BCH8_CODE_HW + help + On OMAP platforms, this CONFIG specifies NAND ECC scheme. + It can take following values: + OMAP_ECC_HAM1_CODE_SW + 1-bit Hamming code using software lib. + (for legacy devices only) + OMAP_ECC_HAM1_CODE_HW + 1-bit Hamming code using GPMC hardware. + (for legacy devices only) + OMAP_ECC_BCH4_CODE_HW_DETECTION_SW + 4-bit BCH code (unsupported) + OMAP_ECC_BCH4_CODE_HW + 4-bit BCH code (unsupported) + OMAP_ECC_BCH8_CODE_HW_DETECTION_SW + 8-bit BCH code with + - ecc calculation using GPMC hardware engine, + - error detection using software library. + - requires CONFIG_BCH to enable software BCH library + (For legacy device which do not have ELM h/w engine) + OMAP_ECC_BCH8_CODE_HW + 8-bit BCH code with + - ecc calculation using GPMC hardware engine, + - error detection using ELM hardware engine. + OMAP_ECC_BCH16_CODE_HW + 16-bit BCH code with + - ecc calculation using GPMC hardware engine, + - error detection using ELM hardware engine. + + How to select ECC scheme on OMAP and AMxx platforms ? + ----------------------------------------------------- + Though higher ECC schemes have more capability to detect and correct + bit-flips, but still selection of ECC scheme is dependent on following + - hardware engines present in SoC. + Some legacy OMAP SoC do not have ELM h/w engine thus such + SoC cannot support BCHx_HW ECC schemes. + - size of OOB/Spare region + With higher ECC schemes, more OOB/Spare area is required to + store ECC. So choice of ECC scheme is limited by NAND oobsize. + + In general following expression can help: + NAND_OOBSIZE >= 2 + (NAND_PAGESIZE / 512) * ECC_BYTES + where + NAND_OOBSIZE = number of bytes available in + OOB/spare area per NAND page. + NAND_PAGESIZE = bytes in main-area of NAND page. + ECC_BYTES = number of ECC bytes generated to + protect 512 bytes of data, which is: + 3 for HAM1_xx ecc schemes + 7 for BCH4_xx ecc schemes + 14 for BCH8_xx ecc schemes + 26 for BCH16_xx ecc schemes + + example to check for BCH16 on 2K page NAND + NAND_PAGESIZE = 2048 + NAND_OOBSIZE = 64 + 2 + (2048 / 512) * 26 = 106 > NAND_OOBSIZE + Thus BCH16 cannot be supported on 2K page NAND. + + However, for 4K pagesize NAND + NAND_PAGESIZE = 4096 + NAND_OOBSIZE = 224 + ECC_BYTES = 26 + 2 + (4096 / 512) * 26 = 210 < NAND_OOBSIZE + Thus BCH16 can be supported on 4K page NAND. + +config NAND_OMAP_ECCSCHEME_HAM1_CODE_SW + bool "1-bit Hamming code using software lib" + +config NAND_OMAP_ECCSCHEME_HAM1_CODE_HW + bool "1-bit Hamming code using GPMC hardware" + +config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW + bool "8-bit BCH code with HW calculation SW error detection" + +config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW + bool "8-bit BCH code with HW calculation and error detection" + +config NAND_OMAP_ECCSCHEME_BCH16_CODE_HW + bool "16-bit BCH code with HW calculation and error detection" + +endchoice + +config NAND_OMAP_ECCSCHEME + int + default 1 if NAND_OMAP_ECCSCHEME_HAM1_CODE_SW + default 2 if NAND_OMAP_ECCSCHEME_HAM1_CODE_HW + default 5 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW + default 6 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW + default 7 if NAND_OMAP_ECCSCHEME_BCH16_CODE_HW + help + This must be kept in sync with the enum in + include/linux/mtd/omap_gpmc.h + +endif + config NAND_VF610_NFC bool "Support for Freescale NFC for VF610" select SYS_NAND_SELF_INIT @@ -354,22 +473,43 @@ comment "Generic NAND options" config SYS_NAND_BLOCK_SIZE hex "NAND chip eraseblock size" - depends on ARCH_SUNXI + depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT + depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC help Number of data bytes in one eraseblock for the NAND chip on the board. This is the multiple of NAND_PAGE_SIZE and the number of pages. +config SYS_NAND_ONFI_DETECTION + bool "Enable detection of ONFI compliant devices during probe" + help + Enables detection of ONFI compliant devices during probe. + And fetching device parameters flashed on device, by parsing + ONFI parameter page. + +config SYS_NAND_PAGE_COUNT + hex "NAND chip page count" + depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \ + SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE) + help + Number of pages in the NAND chip. + config SYS_NAND_PAGE_SIZE hex "NAND chip page size" - depends on ARCH_SUNXI + depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ + SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ + (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER + depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC help Number of data bytes in one page for the NAND chip on the board, not including the OOB area. config SYS_NAND_OOBSIZE hex "NAND chip OOB size" - depends on ARCH_SUNXI + depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ + SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ + (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER + depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC help Number of bytes in the Out-Of-Band area for the NAND chip on the board. @@ -393,14 +533,37 @@ config SYS_NAND_BUSWIDTH_16BIT not available while configuring controller. So a static CONFIG_NAND_xx is needed to know the device's bus-width in advance. -config SYS_NAND_MAX_CHIPS - int "NAND max chips" - default 1 - depends on NAND_ARASAN +if SPL + +config SYS_NAND_5_ADDR_CYCLE + bool "Wait 5 address cycles during NAND commands" + depends on SPL_NAND_AM33XX_BCH || SPL_NAND_SIMPLE || \ + (SPL_NAND_SUPPORT && NAND_ATMEL) + default y + help + Some controllers require waiting for 5 address cycles when issuing + some commands, on NAND chips larger than 128MiB. + +choice + prompt "NAND bad block marker/indicator position in the OOB" + depends on SPL_NAND_AM33XX_BCH || SPL_NAND_DENALI || SPL_NAND_SIMPLE || \ + SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC) + default HAS_NAND_LARGE_BADBLOCK_POS help - The maximum number of NAND chips per device to be supported. + In the OOB, which position contains the badblock information. -if SPL +config HAS_NAND_LARGE_BADBLOCK_POS + bool "Set the bad block marker/indicator to the 'large' position" + +config HAS_NAND_SMALL_BADBLOCK_POS + bool "Set the bad block marker/indicator to the 'small' position" + +endchoice + +config SYS_NAND_BAD_BLOCK_POS + int + default 0 if HAS_NAND_LARGE_BADBLOCK_POS + default 5 if HAS_NAND_SMALL_BADBLOCK_POS config SYS_NAND_U_BOOT_LOCATIONS bool "Define U-boot binaries locations in NAND" diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c index b6fc5f29c7a..83590a63cca 100644 --- a/drivers/mtd/nand/raw/am335x_spl_bch.c +++ b/drivers/mtd/nand/raw/am335x_spl_bch.c @@ -14,6 +14,7 @@ #include <asm/io.h> #include <linux/delay.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; static struct mtd_info *mtd; diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c index 6541c3bea85..06bf5ac18ff 100644 --- a/drivers/mtd/nand/raw/atmel_nand.c +++ b/drivers/mtd/nand/raw/atmel_nand.c @@ -24,6 +24,7 @@ #include <nand.h> #include <watchdog.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> #ifdef CONFIG_ATMEL_NAND_HWECC diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 99a1c2e6e2e..f8434ca88db 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -26,6 +26,7 @@ #include <linux/completion.h> #include <linux/errno.h> #include <linux/log2.h> +#include <linux/mtd/rawnand.h> #include <asm/processor.h> #include <dm.h> diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c index 81fa8788a49..c5e97da5e05 100644 --- a/drivers/mtd/nand/raw/cortina_nand.c +++ b/drivers/mtd/nand/raw/cortina_nand.c @@ -16,6 +16,7 @@ #include <linux/delay.h> #include <linux/iopoll.h> #include <linux/errno.h> +#include <linux/mtd/rawnand.h> #include <asm/gpio.h> #include <fdtdec.h> #include <bouncebuf.h> diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index e4860561f8e..ef7ee395c0c 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -30,6 +30,7 @@ #include <common.h> #include <log.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #include <nand.h> #include <dm/uclass.h> diff --git a/drivers/mtd/nand/raw/fsl_elbc_spl.c b/drivers/mtd/nand/raw/fsl_elbc_spl.c index a62ab69ee1e..e55b40f8f13 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_spl.c +++ b/drivers/mtd/nand/raw/fsl_elbc_spl.c @@ -11,6 +11,7 @@ #include <common.h> #include <cpu_func.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #include <asm/fsl_lbc.h> #include <nand.h> diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c index 6c86a7e7671..91cc1339537 100644 --- a/drivers/mtd/nand/raw/fsl_upm.c +++ b/drivers/mtd/nand/raw/fsl_upm.c @@ -13,6 +13,7 @@ #include <linux/delay.h> #include <linux/errno.h> #include <linux/mtd/mtd.h> +#include <linux/mtd/rawnand.h> #include <linux/mtd/fsl_upm.h> #include <nand.h> diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c index 1c24710b2db..5d197ce0c51 100644 --- a/drivers/mtd/nand/raw/fsmc_nand.c +++ b/drivers/mtd/nand/raw/fsmc_nand.c @@ -13,6 +13,7 @@ #include <linux/bitops.h> #include <linux/err.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> #include <linux/mtd/fsmc_nand.h> #include <asm/arch/hardware.h> diff --git a/drivers/mtd/nand/raw/kb9202_nand.c b/drivers/mtd/nand/raw/kb9202_nand.c index 0f68f1cd867..9d26532c780 100644 --- a/drivers/mtd/nand/raw/kb9202_nand.c +++ b/drivers/mtd/nand/raw/kb9202_nand.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #include <asm/arch/AT91RM9200.h> #include <asm/arch/hardware.h> diff --git a/drivers/mtd/nand/raw/kirkwood_nand.c b/drivers/mtd/nand/raw/kirkwood_nand.c index 0757fa840b8..621d2d232c8 100644 --- a/drivers/mtd/nand/raw/kirkwood_nand.c +++ b/drivers/mtd/nand/raw/kirkwood_nand.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> diff --git a/drivers/mtd/nand/raw/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c index cf33f2863e1..b838164bf2e 100644 --- a/drivers/mtd/nand/raw/kmeter1_nand.c +++ b/drivers/mtd/nand/raw/kmeter1_nand.c @@ -8,6 +8,7 @@ #include <nand.h> #include <asm/io.h> #include <linux/delay.h> +#include <linux/mtd/rawnand.h> #define CONFIG_NAND_MODE_REG (void *)(CONFIG_SYS_NAND_BASE + 0x20000) #define CONFIG_NAND_DATA_REG (void *)(CONFIG_SYS_NAND_BASE + 0x30000) diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c index b3232ed59d5..5bc5301d634 100644 --- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c +++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c @@ -23,6 +23,7 @@ #include <nand.h> #include <linux/delay.h> #include <linux/errno.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #include <nand.h> #include <asm/arch/clk.h> diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c index 9cca3c55cc0..3d6cb1dc635 100644 --- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c +++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c @@ -15,6 +15,7 @@ #include <nand.h> #include <linux/bug.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> #include <linux/errno.h> #include <asm/io.h> #include <asm/arch/config.h> diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c index c38f286e61d..2b8a132a5fc 100644 --- a/drivers/mtd/nand/raw/mxc_nand.c +++ b/drivers/mtd/nand/raw/mxc_nand.c @@ -10,6 +10,7 @@ #include <nand.h> #include <linux/delay.h> #include <linux/err.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #if defined(CONFIG_MX27) || \ defined(CONFIG_MX51) || defined(CONFIG_MX53) diff --git a/drivers/mtd/nand/raw/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c index 2f054b60ed7..0fea307ea46 100644 --- a/drivers/mtd/nand/raw/mxc_nand_spl.c +++ b/drivers/mtd/nand/raw/mxc_nand_spl.c @@ -13,6 +13,7 @@ #include <common.h> #include <hang.h> #include <nand.h> +#include <linux/mtd/rawnand.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> #include "mxc_nand.h" diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index d16224a2e08..6b70d68fe7b 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -13,6 +13,7 @@ #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> +#include <linux/mtd/rawnand.h> static struct mtd_info *mtd; static struct nand_chip nand_chip; diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c index 026419e4e64..59ad1392b0e 100644 --- a/drivers/mtd/nand/raw/nand.c +++ b/drivers/mtd/nand/raw/nand.c @@ -9,6 +9,7 @@ #include <nand.h> #include <errno.h> #include <linux/mtd/concat.h> +#include <linux/mtd/rawnand.h> #ifndef CONFIG_SYS_NAND_BASE_LIST #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } diff --git a/drivers/mtd/nand/raw/nand_plat.c b/drivers/mtd/nand/raw/nand_plat.c index 335c3e34714..81e7aa218d5 100644 --- a/drivers/mtd/nand/raw/nand_plat.c +++ b/drivers/mtd/nand/raw/nand_plat.c @@ -15,6 +15,7 @@ */ #include <common.h> +#include <linux/mtd/rawnand.h> #include <asm/io.h> #ifdef NAND_PLAT_GPIO_DEV_READY # include <asm/gpio.h> diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c index 09e053541a9..727861c8f7e 100644 --- a/drivers/mtd/nand/raw/nand_spl_simple.c +++ b/drivers/mtd/nand/raw/nand_spl_simple.c @@ -8,6 +8,7 @@ #include <nand.h> #include <asm/io.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; static struct mtd_info *mtd; @@ -39,11 +40,6 @@ static int nand_command(int block, int page, uint32_t offs, this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, NAND_CTRL_ALE); /* A[24:17] */ -#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE - /* One more address cycle for devices > 32MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, - NAND_CTRL_ALE); /* A[28:25] */ -#endif /* Latch in address */ this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c index d03b8645c44..5409c9f3224 100644 --- a/drivers/mtd/nand/raw/nand_util.c +++ b/drivers/mtd/nand/raw/nand_util.c @@ -30,6 +30,7 @@ #include <linux/errno.h> #include <linux/mtd/mtd.h> +#include <linux/mtd/rawnand.h> #include <nand.h> #include <jffs2/jffs2.h> diff --git a/drivers/mtd/nand/raw/octeontx_nand.c b/drivers/mtd/nand/raw/octeontx_nand.c index e0ccc7b0d90..75476c098fe 100644 --- a/drivers/mtd/nand/raw/octeontx_nand.c +++ b/drivers/mtd/nand/raw/octeontx_nand.c @@ -23,6 +23,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand_bch.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/types.h> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c index 97fd5690f51..530574898ce 100644 --- a/drivers/mtd/nand/raw/omap_gpmc.c +++ b/drivers/mtd/nand/raw/omap_gpmc.c @@ -11,6 +11,7 @@ #include <asm/arch/mem.h> #include <linux/mtd/omap_gpmc.h> #include <linux/mtd/nand_ecc.h> +#include <linux/mtd/rawnand.h> #include <linux/bch.h> #include <linux/compiler.h> #include <nand.h> diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 21776f3b14c..d016d255753 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -21,6 +21,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/rawnand.h> #include <memalign.h> #include <nand.h> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index e17f1f8975e..eee65949d77 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -19,6 +19,7 @@ #include <linux/err.h> #include <linux/iopoll.h> #include <linux/ioport.h> +#include <linux/mtd/rawnand.h> /* Bad block marker length */ #define FMC2_BBM_LEN 2 diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c index 85d8013b1a6..a29a76c58d3 100644 --- a/drivers/mtd/nand/raw/sunxi_nand_spl.c +++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c @@ -12,6 +12,7 @@ #include <linux/bitops.h> #include <linux/ctype.h> #include <linux/delay.h> +#include <linux/mtd/rawnand.h> /* registers */ #define NFC_CTL 0x00000000 diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c index 6310253efa6..8e70c8e73b6 100644 --- a/drivers/mtd/nand/raw/tegra_nand.c +++ b/drivers/mtd/nand/raw/tegra_nand.c @@ -19,6 +19,7 @@ #include <linux/bug.h> #include <linux/delay.h> #include <linux/errno.h> +#include <linux/mtd/rawnand.h> #include <asm/gpio.h> #include <fdtdec.h> #include <bouncebuf.h> |