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Diffstat (limited to 'dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts')
-rw-r--r--dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts137
1 files changed, 135 insertions, 2 deletions
diff --git a/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts b/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts
index b109095a0d8..9ba23129e65 100644
--- a/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts
+++ b/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts
@@ -4,6 +4,37 @@
*
* Copyright (C) 2025 Marek Vasut <marek.vasut+renesas@mailbox.org>
*/
+/*
+ * DA7212 Codec settings
+ *
+ * for Playback
+ * > amixer set "Headphone" 40%
+ * > amixer set "Headphone" on
+ * > amixer set "Mixout Left DAC Left" on
+ * > amixer set "Mixout Right DAC Right" on
+ * > aplay xxx.wav
+ *
+ * for Capture (Aux/Mic)
+ *
+ * on/off (B)
+ * CONN3 (HeadSet) ---+----> MSIOF1
+ * |
+ * CONN4 AUX ---------+ on/off (A)
+ *
+ * > amixer set "Mixin PGA" on
+ * > amixer set "Mixin PGA" 50%
+ * > amixer set "ADC" on
+ * > amixer set "ADC" 80%
+ * > amixer set "Aux" on ^
+ * > amixer set "Aux" 80% | (A)
+ * > amixer set "Mixin Left Aux Left" on |
+ * > amixer set "Mixin Right Aux Right" on v
+ * > amixer set "Mic 1" on ^
+ * > amixer set "Mic 1" 80% | (B)
+ * > amixer set "Mixin Left Mic 1" on |
+ * > amixer set "Mixin Right Mic 1" on v
+ * > arecord -f cd xxx.wav
+ */
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
@@ -99,6 +130,13 @@
};
};
+ /* Page 26 / PCIe.0/1 CLK */
+ pcie_refclk: clk-x8 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
reg_1p2v: regulator-1p2v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.2V";
@@ -133,6 +171,12 @@
clock-frequency = <38400000>;
};
+ /* Page 30 / Audio_Codec */
+ sound_card: sound {
+ compatible = "audio-graph-card2";
+ links = <&msiof1_snd>;
+ };
+
/* Page 17 uSD-Slot */
vcc_sdhi: regulator-vcc-sdhi {
compatible = "regulator-gpio";
@@ -145,6 +189,10 @@
};
};
+&audio_clkin {
+ clock-frequency = <24576000>;
+};
+
/* Page 22 / Ether_AVB0 */
&avb0 {
pinctrl-0 = <&avb0_pins>;
@@ -334,12 +382,43 @@
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
+
+ /* Page 30 / Audio_Codec */
+ codec@1a {
+ compatible = "dlg,da7212";
+
+ #sound-dai-cells = <0>;
+ reg = <0x1a>;
+
+ clocks = <&rcar_sound>;
+ clock-names = "mclk";
+
+ VDDA-supply = <&reg_1p8v>;
+ VDDMIC-supply = <&reg_3p3v>;
+ VDDIO-supply = <&reg_3p3v>;
+
+ port {
+ da7212_endpoint: endpoint {
+ bitclock-master;
+ frame-master;
+ remote-endpoint = <&msiof1_snd_endpoint>;
+ };
+ };
+ };
};
i2c0_mux2: i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
+
+ /* Page 26 / PCIe.0/1 CLK */
+ pcie_clk: clk@68 {
+ compatible = "renesas,9fgv0441";
+ reg = <0x68>;
+ clocks = <&pcie_refclk>;
+ #clock-cells = <1>;
+ };
};
i2c0_mux3: i2c@3 {
@@ -404,28 +483,57 @@
status = "okay";
};
+&msiof1 {
+ pinctrl-0 = <&msiof1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ /* ignore DT warning */
+ /delete-property/#address-cells;
+ /delete-property/#size-cells;
+
+ msiof1_snd: port {
+ msiof1_snd_endpoint: endpoint {
+ remote-endpoint = <&da7212_endpoint>;
+ };
+ };
+};
+
/* Page 26 / 2230 Key M M.2 */
&pcie0_clkref {
- clock-frequency = <100000000>;
+ status = "disabled";
};
&pciec0 {
+ clocks = <&cpg CPG_MOD 624>, <&pcie_clk 0>;
reset-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
+&pciec0_rp {
+ clocks = <&pcie_clk 1>;
+ vpcie3v3-supply = <&reg_3p3v>;
+};
+
/* Page 25 / PCIe to USB */
&pcie1_clkref {
- clock-frequency = <100000000>;
+ status = "disabled";
};
&pciec1 {
+ clocks = <&cpg CPG_MOD 625>, <&pcie_clk 2>;
/* uPD720201 is PCIe Gen2 x1 device */
num-lanes = <1>;
reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
+&pciec1_rp {
+ clocks = <&pcie_clk 3>;
+ vpcie3v3-supply = <&reg_3p3v>;
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
@@ -584,6 +692,18 @@
function = "mmc";
power-source = <1800>;
};
+
+ /* Page 30 / Audio_Codec */
+ msiof1_pins: sound {
+ groups = "msiof1_clk", "msiof1_sync", "msiof1_txd", "msiof1_rxd";
+ function = "msiof1";
+ };
+
+ /* Page 30 / Audio_Codec */
+ sound_clk_pins: sound-clk {
+ groups = "audio_clkin", "audio_clkout";
+ function = "audio_clk";
+ };
};
/* Page 31 / FAN */
@@ -614,6 +734,19 @@
status = "okay";
};
+/* Page 30 / Audio_Codec */
+&rcar_sound {
+ pinctrl-0 = <&sound_clk_pins>;
+ pinctrl-names = "default";
+
+ /* It is used for ADG output as DA7212_MCLK */
+
+ /* audio_clkout */
+ clock-frequency = <12288000>; /* 48 kHz groups */
+
+ status = "okay";
+};
+
/* Page 16 / QSPI_FLASH */
&rpc {
pinctrl-0 = <&qspi0_pins>;