diff options
Diffstat (limited to 'include/dt-bindings/reset')
39 files changed, 0 insertions, 2461 deletions
diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h deleted file mode 100644 index 5e3b16b8ef5..00000000000 --- a/include/dt-bindings/reset/actions,s700-reset.h +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) -// -// Device Tree binding constants for Actions Semi S700 Reset Management Unit -// -// Copyright (c) 2018 Linaro Ltd. - -#ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H -#define __DT_BINDINGS_ACTIONS_S700_RESET_H - -#define RESET_AUDIO 0 -#define RESET_CSI 1 -#define RESET_DE 2 -#define RESET_DSI 3 -#define RESET_GPIO 4 -#define RESET_I2C0 5 -#define RESET_I2C1 6 -#define RESET_I2C2 7 -#define RESET_I2C3 8 -#define RESET_KEY 9 -#define RESET_LCD0 10 -#define RESET_SI 11 -#define RESET_SPI0 12 -#define RESET_SPI1 13 -#define RESET_SPI2 14 -#define RESET_SPI3 15 -#define RESET_UART0 16 -#define RESET_UART1 17 -#define RESET_UART2 18 -#define RESET_UART3 19 -#define RESET_UART4 20 -#define RESET_UART5 21 -#define RESET_UART6 22 - -#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ diff --git a/include/dt-bindings/reset/actions,s900-reset.h b/include/dt-bindings/reset/actions,s900-reset.h deleted file mode 100644 index 42c19d02e43..00000000000 --- a/include/dt-bindings/reset/actions,s900-reset.h +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) -// -// Device Tree binding constants for Actions Semi S900 Reset Management Unit -// -// Copyright (c) 2018 Linaro Ltd. - -#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H -#define __DT_BINDINGS_ACTIONS_S900_RESET_H - -#define RESET_CHIPID 0 -#define RESET_CPU_SCNT 1 -#define RESET_SRAMI 2 -#define RESET_DDR_CTL_PHY 3 -#define RESET_DMAC 4 -#define RESET_GPIO 5 -#define RESET_BISP_AXI 6 -#define RESET_CSI0 7 -#define RESET_CSI1 8 -#define RESET_DE 9 -#define RESET_DSI 10 -#define RESET_GPU3D_PA 11 -#define RESET_GPU3D_PB 12 -#define RESET_HDE 13 -#define RESET_I2C0 14 -#define RESET_I2C1 15 -#define RESET_I2C2 16 -#define RESET_I2C3 17 -#define RESET_I2C4 18 -#define RESET_I2C5 19 -#define RESET_IMX 20 -#define RESET_NANDC0 21 -#define RESET_NANDC1 22 -#define RESET_SD0 23 -#define RESET_SD1 24 -#define RESET_SD2 25 -#define RESET_SD3 26 -#define RESET_SPI0 27 -#define RESET_SPI1 28 -#define RESET_SPI2 29 -#define RESET_SPI3 30 -#define RESET_UART0 31 -#define RESET_UART1 32 -#define RESET_UART2 33 -#define RESET_UART3 34 -#define RESET_UART4 35 -#define RESET_UART5 36 -#define RESET_UART6 37 -#define RESET_HDMI 38 -#define RESET_LVDS 39 -#define RESET_EDP 40 -#define RESET_USB2HUB 41 -#define RESET_USB2HSIC 42 -#define RESET_USB3 43 -#define RESET_PCM1 44 -#define RESET_AUDIO 45 -#define RESET_PCM0 46 -#define RESET_SE 47 -#define RESET_GIC 48 -#define RESET_DDR_CTL_PHY_AXI 49 -#define RESET_CMU_DDR 50 -#define RESET_DMM 51 -#define RESET_HDCP2TX 52 -#define RESET_ETHERNET 53 - -#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */ diff --git a/include/dt-bindings/reset/altr,rst-mgr-a10.h b/include/dt-bindings/reset/altr,rst-mgr-a10.h deleted file mode 100644 index acb0bbf4f9f..00000000000 --- a/include/dt-bindings/reset/altr,rst-mgr-a10.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10_H -#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10_H - -/* MPUMODRST */ -#define CPU0_RESET 0 -#define CPU1_RESET 1 -#define WDS_RESET 2 -#define SCUPER_RESET 3 - -/* PER0MODRST */ -#define EMAC0_RESET 32 -#define EMAC1_RESET 33 -#define EMAC2_RESET 34 -#define USB0_RESET 35 -#define USB1_RESET 36 -#define NAND_RESET 37 -#define QSPI_RESET 38 -#define SDMMC_RESET 39 -#define EMAC0_OCP_RESET 40 -#define EMAC1_OCP_RESET 41 -#define EMAC2_OCP_RESET 42 -#define USB0_OCP_RESET 43 -#define USB1_OCP_RESET 44 -#define NAND_OCP_RESET 45 -#define QSPI_OCP_RESET 46 -#define SDMMC_OCP_RESET 47 -#define DMA_RESET 48 -#define SPIM0_RESET 49 -#define SPIM1_RESET 50 -#define SPIS0_RESET 51 -#define SPIS1_RESET 52 -#define DMA_OCP_RESET 53 -#define EMAC_PTP_RESET 54 -/* 55 is empty*/ -#define DMAIF0_RESET 56 -#define DMAIF1_RESET 57 -#define DMAIF2_RESET 58 -#define DMAIF3_RESET 59 -#define DMAIF4_RESET 60 -#define DMAIF5_RESET 61 -#define DMAIF6_RESET 62 -#define DMAIF7_RESET 63 - -/* PER1MODRST */ -#define L4WD0_RESET 64 -#define L4WD1_RESET 65 -#define L4SYSTIMER0_RESET 66 -#define L4SYSTIMER1_RESET 67 -#define SPTIMER0_RESET 68 -#define SPTIMER1_RESET 69 -/* 70-71 is reserved */ -#define I2C0_RESET 72 -#define I2C1_RESET 73 -#define I2C2_RESET 74 -#define I2C3_RESET 75 -#define I2C4_RESET 76 -/* 77-79 is reserved */ -#define UART0_RESET 80 -#define UART1_RESET 81 -/* 82-87 is reserved */ -#define GPIO0_RESET 88 -#define GPIO1_RESET 89 -#define GPIO2_RESET 90 - -/* BRGMODRST */ -#define HPS2FPGA_RESET 96 -#define LWHPS2FPGA_RESET 97 -#define FPGA2HPS_RESET 98 -#define F2SSDRAM0_RESET 99 -#define F2SSDRAM1_RESET 100 -#define F2SSDRAM2_RESET 101 -#define DDRSCH_RESET 102 - -/* SYSMODRST*/ -#define ROM_RESET 128 -#define OCRAM_RESET 129 -/* 130 is reserved */ -#define FPGAMGR_RESET 131 -#define S2F_RESET 132 -#define SYSDBG_RESET 133 -#define OCRAM_OCP_RESET 134 - -/* COLDMODRST */ -#define CLKMGRCOLD_RESET 160 -/* 161-162 is reserved */ -#define S2FCOLD_RESET 163 -#define TIMESTAMPCOLD_RESET 164 -#define TAPCOLD_RESET 165 -#define HMCCOLD_RESET 166 -#define IOMGRCOLD_RESET 167 - -/* NRSTMODRST */ -#define NRSTPINOE_RESET 192 - -/* DBGMODRST */ -#define DBG_RESET 224 -#endif diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h deleted file mode 100644 index 1fdcf8ae153..00000000000 --- a/include/dt-bindings/reset/altr,rst-mgr-s10.h +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2016-2018 Intel Corporation. All rights reserved - * Copyright (C) 2016 Altera Corporation. All rights reserved - * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h" - */ - -#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H -#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H - -/* MPUMODRST */ -#define CPU0_RESET 0 -#define CPU1_RESET 1 -#define CPU2_RESET 2 -#define CPU3_RESET 3 - -/* PER0MODRST */ -#define EMAC0_RESET 32 -#define EMAC1_RESET 33 -#define EMAC2_RESET 34 -#define USB0_RESET 35 -#define USB1_RESET 36 -#define NAND_RESET 37 -/* 38 is empty */ -#define SDMMC_RESET 39 -#define EMAC0_OCP_RESET 40 -#define EMAC1_OCP_RESET 41 -#define EMAC2_OCP_RESET 42 -#define USB0_OCP_RESET 43 -#define USB1_OCP_RESET 44 -#define NAND_OCP_RESET 45 -/* 46 is empty */ -#define SDMMC_OCP_RESET 47 -#define DMA_RESET 48 -#define SPIM0_RESET 49 -#define SPIM1_RESET 50 -#define SPIS0_RESET 51 -#define SPIS1_RESET 52 -#define DMA_OCP_RESET 53 -#define EMAC_PTP_RESET 54 -/* 55 is empty*/ -#define DMAIF0_RESET 56 -#define DMAIF1_RESET 57 -#define DMAIF2_RESET 58 -#define DMAIF3_RESET 59 -#define DMAIF4_RESET 60 -#define DMAIF5_RESET 61 -#define DMAIF6_RESET 62 -#define DMAIF7_RESET 63 - -/* PER1MODRST */ -#define WATCHDOG0_RESET 64 -#define WATCHDOG1_RESET 65 -#define WATCHDOG2_RESET 66 -#define WATCHDOG3_RESET 67 -#define L4SYSTIMER0_RESET 68 -#define L4SYSTIMER1_RESET 69 -#define SPTIMER0_RESET 70 -#define SPTIMER1_RESET 71 -#define I2C0_RESET 72 -#define I2C1_RESET 73 -#define I2C2_RESET 74 -#define I2C3_RESET 75 -#define I2C4_RESET 76 -/* 77-79 is empty */ -#define UART0_RESET 80 -#define UART1_RESET 81 -/* 82-87 is empty */ -#define GPIO0_RESET 88 -#define GPIO1_RESET 89 - -/* BRGMODRST */ -#define SOC2FPGA_RESET 96 -#define LWHPS2FPGA_RESET 97 -#define FPGA2SOC_RESET 98 -#define F2SSDRAM0_RESET 99 -#define F2SSDRAM1_RESET 100 -#define F2SSDRAM2_RESET 101 -#define DDRSCH_RESET 102 - -/* COLDMODRST */ -#define CPUPO0_RESET 160 -#define CPUPO1_RESET 161 -#define CPUPO2_RESET 162 -#define CPUPO3_RESET 163 -/* 164-167 is empty */ -#define L2_RESET 168 - -/* DBGMODRST */ -#define DBG_RESET 224 -#define CSDAP_RESET 225 - -/* TAPMODRST */ -#define TAP_RESET 256 - -#endif diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h deleted file mode 100644 index 5b7ad739652..00000000000 --- a/include/dt-bindings/reset/altr,rst-mgr.h +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de> - */ - -#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H -#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H - -/* MPUMODRST */ -#define CPU0_RESET 0 -#define CPU1_RESET 1 -#define WDS_RESET 2 -#define SCUPER_RESET 3 -#define L2_RESET 4 - -/* PERMODRST */ -#define EMAC0_RESET 32 -#define EMAC1_RESET 33 -#define USB0_RESET 34 -#define USB1_RESET 35 -#define NAND_RESET 36 -#define QSPI_RESET 37 -#define L4WD0_RESET 38 -#define L4WD1_RESET 39 -#define OSC1TIMER0_RESET 40 -#define OSC1TIMER1_RESET 41 -#define SPTIMER0_RESET 42 -#define SPTIMER1_RESET 43 -#define I2C0_RESET 44 -#define I2C1_RESET 45 -#define I2C2_RESET 46 -#define I2C3_RESET 47 -#define UART0_RESET 48 -#define UART1_RESET 49 -#define SPIM0_RESET 50 -#define SPIM1_RESET 51 -#define SPIS0_RESET 52 -#define SPIS1_RESET 53 -#define SDMMC_RESET 54 -#define CAN0_RESET 55 -#define CAN1_RESET 56 -#define GPIO0_RESET 57 -#define GPIO1_RESET 58 -#define GPIO2_RESET 59 -#define DMA_RESET 60 -#define SDR_RESET 61 - -/* PER2MODRST */ -#define DMAIF0_RESET 64 -#define DMAIF1_RESET 65 -#define DMAIF2_RESET 66 -#define DMAIF3_RESET 67 -#define DMAIF4_RESET 68 -#define DMAIF5_RESET 69 -#define DMAIF6_RESET 70 -#define DMAIF7_RESET 71 - -/* BRGMODRST */ -#define HPS2FPGA_RESET 96 -#define LWHPS2FPGA_RESET 97 -#define FPGA2HPS_RESET 98 - -/* MISCMODRST*/ -#define ROM_RESET 128 -#define OCRAM_RESET 129 -#define SYSMGR_RESET 130 -#define SYSMGRCOLD_RESET 131 -#define FPGAMGR_RESET 132 -#define ACPIDMAP_RESET 133 -#define S2F_RESET 134 -#define S2FCOLD_RESET 135 -#define NRSTPIN_RESET 136 -#define TIMESTAMPCOLD_RESET 137 -#define CLKMGRCOLD_RESET 138 -#define SCANMGR_RESET 139 -#define FRZCTRLCOLD_RESET 140 -#define SYSDBG_RESET 141 -#define DBG_RESET 142 -#define TAPCOLD_RESET 143 -#define SDRCOLD_RESET 144 - -#endif diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h deleted file mode 100644 index 1422500f8f5..00000000000 --- a/include/dt-bindings/reset/bcm6318-reset.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM6318_H -#define __DT_BINDINGS_RESET_BCM6318_H - -#define BCM6318_RST_SPI 0 -#define BCM6318_RST_EPHY 1 -#define BCM6318_RST_SAR 2 -#define BCM6318_RST_ENETSW 3 -#define BCM6318_RST_USBD 4 -#define BCM6318_RST_USBH 5 -#define BCM6318_RST_PCIE_CORE 6 -#define BCM6318_RST_PCIE 7 -#define BCM6318_RST_PCIE_EXT 8 -#define BCM6318_RST_PCIE_HARD 9 -#define BCM6318_RST_ADSL 10 -#define BCM6318_RST_PHYMIPS 11 -#define BCM6318_RST_HOSTMIPS 11 - -#endif /* __DT_BINDINGS_RESET_BCM6318_H */ diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h deleted file mode 100644 index a45abed1ceb..00000000000 --- a/include/dt-bindings/reset/bcm63268-reset.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM63268_H -#define __DT_BINDINGS_RESET_BCM63268_H - -#define BCM63268_RST_SPI 0 -#define BCM63268_RST_IPSEC 1 -#define BCM63268_RST_EPHY 2 -#define BCM63268_RST_SAR 3 -#define BCM63268_RST_ENETSW 4 -#define BCM63268_RST_USBS 5 -#define BCM63268_RST_USBH 6 -#define BCM63268_RST_PCM 7 -#define BCM63268_RST_PCIE_CORE 8 -#define BCM63268_RST_PCIE 9 -#define BCM63268_RST_PCIE_EXT 10 -#define BCM63268_RST_WLAN_SHIM 11 -#define BCM63268_RST_DDR_PHY 12 -#define BCM63268_RST_FAP0 13 -#define BCM63268_RST_WLAN_UBUS 14 -#define BCM63268_RST_DECT 15 -#define BCM63268_RST_FAP1 16 -#define BCM63268_RST_PCIE_HARD 17 -#define BCM63268_RST_GPHY 18 - -#endif /* __DT_BINDINGS_RESET_BCM63268_H */ diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h deleted file mode 100644 index f2dd4f79cc6..00000000000 --- a/include/dt-bindings/reset/bcm6328-reset.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM6328_H -#define __DT_BINDINGS_RESET_BCM6328_H - -#define BCM6328_RST_SPI 0 -#define BCM6328_RST_EPHY 1 -#define BCM6328_RST_SAR 2 -#define BCM6328_RST_ENETSW 3 -#define BCM6328_RST_USBS 4 -#define BCM6328_RST_USBH 5 -#define BCM6328_RST_PCM 6 -#define BCM6328_RST_PCIE_CORE 7 -#define BCM6328_RST_PCIE 8 -#define BCM6328_RST_PCIE_EXT 9 -#define BCM6328_RST_PCIE_HARD 10 - -#endif /* __DT_BINDINGS_RESET_BCM6328_H */ diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h deleted file mode 100644 index 075706eff7a..00000000000 --- a/include/dt-bindings/reset/bcm6358-reset.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM6358_H -#define __DT_BINDINGS_RESET_BCM6358_H - -#define BCM6358_RST_SPI 0 -#define BCM6358_RST_ENET 2 -#define BCM6358_RST_MPI 3 -#define BCM6358_RST_EPHY 6 -#define BCM6358_RST_SAR 7 -#define BCM6358_RST_USBH 12 -#define BCM6358_RST_PCM 13 -#define BCM6358_RST_ADSL 14 - -#endif /* __DT_BINDINGS_RESET_BCM6358_H */ diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h deleted file mode 100644 index 8202e499190..00000000000 --- a/include/dt-bindings/reset/bcm6362-reset.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM6362_H -#define __DT_BINDINGS_RESET_BCM6362_H - -#define BCM6362_RST_SPI 0 -#define BCM6362_RST_IPSEC 1 -#define BCM6362_RST_EPHY 2 -#define BCM6362_RST_SAR 3 -#define BCM6362_RST_ENETSW 4 -#define BCM6362_RST_USBD 5 -#define BCM6362_RST_USBH 6 -#define BCM6362_RST_PCM 7 -#define BCM6362_RST_PCIE_CORE 8 -#define BCM6362_RST_PCIE 9 -#define BCM6362_RST_PCIE_EXT 10 -#define BCM6362_RST_WLAN_SHIM 11 -#define BCM6362_RST_DDR_PHY 12 -#define BCM6362_RST_FAP 13 -#define BCM6362_RST_WLAN_UBUS 14 - -#endif /* __DT_BINDINGS_RESET_BCM6362_H */ diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h deleted file mode 100644 index 0038a7ccf5c..00000000000 --- a/include/dt-bindings/reset/bcm6368-reset.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> - * - * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - */ - -#ifndef __DT_BINDINGS_RESET_BCM6368_H -#define __DT_BINDINGS_RESET_BCM6368_H - -#define BCM6368_RST_SPI 0 -#define BCM6368_RST_MPI 3 -#define BCM6368_RST_IPSEC 4 -#define BCM6368_RST_EPHY 6 -#define BCM6368_RST_SAR 7 -#define BCM6368_RST_SWITCH 10 -#define BCM6368_RST_USBD 11 -#define BCM6368_RST_USBH 12 -#define BCM6368_RST_PCM 13 - -#endif /* __DT_BINDINGS_RESET_BCM6368_H */ diff --git a/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h b/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h deleted file mode 100644 index 757f5e34c81..00000000000 --- a/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h +++ /dev/null @@ -1,91 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -// Copyright (c) 2020 Nuvoton Technology corporation. - -#ifndef _DT_BINDINGS_NPCM7XX_RESET_H -#define _DT_BINDINGS_NPCM7XX_RESET_H - -#define NPCM7XX_RESET_IPSRST1 0x20 -#define NPCM7XX_RESET_IPSRST2 0x24 -#define NPCM7XX_RESET_IPSRST3 0x34 - -/* Reset lines on IP1 reset module (NPCM7XX_RESET_IPSRST1) */ -#define NPCM7XX_RESET_FIU3 1 -#define NPCM7XX_RESET_UDC1 5 -#define NPCM7XX_RESET_EMC1 6 -#define NPCM7XX_RESET_UART_2_3 7 -#define NPCM7XX_RESET_UDC2 8 -#define NPCM7XX_RESET_PECI 9 -#define NPCM7XX_RESET_AES 10 -#define NPCM7XX_RESET_UART_0_1 11 -#define NPCM7XX_RESET_MC 12 -#define NPCM7XX_RESET_SMB2 13 -#define NPCM7XX_RESET_SMB3 14 -#define NPCM7XX_RESET_SMB4 15 -#define NPCM7XX_RESET_SMB5 16 -#define NPCM7XX_RESET_PWM_M0 18 -#define NPCM7XX_RESET_TIMER_0_4 19 -#define NPCM7XX_RESET_TIMER_5_9 20 -#define NPCM7XX_RESET_EMC2 21 -#define NPCM7XX_RESET_UDC4 22 -#define NPCM7XX_RESET_UDC5 23 -#define NPCM7XX_RESET_UDC6 24 -#define NPCM7XX_RESET_UDC3 25 -#define NPCM7XX_RESET_ADC 27 -#define NPCM7XX_RESET_SMB6 28 -#define NPCM7XX_RESET_SMB7 29 -#define NPCM7XX_RESET_SMB0 30 -#define NPCM7XX_RESET_SMB1 31 - -/* Reset lines on IP2 reset module (NPCM7XX_RESET_IPSRST2) */ -#define NPCM7XX_RESET_MFT0 0 -#define NPCM7XX_RESET_MFT1 1 -#define NPCM7XX_RESET_MFT2 2 -#define NPCM7XX_RESET_MFT3 3 -#define NPCM7XX_RESET_MFT4 4 -#define NPCM7XX_RESET_MFT5 5 -#define NPCM7XX_RESET_MFT6 6 -#define NPCM7XX_RESET_MFT7 7 -#define NPCM7XX_RESET_MMC 8 -#define NPCM7XX_RESET_SDHC 9 -#define NPCM7XX_RESET_GFX_SYS 10 -#define NPCM7XX_RESET_AHB_PCIBRG 11 -#define NPCM7XX_RESET_VDMA 12 -#define NPCM7XX_RESET_ECE 13 -#define NPCM7XX_RESET_VCD 14 -#define NPCM7XX_RESET_OTP 16 -#define NPCM7XX_RESET_SIOX1 18 -#define NPCM7XX_RESET_SIOX2 19 -#define NPCM7XX_RESET_3DES 21 -#define NPCM7XX_RESET_PSPI1 22 -#define NPCM7XX_RESET_PSPI2 23 -#define NPCM7XX_RESET_GMAC2 25 -#define NPCM7XX_RESET_USB_HOST 26 -#define NPCM7XX_RESET_GMAC1 28 -#define NPCM7XX_RESET_CP 31 - -/* Reset lines on IP3 reset module (NPCM7XX_RESET_IPSRST3) */ -#define NPCM7XX_RESET_PWM_M1 0 -#define NPCM7XX_RESET_SMB12 1 -#define NPCM7XX_RESET_SPIX 2 -#define NPCM7XX_RESET_SMB13 3 -#define NPCM7XX_RESET_UDC0 4 -#define NPCM7XX_RESET_UDC7 5 -#define NPCM7XX_RESET_UDC8 6 -#define NPCM7XX_RESET_UDC9 7 -#define NPCM7XX_RESET_PCI_MAILBOX 9 -#define NPCM7XX_RESET_SMB14 12 -#define NPCM7XX_RESET_SHA 13 -#define NPCM7XX_RESET_SEC_ECC 14 -#define NPCM7XX_RESET_PCIE_RC 15 -#define NPCM7XX_RESET_TIMER_10_14 16 -#define NPCM7XX_RESET_RNG 17 -#define NPCM7XX_RESET_SMB15 18 -#define NPCM7XX_RESET_SMB8 19 -#define NPCM7XX_RESET_SMB9 20 -#define NPCM7XX_RESET_SMB10 21 -#define NPCM7XX_RESET_SMB11 22 -#define NPCM7XX_RESET_ESPI 23 -#define NPCM7XX_RESET_USB_PHY_1 24 -#define NPCM7XX_RESET_USB_PHY_2 25 - -#endif diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h deleted file mode 100644 index 1a4f4c79272..00000000000 --- a/include/dt-bindings/reset/raspberrypi,firmware-reset.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 Nicolas Saenz Julienne - * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com> - */ - -#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H -#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H - -#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0 -#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1 - -#endif diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h deleted file mode 100644 index 2116f41d04e..00000000000 --- a/include/dt-bindings/reset/sama7g5-reset.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ - -#ifndef __DT_BINDINGS_RESET_SAMA7G5_H -#define __DT_BINDINGS_RESET_SAMA7G5_H - -#define SAMA7G5_RESET_USB_PHY1 4 -#define SAMA7G5_RESET_USB_PHY2 5 -#define SAMA7G5_RESET_USB_PHY3 6 - -#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */ diff --git a/include/dt-bindings/reset/snps,hsdk-reset.h b/include/dt-bindings/reset/snps,hsdk-reset.h deleted file mode 100644 index e1a643e4bc9..00000000000 --- a/include/dt-bindings/reset/snps,hsdk-reset.h +++ /dev/null @@ -1,17 +0,0 @@ -/** - * This header provides index for the HSDK reset controller. - */ -#ifndef _DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK -#define _DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK - -#define HSDK_APB_RESET 0 -#define HSDK_AXI_RESET 1 -#define HSDK_ETH_RESET 2 -#define HSDK_USB_RESET 3 -#define HSDK_SDIO_RESET 4 -#define HSDK_HDMI_RESET 5 -#define HSDK_GFX_RESET 6 -#define HSDK_DMAC_RESET 7 -#define HSDK_EBI_RESET 8 - -#endif /*_DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK*/ diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h deleted file mode 100644 index 79e52aca591..00000000000 --- a/include/dt-bindings/reset/sun20i-d1-ccu.h +++ /dev/null @@ -1,79 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - * Copyright (C) 2021 Samuel Holland <samuel@sholland.org> - */ - -#ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ -#define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ - -#define RST_MBUS 0 -#define RST_BUS_DE 1 -#define RST_BUS_DI 2 -#define RST_BUS_G2D 3 -#define RST_BUS_CE 4 -#define RST_BUS_VE 5 -#define RST_BUS_DMA 6 -#define RST_BUS_MSGBOX0 7 -#define RST_BUS_MSGBOX1 8 -#define RST_BUS_MSGBOX2 9 -#define RST_BUS_SPINLOCK 10 -#define RST_BUS_HSTIMER 11 -#define RST_BUS_DBG 12 -#define RST_BUS_PWM 13 -#define RST_BUS_DRAM 14 -#define RST_BUS_MMC0 15 -#define RST_BUS_MMC1 16 -#define RST_BUS_MMC2 17 -#define RST_BUS_UART0 18 -#define RST_BUS_UART1 19 -#define RST_BUS_UART2 20 -#define RST_BUS_UART3 21 -#define RST_BUS_UART4 22 -#define RST_BUS_UART5 23 -#define RST_BUS_I2C0 24 -#define RST_BUS_I2C1 25 -#define RST_BUS_I2C2 26 -#define RST_BUS_I2C3 27 -#define RST_BUS_SPI0 28 -#define RST_BUS_SPI1 29 -#define RST_BUS_EMAC 30 -#define RST_BUS_IR_TX 31 -#define RST_BUS_GPADC 32 -#define RST_BUS_THS 33 -#define RST_BUS_I2S0 34 -#define RST_BUS_I2S1 35 -#define RST_BUS_I2S2 36 -#define RST_BUS_SPDIF 37 -#define RST_BUS_DMIC 38 -#define RST_BUS_AUDIO 39 -#define RST_USB_PHY0 40 -#define RST_USB_PHY1 41 -#define RST_BUS_OHCI0 42 -#define RST_BUS_OHCI1 43 -#define RST_BUS_EHCI0 44 -#define RST_BUS_EHCI1 45 -#define RST_BUS_OTG 46 -#define RST_BUS_LRADC 47 -#define RST_BUS_DPSS_TOP 48 -#define RST_BUS_HDMI_SUB 49 -#define RST_BUS_HDMI_MAIN 50 -#define RST_BUS_MIPI_DSI 51 -#define RST_BUS_TCON_LCD0 52 -#define RST_BUS_TCON_TV 53 -#define RST_BUS_LVDS0 54 -#define RST_BUS_TVE 55 -#define RST_BUS_TVE_TOP 56 -#define RST_BUS_TVD 57 -#define RST_BUS_TVD_TOP 58 -#define RST_BUS_LEDC 59 -#define RST_BUS_CSI 60 -#define RST_BUS_TPADC 61 -#define RST_DSP 62 -#define RST_BUS_DSP_CFG 63 -#define RST_BUS_DSP_DBG 64 -#define RST_BUS_RISCV_CFG 65 -#define RST_BUS_CAN0 66 -#define RST_BUS_CAN1 67 - -#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun20i-d1-r-ccu.h b/include/dt-bindings/reset/sun20i-d1-r-ccu.h deleted file mode 100644 index e20babc990a..00000000000 --- a/include/dt-bindings/reset/sun20i-d1-r-ccu.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Copyright (C) 2021 Samuel Holland <samuel@sholland.org> - */ - -#ifndef _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ -#define _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ - -#define RST_BUS_R_TIMER 0 -#define RST_BUS_R_TWD 1 -#define RST_BUS_R_PPU 2 -#define RST_BUS_R_IR_RX 3 -#define RST_BUS_R_RTC 4 -#define RST_BUS_R_CPUCFG 5 - -#endif /* _DT_BINDINGS_RST_SUN20I_D1_R_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun4i-a10-ccu.h b/include/dt-bindings/reset/sun4i-a10-ccu.h deleted file mode 100644 index 5f4480bedc8..00000000000 --- a/include/dt-bindings/reset/sun4i-a10-ccu.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (C) 2017 Priit Laes <plaes@plaes.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN4I_A10_H -#define _DT_BINDINGS_RST_SUN4I_A10_H - -#define RST_USB_PHY0 1 -#define RST_USB_PHY1 2 -#define RST_USB_PHY2 3 -#define RST_GPS 4 -#define RST_DE_BE0 5 -#define RST_DE_BE1 6 -#define RST_DE_FE0 7 -#define RST_DE_FE1 8 -#define RST_DE_MP 9 -#define RST_TVE0 10 -#define RST_TCON0 11 -#define RST_TVE1 12 -#define RST_TCON1 13 -#define RST_CSI0 14 -#define RST_CSI1 15 -#define RST_VE 16 -#define RST_ACE 17 -#define RST_LVDS 18 -#define RST_GPU 19 -#define RST_HDMI_H 20 -#define RST_HDMI_SYS 21 -#define RST_HDMI_AUDIO_DMA 22 - -#endif /* DT_BINDINGS_RST_SUN4I_A10_H */ diff --git a/include/dt-bindings/reset/sun50i-a64-ccu.h b/include/dt-bindings/reset/sun50i-a64-ccu.h deleted file mode 100644 index db60b29ddb1..00000000000 --- a/include/dt-bindings/reset/sun50i-a64-ccu.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_ -#define _DT_BINDINGS_RST_SUN50I_A64_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_HSIC 2 -#define RST_DRAM 3 -#define RST_MBUS 4 -#define RST_BUS_MIPI_DSI 5 -#define RST_BUS_CE 6 -#define RST_BUS_DMA 7 -#define RST_BUS_MMC0 8 -#define RST_BUS_MMC1 9 -#define RST_BUS_MMC2 10 -#define RST_BUS_NAND 11 -#define RST_BUS_DRAM 12 -#define RST_BUS_EMAC 13 -#define RST_BUS_TS 14 -#define RST_BUS_HSTIMER 15 -#define RST_BUS_SPI0 16 -#define RST_BUS_SPI1 17 -#define RST_BUS_OTG 18 -#define RST_BUS_EHCI0 19 -#define RST_BUS_EHCI1 20 -#define RST_BUS_OHCI0 21 -#define RST_BUS_OHCI1 22 -#define RST_BUS_VE 23 -#define RST_BUS_TCON0 24 -#define RST_BUS_TCON1 25 -#define RST_BUS_DEINTERLACE 26 -#define RST_BUS_CSI 27 -#define RST_BUS_HDMI0 28 -#define RST_BUS_HDMI1 29 -#define RST_BUS_DE 30 -#define RST_BUS_GPU 31 -#define RST_BUS_MSGBOX 32 -#define RST_BUS_SPINLOCK 33 -#define RST_BUS_DBG 34 -#define RST_BUS_LVDS 35 -#define RST_BUS_CODEC 36 -#define RST_BUS_SPDIF 37 -#define RST_BUS_THS 38 -#define RST_BUS_I2S0 39 -#define RST_BUS_I2S1 40 -#define RST_BUS_I2S2 41 -#define RST_BUS_I2C0 42 -#define RST_BUS_I2C1 43 -#define RST_BUS_I2C2 44 -#define RST_BUS_SCR 45 -#define RST_BUS_UART0 46 -#define RST_BUS_UART1 47 -#define RST_BUS_UART2 48 -#define RST_BUS_UART3 49 -#define RST_BUS_UART4 50 - -#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */ diff --git a/include/dt-bindings/reset/sun50i-h6-ccu.h b/include/dt-bindings/reset/sun50i-h6-ccu.h deleted file mode 100644 index d038ddfa481..00000000000 --- a/include/dt-bindings/reset/sun50i-h6-ccu.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> - */ - -#ifndef _DT_BINDINGS_RESET_SUN50I_H6_H_ -#define _DT_BINDINGS_RESET_SUN50I_H6_H_ - -#define RST_MBUS 0 -#define RST_BUS_DE 1 -#define RST_BUS_DEINTERLACE 2 -#define RST_BUS_GPU 3 -#define RST_BUS_CE 4 -#define RST_BUS_VE 5 -#define RST_BUS_EMCE 6 -#define RST_BUS_VP9 7 -#define RST_BUS_DMA 8 -#define RST_BUS_MSGBOX 9 -#define RST_BUS_SPINLOCK 10 -#define RST_BUS_HSTIMER 11 -#define RST_BUS_DBG 12 -#define RST_BUS_PSI 13 -#define RST_BUS_PWM 14 -#define RST_BUS_IOMMU 15 -#define RST_BUS_DRAM 16 -#define RST_BUS_NAND 17 -#define RST_BUS_MMC0 18 -#define RST_BUS_MMC1 19 -#define RST_BUS_MMC2 20 -#define RST_BUS_UART0 21 -#define RST_BUS_UART1 22 -#define RST_BUS_UART2 23 -#define RST_BUS_UART3 24 -#define RST_BUS_I2C0 25 -#define RST_BUS_I2C1 26 -#define RST_BUS_I2C2 27 -#define RST_BUS_I2C3 28 -#define RST_BUS_SCR0 29 -#define RST_BUS_SCR1 30 -#define RST_BUS_SPI0 31 -#define RST_BUS_SPI1 32 -#define RST_BUS_EMAC 33 -#define RST_BUS_TS 34 -#define RST_BUS_IR_TX 35 -#define RST_BUS_THS 36 -#define RST_BUS_I2S0 37 -#define RST_BUS_I2S1 38 -#define RST_BUS_I2S2 39 -#define RST_BUS_I2S3 40 -#define RST_BUS_SPDIF 41 -#define RST_BUS_DMIC 42 -#define RST_BUS_AUDIO_HUB 43 -#define RST_USB_PHY0 44 -#define RST_USB_PHY1 45 -#define RST_USB_PHY3 46 -#define RST_USB_HSIC 47 -#define RST_BUS_OHCI0 48 -#define RST_BUS_OHCI3 49 -#define RST_BUS_EHCI0 50 -#define RST_BUS_XHCI 51 -#define RST_BUS_EHCI3 52 -#define RST_BUS_OTG 53 -#define RST_BUS_PCIE 54 -#define RST_PCIE_POWERUP 55 -#define RST_BUS_HDMI 56 -#define RST_BUS_HDMI_SUB 57 -#define RST_BUS_TCON_TOP 58 -#define RST_BUS_TCON_LCD0 59 -#define RST_BUS_TCON_TV0 60 -#define RST_BUS_CSI 61 -#define RST_BUS_HDCP 62 - -#endif /* _DT_BINDINGS_RESET_SUN50I_H6_H_ */ diff --git a/include/dt-bindings/reset/sun50i-h6-r-ccu.h b/include/dt-bindings/reset/sun50i-h6-r-ccu.h deleted file mode 100644 index d541ade884f..00000000000 --- a/include/dt-bindings/reset/sun50i-h6-r-ccu.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> - */ - -#ifndef _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ -#define _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ - -#define RST_R_APB1_TIMER 0 -#define RST_R_APB1_TWD 1 -#define RST_R_APB1_PWM 2 -#define RST_R_APB2_UART 3 -#define RST_R_APB2_I2C 4 -#define RST_R_APB1_IR 5 -#define RST_R_APB1_W1 6 -#define RST_R_APB2_RSB 7 - -#endif /* _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun5i-ccu.h b/include/dt-bindings/reset/sun5i-ccu.h deleted file mode 100644 index 40cc22ae763..00000000000 --- a/include/dt-bindings/reset/sun5i-ccu.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright 2016 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - */ - -#ifndef _RST_SUN5I_H_ -#define _RST_SUN5I_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_GPS 2 -#define RST_DE_BE 3 -#define RST_DE_FE 4 -#define RST_TVE 5 -#define RST_LCD 6 -#define RST_CSI 7 -#define RST_VE 8 -#define RST_GPU 9 -#define RST_IEP 10 - -#endif /* _RST_SUN5I_H_ */ diff --git a/include/dt-bindings/reset/sun6i-a31-ccu.h b/include/dt-bindings/reset/sun6i-a31-ccu.h deleted file mode 100644 index fbff365ed6e..00000000000 --- a/include/dt-bindings/reset/sun6i-a31-ccu.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN6I_A31_H_ -#define _DT_BINDINGS_RST_SUN6I_A31_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_PHY2 2 - -#define RST_AHB1_MIPI_DSI 3 -#define RST_AHB1_SS 4 -#define RST_AHB1_DMA 5 -#define RST_AHB1_MMC0 6 -#define RST_AHB1_MMC1 7 -#define RST_AHB1_MMC2 8 -#define RST_AHB1_MMC3 9 -#define RST_AHB1_NAND1 10 -#define RST_AHB1_NAND0 11 -#define RST_AHB1_SDRAM 12 -#define RST_AHB1_EMAC 13 -#define RST_AHB1_TS 14 -#define RST_AHB1_HSTIMER 15 -#define RST_AHB1_SPI0 16 -#define RST_AHB1_SPI1 17 -#define RST_AHB1_SPI2 18 -#define RST_AHB1_SPI3 19 -#define RST_AHB1_OTG 20 -#define RST_AHB1_EHCI0 21 -#define RST_AHB1_EHCI1 22 -#define RST_AHB1_OHCI0 23 -#define RST_AHB1_OHCI1 24 -#define RST_AHB1_OHCI2 25 -#define RST_AHB1_VE 26 -#define RST_AHB1_LCD0 27 -#define RST_AHB1_LCD1 28 -#define RST_AHB1_CSI 29 -#define RST_AHB1_HDMI 30 -#define RST_AHB1_BE0 31 -#define RST_AHB1_BE1 32 -#define RST_AHB1_FE0 33 -#define RST_AHB1_FE1 34 -#define RST_AHB1_MP 35 -#define RST_AHB1_GPU 36 -#define RST_AHB1_DEU0 37 -#define RST_AHB1_DEU1 38 -#define RST_AHB1_DRC0 39 -#define RST_AHB1_DRC1 40 -#define RST_AHB1_LVDS 41 - -#define RST_APB1_CODEC 42 -#define RST_APB1_SPDIF 43 -#define RST_APB1_DIGITAL_MIC 44 -#define RST_APB1_DAUDIO0 45 -#define RST_APB1_DAUDIO1 46 -#define RST_APB2_I2C0 47 -#define RST_APB2_I2C1 48 -#define RST_APB2_I2C2 49 -#define RST_APB2_I2C3 50 -#define RST_APB2_UART0 51 -#define RST_APB2_UART1 52 -#define RST_APB2_UART2 53 -#define RST_APB2_UART3 54 -#define RST_APB2_UART4 55 -#define RST_APB2_UART5 56 - -#endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */ diff --git a/include/dt-bindings/reset/sun8i-a23-a33-ccu.h b/include/dt-bindings/reset/sun8i-a23-a33-ccu.h deleted file mode 100644 index 6121f2b0cd0..00000000000 --- a/include/dt-bindings/reset/sun8i-a23-a33-ccu.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN8I_A23_A33_H_ -#define _DT_BINDINGS_RST_SUN8I_A23_A33_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_HSIC 2 -#define RST_MBUS 3 -#define RST_BUS_MIPI_DSI 4 -#define RST_BUS_SS 5 -#define RST_BUS_DMA 6 -#define RST_BUS_MMC0 7 -#define RST_BUS_MMC1 8 -#define RST_BUS_MMC2 9 -#define RST_BUS_NAND 10 -#define RST_BUS_DRAM 11 -#define RST_BUS_HSTIMER 12 -#define RST_BUS_SPI0 13 -#define RST_BUS_SPI1 14 -#define RST_BUS_OTG 15 -#define RST_BUS_EHCI 16 -#define RST_BUS_OHCI 17 -#define RST_BUS_VE 18 -#define RST_BUS_LCD 19 -#define RST_BUS_CSI 20 -#define RST_BUS_DE_BE 21 -#define RST_BUS_DE_FE 22 -#define RST_BUS_GPU 23 -#define RST_BUS_MSGBOX 24 -#define RST_BUS_SPINLOCK 25 -#define RST_BUS_DRC 26 -#define RST_BUS_SAT 27 -#define RST_BUS_LVDS 28 -#define RST_BUS_CODEC 29 -#define RST_BUS_I2S0 30 -#define RST_BUS_I2S1 31 -#define RST_BUS_I2C0 32 -#define RST_BUS_I2C1 33 -#define RST_BUS_I2C2 34 -#define RST_BUS_UART0 35 -#define RST_BUS_UART1 36 -#define RST_BUS_UART2 37 -#define RST_BUS_UART3 38 -#define RST_BUS_UART4 39 - -#endif /* _DT_BINDINGS_RST_SUN8I_A23_A33_H_ */ diff --git a/include/dt-bindings/reset/sun8i-a83t-ccu.h b/include/dt-bindings/reset/sun8i-a83t-ccu.h deleted file mode 100644 index 784f6e11664..00000000000 --- a/include/dt-bindings/reset/sun8i-a83t-ccu.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ -#define _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_HSIC 2 - -#define RST_DRAM 3 -#define RST_MBUS 4 - -#define RST_BUS_MIPI_DSI 5 -#define RST_BUS_SS 6 -#define RST_BUS_DMA 7 -#define RST_BUS_MMC0 8 -#define RST_BUS_MMC1 9 -#define RST_BUS_MMC2 10 -#define RST_BUS_NAND 11 -#define RST_BUS_DRAM 12 -#define RST_BUS_EMAC 13 -#define RST_BUS_HSTIMER 14 -#define RST_BUS_SPI0 15 -#define RST_BUS_SPI1 16 -#define RST_BUS_OTG 17 -#define RST_BUS_EHCI0 18 -#define RST_BUS_EHCI1 19 -#define RST_BUS_OHCI0 20 - -#define RST_BUS_VE 21 -#define RST_BUS_TCON0 22 -#define RST_BUS_TCON1 23 -#define RST_BUS_CSI 24 -#define RST_BUS_HDMI0 25 -#define RST_BUS_HDMI1 26 -#define RST_BUS_DE 27 -#define RST_BUS_GPU 28 -#define RST_BUS_MSGBOX 29 -#define RST_BUS_SPINLOCK 30 - -#define RST_BUS_LVDS 31 - -#define RST_BUS_SPDIF 32 -#define RST_BUS_I2S0 33 -#define RST_BUS_I2S1 34 -#define RST_BUS_I2S2 35 -#define RST_BUS_TDM 36 - -#define RST_BUS_I2C0 37 -#define RST_BUS_I2C1 38 -#define RST_BUS_I2C2 39 -#define RST_BUS_UART0 40 -#define RST_BUS_UART1 41 -#define RST_BUS_UART2 42 -#define RST_BUS_UART3 43 -#define RST_BUS_UART4 44 - -#endif /* _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun8i-de2.h b/include/dt-bindings/reset/sun8i-de2.h deleted file mode 100644 index 1c36a6ac86d..00000000000 --- a/include/dt-bindings/reset/sun8i-de2.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.io> - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -#ifndef _DT_BINDINGS_RESET_SUN8I_DE2_H_ -#define _DT_BINDINGS_RESET_SUN8I_DE2_H_ - -#define RST_MIXER0 0 -#define RST_MIXER1 1 -#define RST_WB 2 -#define RST_ROT 3 - -#endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */ diff --git a/include/dt-bindings/reset/sun8i-h3-ccu.h b/include/dt-bindings/reset/sun8i-h3-ccu.h deleted file mode 100644 index 484c2a22919..00000000000 --- a/include/dt-bindings/reset/sun8i-h3-ccu.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN8I_H3_H_ -#define _DT_BINDINGS_RST_SUN8I_H3_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_PHY2 2 -#define RST_USB_PHY3 3 - -#define RST_MBUS 4 - -#define RST_BUS_CE 5 -#define RST_BUS_DMA 6 -#define RST_BUS_MMC0 7 -#define RST_BUS_MMC1 8 -#define RST_BUS_MMC2 9 -#define RST_BUS_NAND 10 -#define RST_BUS_DRAM 11 -#define RST_BUS_EMAC 12 -#define RST_BUS_TS 13 -#define RST_BUS_HSTIMER 14 -#define RST_BUS_SPI0 15 -#define RST_BUS_SPI1 16 -#define RST_BUS_OTG 17 -#define RST_BUS_EHCI0 18 -#define RST_BUS_EHCI1 19 -#define RST_BUS_EHCI2 20 -#define RST_BUS_EHCI3 21 -#define RST_BUS_OHCI0 22 -#define RST_BUS_OHCI1 23 -#define RST_BUS_OHCI2 24 -#define RST_BUS_OHCI3 25 -#define RST_BUS_VE 26 -#define RST_BUS_TCON0 27 -#define RST_BUS_TCON1 28 -#define RST_BUS_DEINTERLACE 29 -#define RST_BUS_CSI 30 -#define RST_BUS_TVE 31 -#define RST_BUS_HDMI0 32 -#define RST_BUS_HDMI1 33 -#define RST_BUS_DE 34 -#define RST_BUS_GPU 35 -#define RST_BUS_MSGBOX 36 -#define RST_BUS_SPINLOCK 37 -#define RST_BUS_DBG 38 -#define RST_BUS_EPHY 39 -#define RST_BUS_CODEC 40 -#define RST_BUS_SPDIF 41 -#define RST_BUS_THS 42 -#define RST_BUS_I2S0 43 -#define RST_BUS_I2S1 44 -#define RST_BUS_I2S2 45 -#define RST_BUS_I2C0 46 -#define RST_BUS_I2C1 47 -#define RST_BUS_I2C2 48 -#define RST_BUS_UART0 49 -#define RST_BUS_UART1 50 -#define RST_BUS_UART2 51 -#define RST_BUS_UART3 52 -#define RST_BUS_SCR0 53 - -/* New resets imported in H5 */ -#define RST_BUS_SCR1 54 - -#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */ diff --git a/include/dt-bindings/reset/sun8i-r-ccu.h b/include/dt-bindings/reset/sun8i-r-ccu.h deleted file mode 100644 index 4ba64f3d6fc..00000000000 --- a/include/dt-bindings/reset/sun8i-r-ccu.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN8I_R_CCU_H_ -#define _DT_BINDINGS_RST_SUN8I_R_CCU_H_ - -#define RST_APB0_IR 0 -#define RST_APB0_TIMER 1 -#define RST_APB0_RSB 2 -#define RST_APB0_UART 3 -/* 4 is reserved for RST_APB0_W1 on A31 */ -#define RST_APB0_I2C 5 - -#endif /* _DT_BINDINGS_RST_SUN8I_R_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun8i-r40-ccu.h b/include/dt-bindings/reset/sun8i-r40-ccu.h deleted file mode 100644 index c5ebcf6672e..00000000000 --- a/include/dt-bindings/reset/sun8i-r40-ccu.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN8I_R40_H_ -#define _DT_BINDINGS_RST_SUN8I_R40_H_ - -#define RST_USB_PHY0 0 -#define RST_USB_PHY1 1 -#define RST_USB_PHY2 2 - -#define RST_DRAM 3 -#define RST_MBUS 4 - -#define RST_BUS_MIPI_DSI 5 -#define RST_BUS_CE 6 -#define RST_BUS_DMA 7 -#define RST_BUS_MMC0 8 -#define RST_BUS_MMC1 9 -#define RST_BUS_MMC2 10 -#define RST_BUS_MMC3 11 -#define RST_BUS_NAND 12 -#define RST_BUS_DRAM 13 -#define RST_BUS_EMAC 14 -#define RST_BUS_TS 15 -#define RST_BUS_HSTIMER 16 -#define RST_BUS_SPI0 17 -#define RST_BUS_SPI1 18 -#define RST_BUS_SPI2 19 -#define RST_BUS_SPI3 20 -#define RST_BUS_SATA 21 -#define RST_BUS_OTG 22 -#define RST_BUS_EHCI0 23 -#define RST_BUS_EHCI1 24 -#define RST_BUS_EHCI2 25 -#define RST_BUS_OHCI0 26 -#define RST_BUS_OHCI1 27 -#define RST_BUS_OHCI2 28 -#define RST_BUS_VE 29 -#define RST_BUS_MP 30 -#define RST_BUS_DEINTERLACE 31 -#define RST_BUS_CSI0 32 -#define RST_BUS_CSI1 33 -#define RST_BUS_HDMI0 34 -#define RST_BUS_HDMI1 35 -#define RST_BUS_DE 36 -#define RST_BUS_TVE0 37 -#define RST_BUS_TVE1 38 -#define RST_BUS_TVE_TOP 39 -#define RST_BUS_GMAC 40 -#define RST_BUS_GPU 41 -#define RST_BUS_TVD0 42 -#define RST_BUS_TVD1 43 -#define RST_BUS_TVD2 44 -#define RST_BUS_TVD3 45 -#define RST_BUS_TVD_TOP 46 -#define RST_BUS_TCON_LCD0 47 -#define RST_BUS_TCON_LCD1 48 -#define RST_BUS_TCON_TV0 49 -#define RST_BUS_TCON_TV1 50 -#define RST_BUS_TCON_TOP 51 -#define RST_BUS_DBG 52 -#define RST_BUS_LVDS 53 -#define RST_BUS_CODEC 54 -#define RST_BUS_SPDIF 55 -#define RST_BUS_AC97 56 -#define RST_BUS_IR0 57 -#define RST_BUS_IR1 58 -#define RST_BUS_THS 59 -#define RST_BUS_KEYPAD 60 -#define RST_BUS_I2S0 61 -#define RST_BUS_I2S1 62 -#define RST_BUS_I2S2 63 -#define RST_BUS_I2C0 64 -#define RST_BUS_I2C1 65 -#define RST_BUS_I2C2 66 -#define RST_BUS_I2C3 67 -#define RST_BUS_CAN 68 -#define RST_BUS_SCR 69 -#define RST_BUS_PS20 70 -#define RST_BUS_PS21 71 -#define RST_BUS_I2C4 72 -#define RST_BUS_UART0 73 -#define RST_BUS_UART1 74 -#define RST_BUS_UART2 75 -#define RST_BUS_UART3 76 -#define RST_BUS_UART4 77 -#define RST_BUS_UART5 78 -#define RST_BUS_UART6 79 -#define RST_BUS_UART7 80 - -#endif /* _DT_BINDINGS_RST_SUN8I_R40_H_ */ diff --git a/include/dt-bindings/reset/sun8i-v3s-ccu.h b/include/dt-bindings/reset/sun8i-v3s-ccu.h deleted file mode 100644 index b6790173afd..00000000000 --- a/include/dt-bindings/reset/sun8i-v3s-ccu.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> - * - * Based on sun8i-v3s-ccu.h, which is - * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RST_SUN8I_V3S_H_ -#define _DT_BINDINGS_RST_SUN8I_V3S_H_ - -#define RST_USB_PHY0 0 - -#define RST_MBUS 1 - -#define RST_BUS_CE 5 -#define RST_BUS_DMA 6 -#define RST_BUS_MMC0 7 -#define RST_BUS_MMC1 8 -#define RST_BUS_MMC2 9 -#define RST_BUS_DRAM 11 -#define RST_BUS_EMAC 12 -#define RST_BUS_HSTIMER 14 -#define RST_BUS_SPI0 15 -#define RST_BUS_OTG 17 -#define RST_BUS_EHCI0 18 -#define RST_BUS_OHCI0 22 -#define RST_BUS_VE 26 -#define RST_BUS_TCON0 27 -#define RST_BUS_CSI 30 -#define RST_BUS_DE 34 -#define RST_BUS_DBG 38 -#define RST_BUS_EPHY 39 -#define RST_BUS_CODEC 40 -#define RST_BUS_I2C0 46 -#define RST_BUS_I2C1 47 -#define RST_BUS_UART0 49 -#define RST_BUS_UART1 50 -#define RST_BUS_UART2 51 - -/* Reset lines not available on V3s */ -#define RST_BUS_I2S0 52 - -#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */ diff --git a/include/dt-bindings/reset/sun9i-a80-ccu.h b/include/dt-bindings/reset/sun9i-a80-ccu.h deleted file mode 100644 index 4b8df4b3678..00000000000 --- a/include/dt-bindings/reset/sun9i-a80-ccu.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ -#define _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ - -#define RST_BUS_FD 0 -#define RST_BUS_VE 1 -#define RST_BUS_GPU_CTRL 2 -#define RST_BUS_SS 3 -#define RST_BUS_MMC 4 -#define RST_BUS_NAND0 5 -#define RST_BUS_NAND1 6 -#define RST_BUS_SDRAM 7 -#define RST_BUS_SATA 8 -#define RST_BUS_TS 9 -#define RST_BUS_SPI0 10 -#define RST_BUS_SPI1 11 -#define RST_BUS_SPI2 12 -#define RST_BUS_SPI3 13 - -#define RST_BUS_OTG 14 -#define RST_BUS_OTG_PHY 15 -#define RST_BUS_MIPI_HSI 16 -#define RST_BUS_GMAC 17 -#define RST_BUS_MSGBOX 18 -#define RST_BUS_SPINLOCK 19 -#define RST_BUS_HSTIMER 20 -#define RST_BUS_DMA 21 - -#define RST_BUS_LCD0 22 -#define RST_BUS_LCD1 23 -#define RST_BUS_EDP 24 -#define RST_BUS_LVDS 25 -#define RST_BUS_CSI 26 -#define RST_BUS_HDMI0 27 -#define RST_BUS_HDMI1 28 -#define RST_BUS_DE 29 -#define RST_BUS_MP 30 -#define RST_BUS_GPU 31 -#define RST_BUS_MIPI_DSI 32 - -#define RST_BUS_SPDIF 33 -#define RST_BUS_AC97 34 -#define RST_BUS_I2S0 35 -#define RST_BUS_I2S1 36 -#define RST_BUS_LRADC 37 -#define RST_BUS_GPADC 38 -#define RST_BUS_CIR_TX 39 - -#define RST_BUS_I2C0 40 -#define RST_BUS_I2C1 41 -#define RST_BUS_I2C2 42 -#define RST_BUS_I2C3 43 -#define RST_BUS_I2C4 44 -#define RST_BUS_UART0 45 -#define RST_BUS_UART1 46 -#define RST_BUS_UART2 47 -#define RST_BUS_UART3 48 -#define RST_BUS_UART4 49 -#define RST_BUS_UART5 50 - -#endif /* _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ */ diff --git a/include/dt-bindings/reset/sun9i-a80-de.h b/include/dt-bindings/reset/sun9i-a80-de.h deleted file mode 100644 index 20507277017..00000000000 --- a/include/dt-bindings/reset/sun9i-a80-de.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RESET_SUN9I_A80_DE_H_ -#define _DT_BINDINGS_RESET_SUN9I_A80_DE_H_ - -#define RST_FE0 0 -#define RST_FE1 1 -#define RST_FE2 2 -#define RST_DEU0 3 -#define RST_DEU1 4 -#define RST_BE0 5 -#define RST_BE1 6 -#define RST_BE2 7 -#define RST_DRC0 8 -#define RST_DRC1 9 -#define RST_MERGE 10 - -#endif /* _DT_BINDINGS_RESET_SUN9I_A80_DE_H_ */ diff --git a/include/dt-bindings/reset/sun9i-a80-usb.h b/include/dt-bindings/reset/sun9i-a80-usb.h deleted file mode 100644 index ee492864c2a..00000000000 --- a/include/dt-bindings/reset/sun9i-a80-usb.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DT_BINDINGS_RESET_SUN9I_A80_USB_H_ -#define _DT_BINDINGS_RESET_SUN9I_A80_USB_H_ - -#define RST_USB0_HCI 0 -#define RST_USB1_HCI 1 -#define RST_USB2_HCI 2 - -#define RST_USB0_PHY 3 -#define RST_USB1_HSIC 4 -#define RST_USB1_PHY 5 -#define RST_USB2_HSIC 6 -#define RST_USB2_PHY 7 - -#endif /* _DT_BINDINGS_RESET_SUN9I_A80_USB_H_ */ diff --git a/include/dt-bindings/reset/suniv-ccu-f1c100s.h b/include/dt-bindings/reset/suniv-ccu-f1c100s.h deleted file mode 100644 index 6a4b4385fe5..00000000000 --- a/include/dt-bindings/reset/suniv-ccu-f1c100s.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) - * - * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.xyz> - * - */ - -#ifndef _DT_BINDINGS_RST_SUNIV_F1C100S_H_ -#define _DT_BINDINGS_RST_SUNIV_F1C100S_H_ - -#define RST_USB_PHY0 0 -#define RST_BUS_DMA 1 -#define RST_BUS_MMC0 2 -#define RST_BUS_MMC1 3 -#define RST_BUS_DRAM 4 -#define RST_BUS_SPI0 5 -#define RST_BUS_SPI1 6 -#define RST_BUS_OTG 7 -#define RST_BUS_VE 8 -#define RST_BUS_LCD 9 -#define RST_BUS_DEINTERLACE 10 -#define RST_BUS_CSI 11 -#define RST_BUS_TVD 12 -#define RST_BUS_TVE 13 -#define RST_BUS_DE_BE 14 -#define RST_BUS_DE_FE 15 -#define RST_BUS_CODEC 16 -#define RST_BUS_SPDIF 17 -#define RST_BUS_IR 18 -#define RST_BUS_RSB 19 -#define RST_BUS_I2S0 20 -#define RST_BUS_I2C0 21 -#define RST_BUS_I2C1 22 -#define RST_BUS_I2C2 23 -#define RST_BUS_UART0 24 -#define RST_BUS_UART1 25 -#define RST_BUS_UART2 26 - -#endif /* _DT_BINDINGS_RST_SUNIV_F1C100S_H_ */ diff --git a/include/dt-bindings/reset/tegra124-car.h b/include/dt-bindings/reset/tegra124-car.h deleted file mode 100644 index 070e4f6e748..00000000000 --- a/include/dt-bindings/reset/tegra124-car.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * This header provides Tegra124-specific constants for binding - * nvidia,tegra124-car. - */ - -#ifndef _DT_BINDINGS_RESET_TEGRA124_CAR_H -#define _DT_BINDINGS_RESET_TEGRA124_CAR_H - -#define TEGRA124_RESET(x) (6 * 32 + (x)) -#define TEGRA124_RST_DFLL_DVCO TEGRA124_RESET(0) - -#endif /* _DT_BINDINGS_RESET_TEGRA124_CAR_H */ diff --git a/include/dt-bindings/reset/tegra186-reset.h b/include/dt-bindings/reset/tegra186-reset.h deleted file mode 100644 index 7efec920053..00000000000 --- a/include/dt-bindings/reset/tegra186-reset.h +++ /dev/null @@ -1,205 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2015, NVIDIA CORPORATION. - */ - -#ifndef _ABI_MACH_T186_RESET_T186_H_ -#define _ABI_MACH_T186_RESET_T186_H_ - -#define TEGRA186_RESET_ACTMON 0 -#define TEGRA186_RESET_AFI 1 -#define TEGRA186_RESET_CEC 2 -#define TEGRA186_RESET_CSITE 3 -#define TEGRA186_RESET_DP2 4 -#define TEGRA186_RESET_DPAUX 5 -#define TEGRA186_RESET_DSI 6 -#define TEGRA186_RESET_DSIB 7 -#define TEGRA186_RESET_DTV 8 -#define TEGRA186_RESET_DVFS 9 -#define TEGRA186_RESET_ENTROPY 10 -#define TEGRA186_RESET_EXTPERIPH1 11 -#define TEGRA186_RESET_EXTPERIPH2 12 -#define TEGRA186_RESET_EXTPERIPH3 13 -#define TEGRA186_RESET_GPU 14 -#define TEGRA186_RESET_HDA 15 -#define TEGRA186_RESET_HDA2CODEC_2X 16 -#define TEGRA186_RESET_HDA2HDMICODEC 17 -#define TEGRA186_RESET_HOST1X 18 -#define TEGRA186_RESET_I2C1 19 -#define TEGRA186_RESET_I2C2 20 -#define TEGRA186_RESET_I2C3 21 -#define TEGRA186_RESET_I2C4 22 -#define TEGRA186_RESET_I2C5 23 -#define TEGRA186_RESET_I2C6 24 -#define TEGRA186_RESET_ISP 25 -#define TEGRA186_RESET_KFUSE 26 -#define TEGRA186_RESET_LA 27 -#define TEGRA186_RESET_MIPI_CAL 28 -#define TEGRA186_RESET_PCIE 29 -#define TEGRA186_RESET_PCIEXCLK 30 -#define TEGRA186_RESET_SATA 31 -#define TEGRA186_RESET_SATACOLD 32 -#define TEGRA186_RESET_SDMMC1 33 -#define TEGRA186_RESET_SDMMC2 34 -#define TEGRA186_RESET_SDMMC3 35 -#define TEGRA186_RESET_SDMMC4 36 -#define TEGRA186_RESET_SE 37 -#define TEGRA186_RESET_SOC_THERM 38 -#define TEGRA186_RESET_SOR0 39 -#define TEGRA186_RESET_SPI1 40 -#define TEGRA186_RESET_SPI2 41 -#define TEGRA186_RESET_SPI3 42 -#define TEGRA186_RESET_SPI4 43 -#define TEGRA186_RESET_TMR 44 -#define TEGRA186_RESET_TRIG_SYS 45 -#define TEGRA186_RESET_TSEC 46 -#define TEGRA186_RESET_UARTA 47 -#define TEGRA186_RESET_UARTB 48 -#define TEGRA186_RESET_UARTC 49 -#define TEGRA186_RESET_UARTD 50 -#define TEGRA186_RESET_VI 51 -#define TEGRA186_RESET_VIC 52 -#define TEGRA186_RESET_XUSB_DEV 53 -#define TEGRA186_RESET_XUSB_HOST 54 -#define TEGRA186_RESET_XUSB_PADCTL 55 -#define TEGRA186_RESET_XUSB_SS 56 -#define TEGRA186_RESET_AON_APB 57 -#define TEGRA186_RESET_AXI_CBB 58 -#define TEGRA186_RESET_BPMP_APB 59 -#define TEGRA186_RESET_CAN1 60 -#define TEGRA186_RESET_CAN2 61 -#define TEGRA186_RESET_DMIC5 62 -#define TEGRA186_RESET_DSIC 63 -#define TEGRA186_RESET_DSID 64 -#define TEGRA186_RESET_EMC_EMC 65 -#define TEGRA186_RESET_EMC_MEM 66 -#define TEGRA186_RESET_EMCSB_EMC 67 -#define TEGRA186_RESET_EMCSB_MEM 68 -#define TEGRA186_RESET_EQOS 69 -#define TEGRA186_RESET_GPCDMA 70 -#define TEGRA186_RESET_GPIO_CTL0 71 -#define TEGRA186_RESET_GPIO_CTL1 72 -#define TEGRA186_RESET_GPIO_CTL2 73 -#define TEGRA186_RESET_GPIO_CTL3 74 -#define TEGRA186_RESET_GPIO_CTL4 75 -#define TEGRA186_RESET_GPIO_CTL5 76 -#define TEGRA186_RESET_I2C10 77 -#define TEGRA186_RESET_I2C12 78 -#define TEGRA186_RESET_I2C13 79 -#define TEGRA186_RESET_I2C14 80 -#define TEGRA186_RESET_I2C7 81 -#define TEGRA186_RESET_I2C8 82 -#define TEGRA186_RESET_I2C9 83 -#define TEGRA186_RESET_JTAG2AXI 84 -#define TEGRA186_RESET_MPHY_IOBIST 85 -#define TEGRA186_RESET_MPHY_L0_RX 86 -#define TEGRA186_RESET_MPHY_L0_TX 87 -#define TEGRA186_RESET_NVCSI 88 -#define TEGRA186_RESET_NVDISPLAY0_HEAD0 89 -#define TEGRA186_RESET_NVDISPLAY0_HEAD1 90 -#define TEGRA186_RESET_NVDISPLAY0_HEAD2 91 -#define TEGRA186_RESET_NVDISPLAY0_MISC 92 -#define TEGRA186_RESET_NVDISPLAY0_WGRP0 93 -#define TEGRA186_RESET_NVDISPLAY0_WGRP1 94 -#define TEGRA186_RESET_NVDISPLAY0_WGRP2 95 -#define TEGRA186_RESET_NVDISPLAY0_WGRP3 96 -#define TEGRA186_RESET_NVDISPLAY0_WGRP4 97 -#define TEGRA186_RESET_NVDISPLAY0_WGRP5 98 -#define TEGRA186_RESET_PWM1 99 -#define TEGRA186_RESET_PWM2 100 -#define TEGRA186_RESET_PWM3 101 -#define TEGRA186_RESET_PWM4 102 -#define TEGRA186_RESET_PWM5 103 -#define TEGRA186_RESET_PWM6 104 -#define TEGRA186_RESET_PWM7 105 -#define TEGRA186_RESET_PWM8 106 -#define TEGRA186_RESET_SCE_APB 107 -#define TEGRA186_RESET_SOR1 108 -#define TEGRA186_RESET_TACH 109 -#define TEGRA186_RESET_TSC 110 -#define TEGRA186_RESET_UARTF 111 -#define TEGRA186_RESET_UARTG 112 -#define TEGRA186_RESET_UFSHC 113 -#define TEGRA186_RESET_UFSHC_AXI_M 114 -#define TEGRA186_RESET_UPHY 115 -#define TEGRA186_RESET_ADSP 116 -#define TEGRA186_RESET_ADSPDBG 117 -#define TEGRA186_RESET_ADSPINTF 118 -#define TEGRA186_RESET_ADSPNEON 119 -#define TEGRA186_RESET_ADSPPERIPH 120 -#define TEGRA186_RESET_ADSPSCU 121 -#define TEGRA186_RESET_ADSPWDT 122 -#define TEGRA186_RESET_APE 123 -#define TEGRA186_RESET_DPAUX1 124 -#define TEGRA186_RESET_NVDEC 125 -#define TEGRA186_RESET_NVENC 126 -#define TEGRA186_RESET_NVJPG 127 -#define TEGRA186_RESET_PEX_USB_UPHY 128 -#define TEGRA186_RESET_QSPI 129 -#define TEGRA186_RESET_TSECB 130 -#define TEGRA186_RESET_VI_I2C 131 -#define TEGRA186_RESET_UARTE 132 -#define TEGRA186_RESET_TOP_GTE 133 -#define TEGRA186_RESET_SHSP 134 -#define TEGRA186_RESET_PEX_USB_UPHY_L5 135 -#define TEGRA186_RESET_PEX_USB_UPHY_L4 136 -#define TEGRA186_RESET_PEX_USB_UPHY_L3 137 -#define TEGRA186_RESET_PEX_USB_UPHY_L2 138 -#define TEGRA186_RESET_PEX_USB_UPHY_L1 139 -#define TEGRA186_RESET_PEX_USB_UPHY_L0 140 -#define TEGRA186_RESET_PEX_USB_UPHY_PLL1 141 -#define TEGRA186_RESET_PEX_USB_UPHY_PLL0 142 -#define TEGRA186_RESET_TSCTNVI 143 -#define TEGRA186_RESET_EXTPERIPH4 144 -#define TEGRA186_RESET_DSIPADCTL 145 -#define TEGRA186_RESET_AUD_MCLK 146 -#define TEGRA186_RESET_MPHY_CLK_CTL 147 -#define TEGRA186_RESET_MPHY_L1_RX 148 -#define TEGRA186_RESET_MPHY_L1_TX 149 -#define TEGRA186_RESET_UFSHC_LP 150 -#define TEGRA186_RESET_BPMP_NIC 151 -#define TEGRA186_RESET_BPMP_NSYSPORESET 152 -#define TEGRA186_RESET_BPMP_NRESET 153 -#define TEGRA186_RESET_BPMP_DBGRESETN 154 -#define TEGRA186_RESET_BPMP_PRESETDBGN 155 -#define TEGRA186_RESET_BPMP_PM 156 -#define TEGRA186_RESET_BPMP_CVC 157 -#define TEGRA186_RESET_BPMP_DMA 158 -#define TEGRA186_RESET_BPMP_HSP 159 -#define TEGRA186_RESET_TSCTNBPMP 160 -#define TEGRA186_RESET_BPMP_TKE 161 -#define TEGRA186_RESET_BPMP_GTE 162 -#define TEGRA186_RESET_BPMP_PM_ACTMON 163 -#define TEGRA186_RESET_AON_NIC 164 -#define TEGRA186_RESET_AON_NSYSPORESET 165 -#define TEGRA186_RESET_AON_NRESET 166 -#define TEGRA186_RESET_AON_DBGRESETN 167 -#define TEGRA186_RESET_AON_PRESETDBGN 168 -#define TEGRA186_RESET_AON_ACTMON 169 -#define TEGRA186_RESET_AOPM 170 -#define TEGRA186_RESET_AOVC 171 -#define TEGRA186_RESET_AON_DMA 172 -#define TEGRA186_RESET_AON_GPIO 173 -#define TEGRA186_RESET_AON_HSP 174 -#define TEGRA186_RESET_TSCTNAON 175 -#define TEGRA186_RESET_AON_TKE 176 -#define TEGRA186_RESET_AON_GTE 177 -#define TEGRA186_RESET_SCE_NIC 178 -#define TEGRA186_RESET_SCE_NSYSPORESET 179 -#define TEGRA186_RESET_SCE_NRESET 180 -#define TEGRA186_RESET_SCE_DBGRESETN 181 -#define TEGRA186_RESET_SCE_PRESETDBGN 182 -#define TEGRA186_RESET_SCE_ACTMON 183 -#define TEGRA186_RESET_SCE_PM 184 -#define TEGRA186_RESET_SCE_DMA 185 -#define TEGRA186_RESET_SCE_HSP 186 -#define TEGRA186_RESET_TSCTNSCE 187 -#define TEGRA186_RESET_SCE_TKE 188 -#define TEGRA186_RESET_SCE_GTE 189 -#define TEGRA186_RESET_SCE_CFG 190 -#define TEGRA186_RESET_ADSP_ALL 191 -/** @brief controls the power up/down sequence of UFSHC PSW partition. Controls LP_PWR_READY, LP_ISOL_EN, and LP_RESET_N signals */ -#define TEGRA186_RESET_UFSHC_LP_SEQ 192 -#define TEGRA186_RESET_SIZE 193 - -#endif diff --git a/include/dt-bindings/reset/ti-syscon.h b/include/dt-bindings/reset/ti-syscon.h deleted file mode 100644 index 1427ff140f1..00000000000 --- a/include/dt-bindings/reset/ti-syscon.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * TI Syscon Reset definitions - * - * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __DT_BINDINGS_RESET_TI_SYSCON_H__ -#define __DT_BINDINGS_RESET_TI_SYSCON_H__ - -/* - * The reset does not support the feature and corresponding - * values are not valid - */ -#define ASSERT_NONE (1 << 0) -#define DEASSERT_NONE (1 << 1) -#define STATUS_NONE (1 << 2) - -/* When set this function is activated by setting(vs clearing) this bit */ -#define ASSERT_SET (1 << 3) -#define DEASSERT_SET (1 << 4) -#define STATUS_SET (1 << 5) - -/* The following are the inverse of the above and are added for consistency */ -#define ASSERT_CLEAR (0 << 3) -#define DEASSERT_CLEAR (0 << 4) -#define STATUS_CLEAR (0 << 5) - -#endif diff --git a/include/dt-bindings/reset/xlnx-versal-resets.h b/include/dt-bindings/reset/xlnx-versal-resets.h deleted file mode 100644 index 895424e9b0e..00000000000 --- a/include/dt-bindings/reset/xlnx-versal-resets.h +++ /dev/null @@ -1,105 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020 Xilinx, Inc. - */ - -#ifndef _DT_BINDINGS_VERSAL_RESETS_H -#define _DT_BINDINGS_VERSAL_RESETS_H - -#define VERSAL_RST_PMC_POR (0xc30c001U) -#define VERSAL_RST_PMC (0xc410002U) -#define VERSAL_RST_PS_POR (0xc30c003U) -#define VERSAL_RST_PL_POR (0xc30c004U) -#define VERSAL_RST_NOC_POR (0xc30c005U) -#define VERSAL_RST_FPD_POR (0xc30c006U) -#define VERSAL_RST_ACPU_0_POR (0xc30c007U) -#define VERSAL_RST_ACPU_1_POR (0xc30c008U) -#define VERSAL_RST_OCM2_POR (0xc30c009U) -#define VERSAL_RST_PS_SRST (0xc41000aU) -#define VERSAL_RST_PL_SRST (0xc41000bU) -#define VERSAL_RST_NOC (0xc41000cU) -#define VERSAL_RST_NPI (0xc41000dU) -#define VERSAL_RST_SYS_RST_1 (0xc41000eU) -#define VERSAL_RST_SYS_RST_2 (0xc41000fU) -#define VERSAL_RST_SYS_RST_3 (0xc410010U) -#define VERSAL_RST_FPD (0xc410011U) -#define VERSAL_RST_PL0 (0xc410012U) -#define VERSAL_RST_PL1 (0xc410013U) -#define VERSAL_RST_PL2 (0xc410014U) -#define VERSAL_RST_PL3 (0xc410015U) -#define VERSAL_RST_APU (0xc410016U) -#define VERSAL_RST_ACPU_0 (0xc410017U) -#define VERSAL_RST_ACPU_1 (0xc410018U) -#define VERSAL_RST_ACPU_L2 (0xc410019U) -#define VERSAL_RST_ACPU_GIC (0xc41001aU) -#define VERSAL_RST_RPU_ISLAND (0xc41001bU) -#define VERSAL_RST_RPU_AMBA (0xc41001cU) -#define VERSAL_RST_R5_0 (0xc41001dU) -#define VERSAL_RST_R5_1 (0xc41001eU) -#define VERSAL_RST_SYSMON_PMC_SEQ_RST (0xc41001fU) -#define VERSAL_RST_SYSMON_PMC_CFG_RST (0xc410020U) -#define VERSAL_RST_SYSMON_FPD_CFG_RST (0xc410021U) -#define VERSAL_RST_SYSMON_FPD_SEQ_RST (0xc410022U) -#define VERSAL_RST_SYSMON_LPD (0xc410023U) -#define VERSAL_RST_PDMA_RST1 (0xc410024U) -#define VERSAL_RST_PDMA_RST0 (0xc410025U) -#define VERSAL_RST_ADMA (0xc410026U) -#define VERSAL_RST_TIMESTAMP (0xc410027U) -#define VERSAL_RST_OCM (0xc410028U) -#define VERSAL_RST_OCM2_RST (0xc410029U) -#define VERSAL_RST_IPI (0xc41002aU) -#define VERSAL_RST_SBI (0xc41002bU) -#define VERSAL_RST_LPD (0xc41002cU) -#define VERSAL_RST_QSPI (0xc10402dU) -#define VERSAL_RST_OSPI (0xc10402eU) -#define VERSAL_RST_SDIO_0 (0xc10402fU) -#define VERSAL_RST_SDIO_1 (0xc104030U) -#define VERSAL_RST_I2C_PMC (0xc104031U) -#define VERSAL_RST_GPIO_PMC (0xc104032U) -#define VERSAL_RST_GEM_0 (0xc104033U) -#define VERSAL_RST_GEM_1 (0xc104034U) -#define VERSAL_RST_SPARE (0xc104035U) -#define VERSAL_RST_USB_0 (0xc104036U) -#define VERSAL_RST_UART_0 (0xc104037U) -#define VERSAL_RST_UART_1 (0xc104038U) -#define VERSAL_RST_SPI_0 (0xc104039U) -#define VERSAL_RST_SPI_1 (0xc10403aU) -#define VERSAL_RST_CAN_FD_0 (0xc10403bU) -#define VERSAL_RST_CAN_FD_1 (0xc10403cU) -#define VERSAL_RST_I2C_0 (0xc10403dU) -#define VERSAL_RST_I2C_1 (0xc10403eU) -#define VERSAL_RST_GPIO_LPD (0xc10403fU) -#define VERSAL_RST_TTC_0 (0xc104040U) -#define VERSAL_RST_TTC_1 (0xc104041U) -#define VERSAL_RST_TTC_2 (0xc104042U) -#define VERSAL_RST_TTC_3 (0xc104043U) -#define VERSAL_RST_SWDT_FPD (0xc104044U) -#define VERSAL_RST_SWDT_LPD (0xc104045U) -#define VERSAL_RST_USB (0xc104046U) -#define VERSAL_RST_DPC (0xc208047U) -#define VERSAL_RST_PMCDBG (0xc208048U) -#define VERSAL_RST_DBG_TRACE (0xc208049U) -#define VERSAL_RST_DBG_FPD (0xc20804aU) -#define VERSAL_RST_DBG_TSTMP (0xc20804bU) -#define VERSAL_RST_RPU0_DBG (0xc20804cU) -#define VERSAL_RST_RPU1_DBG (0xc20804dU) -#define VERSAL_RST_HSDP (0xc20804eU) -#define VERSAL_RST_DBG_LPD (0xc20804fU) -#define VERSAL_RST_CPM_POR (0xc30c050U) -#define VERSAL_RST_CPM (0xc410051U) -#define VERSAL_RST_CPMDBG (0xc208052U) -#define VERSAL_RST_PCIE_CFG (0xc410053U) -#define VERSAL_RST_PCIE_CORE0 (0xc410054U) -#define VERSAL_RST_PCIE_CORE1 (0xc410055U) -#define VERSAL_RST_PCIE_DMA (0xc410056U) -#define VERSAL_RST_CMN (0xc410057U) -#define VERSAL_RST_L2_0 (0xc410058U) -#define VERSAL_RST_L2_1 (0xc410059U) -#define VERSAL_RST_ADDR_REMAP (0xc41005aU) -#define VERSAL_RST_CPI0 (0xc41005bU) -#define VERSAL_RST_CPI1 (0xc41005cU) -#define VERSAL_RST_XRAM (0xc30c05dU) -#define VERSAL_RST_AIE_ARRAY (0xc10405eU) -#define VERSAL_RST_AIE_SHIM (0xc10405fU) - -#endif diff --git a/include/dt-bindings/reset/xlnx-zynqmp-resets.h b/include/dt-bindings/reset/xlnx-zynqmp-resets.h deleted file mode 100644 index d44525b9f8d..00000000000 --- a/include/dt-bindings/reset/xlnx-zynqmp-resets.h +++ /dev/null @@ -1,130 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2018 Xilinx, Inc. - */ - -#ifndef _DT_BINDINGS_ZYNQMP_RESETS_H -#define _DT_BINDINGS_ZYNQMP_RESETS_H - -#define ZYNQMP_RESET_PCIE_CFG 0 -#define ZYNQMP_RESET_PCIE_BRIDGE 1 -#define ZYNQMP_RESET_PCIE_CTRL 2 -#define ZYNQMP_RESET_DP 3 -#define ZYNQMP_RESET_SWDT_CRF 4 -#define ZYNQMP_RESET_AFI_FM5 5 -#define ZYNQMP_RESET_AFI_FM4 6 -#define ZYNQMP_RESET_AFI_FM3 7 -#define ZYNQMP_RESET_AFI_FM2 8 -#define ZYNQMP_RESET_AFI_FM1 9 -#define ZYNQMP_RESET_AFI_FM0 10 -#define ZYNQMP_RESET_GDMA 11 -#define ZYNQMP_RESET_GPU_PP1 12 -#define ZYNQMP_RESET_GPU_PP0 13 -#define ZYNQMP_RESET_GPU 14 -#define ZYNQMP_RESET_GT 15 -#define ZYNQMP_RESET_SATA 16 -#define ZYNQMP_RESET_ACPU3_PWRON 17 -#define ZYNQMP_RESET_ACPU2_PWRON 18 -#define ZYNQMP_RESET_ACPU1_PWRON 19 -#define ZYNQMP_RESET_ACPU0_PWRON 20 -#define ZYNQMP_RESET_APU_L2 21 -#define ZYNQMP_RESET_ACPU3 22 -#define ZYNQMP_RESET_ACPU2 23 -#define ZYNQMP_RESET_ACPU1 24 -#define ZYNQMP_RESET_ACPU0 25 -#define ZYNQMP_RESET_DDR 26 -#define ZYNQMP_RESET_APM_FPD 27 -#define ZYNQMP_RESET_SOFT 28 -#define ZYNQMP_RESET_GEM0 29 -#define ZYNQMP_RESET_GEM1 30 -#define ZYNQMP_RESET_GEM2 31 -#define ZYNQMP_RESET_GEM3 32 -#define ZYNQMP_RESET_QSPI 33 -#define ZYNQMP_RESET_UART0 34 -#define ZYNQMP_RESET_UART1 35 -#define ZYNQMP_RESET_SPI0 36 -#define ZYNQMP_RESET_SPI1 37 -#define ZYNQMP_RESET_SDIO0 38 -#define ZYNQMP_RESET_SDIO1 39 -#define ZYNQMP_RESET_CAN0 40 -#define ZYNQMP_RESET_CAN1 41 -#define ZYNQMP_RESET_I2C0 42 -#define ZYNQMP_RESET_I2C1 43 -#define ZYNQMP_RESET_TTC0 44 -#define ZYNQMP_RESET_TTC1 45 -#define ZYNQMP_RESET_TTC2 46 -#define ZYNQMP_RESET_TTC3 47 -#define ZYNQMP_RESET_SWDT_CRL 48 -#define ZYNQMP_RESET_NAND 49 -#define ZYNQMP_RESET_ADMA 50 -#define ZYNQMP_RESET_GPIO 51 -#define ZYNQMP_RESET_IOU_CC 52 -#define ZYNQMP_RESET_TIMESTAMP 53 -#define ZYNQMP_RESET_RPU_R50 54 -#define ZYNQMP_RESET_RPU_R51 55 -#define ZYNQMP_RESET_RPU_AMBA 56 -#define ZYNQMP_RESET_OCM 57 -#define ZYNQMP_RESET_RPU_PGE 58 -#define ZYNQMP_RESET_USB0_CORERESET 59 -#define ZYNQMP_RESET_USB1_CORERESET 60 -#define ZYNQMP_RESET_USB0_HIBERRESET 61 -#define ZYNQMP_RESET_USB1_HIBERRESET 62 -#define ZYNQMP_RESET_USB0_APB 63 -#define ZYNQMP_RESET_USB1_APB 64 -#define ZYNQMP_RESET_IPI 65 -#define ZYNQMP_RESET_APM_LPD 66 -#define ZYNQMP_RESET_RTC 67 -#define ZYNQMP_RESET_SYSMON 68 -#define ZYNQMP_RESET_AFI_FM6 69 -#define ZYNQMP_RESET_LPD_SWDT 70 -#define ZYNQMP_RESET_FPD 71 -#define ZYNQMP_RESET_RPU_DBG1 72 -#define ZYNQMP_RESET_RPU_DBG0 73 -#define ZYNQMP_RESET_DBG_LPD 74 -#define ZYNQMP_RESET_DBG_FPD 75 -#define ZYNQMP_RESET_APLL 76 -#define ZYNQMP_RESET_DPLL 77 -#define ZYNQMP_RESET_VPLL 78 -#define ZYNQMP_RESET_IOPLL 79 -#define ZYNQMP_RESET_RPLL 80 -#define ZYNQMP_RESET_GPO3_PL_0 81 -#define ZYNQMP_RESET_GPO3_PL_1 82 -#define ZYNQMP_RESET_GPO3_PL_2 83 -#define ZYNQMP_RESET_GPO3_PL_3 84 -#define ZYNQMP_RESET_GPO3_PL_4 85 -#define ZYNQMP_RESET_GPO3_PL_5 86 -#define ZYNQMP_RESET_GPO3_PL_6 87 -#define ZYNQMP_RESET_GPO3_PL_7 88 -#define ZYNQMP_RESET_GPO3_PL_8 89 -#define ZYNQMP_RESET_GPO3_PL_9 90 -#define ZYNQMP_RESET_GPO3_PL_10 91 -#define ZYNQMP_RESET_GPO3_PL_11 92 -#define ZYNQMP_RESET_GPO3_PL_12 93 -#define ZYNQMP_RESET_GPO3_PL_13 94 -#define ZYNQMP_RESET_GPO3_PL_14 95 -#define ZYNQMP_RESET_GPO3_PL_15 96 -#define ZYNQMP_RESET_GPO3_PL_16 97 -#define ZYNQMP_RESET_GPO3_PL_17 98 -#define ZYNQMP_RESET_GPO3_PL_18 99 -#define ZYNQMP_RESET_GPO3_PL_19 100 -#define ZYNQMP_RESET_GPO3_PL_20 101 -#define ZYNQMP_RESET_GPO3_PL_21 102 -#define ZYNQMP_RESET_GPO3_PL_22 103 -#define ZYNQMP_RESET_GPO3_PL_23 104 -#define ZYNQMP_RESET_GPO3_PL_24 105 -#define ZYNQMP_RESET_GPO3_PL_25 106 -#define ZYNQMP_RESET_GPO3_PL_26 107 -#define ZYNQMP_RESET_GPO3_PL_27 108 -#define ZYNQMP_RESET_GPO3_PL_28 109 -#define ZYNQMP_RESET_GPO3_PL_29 110 -#define ZYNQMP_RESET_GPO3_PL_30 111 -#define ZYNQMP_RESET_GPO3_PL_31 112 -#define ZYNQMP_RESET_RPU_LS 113 -#define ZYNQMP_RESET_PS_ONLY 114 -#define ZYNQMP_RESET_PL 115 -#define ZYNQMP_RESET_PS_PL0 116 -#define ZYNQMP_RESET_PS_PL1 117 -#define ZYNQMP_RESET_PS_PL2 118 -#define ZYNQMP_RESET_PS_PL3 119 - -#endif |