diff options
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/ast2500-scu.h | 2 | ||||
-rw-r--r-- | include/dt-bindings/memory/stm32-sdram.h | 37 | ||||
-rw-r--r-- | include/dt-bindings/reset/ast2500-reset.h | 45 |
3 files changed, 84 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/ast2500-scu.h b/include/dt-bindings/clock/ast2500-scu.h index ca58b12943b..e2d7aaf9fe8 100644 --- a/include/dt-bindings/clock/ast2500-scu.h +++ b/include/dt-bindings/clock/ast2500-scu.h @@ -27,3 +27,5 @@ #define PCLK_UART3 503 #define PCLK_UART4 504 #define PCLK_UART5 505 +#define PCLK_MAC1 506 +#define PCLK_MAC2 507 diff --git a/include/dt-bindings/memory/stm32-sdram.h b/include/dt-bindings/memory/stm32-sdram.h new file mode 100644 index 00000000000..89b719af534 --- /dev/null +++ b/include/dt-bindings/memory/stm32-sdram.h @@ -0,0 +1,37 @@ +#ifndef DT_BINDINGS_STM32_SDRAM_H +#define DT_BINDINGS_STM32_SDRAM_H + +#define NO_COL_8 0x0 +#define NO_COL_9 0x1 +#define NO_COL_10 0x2 +#define NO_COL_11 0x3 + +#define NO_ROW_11 0x0 +#define NO_ROW_12 0x1 +#define NO_ROW_13 0x2 + +#define MWIDTH_8 0x0 +#define MWIDTH_16 0x1 +#define MWIDTH_32 0x2 +#define BANKS_2 0x0 +#define BANKS_4 0x1 +#define CAS_1 0x1 +#define CAS_2 0x2 +#define CAS_3 0x3 +#define SDCLK_2 0x2 +#define RD_BURST_EN 0x1 +#define RD_BURST_DIS 0x0 +#define RD_PIPE_DL_0 0x0 +#define RD_PIPE_DL_1 0x1 +#define RD_PIPE_DL_2 0x2 + +/* Timing = value +1 cycles */ +#define TMRD_2 (2 - 1) +#define TXSR_6 (6 - 1) +#define TRAS_4 (4 - 1) +#define TRC_6 (6 - 1) +#define TWR_2 (2 - 1) +#define TRP_2 (2 - 1) +#define TRCD_2 (2 - 1) + +#endif diff --git a/include/dt-bindings/reset/ast2500-reset.h b/include/dt-bindings/reset/ast2500-reset.h new file mode 100644 index 00000000000..eb5e1db97b1 --- /dev/null +++ b/include/dt-bindings/reset/ast2500-reset.h @@ -0,0 +1,45 @@ +/* + * Copyright 2017 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ABI_MACH_ASPEED_AST2500_RESET_H_ +#define _ABI_MACH_ASPEED_AST2500_RESET_H_ + +/* + * The values are intentionally layed out as flags in + * WDT reset parameter. + */ + +#define AST_RESET_SOC 0 +#define AST_RESET_CHIP 1 +#define AST_RESET_CPU (1 << 1) +#define AST_RESET_ARM (1 << 2) +#define AST_RESET_COPROC (1 << 3) +#define AST_RESET_SDRAM (1 << 4) +#define AST_RESET_AHB (1 << 5) +#define AST_RESET_I2C (1 << 6) +#define AST_RESET_MAC1 (1 << 7) +#define AST_RESET_MAC2 (1 << 8) +#define AST_RESET_GCRT (1 << 9) +#define AST_RESET_USB20 (1 << 10) +#define AST_RESET_USB11_HOST (1 << 11) +#define AST_RESET_USB11_HID (1 << 12) +#define AST_RESET_VIDEO (1 << 13) +#define AST_RESET_HAC (1 << 14) +#define AST_RESET_LPC (1 << 15) +#define AST_RESET_SDIO (1 << 16) +#define AST_RESET_MIC (1 << 17) +#define AST_RESET_CRT2D (1 << 18) +#define AST_RESET_PWM (1 << 19) +#define AST_RESET_PECI (1 << 20) +#define AST_RESET_JTAG (1 << 21) +#define AST_RESET_ADC (1 << 22) +#define AST_RESET_GPIO (1 << 23) +#define AST_RESET_MCTP (1 << 24) +#define AST_RESET_XDMA (1 << 25) +#define AST_RESET_SPI (1 << 26) +#define AST_RESET_MISC (1 << 27) + +#endif /* _ABI_MACH_ASPEED_AST2500_RESET_H_ */ |