diff options
Diffstat (limited to 'include')
63 files changed, 1928 insertions, 1433 deletions
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 3b96b8209a1..519bb0be27a 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -115,7 +115,7 @@ struct gpio_desc { unsigned long flags; #define GPIOD_REQUESTED (1 << 0) /* Requested/claimed */ #define GPIOD_IS_OUT (1 << 1) /* GPIO is an output */ -#define GPIOD_IS_IN (1 << 2) /* GPIO is an output */ +#define GPIOD_IS_IN (1 << 2) /* GPIO is an input */ #define GPIOD_ACTIVE_LOW (1 << 3) /* value has active low */ #define GPIOD_IS_OUT_ACTIVE (1 << 4) /* set output active */ @@ -336,15 +336,24 @@ int gpio_lookup_name(const char *name, struct udevice **devp, unsigned int *offsetp, unsigned int *gpiop); /** - * get_gpios() - Turn the values of a list of GPIOs into an integer + * gpio_get_values_as_int() - Turn the values of a list of GPIOs into an int * * This puts the value of the first GPIO into bit 0, the second into bit 1, * etc. then returns the resulting integer. * * @gpio_list: List of GPIOs to collect - * @return resulting integer value + * @return resulting integer value, or -ve on error */ -unsigned gpio_get_values_as_int(const int *gpio_list); +int gpio_get_values_as_int(const int *gpio_list); + +/** + * gpio_claim_vector() - claim a number of GPIOs for input + * + * @gpio_num_array: array of gpios to claim, terminated by -1 + * @fmt: format string for GPIO names, e.g. "board_id%d" + * @return 0 if OK, -ve on error + */ +int gpio_claim_vector(const int *gpio_num_array, const char *fmt); /** * gpio_request_by_name() - Locate and request a GPIO by name diff --git a/include/bcd.h b/include/bcd.h index af4aa9c7baf..9ecd328284e 100644 --- a/include/bcd.h +++ b/include/bcd.h @@ -10,14 +10,12 @@ #ifndef _BCD_H #define _BCD_H -#include <linux/types.h> - -static inline unsigned int bcd2bin(u8 val) +static inline unsigned int bcd2bin(unsigned int val) { - return ((val) & 0x0f) + ((val) >> 4) * 10; + return ((val) & 0x0f) + ((val & 0xff) >> 4) * 10; } -static inline u8 bin2bcd (unsigned int val) +static inline unsigned int bin2bcd(unsigned int val) { return (((val / 10) << 4) | (val % 10)); } diff --git a/include/bootstage.h b/include/bootstage.h index be440148dd1..fe30ab64d6d 100644 --- a/include/bootstage.h +++ b/include/bootstage.h @@ -195,6 +195,8 @@ enum bootstage_id { BOOTSTAGE_ID_ACCUM_LCD, BOOTSTAGE_ID_ACCUM_SCSI, + BOOTSTAGE_ID_ACCUM_SPI, + BOOTSTAGE_ID_ACCUM_DECOMP, /* a few spare for the user, from here */ BOOTSTAGE_ID_USER, diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h deleted file mode 100644 index 932a3090b40..00000000000 --- a/include/configs/afeb9260.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> - * - * Configuation settings for the AFEB9260 board. - * Based on configuration for AT91SAM9260-EK - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H -#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 SoC*/ -#include <asm/arch/hardware.h> - -#define CONFIG_SYS_TEXT_BASE 0x21f00000 - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 - -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_DISPLAY_CPUINFO - -#define CONFIG_AFEB9260 /* AFEB9260 Board */ -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Hardware drivers - */ -#define CONFIG_ATMEL_LEGACY -#define CONFIG_AT91_GPIO -#define CONFIG_AT91_PULLUP 1 - -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS -#define CONFIG_USART3 /* USART 3 is DBGU */ - -#define CONFIG_BOOTDELAY 3 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP - -#define CONFIG_CMD_NAND -#define CONFIG_CMD_USB - -/* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ - -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) - -/* NAND flash */ -#ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 - -#endif - -/* NOR flash - no real flash on this board */ -#define CONFIG_SYS_NO_FLASH - -/* Ethernet */ -#define CONFIG_MACB -#define CONFIG_RESET_PHY_R -#define CONFIG_AT91_WANTS_COMMON_PHY -#define CONFIG_NET_RETRY_COUNT 20 - -/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_DOS_PARTITION -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#define CONFIG_USB_STORAGE - -#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x21e00000 - -#define CONFIG_SYS_USE_DATAFLASH_CS1 -#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 -\ - GENERATED_GBL_DATA_SIZE) - -/* bootstrap + u-boot + env + linux in dataflash on CS1 */ -#define CONFIG_ENV_IS_IN_DATAFLASH -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) -#define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock2 " \ - "rw rootfstype=jffs2 panic=20" - -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) - -#endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index a87059c5434..8da3325b7e8 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -83,10 +83,6 @@ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ "mmcrootfstype=ext4 rootwait\0" \ - "rootpath=/export/rootfs\0" \ - "nfsopts=nolock\0" \ - "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ - "::off\0" \ "ramroot=/dev/ram0 rw\0" \ "ramrootfstype=ext2\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -102,11 +98,6 @@ "${optargs} " \ "root=${spiroot} " \ "rootfstype=${spirootfstype}\0" \ - "netargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=/dev/nfs " \ - "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ - "ip=dhcp\0" \ "bootenv=uEnv.txt\0" \ "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ @@ -159,13 +150,6 @@ "sf probe ${spibusno}:0; " \ "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ "bootz ${loadaddr}\0" \ - "netboot=echo Booting from network ...; " \ - "setenv autoload no; " \ - "dhcp; " \ - "tftp ${loadaddr} ${bootfile}; " \ - "tftp ${fdtaddr} ${fdtfile}; " \ - "run netargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ "ramboot=echo Booting from ramdisk ...; " \ "run ramargs; " \ "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ @@ -181,6 +165,7 @@ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ NANDARGS \ + NETARGS \ DFUARGS #endif diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 6eb31e21201..331fdac0f18 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -295,6 +295,7 @@ "setenv fdtfile am437x-idk-evm.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree; fi; \0" \ + NETARGS \ DFUARGS \ #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index d5b6e37a38f..9e7f37dda94 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -106,7 +106,6 @@ #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -#define CONFIG_REGEX /* Enable regular expression support */ /* * BOOTP options */ diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index dedb7857ad9..94981e77536 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -64,7 +64,7 @@ #define CONFIG_BOOTARGS \ "console=ttyS0,115200 earlyprintk " \ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ - "256K(env),256k(evn_redundent),256k(spare)," \ + "256K(env),256k(env_redundent),256k(spare)," \ "512k(dtb),6M(kernel)ro,-(rootfs) " \ "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" #endif diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 6c1bd304c63..e43795bc3ef 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -171,7 +171,7 @@ #define CONFIG_BOOTARGS \ "console=ttyS0,115200 earlyprintk " \ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ - "256K(env),256k(evn_redundent),256k(spare)," \ + "256K(env),256k(env_redundent),256k(spare)," \ "512k(dtb),6M(kernel)ro,-(rootfs) " \ "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 240fc464bc2..b441fa038d3 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -13,6 +13,7 @@ #define __BUR_AM335X_COMMON_H__ /* ------------------------------------------------------------------------- */ #define BUR_COMMON_ENV \ +"usbscript=usb start && fatload usb 0 0x80000000 usbscript.img && source\0" \ "defaultip=192.168.60.253\0" \ "defaultsip=192.168.60.254\0" \ "netconsole=echo switching to network console ...; " \ @@ -30,12 +31,6 @@ "setenv stdout nc;setenv stdin nc;setenv stderr nc\0" #define CONFIG_CMD_TIME -#define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4) -#define CONFIG_CMD_UNZIP -#define CONFIG_CMD_BMP -#define CONFIG_BMP_24BMP -#define CONFIG_BMP_32BPP #define CONFIG_SYS_GENERIC_BOARD diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 577afe7e8f5..dbe05e433e3 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -31,7 +31,6 @@ #undef CONFIG_CMD_MTDPARTS #define CONFIG_CMD_DFU #define CONFIG_CMD_GPT -#define CONFIG_CMD_PMIC #define CONFIG_CMD_SETEXPR /* USB Composite download gadget - g_dnl */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 2eddb07f0ae..5476248d88d 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -149,6 +149,10 @@ #define CONFIG_OF_SPI #endif +/* Power */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C + #ifdef CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_MODE SPI_MODE_0 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index fcfc1b36039..b20b3388ef6 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -8,6 +8,7 @@ #define __CONFIG_H /* SPL */ +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT @@ -44,8 +45,21 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R +/* Driver Model */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_DM +#define CONFIG_DM_GPIO +#define CONFIG_DM_SERIAL +#define CONFIG_DM_THERMAL +#define CONFIG_CMD_DM +#endif + /* GPIO */ #define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO + +/* Thermal */ +#define CONFIG_IMX6_THERMAL /* Serial */ #define CONFIG_MXC_UART @@ -360,7 +374,7 @@ "mmc_boot=" \ "setenv fsload 'ext2load mmc 0:1'; " \ "mmc dev 0 && mmc rescan && " \ - "run loadscript; " \ + "setenv dtype mmc; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/mmcblk0p1 rootfstype=ext4 " \ @@ -374,7 +388,7 @@ \ "sata_boot=" \ "setenv fsload 'ext2load sata 0:1'; sata init && " \ - "run loadscript; " \ + "setenv dtype sata; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/sda1 rootfstype=ext4 " \ @@ -387,7 +401,7 @@ "fi\0" \ "usb_boot=" \ "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ - "run loadscript; " \ + "setenv dtype usb; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ "root=/dev/sda1 rootfstype=ext4 " \ @@ -451,7 +465,7 @@ "setenv root ubi0:rootfs ubi.mtd=2 " \ "rootfstype=ubifs; " \ "fi; " \ - "run loadscript; " \ + "setenv dtype nand; run loadscript; " \ "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ "setenv bootargs console=${console},${baudrate} " \ "root=${root} ${video} ${extra}; " \ diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h deleted file mode 100644 index 973f2c5d073..00000000000 --- a/include/configs/hummingboard.h +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Copyright (C) 2013 Freescale Semiconductor, Inc. - * Copyright (C) 2013 SolidRun ltd. - * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> - * - * Configuration settings for the SolidRun Hummingboard. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "mx6_common.h" -#include <asm/arch/imx-regs.h> -#include <asm/imx-common/gpio.h> -#include <linux/sizes.h> - -#define CONFIG_MX6 -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_MACH_TYPE 4773 - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -#define CONFIG_SYS_GENERIC_BOARD - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) - -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_MXC_GPIO - -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* Command definition */ -#include <config_cmd_default.h> - -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_I2C - -#define CONFIG_CMD_BMODE -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_MEMTEST -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) -#define CONFIG_LOADADDR 0x12000000 -#define CONFIG_SYS_TEXT_BASE 0x17800000 - -/* MMC Configuration */ -#define CONFIG_FSL_ESDHC -#define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 - -#define CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_BOUNCE_BUFFER -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION - -/* Ethernet Configuration */ -#define CONFIG_FEC_MXC -#ifdef CONFIG_FEC_MXC -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_MII -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS -#endif - -#if defined(CONFIG_MX6S) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-hummingboard.dtb" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttymxc0\0" \ - "splashpos=m,m\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "update_sd_firmware_filename=u-boot.imx\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_CMDLINE_EDITING - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ENV_SIZE (8 * 1024) - -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 - -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -#ifndef CONFIG_SYS_DCACHE_OFF -#define CONFIG_CMD_CACHE -#endif - -#endif /* __CONFIG_H * */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 8c016b79551..aeafbd5a6cd 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -79,4 +79,9 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" +#define CONFIG_ARMV7_PSCI 1 +/* Reserve top 1M for secure RAM */ +#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 +#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 + #endif /* __CONFIG_H */ diff --git a/include/configs/kwb.h b/include/configs/kwb.h index dd30df27b05..d1c745e6ab6 100644 --- a/include/configs/kwb.h +++ b/include/configs/kwb.h @@ -19,6 +19,14 @@ #define CONFIG_LCD_NOSTDOUT #define CONFIG_SYS_WHITE_ON_BLACK #define LCD_BPP LCD_COLOR32 + +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4) +#define CONFIG_CMD_UNZIP +#define CONFIG_CMD_BMP +#define CONFIG_BMP_24BMP +#define CONFIG_BMP_32BPP + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) @@ -72,10 +80,6 @@ BUR_COMMON_ENV \ "run loadromfs; " \ "tftp ${loadaddr} arimg && go ${loadaddr}; " \ "puts 'networkboot failed!';\0" \ -"usbupdate=echo updating u-boot from usb ...; " \ - "usb start; " \ - "fatload usb 0 0x80000000 updateubootusb.img && source; " \ - "puts 'usbupdate failed!'\0" \ "netscript=echo running script from network (tftp) ...; " \ "tftp 0x80000000 netscript.img && source; " \ "puts 'netscript load failed!'\0" \ @@ -93,7 +97,7 @@ BUR_COMMON_ENV \ #endif /* !CONFIG_SPL_BUILD*/ #define CONFIG_BOOTCOMMAND \ - "run usbupdate;" + "run usbscript;" #define CONFIG_BOOTDELAY 0 /* undefine command which we not need here */ diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 5c209913e54..dbc00ce7136 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -49,7 +49,6 @@ #define CONFIG_CMD_USB #define CONFIG_VIDEO -#define CONFIG_REGEX /* Enable regular expression support */ /* Memory configuration */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index c348d38c325..0cc1282281a 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -51,7 +51,6 @@ #define CONFIG_CMD_USB #define CONFIG_VIDEO -#define CONFIG_REGEX /* Enable regular expression support */ /* * Memory configurations diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index b569f344eb5..b6f9d4e580b 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -27,7 +27,7 @@ #define CONFIG_IMX6_THERMAL #define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_GPIO @@ -66,6 +66,47 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IMX_HDMI +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_IMX_VIDEO_SKIP +#define CONFIG_CONSOLE_MUX + +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT \ + "if hdmidet; then " \ + "usb start; " \ + "setenv stdin serial,usbkbd; "\ + "setenv stdout serial,vga; " \ + "setenv stderr serial,vga; " \ + "else " \ + "setenv stdin serial; " \ + "setenv stdout serial; " \ + "setenv stderr serial; " \ + "fi;" + #define CONFIG_SYS_NO_FLASH /* Command definition */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 5f834690f3b..425db8adee4 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -22,7 +22,6 @@ #define CONFIG_KEYBOARD #define CONFIG_MXC_GPIO #define CONFIG_OF_LIBFDT -#define CONFIG_REGEX #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 53975999112..caca98b5a96 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -21,6 +21,8 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CONFIG_DISPLAY_BOARDINFO_LATE + /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C @@ -37,6 +39,18 @@ #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_I2C_EDID + +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_AS3722_POWER +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + +/* Align LCD to 1MB boundary */ +#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE + /* SPI */ #define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ #define CONFIG_TEGRA114_SPI_CTRLS 6 diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 5ee0abe02a8..3874baa9401 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -182,11 +182,6 @@ #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0 -/* POWER */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_MAX77686 - /* GPT */ #define CONFIG_RANDOM_UUID diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index c58636a5417..e1db29ad285 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -11,6 +11,12 @@ #define CONFIG_NAND #include <configs/ti_omap3_common.h> +#undef CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_MAX_SIZE (64*1024) +#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE 0x40200000 + +#define CONFIG_BCH /* Display CPU and Board information */ #define CONFIG_DISPLAY_CPUINFO @@ -134,6 +140,8 @@ "bootm ${loadaddr}\0" \ "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \ "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcbootfdt=echo Booting with DT from mmc ...; " \ "run mmcargs; " \ "bootz ${loadaddr} - ${fdtaddr}\0" \ @@ -142,6 +150,13 @@ "if nand read ${loadaddr} linux; then " \ "bootm ${loadaddr};" \ "fi;\0" \ + "nanddtsboot=echo Booting from nand with DTS...; " \ + "run nandargs; " \ + "ubi part rootfs; "\ + "ubifsmount ubi0:rootfs; "\ + "run loadubifdt; "\ + "run loadubizimage; "\ + "bootz ${loadaddr} - ${fdtaddr}\0" \ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev}; if mmc rescan; then " \ @@ -169,6 +184,10 @@ "fi;" \ "fi;" \ "run nandboot; " \ + "if test -z \"${fdtfile}\"; then "\ + "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \ + "fi;" \ + "run nanddtsboot; " \ /* * Miscellaneous configurable options @@ -212,17 +231,22 @@ /* NAND boot config */ #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13} +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ + 13, 14, 16, 17, 18, 19, 20, 21, 22, \ + 23, 24, 25, 26, 27, 28, 30, 31, 32, \ + 33, 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 44, 45, 46, 47, 48, 49, 50, 51, \ + 52, 53, 54, 55, 56} #define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW +#define CONFIG_SYS_NAND_ECCBYTES 13 +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 /* NAND: SPL falcon mode configs */ diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 3bf45a224d2..f5361d1091b 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -125,6 +125,8 @@ func(HOST, host, 1) \ func(HOST, host, 0) +#define CONFIG_BOOTCOMMAND "" + #include <config_distro_bootcmd.h> #define CONFIG_KEEP_SERVERADDR @@ -207,5 +209,6 @@ #define CONFIG_CMD_LZMADEC #define CONFIG_CMD_USB +#define CONFIG_CMD_DATE #endif diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h deleted file mode 100644 index e7c35eca39c..00000000000 --- a/include/configs/sbc35_a9g20.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (C) 2009 - * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> - * - * Configuation settings for the Calao SBC35-A9G20 board - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* SoC type is defined in boards.cfg */ -#include <asm/hardware.h> -#include <linux/sizes.h> - -#if defined(CONFIG_SYS_USE_NANDFLASH) -#define CONFIG_ENV_IS_IN_NAND -#else -#define CONFIG_ENV_IS_IN_EEPROM -#endif - -#define MACH_TYPE_SBC35_A9G20 1848 -#define CONFIG_MACH_TYPE MACH_TYPE_SBC35_A9G20 - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */ - -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* GPIO */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -#define CONFIG_AT91_GPIO - -/* Serial */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_BOOTDELAY 3 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_USB - -/* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ -#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) - -/* SPI EEPROM */ -#define CONFIG_SPI -#define CONFIG_CMD_SPI -#define CONFIG_ATMEL_SPI - -#define CONFIG_CMD_EEPROM -#define CONFIG_SPI_M95XXX -#define CONFIG_SYS_EEPROM_SIZE 0x10000 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 - -/* SPI RTC */ -#define CONFIG_CMD_DATE -#define CONFIG_RTC_M41T94 -#define CONFIG_M41T94_SPI_BUS 0 -#define CONFIG_M41T94_SPI_CS 0 - -/* NAND flash */ -#define CONFIG_CMD_NAND -#define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 - -/* NOR flash - no real flash on this board */ -#define CONFIG_SYS_NO_FLASH 1 - -/* Ethernet */ -#define CONFIG_MACB -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R -#define CONFIG_MACB_SEARCH_PHY -#define CONFIG_AT91_WANTS_COMMON_PHY - -/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_DOS_PARTITION -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE -#define CONFIG_CMD_FAT - -#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - -/* Env in EEPROM, bootstrap + u-boot in NAND*/ -#ifdef CONFIG_ENV_IS_IN_EEPROM -#define CONFIG_ENV_OFFSET 0x20 -#define CONFIG_ENV_SIZE 0x1000 -#endif - -/* Env, bootstrap and u-boot in NAND */ -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 -#define CONFIG_ENV_SIZE 0x20000 -#endif - -#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock1 " \ - "mtdparts=atmel_nand:16M(kernel)ro," \ - "120M(rootfs),-(other) " \ - "rw rootfstype=jffs2" - - -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) - -#endif diff --git a/include/configs/sc3.h b/include/configs/sc3.h deleted file mode 100644 index 14e033dd802..00000000000 --- a/include/configs/sc3.h +++ /dev/null @@ -1,549 +0,0 @@ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, <hs@denx.de>. - * - * From: - * (C) Copyright 2003 - * Juergen Beisert, EuroDesign embedded technologies, jbeisert@eurodsn.de - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#undef USE_VGA_GRAPHICS - -/* Memory Map - * 0x00000000 .... 0x03FFFFFF -> RAM (up to 128MiB) - * 0x74000000 .... 0x740FFFFF -> CS#6 - * 0x74100000 .... 0x741FFFFF -> CS#7 - * 0x74200000 .... 0x742FFFFF -> CS4# if no internal USB - * 0x74300000 .... 0x743FFFFF -> CS5# if no boosted IDE - * 0x77C00000 .... 0x77CFFFFF -> CS4# USB HC (1 MiB) - * 0x77D00000 .... 0x77DFFFFF -> CS1# NAND-Flash (1 MiB) - * 0x78000000 .... 0x78FFFFFF -> CS2# ISA-Bus Speicherzugriff (16 MiB) - * 0x79000000 .... 0x7900FFFF -> CS2# ISA-Bus IO-Zugriff (16 MiB, mapped: 64kiB) - * 0x79010000 .... 0x79FFFFFF -> CS2# ISA-Bus IO-Zugriff (mirrored) - * 0x7A000000 .... 0x7A0FFFFF -> CS5# IDE emulation (1MiB) - * - * 0x80000000 .... 0x9FFFFFFF -> PCI-Bus Speicherzugriff (512MiB, mapped: 1:1) - * 0xA0000000 .... 0xBFFFFFFF -> PCI-Bus Speicherzugriff (512MiB, mapped: 0x00000000...0x1FFFFFFF) - * 0xE8000000 .... 0xE800FFFF -> PCI-Bus IO-Zugriff (64kiB, translated to PCI: 0x0000...0xFFFF) - * 0xE8800000 .... 0xEBFFFFFF -> PCI-Bus IO-Zugriff (56MiB, translated to PCI: 0x00800000...0x3FFFFFF) - * 0xEED00000 .... 0xEED00003 -> PCI-Bus - * 0xEF400000 .... 0xEF40003F -> PCI-Bus Local Configuration Registers - * 0xEF40003F .... 0xEF5FFFFF -> reserved - * 0xEF600000 .... 0xEFFFFFFF -> 405GP internal Devices (10 MiB) - * 0xF0000000 .... 0xF01FFFFF -> Flash-ROM (2 MiB) - * 0xF0200000 .... 0xF7FFFFFF -> free for flash devices - * 0xF8000000 .... 0xF8000FFF -> OnChipMemory (4kiB) - * 0xF8001000 .... 0xFFDFFFFF -> free for flash devices - * 0xFFE00000 .... 0xFFFFFFFF -> BOOT-ROM (2 MiB) - */ - -#define CONFIG_SC3 1 -#define CONFIG_405GP 1 - -#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 - -#define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */ - -/* - * Define IDE_USES_ISA_EMULATION for slower IDE access in the ISA-IO address range - * If undefined, IDE access uses a seperat emulation with higher access speed. - * Consider to inform your Linux IDE driver about the different addresses! - * IDE_USES_ISA_EMULATION is only used if you define CONFIG_CMD_IDE! - */ -#define IDE_USES_ISA_EMULATION - -/*----------------------------------------------------------------------- - * Serial Port - *----------------------------------------------------------------------*/ -#define CONFIG_CONS_INDEX 1 /* Use UART0 */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_serial_clock() - -/* - * define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz - */ -#define CONFIG_SYS_CLK_FREQ 33333333 - -/* - * define CONFIG_BAUDRATE to the baudrate value you want to use as default - */ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "nand_args=setenv bootargs root=/dev/mtdblock5 rw" \ - "rootfstype=jffs2\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addcons=setenv bootargs ${bootargs} " \ - "console=ttyS0,${baudrate}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ - "bootm ${kernel_addr}\0" \ - "flash_nand=run nand_args addip addcons;bootm ${kernel_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \ - "bootm\0" \ - "rootpath=/opt/eldk/ppc_4xx\0" \ - "bootfile=/tftpboot/sc3/uImage\0" \ - "u-boot=/tftpboot/sc3/u-boot.bin\0" \ - "setup=tftp 200000 /tftpboot/sc3/setup.img;source 200000\0" \ - "kernel_addr=FFE08000\0" \ - "" -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ -#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ - -#if 1 /* feel free to disable for development */ -#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT \ - "\nSC3 - booting... stop with ENTER\n" -#define CONFIG_AUTOBOOT_DELAY_STR "\r" /* 1st "password" */ -#define CONFIG_AUTOBOOT_DELAY_STR2 "\n" /* 1st "password" */ -#endif - -/* - * define CONFIG_BOOTCOMMAND to the autoboot commands. They will running after - * the CONFIG_BOOTDELAY delay to boot your machine - */ -#define CONFIG_BOOTCOMMAND "bootp;dcache on;bootm" - -/* - * define CONFIG_BOOTARGS to the default kernel parameters. They will used if you don't - * set different values at the u-boot prompt - */ -#ifdef USE_VGA_GRAPHICS - #define CONFIG_BOOTARGS "root=/dev/nfs rw ip=bootp nfsroot=/tftpboot/solidcard3re" -#else - #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/nfs rw ip=bootp" -#endif -/* - * Is the USB host controller assembled? If yes define CONFIG_ISP1161_PRESENT - * This reserves memory bank #4 for this purpose - */ -#undef CONFIG_ISP1161_PRESENT - -#undef CONFIG_LOADS_ECHO /* no echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* #define CONFIG_EEPRO100_SROM_WRITE */ -/* #define CONFIG_SHOW_MAC */ -#define CONFIG_EEPRO100 - -#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII 1 /* add 405GP MII PHY management */ -#define CONFIG_PHY_ADDR 1 /* the connected Phy defaults to address 1 */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MII -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NET -#define CONFIG_CMD_PCI -#define CONFIG_CMD_PING -#define CONFIG_CMD_SOURCE - - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SC3> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ - -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -/* - * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. - * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. - * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. - * The Linux BASE_BAUD define should match this configuration. - * baseBaud = cpuClock/(uartDivisor*16) - * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, - * set Linux BASE_BAUD to 403200. - * - * Consider the OPB clock! If it get lower the BASE_BAUD must be lower to - * (see 405GP datasheet for descritpion) - */ -#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ -#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ -#define CONFIG_SYS_BASE_BAUD 921600 /* internal clock */ - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - -#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ - -/*----------------------------------------------------------------------- - * IIC stuff - *----------------------------------------------------------------------- - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_PPC4XX -#define CONFIG_SYS_I2C_PPC4XX_CH0 - -#define I2C_INIT -#define I2C_ACTIVE 0 -#define I2C_TRISTATE 0 - -#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 -#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */ - -#define CONFIG_RTC_DS1337 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 - -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ -#define PCI_HOST_FORCE 1 /* configure as pci host */ -#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ - -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ - -/* If you want to see, whats connected to your PCI bus */ -/* #define CONFIG_PCI_SCAN_SHOW */ - -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ -#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ -#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ -#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ -#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ -#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ - -/*----------------------------------------------------------------------- - * External peripheral base address - *----------------------------------------------------------------------- - */ -#if !defined(CONFIG_CMD_IDE) - -#undef CONFIG_IDE_LED /* no led for ide supported */ -#undef CONFIG_IDE_RESET /* no reset for ide supported */ - -/*----------------------------------------------------------------------- - * IDE/ATA stuff - *----------------------------------------------------------------------- - */ -#else -#define CONFIG_START_IDE 1 /* check, if use IDE */ - -#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ -#undef CONFIG_IDE_LED /* no led for ide supported */ -#undef CONFIG_IDE_RESET /* no reset for ide supported */ - -#define CONFIG_ATAPI -#define CONFIG_DOS_PARTITION -#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */ - -#ifndef IDE_USES_ISA_EMULATION - -/* New and faster access */ -#define CONFIG_SYS_ATA_BASE_ADDR 0x7A000000 /* start of ISA IO emulation */ - -/* How many IDE busses are available */ -#define CONFIG_SYS_IDE_MAXBUS 1 - -/* What IDE ports are available */ -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x000 /* first is available */ -#undef CONFIG_SYS_ATA_IDE1_OFFSET /* second not available */ - -/* access to the data port is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_DATA_OFFSET + 0 */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ - -/* access to the registers is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_REG_OFFSET + [1..7] */ -#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */ - -/* access to the alternate register is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_ALT_OFFSET + 6 */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x008 /* Offset for alternate registers */ - -#else /* IDE_USES_ISA_EMULATION */ - -#define CONFIG_SYS_ATA_BASE_ADDR 0x79000000 /* start of ISA IO emulation */ - -/* How many IDE busses are available */ -#define CONFIG_SYS_IDE_MAXBUS 1 - -/* What IDE ports are available */ -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* first is available */ -#undef CONFIG_SYS_ATA_IDE1_OFFSET /* second not available */ - -/* access to the data port is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_DATA_OFFSET + 0 */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ - -/* access to the registers is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_REG_OFFSET + [1..7] */ -#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */ - -/* access to the alternate register is calculated: - CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET + CONFIG_SYS_ATA_ALT_OFFSET + 6 */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x03F0 /* Offset for alternate registers */ - -#endif /* IDE_USES_ISA_EMULATION */ - -#endif - -/* -#define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000 -#define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000 -#define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000 -*/ - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - * - * CONFIG_SYS_FLASH_BASE -> start address of internal flash - * CONFIG_SYS_MONITOR_BASE -> start of u-boot - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFE00000 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ -#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MiB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/*----------------------------------------------------------------------- - * FLASH organization ## FIXME: lookup in datasheet - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ - -#define CONFIG_SYS_FLASH_CFI /* flash is CFI compat. */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector */ -#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash*/ -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ -#define CONFIG_SYS_WRITE_SWAPPED_DATA /* swap Databytes between reading/writing */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#ifdef CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OFFSET 0x00000000 /* Offset of Environment Sector in bottom type */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SECT_SIZE 0x4000 /* see README - env sector total size */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#endif -/* let us changing anything in our environment */ -#define CONFIG_ENV_OVERWRITE - -/* - * NAND-FLASH stuff - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x77D00000 - -#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ - -/* No command line, one static partition */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x01000000 -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* - * Init Memory Controller: - * - */ - -#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE -#define FLASH_BASE1_PRELIM 0 - -/*----------------------------------------------------------------------- - * Some informations about the internal SRAM (OCM=On Chip Memory) - * - * CONFIG_SYS_OCM_DATA_ADDR -> location - * CONFIG_SYS_OCM_DATA_SIZE -> size -*/ - -#define CONFIG_SYS_TEMP_STACK_OCM 1 -#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 -#define CONFIG_SYS_OCM_DATA_SIZE 0x1000 - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM): - * - we are using the internal 4k SRAM, so we don't need data cache mapping - * - internal SRAM (OCM=On Chip Memory) is placed to CONFIG_SYS_OCM_DATA_ADDR - * - Stackpointer will be located to - * (CONFIG_SYS_INIT_RAM_ADDR&0xFFFF0000) | (CONFIG_SYS_INIT_SP_OFFSET&0x0000FFFF) - * in arch/powerpc/cpu/ppc4xx/start.S - */ - -#undef CONFIG_SYS_INIT_DCACHE_CS -/* Where the internal SRAM starts */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR -/* Where the internal SRAM ends (only offset) */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x0F00 - -/* - - CONFIG_SYS_INIT_RAM_ADDR ------> ------------ lower address - | | - | ^ | - | | | - | | Stack | - CONFIG_SYS_GBL_DATA_OFFSET ----> ------------ - | | - | 64 Bytes | - | | - CONFIG_SYS_INIT_RAM_SIZE ------> ------------ higher address - (offset only) - -*/ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -/* Initial value of the stack pointern in internal SRAM */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* ################################################################################### */ -/* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ -/* They are currently undefined cause they are initiaized in board/solidcard3/init.S */ - -/* This chip select accesses the boot device */ -/* It depends on boot select switch if this device is 16 or 8 bit */ - -#undef CONFIG_SYS_EBC_PB0AP -#undef CONFIG_SYS_EBC_PB0CR - -#undef CONFIG_SYS_EBC_PB1AP -#undef CONFIG_SYS_EBC_PB1CR - -#undef CONFIG_SYS_EBC_PB2AP -#undef CONFIG_SYS_EBC_PB2CR - -#undef CONFIG_SYS_EBC_PB3AP -#undef CONFIG_SYS_EBC_PB3CR - -#undef CONFIG_SYS_EBC_PB4AP -#undef CONFIG_SYS_EBC_PB4CR - -#undef CONFIG_SYS_EBC_PB5AP -#undef CONFIG_SYS_EBC_PB5CR - -#undef CONFIG_SYS_EBC_PB6AP -#undef CONFIG_SYS_EBC_PB6CR - -#undef CONFIG_SYS_EBC_PB7AP -#undef CONFIG_SYS_EBC_PB7CR - -#define CONFIG_SYS_EBC_CFG 0xb84ef000 - -#undef CONFIG_SDRAM_BANK0 /* use private SDRAM initialization */ -#undef CONFIG_SPD_EEPROM - -/* - * Define this to get more information about system configuration - */ -/* #define SC3_DEBUGOUT */ -#undef SC3_DEBUGOUT - -/*********************************************************************** - * External peripheral base address - ***********************************************************************/ - -#define CONFIG_SYS_ISA_MEM_BASE_ADDRESS 0x78000000 -/* - Die Grafik-Treiber greifen über die Adresse in diesem Macro auf den Chip zu. - Das funktioniert bei deren Karten, weil sie eine PCI-Bridge benutzen, die - das gleiche Mapping durchführen kann, wie der SC520 (also Aufteilen von IO-Zugriffen - auf ISA- und PCI-Zyklen) - */ -#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 -/*#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0x79000000 */ - -/************************************************************ - * Video support - ************************************************************/ - -#ifdef USE_VGA_GRAPHICS -#define CONFIG_VIDEO /* To enable video controller support */ -#define CONFIG_VIDEO_CT69000 -#define CONFIG_CFB_CONSOLE -/* #define CONFIG_VIDEO_LOGO */ -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_VIDEO_SW_CURSOR -/* #define CONFIG_VIDEO_HW_CURSOR */ -#define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */ - -#define VIDEO_HW_RECTFILL -#define VIDEO_HW_BITBLT - -#endif - -/************************************************************ - * Ident - ************************************************************/ -#define CONFIG_SC3_VERSION "r1.4" - -#define POST_OUT(x) (*((volatile unsigned char*)(0x79000080))=x) - -#endif /* __CONFIG_H */ diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h index 668a91e1161..b8e1c47651c 100644 --- a/include/configs/socfpga_arria5.h +++ b/include/configs/socfpga_arria5.h @@ -37,7 +37,6 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_REGEX /* Enable regular expression support */ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 41bb52bc8c0..e742acf8021 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_THUMB_BUILD -#define CONFIG_SOCFPGA - /* * High level configuration */ @@ -298,7 +296,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CRC32_VERIFY /* Linker script for SPL */ -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-socfpga/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 676144a668a..1227711f32c 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -37,7 +37,6 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_REGEX /* Enable regular expression support */ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 7f569fdac81..84cc19df4f6 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -50,8 +50,14 @@ #define CONFIG_STM32_GPIO #define CONFIG_STM32_SERIAL - -#define CONFIG_STM32_USART1 +/* + * Configuration of the USART + * 1: TX:PA9 PX:PA10 + * 2: TX:PD5 RX:PD6 + * 3: TX:PC10 RX:PC11 + * 6: TX:PC6 RX:PC7 + */ +#define CONFIG_STM32_USART 1 #define CONFIG_STM32_HSE_HZ 8000000 diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index ab1e61cf896..e75e6616ca9 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -79,5 +79,7 @@ #define CONFIG_AUTOBOOT_STOP_STR " " #define CONFIG_AUTOBOOT_PROMPT \ "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay - +#define CONFIG_OF_SEPARATE +#define CONFIG_OF_CONTROL +#define CONFIG_OF_LIBFDT #endif /* __CONFIG_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c8ebb54f374..2d6b8157397 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -297,6 +297,9 @@ extern int soft_i2c_gpio_scl; #endif #ifdef CONFIG_USB_EHCI +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_OHCI_SUNXI +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #endif diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 3a88f22bbf0..b7ad7dfe07a 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -39,8 +39,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ @@ -104,6 +102,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_BOUNCE_BUFFER /* Ethernet */ @@ -163,6 +162,7 @@ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE @@ -182,7 +182,13 @@ #ifdef CONFIG_USB_KEYBOARD #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE #define CONFIG_SYS_STDIO_DEREGISTER -#define CONFIG_PREBOOT "if hdmidet; then usb start; fi" +#define CONFIG_PREBOOT \ + "if hdmidet; then " \ + "usb start; " \ + "run set_con_usb_hdmi; " \ + "else " \ + "run set_con_serial; " \ + "fi;" #endif /* CONFIG_USB_KEYBOARD */ #endif /* CONFIG_CMD_USB */ @@ -241,9 +247,12 @@ "bootm 0x10800000 0x10d00000\0" \ "console=ttymxc0\0" \ "fan=gpio set 92\0" \ - "stdin=serial,usbkbd\0" \ - "stdout=serial,vga\0" \ - "stderr=serial,vga\0" + "set_con_serial=setenv stdin serial; " \ + "setenv stdout serial; " \ + "setenv stderr serial;\0" \ + "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \ + "setenv stdout serial,vga; " \ + "setenv stderr serial,vga;\0" #define CONFIG_BOOTCOMMAND \ "mmc rescan; " \ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index c3ad8beb903..0cea795de1b 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -34,7 +34,7 @@ #define STDIN_KBD_USB "" #endif -#ifdef CONFIG_VIDEO_TEGRA +#ifdef CONFIG_LCD #define STDOUT_LCD ",lcd" #else #define STDOUT_LCD "" @@ -50,6 +50,8 @@ #define BOARD_EXTRA_ENV_SETTINGS #endif +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 2cf1f68404b..7ae17923548 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -89,6 +89,9 @@ #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#ifndef CONFIG_SPL_BUILD +#define CONFIG_SYS_STDIO_DEREGISTER +#endif /* * Miscellaneous configurable options diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 9eba5d517db..252e607d73f 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -26,13 +26,9 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* Environment information, boards can override if required */ -#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */ #define CONFIG_STACKBASE 0x82800000 /* 40MB */ /*----------------------------------------------------------------------- @@ -64,10 +60,11 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ +#define CONFIG_LOADADDR 0x81000000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=0x81000000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index f2b3774da8f..1aee5c89f4c 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -18,13 +18,9 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* Environment information, boards can override if required */ -#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */ #define CONFIG_STACKBASE 0x82800000 /* 40MB */ /*----------------------------------------------------------------------- @@ -56,10 +52,11 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ +#define CONFIG_LOADADDR 0x81000000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=0x81000000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 6330281df71..0841f33bfc9 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -24,13 +24,9 @@ */ #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */ -/* Environment information, boards can override if required */ -#define CONFIG_LOADADDR 0x00408000 /* def. location for kernel */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LOAD_ADDR 0x00A00800 /* default */ #define CONFIG_STACKBASE 0x02800000 /* 40MB */ /*----------------------------------------------------------------------- @@ -62,10 +58,11 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ +#define CONFIG_LOADADDR 0x01000000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x10000000\0" \ "pxefile_addr_r=0x10100000\0" \ - "kernel_addr_r=0x01000000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "fdt_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x02100000\0" diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index bfdbeb70d29..3e8e3c1e5bd 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -23,13 +23,9 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* Environment information, boards can override if required */ -#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */ #define CONFIG_STACKBASE 0x82800000 /* 40MB */ /*----------------------------------------------------------------------- @@ -61,10 +57,11 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ +#define CONFIG_LOADADDR 0x81000000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=0x81000000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 110a4f87956..f8829425a54 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -279,4 +279,29 @@ #endif #endif /* !CONFIG_NOR_BOOT */ +/* Generic Environment Variables */ + +#ifdef CONFIG_CMD_NET +#define NETARGS \ + "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ + "::off\0" \ + "nfsopts=nolock\0" \ + "rootpath=/export/rootfs\0" \ + "netloadimage=tftp ${loadaddr} ${bootfile}\0" \ + "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \ + "netargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=/dev/nfs " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ + "ip=dhcp\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload no; " \ + "dhcp; " \ + "run netloadimage; " \ + "run netloadfdt; " \ + "run netargs; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" + +#endif + #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f2be8d583ef..33834912fc1 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -92,11 +92,6 @@ "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ - "netargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=/dev/nfs " \ - "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ - "ip=dhcp\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" \ @@ -123,13 +118,6 @@ "bootz ${loadaddr} - ${fdtaddr}; " \ "fi;" \ "fi;\0" \ - "netboot=echo Booting from network ...; " \ - "set env autoload no; " \ - "dhcp; " \ - "tftp ${loadaddr} ${bootfile}; " \ - "tftp ${fdtaddr} ${fdtfile}; " \ - "run netargs; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ "findfdt="\ "if test $board_name = omap5_uevm; then " \ "setenv fdtfile omap5-uevm.dtb; fi; " \ @@ -143,6 +131,7 @@ "echo WARNING: Could not determine device tree to use; fi; \0" \ "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ DFUARGS \ + NETARGS \ #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h deleted file mode 100644 index 79c7fc51293..00000000000 --- a/include/configs/tny_a9260.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop <stelian@popies.net> - * Lead Tech Design <www.leadtechdesign.com> - * - * Copyright (C) 2009 - * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> - * - * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * SoC must be defined first, before hardware.h is included. - * In this case SoC is defined in boards.cfg. - */ -#include <asm/hardware.h> - -#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH) -#define CONFIG_ENV_IS_IN_NAND -#else -#define CONFIG_ENV_IS_IN_EEPROM -#endif - -/* Define actual evaluation board type from used processor type */ -#ifdef CONFIG_AT91SAM9G20 -# define CONFIG_TNY_A9G20 -# define MACH_TYPE_TNY_A9G20 2059 -# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20 -#else -# define CONFIG_TNY_A9260 -# define MACH_TYPE_TNY_A9260 2058 -# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260 -#endif - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ - -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Hardware drivers - */ -#define CONFIG_ATMEL_LEGACY -#define CONFIG_AT91_GPIO - -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_BOOTDELAY 3 - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SOURCE -#undef CONFIG_CMD_USB - -/* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ -# define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) - -/* SPI EEPROM */ -#define CONFIG_SPI -#define CONFIG_CMD_SPI -#define CONFIG_ATMEL_SPI - -#define CONFIG_CMD_EEPROM -#define CONFIG_SPI_M95XXX -#define CONFIG_SYS_EEPROM_SIZE 0x10000 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 - -/* NAND flash */ -#define CONFIG_CMD_NAND -#define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 - -/* NOR flash - no real flash on this board */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_DOS_PARTITION -#define CONFIG_CMD_FAT - -#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - -/* Env in EEPROM, bootstrap + u-boot in NAND*/ -#ifdef CONFIG_ENV_IS_IN_EEPROM -#define CONFIG_ENV_OFFSET 0x20 -#define CONFIG_ENV_SIZE 0x1000 -#endif - -/* Env, bootstrap and u-boot in NAND */ -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 -#define CONFIG_ENV_SIZE 0x20000 -#endif - -#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock1 " \ - "mtdparts=atmel_nand:16M(kernel)ro," \ - "120M(rootfs),-(other) " \ - "rw rootfstype=jffs2" - -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) - -#endif diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 012fa1c242b..66962aa86f8 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -111,16 +111,19 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ /* Fuses */ #define CONFIG_MXC_OCOTP #define CONFIG_CMD_FUSE #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_DOS_PARTITION #define CONFIG_CMD_PING diff --git a/include/configs/tseries.h b/include/configs/tseries.h index 1e41a12a6c8..92185333884 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -16,7 +16,8 @@ /* ------------------------------------------------------------------------- */ #define CONFIG_AM335X_LCD #define CONFIG_LCD -#define CONFIG_LCD_NOSTDOUT +#define CONFIG_LCD_ROTATION +#define CONFIG_LCD_DT_SIMPLEFB #define CONFIG_SYS_WHITE_ON_BLACK #define LCD_BPP LCD_COLOR32 @@ -105,6 +106,7 @@ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ + "${optargs_rot} " \ "root=mtd6 " \ "rootfstype=jffs2\0" \ "kernelsize=0x400000\0" \ @@ -114,6 +116,7 @@ "bootz ${loadaddr} - ${dtbaddr}\0" \ "defboot=run nandboot\0" \ "bootlimit=1\0" \ + "simplefb=1\0 " \ "altbootcmd=run usbscript\0" #else #define NANDARGS "" @@ -123,27 +126,23 @@ #define MMCARGS \ "dtbdev=mmc\0" \ "dtbpart=0:1\0" \ -"logo0=ext4load mmc 0:3 ${loadaddr} /PPTLogo.bmp.gz && " \ - "bmp display ${loadaddr} 0 0\0" \ -"logo1=ext4load mmc 0:1 ${loadaddr} /PPTLogo.bmp.gz && " \ - "bmp display ${loadaddr} 0 0\0" \ -"mmcroot0=setenv bootargs ${optargs} console=${console}\0" \ -"mmcroot1=setenv bootargs ${optargs} console=${console} root=/dev/mmcblk0p2 " \ - "rootfstype=ext4\0" \ +"mmcroot0=setenv bootargs ${optargs_rot} ${optargs} console=${console}\0" \ +"mmcroot1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ + "root=/dev/mmcblk0p2 rootfstype=ext4\0" \ "mmcboot0=echo booting Updatesystem from mmc (ext4-fs) ...; " \ + "setenv simplefb 1; " \ "ext4load mmc 0:1 ${loadaddr} /${kernel}; " \ "ext4load mmc 0:1 ${ramaddr} /${ramdisk}; " \ "run mmcroot0; bootz ${loadaddr} ${ramaddr} ${dtbaddr};\0" \ "mmcboot1=echo booting PPT-OS from mmc (ext4-fs) ...; " \ + "setenv simplefb 0; " \ "ext4load mmc 0:2 ${loadaddr} /boot/${kernel}; " \ "run mmcroot1; bootz ${loadaddr} - ${dtbaddr};\0" \ -"defboot=run logo0 || run logo1; " \ - "ext4load mmc 0:2 ${loadaddr} /boot/PPTImage.md5 && run mmcboot1; " \ +"defboot=ext4load mmc 0:2 ${loadaddr} /boot/PPTImage.md5 && run mmcboot1; " \ "ext4load mmc 0:1 ${dtbaddr} /$dtb && run mmcboot0; " \ - "run ramboot; run usbupdate;\0" \ + "run ramboot; run usbscript;\0" \ "bootlimit=1\0" \ -"altbootcmd=run logo0 || run logo1; " \ - "run mmcboot0;\0" \ +"altbootcmd=run mmcboot0;\0" \ "upduboot=dhcp; " \ "tftp ${loadaddr} MLO && mmc write ${loadaddr} 100 100; " \ "tftp ${loadaddr} u-boot.img && mmc write ${loadaddr} 300 400;\0" @@ -186,8 +185,6 @@ BUR_COMMON_ENV \ "then; else tftp ${dtbaddr} ${dtb}; fi;" \ "run mmcroot0; " \ "bootz ${loadaddr} ${ramaddr} ${dtbaddr}; fi;\0" \ -"usbupdate=echo Updating UBOOT from USB-Stick ...; " \ - "usb start && fatload usb 0 0x80000000 updateubootusb.img && source\0" \ "netupdate=echo Updating UBOOT from Network (TFTP) ...; " \ "setenv autoload 0; " \ "dhcp && tftp 0x80000000 updateUBOOT.img && source;\0" \ diff --git a/include/displayport.h b/include/displayport.h new file mode 100644 index 00000000000..f7c7e252852 --- /dev/null +++ b/include/displayport.h @@ -0,0 +1,60 @@ +/* + * Copyright 2014 Google Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DISPLAYPORT_H +#define _DISPLAYPORT_H + +struct udevice; +struct display_timing; + +/** + * display_port_read_edid() - Read information from EDID + * + * @dev: Device to read from + * @buf: Buffer to read into (should be EDID_SIZE bytes) + * @buf_size: Buffer size (should be EDID_SIZE) + * @return number of bytes read, <=0 for error + */ +int display_port_read_edid(struct udevice *dev, u8 *buf, int buf_size); + +/** + * display_port_enable() - Enable a display port device + * + * @dev: Device to enable + * @panel_bpp: Number of bits per pixel for panel + * @timing: Display timings + * @return 0 if OK, -ve on error + */ +int display_port_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *timing); + +struct dm_display_port_ops { + /** + * read_edid() - Read information from EDID + * + * @dev: Device to read from + * @buf: Buffer to read into (should be EDID_SIZE bytes) + * @buf_size: Buffer size (should be EDID_SIZE) + * @return number of bytes read, <=0 for error + */ + int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size); + + /** + * enable() - Enable the display port device + * + * @dev: Device to enable + * @panel_bpp: Number of bits per pixel for panel + * @timing: Display timings + * @return 0 if OK, -ve on error + */ + int (*enable)(struct udevice *dev, int panel_bpp, + const struct display_timing *timing); +}; + +#define display_port_get_ops(dev) \ + ((struct dm_display_port_ops *)(dev)->driver->ops) + +#endif diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 395e25a4313..4d737f46c5b 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -22,30 +22,36 @@ enum uclass_id { UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ - UCLASS_SIMPLE_BUS, + UCLASS_SIMPLE_BUS, /* bus with child devices */ - /* U-Boot uclasses start here */ + /* U-Boot uclasses start here - in alphabetical order */ + UCLASS_CPU, /* CPU, typically part of an SoC */ + UCLASS_CROS_EC, /* Chrome OS EC */ + UCLASS_DISPLAY_PORT, /* Display port video */ + UCLASS_ETH, /* Ethernet device */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ - UCLASS_SERIAL, /* Serial UART */ - UCLASS_SPI, /* SPI bus */ - UCLASS_SPI_GENERIC, /* Generic SPI flash target */ - UCLASS_SPI_FLASH, /* SPI flash */ - UCLASS_CROS_EC, /* Chrome OS EC */ - UCLASS_THERMAL, /* Thermal sensor */ UCLASS_I2C, /* I2C bus */ - UCLASS_I2C_GENERIC, /* Generic I2C device */ UCLASS_I2C_EEPROM, /* I2C EEPROM device */ + UCLASS_I2C_GENERIC, /* Generic I2C device */ + UCLASS_LPC, /* x86 'low pin count' interface */ + UCLASS_MASS_STORAGE, /* Mass storage device */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ + UCLASS_PCH, /* x86 platform controller hub */ UCLASS_PCI, /* PCI bus */ UCLASS_PCI_GENERIC, /* Generic PCI bus device */ - UCLASS_PCH, /* x86 platform controller hub */ - UCLASS_ETH, /* Ethernet device */ - UCLASS_LPC, /* x86 'low pin count' interface */ + UCLASS_RTC, /* Real time clock device */ + UCLASS_SERIAL, /* Serial UART */ + UCLASS_SPI, /* SPI bus */ + UCLASS_SPI_GENERIC, /* Generic SPI flash target */ + UCLASS_SPI_FLASH, /* SPI flash */ + UCLASS_THERMAL, /* Thermal sensor */ UCLASS_USB, /* USB bus */ - UCLASS_USB_HUB, /* USB hub */ UCLASS_USB_DEV_GENERIC, /* USB generic device */ - UCLASS_MASS_STORAGE, /* Mass storage device */ - UCLASS_CPU, /* CPU, typically part of an SoC */ + UCLASS_USB_HUB, /* USB hub */ + + /* Power Management */ + UCLASS_PMIC, /* PMIC I/O device */ + UCLASS_REGULATOR, /* REGULATOR device */ UCLASS_COUNT, UCLASS_INVALID = -1, diff --git a/include/dt-bindings/pmic/sandbox_pmic.h b/include/dt-bindings/pmic/sandbox_pmic.h new file mode 100644 index 00000000000..c3d839bf014 --- /dev/null +++ b/include/dt-bindings/pmic/sandbox_pmic.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2015 Samsung Electronics + * Przemyslaw Marczak <p.marczak@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DT_BINDINGS_SANDBOX_PMIC_H_ +#define _DT_BINDINGS_SANDBOX_PMIC_H_ + +/* + * Sandbox PMIC - prepare reset values + * To provide the default (reset) values as in the real hardware, + * the registers are set in i2c pmic emul driver's probe() method. + * The default values are defined as below. + */ + +/* Buck operation mode IDs */ +#define BUCK_OM_OFF 0 +#define BUCK_OM_ON 1 +#define BUCK_OM_PWM 2 +#define BUCK_OM_COUNT 3 + +/* Ldo operation mode IDs */ +#define LDO_OM_OFF 0 +#define LDO_OM_ON 1 +#define LDO_OM_SLEEP 2 +#define LDO_OM_STANDBY 3 +#define LDO_OM_COUNT 4 + +/* [Value uV/uA]/[Mode ID] to register */ +#define VAL2REG(min, step, val) (((val) - (min)) / (step)) +#define VAL2OMREG(x) (x) + +#endif diff --git a/include/ec_commands.h b/include/ec_commands.h index 78baab1641a..76050664372 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1555,6 +1555,21 @@ struct ec_params_sb_wr_block { uint16_t data[32]; } __packed; +/* + * Entering Verified Boot Mode Command + * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. + * Valid Modes are: normal, developer, and recovery. + */ +#define EC_CMD_ENTERING_MODE 0xb6 + +struct ec_params_entering_mode { + int vboot_mode; +} __packed; + +#define VBOOT_MODE_NORMAL 0 +#define VBOOT_MODE_DEVELOPER 1 +#define VBOOT_MODE_RECOVERY 2 + /*****************************************************************************/ /* System commands */ diff --git a/include/edid.h b/include/edid.h index 18ec1d5ab0c..88b4b7d8542 100644 --- a/include/edid.h +++ b/include/edid.h @@ -15,6 +15,9 @@ #include <linux/types.h> +/* Size of the EDID data */ +#define EDID_SIZE 128 + #define GET_BIT(_x, _pos) \ (((_x) >> (_pos)) & 1) #define GET_BITS(_x, _pos_msb, _pos_lsb) \ @@ -287,4 +290,20 @@ int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin, unsigned int *hmax, unsigned int *vmin, unsigned int *vmax); +struct display_timing; + +/** + * edid_get_timing() - Get basic digital display parameters + * + * @param buf Buffer containing EDID data + * @param buf_size Size of buffer in bytes + * @param timing Place to put preferring timing information + * @param panel_bits_per_colourp Place to put the number of bits per + * colour supported by the panel. This will be set to + * -1 if not available + * @return 0 if timings are OK, -ve on error + */ +int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing, + int *panel_bits_per_colourp); + #endif /* __EDID_H_ */ diff --git a/include/fdtdec.h b/include/fdtdec.h index 659047097a1..6bf5f614e8b 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -130,6 +130,9 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */ COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ + COMPAT_NVIDIA_TEGRA124_DC, /* Tegra 124 Display controller */ + COMPAT_NVIDIA_TEGRA124_SOR, /* Tegra 124 Serial Output Resource */ + COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ @@ -145,8 +148,6 @@ enum fdt_compat_id { COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */ COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound Codec */ COMPAT_GOOGLE_CROS_EC_KEYB, /* Google CROS_EC Keyboard */ - COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */ - COMPAT_SAMSUNG_EXYNOS5_XHCI, /* Exynos5 XHCI controller */ COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */ COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */ COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */ @@ -804,6 +805,83 @@ int fdtdec_decode_memory_region(const void *blob, int node, const char *mem_type, const char *suffix, fdt_addr_t *basep, fdt_size_t *sizep); +/* Display timings from linux include/video/display_timing.h */ +enum display_flags { + DISPLAY_FLAGS_HSYNC_LOW = 1 << 0, + DISPLAY_FLAGS_HSYNC_HIGH = 1 << 1, + DISPLAY_FLAGS_VSYNC_LOW = 1 << 2, + DISPLAY_FLAGS_VSYNC_HIGH = 1 << 3, + + /* data enable flag */ + DISPLAY_FLAGS_DE_LOW = 1 << 4, + DISPLAY_FLAGS_DE_HIGH = 1 << 5, + /* drive data on pos. edge */ + DISPLAY_FLAGS_PIXDATA_POSEDGE = 1 << 6, + /* drive data on neg. edge */ + DISPLAY_FLAGS_PIXDATA_NEGEDGE = 1 << 7, + DISPLAY_FLAGS_INTERLACED = 1 << 8, + DISPLAY_FLAGS_DOUBLESCAN = 1 << 9, + DISPLAY_FLAGS_DOUBLECLK = 1 << 10, +}; + +/* + * A single signal can be specified via a range of minimal and maximal values + * with a typical value, that lies somewhere inbetween. + */ +struct timing_entry { + u32 min; + u32 typ; + u32 max; +}; + +/* + * Single "mode" entry. This describes one set of signal timings a display can + * have in one setting. This struct can later be converted to struct videomode + * (see include/video/videomode.h). As each timing_entry can be defined as a + * range, one struct display_timing may become multiple struct videomodes. + * + * Example: hsync active high, vsync active low + * + * Active Video + * Video ______________________XXXXXXXXXXXXXXXXXXXXXX_____________________ + * |<- sync ->|<- back ->|<----- active ----->|<- front ->|<- sync.. + * | | porch | | porch | + * + * HSync _|¯¯¯¯¯¯¯¯¯¯|___________________________________________|¯¯¯¯¯¯¯¯¯ + * + * VSync ¯|__________|¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯|_________ + */ +struct display_timing { + struct timing_entry pixelclock; + + struct timing_entry hactive; /* hor. active video */ + struct timing_entry hfront_porch; /* hor. front porch */ + struct timing_entry hback_porch; /* hor. back porch */ + struct timing_entry hsync_len; /* hor. sync len */ + + struct timing_entry vactive; /* ver. active video */ + struct timing_entry vfront_porch; /* ver. front porch */ + struct timing_entry vback_porch; /* ver. back porch */ + struct timing_entry vsync_len; /* ver. sync len */ + + enum display_flags flags; /* display flags */ +}; + +/** + * fdtdec_decode_display_timing() - decode display timings + * + * Decode display timings from the supplied 'display-timings' node. + * See doc/device-tree-bindings/video/display-timing.txt for binding + * information. + * + * @param blob FDT blob + * @param node 'display-timing' node containing the timing subnodes + * @param index Index number to read (0=first timing subnode) + * @param config Place to put timings + * @return 0 if OK, -FDT_ERR_NOTFOUND if not found + */ +int fdtdec_decode_display_timing(const void *blob, int node, int index, + struct display_timing *config); /** * Set up the device tree ready for use */ diff --git a/include/i2c.h b/include/i2c.h index 6fd73fae4cc..ddfebc4107f 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -54,6 +54,7 @@ struct dm_i2c_chip { uint flags; #ifdef CONFIG_SANDBOX struct udevice *emul; + bool test_mode; #endif }; @@ -124,6 +125,27 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, struct udevice **devp); /** + * dm_i2c_reg_read() - Read a value from an I2C register + * + * This reads a single value from the given address in an I2C chip + * + * @addr: Address to read from + * @return value read, or -ve on error + */ +int dm_i2c_reg_read(struct udevice *dev, uint offset); + +/** + * dm_i2c_reg_write() - Write a value to an I2C register + * + * This writes a single value to the given address in an I2C chip + * + * @addr: Address to write to + * @val: Value to write (normally a byte) + * @return 0 on success, -ve on error + */ +int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); + +/** * dm_i2c_set_bus_speed() - set the speed of a bus * * @bus: Bus to adjust @@ -171,8 +193,15 @@ int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); * * @offset_len: New offset length value (typically 1 or 2) */ - int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); + +/** + * i2c_get_offset_len() - get the offset length for a chip + * + * @return: Current offset length value (typically 1 or 2) + */ +int i2c_get_chip_offset_len(struct udevice *dev); + /** * i2c_deblock() - recover a bus that is in an unknown state * diff --git a/include/image.h b/include/image.h index 3844be67d8e..60b924a5b6f 100644 --- a/include/image.h +++ b/include/image.h @@ -23,6 +23,7 @@ struct lmb; #ifdef USE_HOSTCC +#include <sys/types.h> /* new uImage format support enabled on host */ #define CONFIG_FIT 1 diff --git a/include/linux/drm_dp_helper.h b/include/linux/drm_dp_helper.h new file mode 100644 index 00000000000..758e4a4015a --- /dev/null +++ b/include/linux/drm_dp_helper.h @@ -0,0 +1,406 @@ +/* + * Copyright © 2008 Keith Packard + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * that the name of the copyright holders not be used in advertising or + * publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holders make no representations + * about the suitability of this software for any purpose. It is provided "as + * is" without express or implied warranty. + * + * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THIS SOFTWARE. + */ + +#ifndef _DRM_DP_HELPER_H_ +#define _DRM_DP_HELPER_H_ + +/* + * Unless otherwise noted, all values are from the DP 1.1a spec. Note that + * DP and DPCD versions are independent. Differences from 1.0 are not noted, + * 1.0 devices basically don't exist in the wild. + * + * Abbreviations, in chronological order: + * + * eDP: Embedded DisplayPort version 1 + * DPI: DisplayPort Interoperability Guideline v1.1a + * 1.2: DisplayPort 1.2 + * MST: Multistream Transport - part of DP 1.2a + * + * 1.2 formally includes both eDP and DPI definitions. + */ + +#define DP_AUX_I2C_WRITE 0x0 +#define DP_AUX_I2C_READ 0x1 +#define DP_AUX_I2C_STATUS 0x2 +#define DP_AUX_I2C_MOT 0x4 +#define DP_AUX_NATIVE_WRITE 0x8 +#define DP_AUX_NATIVE_READ 0x9 + +#define DP_AUX_NATIVE_REPLY_ACK (0x0 << 0) +#define DP_AUX_NATIVE_REPLY_NACK (0x1 << 0) +#define DP_AUX_NATIVE_REPLY_DEFER (0x2 << 0) +#define DP_AUX_NATIVE_REPLY_MASK (0x3 << 0) + +#define DP_AUX_I2C_REPLY_ACK (0x0 << 2) +#define DP_AUX_I2C_REPLY_NACK (0x1 << 2) +#define DP_AUX_I2C_REPLY_DEFER (0x2 << 2) +#define DP_AUX_I2C_REPLY_MASK (0x3 << 2) + +/* AUX CH addresses */ +/* DPCD */ +#define DP_DPCD_REV 0x000 + +#define DP_MAX_LINK_RATE 0x001 + +#define DP_MAX_LANE_COUNT 0x002 +# define DP_MAX_LANE_COUNT_MASK 0x1f +# define DP_TPS3_SUPPORTED (1 << 6) /* 1.2 */ +# define DP_ENHANCED_FRAME_CAP (1 << 7) + +#define DP_MAX_DOWNSPREAD 0x003 +# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING (1 << 6) + +#define DP_NORP 0x004 + +#define DP_DOWNSTREAMPORT_PRESENT 0x005 +# define DP_DWN_STRM_PORT_PRESENT (1 << 0) +# define DP_DWN_STRM_PORT_TYPE_MASK 0x06 +# define DP_DWN_STRM_PORT_TYPE_DP (0 << 1) +# define DP_DWN_STRM_PORT_TYPE_ANALOG (1 << 1) +# define DP_DWN_STRM_PORT_TYPE_TMDS (2 << 1) +# define DP_DWN_STRM_PORT_TYPE_OTHER (3 << 1) +# define DP_FORMAT_CONVERSION (1 << 3) +# define DP_DETAILED_CAP_INFO_AVAILABLE (1 << 4) /* DPI */ + +#define DP_MAIN_LINK_CHANNEL_CODING 0x006 + +#define DP_DOWN_STREAM_PORT_COUNT 0x007 +# define DP_PORT_COUNT_MASK 0x0f +# define DP_MSA_TIMING_PAR_IGNORED (1 << 6) /* eDP */ +# define DP_OUI_SUPPORT (1 << 7) + +#define DP_I2C_SPEED_CAP 0x00c /* DPI */ +# define DP_I2C_SPEED_1K 0x01 +# define DP_I2C_SPEED_5K 0x02 +# define DP_I2C_SPEED_10K 0x04 +# define DP_I2C_SPEED_100K 0x08 +# define DP_I2C_SPEED_400K 0x10 +# define DP_I2C_SPEED_1M 0x20 + +#define DP_EDP_CONFIGURATION_CAP 0x00d /* XXX 1.2? */ +#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */ + +/* Multiple stream transport */ +#define DP_FAUX_CAP 0x020 /* 1.2 */ +# define DP_FAUX_CAP_1 (1 << 0) + +#define DP_MSTM_CAP 0x021 /* 1.2 */ +# define DP_MST_CAP (1 << 0) + +#define DP_GUID 0x030 /* 1.2 */ + +#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */ +# define DP_PSR_IS_SUPPORTED 1 +#define DP_PSR_CAPS 0x071 /* XXX 1.2? */ +# define DP_PSR_NO_TRAIN_ON_EXIT 1 +# define DP_PSR_SETUP_TIME_330 (0 << 1) +# define DP_PSR_SETUP_TIME_275 (1 << 1) +# define DP_PSR_SETUP_TIME_220 (2 << 1) +# define DP_PSR_SETUP_TIME_165 (3 << 1) +# define DP_PSR_SETUP_TIME_110 (4 << 1) +# define DP_PSR_SETUP_TIME_55 (5 << 1) +# define DP_PSR_SETUP_TIME_0 (6 << 1) +# define DP_PSR_SETUP_TIME_MASK (7 << 1) +# define DP_PSR_SETUP_TIME_SHIFT 1 + +/* + * 0x80-0x8f describe downstream port capabilities, but there are two layouts + * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not, + * each port's descriptor is one byte wide. If it was set, each port's is + * four bytes wide, starting with the one byte from the base info. As of + * DP interop v1.1a only VGA defines additional detail. + */ + +/* offset 0 */ +#define DP_DOWNSTREAM_PORT_0 0x80 +# define DP_DS_PORT_TYPE_MASK (7 << 0) +# define DP_DS_PORT_TYPE_DP 0 +# define DP_DS_PORT_TYPE_VGA 1 +# define DP_DS_PORT_TYPE_DVI 2 +# define DP_DS_PORT_TYPE_HDMI 3 +# define DP_DS_PORT_TYPE_NON_EDID 4 +# define DP_DS_PORT_HPD (1 << 3) +/* offset 1 for VGA is maximum megapixels per second / 8 */ +/* offset 2 */ +# define DP_DS_VGA_MAX_BPC_MASK (3 << 0) +# define DP_DS_VGA_8BPC 0 +# define DP_DS_VGA_10BPC 1 +# define DP_DS_VGA_12BPC 2 +# define DP_DS_VGA_16BPC 3 + +/* link configuration */ +#define DP_LINK_BW_SET 0x100 +# define DP_LINK_BW_1_62 0x06 +# define DP_LINK_BW_2_7 0x0a +# define DP_LINK_BW_5_4 0x14 /* 1.2 */ + +#define DP_LANE_COUNT_SET 0x101 +# define DP_LANE_COUNT_MASK 0x0f +# define DP_LANE_COUNT_ENHANCED_FRAME_EN (1 << 7) + +#define DP_TRAINING_PATTERN_SET 0x102 +# define DP_TRAINING_PATTERN_DISABLE 0 +# define DP_TRAINING_PATTERN_1 1 +# define DP_TRAINING_PATTERN_2 2 +# define DP_TRAINING_PATTERN_3 3 /* 1.2 */ +# define DP_TRAINING_PATTERN_MASK 0x3 + +# define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2) +# define DP_LINK_QUAL_PATTERN_D10_2 (1 << 2) +# define DP_LINK_QUAL_PATTERN_ERROR_RATE (2 << 2) +# define DP_LINK_QUAL_PATTERN_PRBS7 (3 << 2) +# define DP_LINK_QUAL_PATTERN_MASK (3 << 2) + +# define DP_RECOVERED_CLOCK_OUT_EN (1 << 4) +# define DP_LINK_SCRAMBLING_DISABLE (1 << 5) + +# define DP_SYMBOL_ERROR_COUNT_BOTH (0 << 6) +# define DP_SYMBOL_ERROR_COUNT_DISPARITY (1 << 6) +# define DP_SYMBOL_ERROR_COUNT_SYMBOL (2 << 6) +# define DP_SYMBOL_ERROR_COUNT_MASK (3 << 6) + +#define DP_TRAINING_LANE0_SET 0x103 +#define DP_TRAINING_LANE1_SET 0x104 +#define DP_TRAINING_LANE2_SET 0x105 +#define DP_TRAINING_LANE3_SET 0x106 + +# define DP_TRAIN_VOLTAGE_SWING_MASK 0x3 +# define DP_TRAIN_VOLTAGE_SWING_SHIFT 0 +# define DP_TRAIN_MAX_SWING_REACHED (1 << 2) +# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) +# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0) +# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0) +# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0) + +# define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3) +# define DP_TRAIN_PRE_EMPH_LEVEL_0 (0 << 3) +# define DP_TRAIN_PRE_EMPH_LEVEL_1 (1 << 3) +# define DP_TRAIN_PRE_EMPH_LEVEL_2 (2 << 3) +# define DP_TRAIN_PRE_EMPH_LEVEL_3 (3 << 3) + +# define DP_TRAIN_PRE_EMPHASIS_SHIFT 3 +# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED (1 << 5) + +#define DP_DOWNSPREAD_CTRL 0x107 +# define DP_SPREAD_AMP_0_5 (1 << 4) +# define DP_MSA_TIMING_PAR_IGNORE_EN (1 << 7) /* eDP */ + +#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108 +# define DP_SET_ANSI_8B10B (1 << 0) + +#define DP_I2C_SPEED_CONTROL_STATUS 0x109 /* DPI */ +/* bitmask as for DP_I2C_SPEED_CAP */ + +#define DP_EDP_CONFIGURATION_SET 0x10a /* XXX 1.2? */ + +#define DP_MSTM_CTRL 0x111 /* 1.2 */ +# define DP_MST_EN (1 << 0) +# define DP_UP_REQ_EN (1 << 1) +# define DP_UPSTREAM_IS_SRC (1 << 2) + +#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */ +# define DP_PSR_ENABLE (1 << 0) +# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1) +# define DP_PSR_CRC_VERIFICATION (1 << 2) +# define DP_PSR_FRAME_CAPTURE (1 << 3) + +#define DP_ADAPTER_CTRL 0x1a0 +# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0) + +#define DP_BRANCH_DEVICE_CTRL 0x1a1 +# define DP_BRANCH_DEVICE_IRQ_HPD (1 << 0) + +#define DP_PAYLOAD_ALLOCATE_SET 0x1c0 +#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1 +#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2 + +#define DP_SINK_COUNT 0x200 +/* prior to 1.2 bit 7 was reserved mbz */ +# define DP_GET_SINK_COUNT(x) ((((x) & 0x80) >> 1) | ((x) & 0x3f)) +# define DP_SINK_CP_READY (1 << 6) + +#define DP_DEVICE_SERVICE_IRQ_VECTOR 0x201 +# define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0) +# define DP_AUTOMATED_TEST_REQUEST (1 << 1) +# define DP_CP_IRQ (1 << 2) +# define DP_MCCS_IRQ (1 << 3) +# define DP_DOWN_REP_MSG_RDY (1 << 4) /* 1.2 MST */ +# define DP_UP_REQ_MSG_RDY (1 << 5) /* 1.2 MST */ +# define DP_SINK_SPECIFIC_IRQ (1 << 6) + +#define DP_LANE0_1_STATUS 0x202 +#define DP_LANE2_3_STATUS 0x203 +# define DP_LANE_CR_DONE (1 << 0) +# define DP_LANE_CHANNEL_EQ_DONE (1 << 1) +# define DP_LANE_SYMBOL_LOCKED (1 << 2) + +#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE | \ + DP_LANE_CHANNEL_EQ_DONE | \ + DP_LANE_SYMBOL_LOCKED) + +#define DP_LANE_ALIGN_STATUS_UPDATED 0x204 + +#define DP_INTERLANE_ALIGN_DONE (1 << 0) +#define DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6) +#define DP_LINK_STATUS_UPDATED (1 << 7) + +#define DP_SINK_STATUS 0x205 +#define DP_SINK_STATUS_PORT0_IN_SYNC (1 << 0) + +#define DP_RECEIVE_PORT_0_STATUS (1 << 0) +#define DP_RECEIVE_PORT_1_STATUS (1 << 1) + +#define DP_ADJUST_REQUEST_LANE0_1 0x206 +#define DP_ADJUST_REQUEST_LANE2_3 0x207 +# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK 0x03 +# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0 +# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK 0x0c +# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT 2 +# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK 0x30 +# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4 +# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0 +# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6 + +#define DP_TEST_REQUEST 0x218 +# define DP_TEST_LINK_TRAINING (1 << 0) +# define DP_TEST_LINK_VIDEO_PATTERN (1 << 1) +# define DP_TEST_LINK_EDID_READ (1 << 2) +# define DP_TEST_LINK_PHY_TEST_PATTERN (1 << 3) /* DPCD >= 1.1 */ +# define DP_TEST_LINK_FAUX_PATTERN (1 << 4) /* DPCD >= 1.2 */ + +#define DP_TEST_LINK_RATE 0x219 +# define DP_LINK_RATE_162 (0x6) +# define DP_LINK_RATE_27 (0xa) + +#define DP_TEST_LANE_COUNT 0x220 + +#define DP_TEST_PATTERN 0x221 + +#define DP_TEST_CRC_R_CR 0x240 +#define DP_TEST_CRC_G_Y 0x242 +#define DP_TEST_CRC_B_CB 0x244 + +#define DP_TEST_SINK_MISC 0x246 +#define DP_TEST_CRC_SUPPORTED (1 << 5) + +#define DP_TEST_RESPONSE 0x260 +# define DP_TEST_ACK (1 << 0) +# define DP_TEST_NAK (1 << 1) +# define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2) + +#define DP_TEST_EDID_CHECKSUM 0x261 + +#define DP_TEST_SINK 0x270 +#define DP_TEST_SINK_START (1 << 0) + +#define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */ +# define DP_PAYLOAD_TABLE_UPDATED (1 << 0) +# define DP_PAYLOAD_ACT_HANDLED (1 << 1) + +#define DP_VC_PAYLOAD_ID_SLOT_1 0x2c1 /* 1.2 MST */ +/* up to ID_SLOT_63 at 0x2ff */ + +#define DP_SOURCE_OUI 0x300 +#define DP_SINK_OUI 0x400 +#define DP_BRANCH_OUI 0x500 + +#define DP_SET_POWER 0x600 +# define DP_SET_POWER_D0 0x1 +# define DP_SET_POWER_D3 0x2 +# define DP_SET_POWER_MASK 0x3 + +#define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */ +#define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ +#define DP_SIDEBAND_MSG_DOWN_REP_BASE 0x1400 /* 1.2 MST */ +#define DP_SIDEBAND_MSG_UP_REQ_BASE 0x1600 /* 1.2 MST */ + +#define DP_SINK_COUNT_ESI 0x2002 /* 1.2 */ +/* 0-5 sink count */ +# define DP_SINK_COUNT_CP_READY (1 << 6) + +#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0 0x2003 /* 1.2 */ + +#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 0x2004 /* 1.2 */ + +#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0 0x2005 /* 1.2 */ + +#define DP_PSR_ERROR_STATUS 0x2006 /* XXX 1.2? */ +# define DP_PSR_LINK_CRC_ERROR (1 << 0) +# define DP_PSR_RFB_STORAGE_ERROR (1 << 1) + +#define DP_PSR_ESI 0x2007 /* XXX 1.2? */ +# define DP_PSR_CAPS_CHANGE (1 << 0) + +#define DP_PSR_STATUS 0x2008 /* XXX 1.2? */ +# define DP_PSR_SINK_INACTIVE 0 +# define DP_PSR_SINK_ACTIVE_SRC_SYNCED 1 +# define DP_PSR_SINK_ACTIVE_RFB 2 +# define DP_PSR_SINK_ACTIVE_SINK_SYNCED 3 +# define DP_PSR_SINK_ACTIVE_RESYNC 4 +# define DP_PSR_SINK_INTERNAL_ERROR 7 +# define DP_PSR_SINK_STATE_MASK 0x07 + +/* DP 1.2 Sideband message defines */ +/* peer device type - DP 1.2a Table 2-92 */ +#define DP_PEER_DEVICE_NONE 0x0 +#define DP_PEER_DEVICE_SOURCE_OR_SST 0x1 +#define DP_PEER_DEVICE_MST_BRANCHING 0x2 +#define DP_PEER_DEVICE_SST_SINK 0x3 +#define DP_PEER_DEVICE_DP_LEGACY_CONV 0x4 + +/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */ +#define DP_LINK_ADDRESS 0x01 +#define DP_CONNECTION_STATUS_NOTIFY 0x02 +#define DP_ENUM_PATH_RESOURCES 0x10 +#define DP_ALLOCATE_PAYLOAD 0x11 +#define DP_QUERY_PAYLOAD 0x12 +#define DP_RESOURCE_STATUS_NOTIFY 0x13 +#define DP_CLEAR_PAYLOAD_ID_TABLE 0x14 +#define DP_REMOTE_DPCD_READ 0x20 +#define DP_REMOTE_DPCD_WRITE 0x21 +#define DP_REMOTE_I2C_READ 0x22 +#define DP_REMOTE_I2C_WRITE 0x23 +#define DP_POWER_UP_PHY 0x24 +#define DP_POWER_DOWN_PHY 0x25 +#define DP_SINK_EVENT_NOTIFY 0x30 +#define DP_QUERY_STREAM_ENC_STATUS 0x38 + +/* DP 1.2 MST sideband nak reasons - table 2.84 */ +#define DP_NAK_WRITE_FAILURE 0x01 +#define DP_NAK_INVALID_READ 0x02 +#define DP_NAK_CRC_FAILURE 0x03 +#define DP_NAK_BAD_PARAM 0x04 +#define DP_NAK_DEFER 0x05 +#define DP_NAK_LINK_FAILURE 0x06 +#define DP_NAK_NO_RESOURCES 0x07 +#define DP_NAK_DPCD_FAIL 0x08 +#define DP_NAK_I2C_NAK 0x09 +#define DP_NAK_ALLOCATE_FAIL 0x0a + +#define MODE_I2C_START 1 +#define MODE_I2C_WRITE 2 +#define MODE_I2C_READ 4 +#define MODE_I2C_STOP 8 + +/* Rest of file omitted as it is not used in U-Boot */ + +#endif /* _DRM_DP_HELPER_H_ */ diff --git a/include/os.h b/include/os.h index a758f099aab..ffbdce84643 100644 --- a/include/os.h +++ b/include/os.h @@ -13,6 +13,7 @@ #include <linux/types.h> +struct rtc_time; struct sandbox_state; /** @@ -277,4 +278,14 @@ int os_read_ram_buf(const char *fname); */ int os_jump_to_image(const void *dest, int size); +/** + * Read the current system time + * + * This reads the current Local Time and places it into the provided + * structure. + * + * @param rt Place to put system time + */ +void os_localtime(struct rtc_time *rt); + #endif diff --git a/include/power/as3722.h b/include/power/as3722.h index aa966d2cca1..0f22482ff70 100644 --- a/include/power/as3722.h +++ b/include/power/as3722.h @@ -23,5 +23,8 @@ int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio, unsigned long flags); int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio, unsigned int level); +int as3722_read(struct udevice *pmic, u8 reg, u8 *value); +int as3722_write(struct udevice *pmic, u8 reg, u8 value); +int as3722_get(struct udevice **devp); #endif /* __POWER_AS3722_H__ */ diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index b0e42550a2a..23003524962 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -122,11 +122,17 @@ enum { MAX77686_REG_PMIC_BBAT = 0x7e, MAX77686_REG_PMIC_32KHZ, - PMIC_NUM_OF_REGS, + MAX77686_NUM_OF_REGS, }; /* I2C device address for pmic max77686 */ -#define MAX77686_I2C_ADDR (0x12 >> 1) +#define MAX77686_I2C_ADDR (0x12 >> 1) +#define MAX77686_LDO_NUM 26 +#define MAX77686_BUCK_NUM 9 + +/* Drivers name */ +#define MAX77686_LDO_DRIVER "max77686_ldo" +#define MAX77686_BUCK_DRIVER "max77686_buck" enum { REG_DISABLE = 0, @@ -143,23 +149,29 @@ enum { enum { OPMODE_OFF = 0, - OPMODE_STANDBY, OPMODE_LPM, + OPMODE_STANDBY, + OPMODE_STANDBY_LPM, OPMODE_ON, }; +#ifdef CONFIG_POWER int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV); int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode); int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV); int max77686_set_buck_mode(struct pmic *p, int buck, char opmode); +#endif #define MAX77686_LDO_VOLT_MAX_HEX 0x3f #define MAX77686_LDO_VOLT_MASK 0x3f #define MAX77686_LDO_MODE_MASK 0xc0 #define MAX77686_LDO_MODE_OFF (0x00 << 0x06) +#define MAX77686_LDO_MODE_LPM (0x01 << 0x06) #define MAX77686_LDO_MODE_STANDBY (0x01 << 0x06) -#define MAX77686_LDO_MODE_LPM (0x02 << 0x06) +#define MAX77686_LDO_MODE_STANDBY_LPM (0x02 << 0x06) #define MAX77686_LDO_MODE_ON (0x03 << 0x06) +#define MAX77686_BUCK234_VOLT_MAX_HEX 0xff +#define MAX77686_BUCK234_VOLT_MASK 0xff #define MAX77686_BUCK_VOLT_MAX_HEX 0x3f #define MAX77686_BUCK_VOLT_MASK 0x3f #define MAX77686_BUCK_MODE_MASK 0x03 @@ -170,6 +182,15 @@ int max77686_set_buck_mode(struct pmic *p, int buck, char opmode); #define MAX77686_BUCK_MODE_LPM 0x02 #define MAX77686_BUCK_MODE_ON 0x03 +/* For regulator hex<->volt conversion */ +#define MAX77686_LDO_UV_MIN 800000 /* Minimum LDO uV value */ +#define MAX77686_LDO_UV_LSTEP 25000 /* uV lower value step */ +#define MAX77686_LDO_UV_HSTEP 50000 /* uV higher value step */ +#define MAX77686_BUCK_UV_LMIN 600000 /* Lower minimun BUCK value */ +#define MAX77686_BUCK_UV_HMIN 750000 /* Higher minimun BUCK value */ +#define MAX77686_BUCK_UV_LSTEP 12500 /* uV lower value step */ +#define MAX77686_BUCK_UV_HSTEP 50000 /* uV higher value step */ + /* Buck1 1 volt value */ #define MAX77686_BUCK1OUT_1V 0x5 /* Buck1 1.05 volt value */ diff --git a/include/power/pmic.h b/include/power/pmic.h index afbc5aab7e2..eb152ef4926 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -1,4 +1,7 @@ /* + * Copyright (C) 2014-2015 Samsung Electronics + * Przemyslaw Marczak <p.marczak@samsung.com> + * * Copyright (C) 2011-2012 Samsung Electronics * Lukasz Majewski <l.majewski@samsung.com> * @@ -8,11 +11,14 @@ #ifndef __CORE_PMIC_H_ #define __CORE_PMIC_H_ -#include <linux/list.h> #include <i2c.h> +#include <spi.h> +#include <linux/list.h> #include <power/power_chrg.h> enum { PMIC_I2C, PMIC_SPI, PMIC_NONE}; + +#ifdef CONFIG_POWER enum { I2C_PMIC, I2C_NUM, }; enum { PMIC_READ, PMIC_WRITE, }; enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; @@ -77,7 +83,190 @@ struct pmic { struct pmic *parent; struct list_head list; }; +#endif /* CONFIG_POWER */ + +#ifdef CONFIG_DM_PMIC +/** + * U-Boot PMIC Framework + * ===================== + * + * UCLASS_PMIC - This is designed to provide an I/O interface for PMIC devices. + * + * For the multi-function PMIC devices, this can be used as parent I/O device + * for each IC's interface. Then, each child uses its parent for read/write. + * + * The driver model tree could look like this: + * + *_ root device + * |_ BUS 0 device (e.g. I2C0) - UCLASS_I2C/SPI/... + * | |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC + * | |_ REGULATOR device (ldo/buck/... ops) - UCLASS_REGULATOR + * | |_ CHARGER device (charger ops) - UCLASS_CHARGER (in the future) + * | |_ MUIC device (microUSB connector ops) - UCLASS_MUIC (in the future) + * | |_ ... + * | + * |_ BUS 1 device (e.g. I2C1) - UCLASS_I2C/SPI/... + * |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC + * |_ RTC device (rtc ops) - UCLASS_RTC (in the future) + * + * We can find two PMIC cases in boards design: + * - single I/O interface + * - multiple I/O interfaces + * We bind a single PMIC device for each interface, to provide an I/O for + * its child devices. And each child usually implements a different function, + * controlled by the same interface. + * + * The binding should be done automatically. If device tree nodes/subnodes are + * proper defined, then: + * + * |_ the ROOT driver will bind the device for I2C/SPI node: + * |_ the I2C/SPI driver should bind a device for pmic node: + * |_ the PMIC driver should bind devices for its childs: + * |_ regulator (child) + * |_ charger (child) + * |_ other (child) + * + * The same for other device nodes, for multi-interface PMIC. + * + * Note: + * Each PMIC interface driver should use a different compatible string. + * + * If a PMIC child device driver needs access the PMIC-specific registers, + * it need know only the register address and the access can be done through + * the parent pmic driver. Like in the example: + * + *_ root driver + * |_ dev: bus I2C0 - UCLASS_I2C + * | |_ dev: my_pmic (read/write) (is parent) - UCLASS_PMIC + * | |_ dev: my_regulator (set value/etc..) (is child) - UCLASS_REGULATOR + * + * To ensure such device relationship, the pmic device driver should also bind + * all its child devices, like in the example below. It can be done by calling + * the 'pmic_bind_children()' - please refer to the function description, which + * can be found in this header file. This function, should be called inside the + * driver's bind() method. + * + * For the example driver, please refer the MAX77686 driver: + * - 'drivers/power/pmic/max77686.c' + */ + +/** + * struct dm_pmic_ops - PMIC device I/O interface + * + * Should be implemented by UCLASS_PMIC device drivers. The standard + * device operations provides the I/O interface for it's childs. + * + * @reg_count: device's register count + * @read: read 'len' bytes at "reg" and store it into the 'buffer' + * @write: write 'len' bytes from the 'buffer' to the register at 'reg' address + */ +struct dm_pmic_ops { + int (*reg_count)(struct udevice *dev); + int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len); + int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer, + int len); +}; + +/** + * enum pmic_op_type - used for various pmic devices operation calls, + * for reduce a number of lines with the same code for read/write or get/set. + * + * @PMIC_OP_GET - get operation + * @PMIC_OP_SET - set operation +*/ +enum pmic_op_type { + PMIC_OP_GET, + PMIC_OP_SET, +}; + +/** + * struct pmic_child_info - basic device's child info for bind child nodes with + * the driver by the node name prefix and driver name. This is a helper struct + * for function: pmic_bind_children(). + * + * @prefix - child node name prefix (or its name if is unique or single) + * @driver - driver name for the sub-node with prefix + */ +struct pmic_child_info { + const char *prefix; + const char *driver; +}; + +/* drivers/power/pmic-uclass.c */ + +/** + * pmic_bind_children() - bind drivers for given parent pmic, using child info + * found in 'child_info' array. + * + * @pmic - pmic device - the parent of found child's + * @child_info - N-childs info array + * @return a positive number of childs, or 0 if no child found (error) + * + * Note: For N-childs the child_info array should have N+1 entries and the last + * entry prefix should be NULL - the same as for drivers compatible. + * + * For example, a single prefix info (N=1): + * static const struct pmic_child_info bind_info[] = { + * { .prefix = "ldo", .driver = "ldo_driver" }, + * { }, + * }; + * + * This function is useful for regulator sub-nodes: + * my_regulator@0xa { + * reg = <0xa>; + * (pmic - bind automatically by compatible) + * compatible = "my_pmic"; + * ... + * (pmic's childs - bind by pmic_bind_children()) + * (nodes prefix: "ldo", driver: "my_regulator_ldo") + * ldo1 { ... }; + * ldo2 { ... }; + * + * (nodes prefix: "buck", driver: "my_regulator_buck") + * buck1 { ... }; + * buck2 { ... }; + * }; + */ +int pmic_bind_children(struct udevice *pmic, int offset, + const struct pmic_child_info *child_info); + +/** + * pmic_get: get the pmic device using its name + * + * @name - device name + * @devp - returned pointer to the pmic device + * @return 0 on success or negative value of errno. + * + * The returned devp device can be used with pmic_read/write calls + */ +int pmic_get(const char *name, struct udevice **devp); + +/** + * pmic_reg_count: get the pmic register count + * + * The required pmic device can be obtained by 'pmic_get()' + * + * @dev - pointer to the UCLASS_PMIC device + * @return register count value on success or negative value of errno. + */ +int pmic_reg_count(struct udevice *dev); + +/** + * pmic_read/write: read/write to the UCLASS_PMIC device + * + * The required pmic device can be obtained by 'pmic_get()' + * + * @pmic - pointer to the UCLASS_PMIC device + * @reg - device register offset + * @buffer - pointer to read/write buffer + * @len - byte count for read/write + * @return 0 on success or negative value of errno. + */ +int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len); +int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len); +#endif /* CONFIG_DM_PMIC */ +#ifdef CONFIG_POWER int pmic_init(unsigned char bus); int power_init_board(void); int pmic_dialog_init(unsigned char bus); @@ -88,6 +277,7 @@ int pmic_probe(struct pmic *p); int pmic_reg_read(struct pmic *p, u32 reg, u32 *val); int pmic_reg_write(struct pmic *p, u32 reg, u32 val); int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on); +#endif #define pmic_i2c_addr (p->hw.i2c.addr) #define pmic_i2c_tx_num (p->hw.i2c.tx_num) diff --git a/include/power/regulator.h b/include/power/regulator.h new file mode 100644 index 00000000000..03a2cefcd61 --- /dev/null +++ b/include/power/regulator.h @@ -0,0 +1,386 @@ +/* + * Copyright (C) 2014-2015 Samsung Electronics + * Przemyslaw Marczak <p.marczak@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _INCLUDE_REGULATOR_H_ +#define _INCLUDE_REGULATOR_H_ + +/** + * U-Boot Voltage/Current Regulator + * ================================ + * + * The regulator API is based on a driver model, with the device tree support. + * And this header describes the functions and data types for the uclass id: + * 'UCLASS_REGULATOR' and the regulator driver API. + * + * The regulator uclass - is based on uclass platform data which is allocated, + * automatically for each regulator device on bind and 'dev->uclass_platdata' + * points to it. The data type is: 'struct dm_regulator_uclass_platdata'. + * The uclass file: 'drivers/power/regulator/regulator-uclass.c' + * + * The regulator device - is based on driver's model 'struct udevice'. + * The API can use regulator name in two meanings: + * - devname - the regulator device's name: 'dev->name' + * - platname - the device's platdata's name. So in the code it looks like: + * 'uc_pdata = dev->uclass_platdata'; 'name = uc_pdata->name'. + * + * The regulator device driver - provide an implementation of uclass operations + * pointed by 'dev->driver->ops' as a struct of type 'struct dm_regulator_ops'. + * + * To proper bind the regulator device, the device tree node should provide + * regulator constraints, like in the example below: + * + * ldo1 { + * regulator-name = "VDD_MMC_1.8V"; (must be unique for proper bind) + * regulator-min-microvolt = <1000000>; (optional) + * regulator-max-microvolt = <1000000>; (optional) + * regulator-min-microamp = <1000>; (optional) + * regulator-max-microamp = <1000>; (optional) + * regulator-always-on; (optional) + * regulator-boot-on; (optional) + * }; + * + * Note: For the proper operation, at least name constraint is needed, since + * it can be used when calling regulator_get_by_platname(). And the mandatory + * rule for this name is, that it must be globally unique for the single dts. + * + * Regulator bind: + * For each regulator device, the device_bind() should be called with passed + * device tree offset. This is required for this uclass's '.post_bind' method, + * which does the scan on the device node, for the 'regulator-name' constraint. + * If the parent is not a PMIC device, and the child is not bind by function: + * 'pmic_bind_childs()', then it's recommended to bind the device by call to + * dm_scan_fdt_node() - this is usually done automatically for bus devices, + * as a post bind method. + * + * Regulator get: + * Having the device's name constraint, we can call regulator_by_platname(), + * to find the required regulator. Before return, the regulator is probed, + * and the rest of its constraints are put into the device's uclass platform + * data, by the uclass regulator '.pre_probe' method. + * + * For more info about PMIC bind, please refer to file: 'include/power/pmic.h' + * + * Note: + * Please do not use the device_bind_by_name() function, since it pass '-1' as + * device node offset - and the bind will fail on uclass .post_bind method, + * because of missing 'regulator-name' constraint. + * + * + * Fixed Voltage/Current Regulator + * =============================== + * + * When fixed voltage regulator is needed, then enable the config: + * - CONFIG_DM_REGULATOR_FIXED + * + * The driver file: 'drivers/power/regulator/fixed.c', provides basic support + * for control the GPIO, and return the device tree constraint values. + * + * To bind the fixed voltage regulator device, we usually use a 'simple-bus' + * node as a parent. And 'regulator-fixed' for the driver compatible. This is + * the same as in the kernel. The example node of fixed regulator: + * + * simple-bus { + * compatible = "simple-bus"; + * #address-cells = <1>; + * #size-cells = <0>; + * + * blue_led { + * compatible = "regulator-fixed"; + * regulator-name = "VDD_LED_3.3V"; + * regulator-min-microvolt = <3300000>; + * regulator-max-microvolt = <3300000>; + * gpio = <&gpc1 0 GPIO_ACTIVE_LOW>; + * }; + * }; + * + * The fixed regulator devices also provide regulator uclass platform data. And + * devices bound from such node, can use the regulator drivers API. +*/ + +/* enum regulator_type - used for regulator_*() variant calls */ +enum regulator_type { + REGULATOR_TYPE_LDO = 0, + REGULATOR_TYPE_BUCK, + REGULATOR_TYPE_DVS, + REGULATOR_TYPE_FIXED, + REGULATOR_TYPE_OTHER, +}; + +/** + * struct dm_regulator_mode - this structure holds an information about + * each regulator operation mode. Probably in most cases - an array. + * This will be probably a driver-static data, since it is device-specific. + * + * @id - a driver-specific mode id + * @register_value - a driver-specific value for its mode id + * @name - the name of mode - used for regulator command + * Note: + * The field 'id', should be always a positive number, since the negative values + * are reserved for the errno numbers when returns the mode id. + */ +struct dm_regulator_mode { + int id; /* Set only as >= 0 (negative value is reserved for errno) */ + int register_value; + const char *name; +}; + +/** + * struct dm_regulator_uclass_platdata - pointed by dev->uclass_platdata, and + * allocated on each regulator bind. This structure holds an information + * about each regulator's constraints and supported operation modes. + * There is no "step" voltage value - so driver should take care of this. + * + * @type - one of 'enum regulator_type' + * @mode - pointer to the regulator mode (array if more than one) + * @mode_count - number of '.mode' entries + * @min_uV* - minimum voltage (micro Volts) + * @max_uV* - maximum voltage (micro Volts) + * @min_uA* - minimum amperage (micro Amps) + * @max_uA* - maximum amperage (micro Amps) + * @always_on* - bool type, true or false + * @boot_on* - bool type, true or false + * @name** - fdt regulator name - should be taken from the device tree + * + * Note: + * * - set automatically on device probe by the uclass's '.pre_probe' method. + * ** - set automatically on device bind by the uclass's '.post_bind' method. + * The constraints: type, mode, mode_count, can be set by device driver, e.g. + * by the driver '.probe' method. + */ +struct dm_regulator_uclass_platdata { + enum regulator_type type; + struct dm_regulator_mode *mode; + int mode_count; + int min_uV; + int max_uV; + int min_uA; + int max_uA; + bool always_on; + bool boot_on; + const char *name; +}; + +/* Regulator device operations */ +struct dm_regulator_ops { + /** + * The regulator output value function calls operates on a micro Volts. + * + * get/set_value - get/set output value of the given output number + * @dev - regulator device + * Sets: + * @uV - set the output value [micro Volts] + * @return output value [uV] on success or negative errno if fail. + */ + int (*get_value)(struct udevice *dev); + int (*set_value)(struct udevice *dev, int uV); + + /** + * The regulator output current function calls operates on a micro Amps. + * + * get/set_current - get/set output current of the given output number + * @dev - regulator device + * Sets: + * @uA - set the output current [micro Amps] + * @return output value [uA] on success or negative errno if fail. + */ + int (*get_current)(struct udevice *dev); + int (*set_current)(struct udevice *dev, int uA); + + /** + * The most basic feature of the regulator output is its enable state. + * + * get/set_enable - get/set enable state of the given output number + * @dev - regulator device + * Sets: + * @enable - set true - enable or false - disable + * @return true/false for get; or 0 / -errno for set. + */ + bool (*get_enable)(struct udevice *dev); + int (*set_enable)(struct udevice *dev, bool enable); + + /** + * The 'get/set_mode()' function calls should operate on a driver- + * specific mode id definitions, which should be found in: + * field 'id' of struct dm_regulator_mode. + * + * get/set_mode - get/set operation mode of the given output number + * @dev - regulator device + * Sets + * @mode_id - set output mode id (struct dm_regulator_mode->id) + * @return id/0 for get/set on success or negative errno if fail. + * Note: + * The field 'id' of struct type 'dm_regulator_mode', should be always + * a positive number, since the negative is reserved for the error. + */ + int (*get_mode)(struct udevice *dev); + int (*set_mode)(struct udevice *dev, int mode_id); +}; + +/** + * regulator_mode: returns a pointer to the array of regulator mode info + * + * @dev - pointer to the regulator device + * @modep - pointer to the returned mode info array + * @return - count of modep entries on success or negative errno if fail. + */ +int regulator_mode(struct udevice *dev, struct dm_regulator_mode **modep); + +/** + * regulator_get_value: get microvoltage voltage value of a given regulator + * + * @dev - pointer to the regulator device + * @return - positive output value [uV] on success or negative errno if fail. + */ +int regulator_get_value(struct udevice *dev); + +/** + * regulator_set_value: set the microvoltage value of a given regulator. + * + * @dev - pointer to the regulator device + * @uV - the output value to set [micro Volts] + * @return - 0 on success or -errno val if fails + */ +int regulator_set_value(struct udevice *dev, int uV); + +/** + * regulator_get_current: get microampere value of a given regulator + * + * @dev - pointer to the regulator device + * @return - positive output current [uA] on success or negative errno if fail. + */ +int regulator_get_current(struct udevice *dev); + +/** + * regulator_set_current: set the microampere value of a given regulator. + * + * @dev - pointer to the regulator device + * @uA - set the output current [micro Amps] + * @return - 0 on success or -errno val if fails + */ +int regulator_set_current(struct udevice *dev, int uA); + +/** + * regulator_get_enable: get regulator device enable state. + * + * @dev - pointer to the regulator device + * @return - true/false of enable state + */ +bool regulator_get_enable(struct udevice *dev); + +/** + * regulator_set_enable: set regulator enable state + * + * @dev - pointer to the regulator device + * @enable - set true or false + * @return - 0 on success or -errno val if fails + */ +int regulator_set_enable(struct udevice *dev, bool enable); + +/** + * regulator_get_mode: get active operation mode id of a given regulator + * + * @dev - pointer to the regulator device + * @return - positive mode 'id' number on success or -errno val if fails + * Note: + * The device can provide an array of operating modes, which is type of struct + * dm_regulator_mode. Each mode has it's own 'id', which should be unique inside + * that array. By calling this function, the driver should return an active mode + * id of the given regulator device. + */ +int regulator_get_mode(struct udevice *dev); + +/** + * regulator_set_mode: set the given regulator's, active mode id + * + * @dev - pointer to the regulator device + * @mode_id - mode id to set ('id' field of struct type dm_regulator_mode) + * @return - 0 on success or -errno value if fails + * Note: + * The device can provide an array of operating modes, which is type of struct + * dm_regulator_mode. Each mode has it's own 'id', which should be unique inside + * that array. By calling this function, the driver should set the active mode + * of a given regulator to given by "mode_id" argument. + */ +int regulator_set_mode(struct udevice *dev, int mode_id); + +/** + * regulator_autoset: setup the regulator given by its uclass's platform data + * name field. The setup depends on constraints found in device's uclass's + * platform data (struct dm_regulator_uclass_platdata): + * - Enable - will set - if any of: 'always_on' or 'boot_on' is set to true, + * or if both are unset, then the function returns + * - Voltage value - will set - if '.min_uV' and '.max_uV' values are equal + * - Current limit - will set - if '.min_uA' and '.max_uA' values are equal + * + * The function returns on first encountered error. + * + * @platname - expected string for dm_regulator_uclass_platdata .name field + * @devp - returned pointer to the regulator device - if non-NULL passed + * @verbose - (true/false) print regulator setup info, or be quiet + * @return: 0 on success or negative value of errno. + * + * The returned 'regulator' device can be used with: + * - regulator_get/set_* + */ +int regulator_autoset(const char *platname, + struct udevice **devp, + bool verbose); + +/** + * regulator_list_autoset: setup the regulators given by list of their uclass's + * platform data name field. The setup depends on constraints found in device's + * uclass's platform data. The function loops with calls to: + * regulator_autoset() for each name from the list. + * + * @list_platname - an array of expected strings for .name field of each + * regulator's uclass platdata + * @list_devp - an array of returned pointers to the successfully setup + * regulator devices if non-NULL passed + * @verbose - (true/false) print each regulator setup info, or be quiet + * @return 0 on successfully setup of all list entries, otherwise first error. + * + * The returned 'regulator' devices can be used with: + * - regulator_get/set_* + * + * Note: The list must ends with NULL entry, like in the "platname" list below: + * char *my_regulators[] = { + * "VCC_3.3V", + * "VCC_1.8V", + * NULL, + * }; + */ +int regulator_list_autoset(const char *list_platname[], + struct udevice *list_devp[], + bool verbose); + +/** + * regulator_get_by_devname: returns the pointer to the pmic regulator device. + * Search by name, found in regulator device's name. + * + * @devname - expected string for 'dev->name' of regulator device + * @devp - returned pointer to the regulator device + * @return 0 on success or negative value of errno. + * + * The returned 'regulator' device is probed and can be used with: + * - regulator_get/set_* + */ +int regulator_get_by_devname(const char *devname, struct udevice **devp); + +/** + * regulator_get_by_platname: returns the pointer to the pmic regulator device. + * Search by name, found in regulator uclass platdata. + * + * @platname - expected string for uc_pdata->name of regulator uclass platdata + * @devp - returned pointer to the regulator device + * @return 0 on success or negative value of errno. + * + * The returned 'regulator' device is probed and can be used with: + * - regulator_get/set_* + */ +int regulator_get_by_platname(const char *platname, struct udevice **devp); + +#endif /* _INCLUDE_REGULATOR_H_ */ diff --git a/include/power/sandbox_pmic.h b/include/power/sandbox_pmic.h new file mode 100644 index 00000000000..ae142921e53 --- /dev/null +++ b/include/power/sandbox_pmic.h @@ -0,0 +1,138 @@ +/* + * Copyright (C) 2015 Samsung Electronics + * Przemyslaw Marczak <p.marczak@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SANDBOX_PMIC_H_ +#define _SANDBOX_PMIC_H_ + +#define SANDBOX_LDO_DRIVER "sandbox_ldo" +#define SANDBOX_OF_LDO_PREFIX "ldo" +#define SANDBOX_BUCK_DRIVER "sandbox_buck" +#define SANDBOX_OF_BUCK_PREFIX "buck" + +#define SANDBOX_BUCK_COUNT 2 +#define SANDBOX_LDO_COUNT 2 +/* + * Sandbox PMIC registers: + * We have only 12 significant registers, but we alloc 16 for padding. + */ +enum { + SANDBOX_PMIC_REG_BUCK1_UV = 0, + SANDBOX_PMIC_REG_BUCK1_UA, + SANDBOX_PMIC_REG_BUCK1_OM, + + SANDBOX_PMIC_REG_BUCK2_UV, + SANDBOX_PMIC_REG_BUCK2_UA, + SANDBOX_PMIC_REG_BUCK2_OM, + + SANDBOX_PMIC_REG_LDO_OFFSET, + SANDBOX_PMIC_REG_LDO1_UV = SANDBOX_PMIC_REG_LDO_OFFSET, + SANDBOX_PMIC_REG_LDO1_UA, + SANDBOX_PMIC_REG_LDO1_OM, + + SANDBOX_PMIC_REG_LDO2_UV, + SANDBOX_PMIC_REG_LDO2_UA, + SANDBOX_PMIC_REG_LDO2_OM, + + SANDBOX_PMIC_REG_COUNT = 16, +}; + +/* Register offset for output: micro Volts, micro Amps, Operation Mode */ +enum { + OUT_REG_UV = 0, + OUT_REG_UA, + OUT_REG_OM, + OUT_REG_COUNT, +}; + +/* Buck operation modes */ +enum { + BUCK_OM_OFF = 0, + BUCK_OM_ON, + BUCK_OM_PWM, + BUCK_OM_COUNT, +}; + +/* Ldo operation modes */ +enum { + LDO_OM_OFF = 0, + LDO_OM_ON, + LDO_OM_SLEEP, + LDO_OM_STANDBY, + LDO_OM_COUNT, +}; + +/* BUCK1 Voltage: min: 0.8V, step: 25mV, max 2.4V */ +#define OUT_BUCK1_UV_MIN 800000 +#define OUT_BUCK1_UV_MAX 2400000 +#define OUT_BUCK1_UV_STEP 25000 + +/* BUCK1 Amperage: min: 150mA, step: 25mA, max: 250mA */ +#define OUT_BUCK1_UA_MIN 150000 +#define OUT_BUCK1_UA_MAX 250000 +#define OUT_BUCK1_UA_STEP 25000 + +/* BUCK2 Voltage: min: 0.75V, step: 50mV, max 3.95V */ +#define OUT_BUCK2_UV_MIN 750000 +#define OUT_BUCK2_UV_MAX 3950000 +#define OUT_BUCK2_UV_STEP 50000 + +/* LDO1 Voltage: min: 0.8V, step: 25mV, max 2.4V */ +#define OUT_LDO1_UV_MIN 800000 +#define OUT_LDO1_UV_MAX 2400000 +#define OUT_LDO1_UV_STEP 25000 + +/* LDO1 Amperage: min: 100mA, step: 50mA, max: 200mA */ +#define OUT_LDO1_UA_MIN 100000 +#define OUT_LDO1_UA_MAX 200000 +#define OUT_LDO1_UA_STEP 50000 + +/* LDO2 Voltage: min: 0.75V, step: 50mV, max 3.95V */ +#define OUT_LDO2_UV_MIN 750000 +#define OUT_LDO2_UV_MAX 3950000 +#define OUT_LDO2_UV_STEP 50000 + +/* register <-> value conversion */ +#define REG2VAL(min, step, reg) ((min) + ((step) * (reg))) +#define VAL2REG(min, step, val) (((val) - (min)) / (step)) + +/* Operation mode id -> register value conversion */ +#define OM2REG(x) (x) + +/* Test data for: test/dm/power.c */ + +/* BUCK names */ +#define SANDBOX_BUCK1_DEVNAME "buck1" +#define SANDBOX_BUCK1_PLATNAME "SUPPLY_1.2V" +#define SANDBOX_BUCK2_DEVNAME "buck2" +#define SANDBOX_BUCK2_PLATNAME "SUPPLY_3.3V" +/* LDO names */ +#define SANDBOX_LDO1_DEVNAME "ldo1" +#define SANDBOX_LDO1_PLATNAME "VDD_EMMC_1.8V" +#define SANDBOX_LDO2_DEVNAME "ldo2" +#define SANDBOX_LDO2_PLATNAME "VDD_LCD_3.3V" + +/* + * Expected regulators setup after call of: + * - regulator_autoset() + * - regulator_list_autoset() + */ + +/* BUCK1: for testing regulator_autoset() */ +#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UV 1200000 +#define SANDBOX_BUCK1_AUTOSET_EXPECTED_UA 200000 +#define SANDBOX_BUCK1_AUTOSET_EXPECTED_ENABLE true + +/* LDO1/2 for testing regulator_list_autoset() */ +#define SANDBOX_LDO1_AUTOSET_EXPECTED_UV 1800000 +#define SANDBOX_LDO1_AUTOSET_EXPECTED_UA 100000 +#define SANDBOX_LDO1_AUTOSET_EXPECTED_ENABLE true + +#define SANDBOX_LDO2_AUTOSET_EXPECTED_UV 3000000 +#define SANDBOX_LDO2_AUTOSET_EXPECTED_UA -ENOSYS +#define SANDBOX_LDO2_AUTOSET_EXPECTED_ENABLE false + +#endif diff --git a/include/rtc.h b/include/rtc.h index 54e361ea5e8..bd8621d60b9 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -15,41 +15,143 @@ * it there instead of in evey single driver */ #include <bcd.h> +#include <rtc_def.h> -/* - * The struct used to pass data from the generic interface code to - * the hardware dependend low-level code ande vice versa. Identical - * to struct rtc_time used by the Linux kernel. - * - * Note that there are small but significant differences to the - * common "struct time": - * - * struct time: struct rtc_time: - * tm_mon 0 ... 11 1 ... 12 - * tm_year years since 1900 years since 0 - */ - -struct rtc_time { - int tm_sec; - int tm_min; - int tm_hour; - int tm_mday; - int tm_mon; - int tm_year; - int tm_wday; - int tm_yday; - int tm_isdst; +#ifdef CONFIG_DM_RTC + +struct rtc_ops { + /** + * get() - get the current time + * + * Returns the current time read from the RTC device. The driver + * is responsible for setting up every field in the structure. + * + * @dev: Device to read from + * @time: Place to put the time that is read + */ + int (*get)(struct udevice *dev, struct rtc_time *time); + + /** + * set() - set the current time + * + * Sets the time in the RTC device. The driver can expect every + * field to be set correctly. + * + * @dev: Device to read from + * @time: Time to write + */ + int (*set)(struct udevice *dev, const struct rtc_time *time); + + /** + * reset() - reset the RTC to a known-good state + * + * This function resets the RTC to a known-good state. The time may + * be unset by this method, so should be set after this method is + * called. + * + * @dev: Device to read from + * @return 0 if OK, -ve on error + */ + int (*reset)(struct udevice *dev); + + /** + * read8() - Read an 8-bit register + * + * @dev: Device to read from + * @reg: Register to read + * @return value read, or -ve on error + */ + int (*read8)(struct udevice *dev, unsigned int reg); + + /** + * write8() - Write an 8-bit register + * + * @dev: Device to write to + * @reg: Register to write + * @value: Value to write + * @return 0 if OK, -ve on error + */ + int (*write8)(struct udevice *dev, unsigned int reg, int val); }; +/* Access the operations for an RTC device */ +#define rtc_get_ops(dev) ((struct rtc_ops *)(dev)->driver->ops) + +/** + * dm_rtc_get() - Read the time from an RTC + * + * @dev: Device to read from + * @time: Place to put the current time + * @return 0 if OK, -ve on error + */ +int dm_rtc_get(struct udevice *dev, struct rtc_time *time); + +/** + * dm_rtc_put() - Write a time to an RTC + * + * @dev: Device to read from + * @time: Time to write into the RTC + * @return 0 if OK, -ve on error + */ +int dm_rtc_set(struct udevice *dev, struct rtc_time *time); + +/** + * dm_rtc_reset() - reset the RTC to a known-good state + * + * If the RTC appears to be broken (e.g. it is not counting up in seconds) + * it may need to be reset to a known good state. This function achieves this. + * After resetting the RTC the time should then be set to a known value by + * the caller. + * + * @dev: Device to read from + * @return 0 if OK, -ve on error + */ +int dm_rtc_reset(struct udevice *dev); + +/** + * rtc_read8() - Read an 8-bit register + * + * @dev: Device to read from + * @reg: Register to read + * @return value read, or -ve on error + */ +int rtc_read8(struct udevice *dev, unsigned int reg); + +/** + * rtc_write8() - Write an 8-bit register + * + * @dev: Device to write to + * @reg: Register to write + * @value: Value to write + * @return 0 if OK, -ve on error + */ +int rtc_write8(struct udevice *dev, unsigned int reg, int val); + +/** + * rtc_read32() - Read a 32-bit value from the RTC + * + * @dev: Device to read from + * @reg: Offset to start reading from + * @valuep: Place to put the value that is read + * @return 0 if OK, -ve on error + */ +int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep); + +/** + * rtc_write32() - Write a 32-bit value to the RTC + * + * @dev: Device to write to + * @reg: Register to start writing to + * @value: Value to write + * @return 0 if OK, -ve on error + */ +int rtc_write32(struct udevice *dev, unsigned int reg, u32 value); + +#else int rtc_get (struct rtc_time *); int rtc_set (struct rtc_time *); void rtc_reset (void); -void GregorianDay (struct rtc_time *); -void to_tm (int, struct rtc_time *); -unsigned long mktime (unsigned int, unsigned int, unsigned int, - unsigned int, unsigned int, unsigned int); - /** * rtc_read8() - Read an 8-bit register * @@ -86,5 +188,44 @@ void rtc_write32(int reg, u32 value); * rtc_init() - Set up the real time clock ready for use */ void rtc_init(void); +#endif + +/** + * rtc_calc_weekday() - Work out the weekday from a time + * + * This only works for the Gregorian calendar - i.e. after 1752 (in the UK). + * It sets time->tm_wdaay to the correct day of the week. + * + * @time: Time to inspect. tm_wday is updated + * @return 0 if OK, -EINVAL if the weekday could not be determined + */ +int rtc_calc_weekday(struct rtc_time *time); + +/** + * rtc_to_tm() - Convert a time_t value into a broken-out time + * + * The following fields are set up by this function: + * tm_sec, tm_min, tm_hour, tm_mday, tm_mon, tm_year, tm_wday + * + * Note that tm_yday and tm_isdst are set to 0. + * + * @time_t: Number of seconds since 1970-01-01 00:00:00 + * @time: Place to put the broken-out time + * @return 0 if OK, -EINVAL if the weekday could not be determined + */ +int rtc_to_tm(int time_t, struct rtc_time *time); + +/** + * rtc_mktime() - Convert a broken-out time into a time_t value + * + * The following fields need to be valid for this function to work: + * tm_sec, tm_min, tm_hour, tm_mday, tm_mon, tm_year + * + * Note that tm_wday and tm_yday are ignored. + * + * @time: Broken-out time to convert + * @return corresponding time_t value, seconds since 1970-01-01 00:00:00 + */ +unsigned long rtc_mktime(const struct rtc_time *time); #endif /* _RTC_H_ */ diff --git a/include/rtc_def.h b/include/rtc_def.h new file mode 100644 index 00000000000..61797972670 --- /dev/null +++ b/include/rtc_def.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __rtc_def_h +#define __rtc_def_h + +/* + * The struct used to pass data from the generic interface code to + * the hardware dependend low-level code ande vice versa. Identical + * to struct rtc_time used by the Linux kernel. + * + * Note that there are small but significant differences to the + * common "struct time": + * + * struct time: struct rtc_time: + * tm_mon 0 ... 11 1 ... 12 + * tm_year years since 1900 years since 0 + */ + +struct rtc_time { + int tm_sec; + int tm_min; + int tm_hour; + int tm_mday; + int tm_mon; + int tm_year; + int tm_wday; + int tm_yday; + int tm_isdst; +}; + +#endif diff --git a/include/spi.h b/include/spi.h index 9495ca53c9b..f4b93e6a139 100644 --- a/include/spi.h +++ b/include/spi.h @@ -100,6 +100,8 @@ struct dm_spi_slave_platdata { * @dev: SPI slave device * @max_hz: Maximum speed for this slave * @mode: SPI mode to use for this slave (see SPI mode flags) + * @speed: Current bus speed. This is 0 until the bus is first + * claimed. * @bus: ID of the bus that the slave is attached to. For * driver model this is the sequence number of the SPI * bus (bus->seq) so does not need to be stored @@ -117,6 +119,7 @@ struct spi_slave { #ifdef CONFIG_DM_SPI struct udevice *dev; /* struct spi_slave is dev->parentdata */ uint max_hz; + uint speed; uint mode; #else unsigned int bus; @@ -613,7 +616,7 @@ int sandbox_spi_get_emul(struct sandbox_state *state, struct udevice *bus, struct udevice *slave, struct udevice **emulp); -/* Access the serial operations for a device */ +/* Access the operations for a SPI device */ #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) #endif /* CONFIG_DM_SPI */ diff --git a/include/usb.h b/include/usb.h index 1984e8f590c..c709ce2cf62 100644 --- a/include/usb.h +++ b/include/usb.h @@ -198,7 +198,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval); -#if defined CONFIG_USB_EHCI || defined CONFIG_MUSB_HOST +#if defined CONFIG_USB_EHCI || defined CONFIG_MUSB_HOST || defined(CONFIG_DM_USB) struct int_queue *create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, int elementsize, void *buffer, int interval); int destroy_int_queue(struct usb_device *dev, struct int_queue *queue); @@ -265,6 +265,7 @@ int usb_kbd_deregister(int force); /* routines */ int usb_init(void); /* initialize the USB Controller */ int usb_stop(void); /* stop the USB Controller */ +int usb_detect_change(void); /* detect if a USB device has been (un)plugged */ int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); @@ -290,6 +291,7 @@ int usb_get_class_descriptor(struct usb_device *dev, int ifnum, int usb_clear_halt(struct usb_device *dev, int pipe); int usb_string(struct usb_device *dev, int index, char *buf, size_t size); int usb_set_interface(struct usb_device *dev, int interface, int alternate); +int usb_get_port_status(struct usb_device *dev, int port, void *data); /* big endian -> little endian conversion */ /* some CPUs are already little endian e.g. the ARM920T */ @@ -571,20 +573,23 @@ struct usb_platdata { * This is used by sandbox to provide emulation data also. * * @id: ID used to match this device - * @speed: Stores the speed associated with a USB device * @devnum: Device address on the USB bus - * @slot_id: USB3 slot ID, which is separate from the device address - * @portnr: Port number of this device on its parent hub, numbered from 1 - * (0 mean this device is the root hub) + * @udev: usb-uclass internal use only do NOT use * @strings: List of descriptor strings (for sandbox emulation purposes) * @desc_list: List of descriptors (for sandbox emulation purposes) */ struct usb_dev_platdata { struct usb_device_id id; - enum usb_device_speed speed; int devnum; - int slot_id; - int portnr; /* Hub port number, 1..n */ + /* + * This pointer is used to pass the usb_device used in usb_scan_device, + * to get the usb descriptors before the driver is known, to the + * actual udevice once the driver is known and the udevice is created. + * This will be NULL except during probe, do NOT use. + * + * This should eventually go away. + */ + struct usb_device *udev; #ifdef CONFIG_SANDBOX struct usb_string *strings; /* NULL-terminated list of descriptor pointers */ @@ -605,10 +610,13 @@ struct usb_dev_platdata { * @desc_before_addr: true if we can read a device descriptor before it * has been assigned an address. For XHCI this is not possible * so this will be false. + * @companion: True if this is a companion controller to another USB + * controller */ struct usb_bus_priv { int next_addr; bool desc_before_addr; + bool companion; }; /** @@ -657,6 +665,52 @@ struct dm_usb_ops { int (*interrupt)(struct udevice *bus, struct usb_device *udev, unsigned long pipe, void *buffer, int length, int interval); + + /** + * create_int_queue() - Create and queue interrupt packets + * + * Create and queue @queuesize number of interrupt usb packets of + * @elementsize bytes each. @buffer must be atleast @queuesize * + * @elementsize bytes. + * + * Note some controllers only support a queuesize of 1. + * + * @interval: Interrupt interval + * + * @return A pointer to the created interrupt queue or NULL on error + */ + struct int_queue * (*create_int_queue)(struct udevice *bus, + struct usb_device *udev, unsigned long pipe, + int queuesize, int elementsize, void *buffer, + int interval); + + /** + * poll_int_queue() - Poll an interrupt queue for completed packets + * + * Poll an interrupt queue for completed packets. The return value + * points to the part of the buffer passed to create_int_queue() + * corresponding to the completed packet. + * + * @queue: queue to poll + * + * @return Pointer to the data of the first completed packet, or + * NULL if no packets are ready + */ + void * (*poll_int_queue)(struct udevice *bus, struct usb_device *udev, + struct int_queue *queue); + + /** + * destroy_int_queue() - Destroy an interrupt queue + * + * Destroy an interrupt queue created by create_int_queue(). + * + * @queue: queue to poll + * + * @return 0 if OK, -ve on error + */ + int (*destroy_int_queue)(struct udevice *bus, struct usb_device *udev, + struct int_queue *queue); + /** * alloc_device() - Allocate a new device context (XHCI) * @@ -742,11 +796,10 @@ int usb_scan_device(struct udevice *parent, int port, * will be a device with uclass UCLASS_USB. * * @dev: Device to check - * @busp: Returns bus, or NULL if not found - * @return 0 if OK, -EXDEV is somehow this bus does not have a controller (this - * indicates a critical error in the USB stack + * @return The bus, or NULL if not found (this indicates a critical error in + * the USB stack */ -int usb_get_bus(struct udevice *dev, struct udevice **busp); +struct udevice *usb_get_bus(struct udevice *dev); /** * usb_select_config() - Set up a device ready for use |