diff options
Diffstat (limited to 'include')
32 files changed, 428 insertions, 86 deletions
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index b8b1f1338c6..8ef19adc990 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -36,7 +36,7 @@ struct acpi_ctx; * RSDP (Root System Description Pointer) * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum */ -struct acpi_rsdp { +struct __packed acpi_rsdp { char signature[8]; /* RSDP signature */ u8 checksum; /* Checksum of the first 20 bytes */ char oem_id[6]; /* OEM ID */ diff --git a/include/blkmap.h b/include/blkmap.h index d53095437fa..57555fda4fb 100644 --- a/include/blkmap.h +++ b/include/blkmap.h @@ -7,6 +7,7 @@ #ifndef _BLKMAP_H #define _BLKMAP_H +#include <blk.h> #include <dm/lists.h> /** @@ -60,10 +61,12 @@ int blkmap_map_mem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, * @blknr: Start block number of the mapping * @blkcnt: Number of blocks to map * @paddr: The target physical memory address of the mapping + * @preserve: Mapping intended to be preserved for subsequent stages, + * like the OS (e.g. ISO installer) * Returns: 0 on success, negative error code on failure */ int blkmap_map_pmem(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, - phys_addr_t paddr); + phys_addr_t paddr, bool preserve); /** * blkmap_from_label() - Find blkmap from label @@ -102,4 +105,32 @@ int blkmap_destroy(struct udevice *dev); int blkmap_create_ramdisk(const char *label, ulong image_addr, ulong image_size, struct udevice **devp); +/** + * blkmap_get_preserved_pmem_slices() - Look for memory mapped preserved slices + * @cb: Callback function to call for the blkmap slice + * @ctx: Argument to be passed to the callback function + * + * The function is used to iterate through all the blkmap slices, looking + * specifically for memory mapped blkmap mapping which has been + * created with the preserve attribute. The function looks for such slices + * with the relevant attributes and then calls the callback function which + * then does additional configuration as needed. The callback function is + * invoked for all the discovered slices, unless there is an error returned + * by the callback, in which case the function returns that error. + * + * The callback function has the following arguments + * @ctx: Argument to be passed to the callback function + * @addr: Start address of the memory mapped slice + * @size: Size of the memory mapped slice + * + * Typically, the callback will perform some configuration needed for the + * information passed on to it. An example of this would be setting up the + * pmem node in a device-tree(passed through the ctx argument) with the + * parameters passed on to the callback. + * + * Return: 0 on success, negative error on failure + */ +int blkmap_get_preserved_pmem_slices(int (*cb)(void *ctx, u64 addr, + u64 size), void *ctx); + #endif /* _BLKMAP_H */ diff --git a/include/bootflow.h b/include/bootflow.h index 480cf8a5af1..d408b8c85bd 100644 --- a/include/bootflow.h +++ b/include/bootflow.h @@ -160,6 +160,7 @@ struct bootflow_img { * before using it * @BOOTFLOWIF_ALL: Return bootflows with errors as well * @BOOTFLOWIF_HUNT: Hunt for new bootdevs using the bootdrv hunters + * @BOOTFLOWIF_ONLY_BOOTABLE: Only consider partitions marked 'bootable' * * Internal flags: * @BOOTFLOWIF_SINGLE_DEV: (internal) Just scan one bootdev @@ -176,6 +177,7 @@ enum bootflow_iter_flags_t { BOOTFLOWIF_SHOW = 1 << 1, BOOTFLOWIF_ALL = 1 << 2, BOOTFLOWIF_HUNT = 1 << 3, + BOOTFLOWIF_ONLY_BOOTABLE = BIT(4), /* * flags used internally by standard boot - do not set these when diff --git a/include/bootstd.h b/include/bootstd.h index 3398e48e88b..2bc464756dd 100644 --- a/include/bootstd.h +++ b/include/bootstd.h @@ -22,6 +22,9 @@ struct udevice; * This is attached to the (only) bootstd device, so there is only one instance * of this struct. It provides overall information about bootdevs and bootflows. * + * TODO(sjg@chromium.org): Convert prefixes, bootdev_order and env_order to use + * alist + * * @prefixes: NULL-terminated list of prefixes to use for bootflow filenames, * e.g. "/", "/boot/"; NULL if none * @bootdev_order: Order to use for bootdevs (or NULL if none), with each item diff --git a/include/clk.h b/include/clk.h index 045e923a529..a6ef4e02692 100644 --- a/include/clk.h +++ b/include/clk.h @@ -351,6 +351,15 @@ static inline int clk_get_by_name_nodev_optional(ofnode node, const char *name, } /** + * clk_resolve_parent_clk - Determine name of clock udevice based on clock-names + * @dev: The client udevice. + * @name: The name of the clock to look up. + * + * Return name of the clock udevice which represents clock with clock-names name. + */ +const char *clk_resolve_parent_clk(struct udevice *dev, const char *name); + +/** * enum clk_defaults_stage - What stage clk_set_defaults() is called at * @CLK_DEFAULTS_PRE: Called before probe. Setting of defaults for clocks owned * by this clock driver will be defered until after probing. diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index aa31f3b05a0..266b77fbf68 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -37,20 +37,4 @@ /* CPSW Ethernet */ -/* - * Default to using SPI for environment, etc. - * 0x000000 - 0x040000 : QSPI.SPL (256KiB) - * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) - * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) - * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) - * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) - * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) - * 0x9E0000 - 0x2000000 : USERLAND - */ -#define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000 -#define CFG_SYS_SPI_ARGS_OFFS 0x140000 -#define CFG_SYS_SPI_ARGS_SIZE 0x80000 - -/* SPI SPL */ - #endif /* __CONFIG_AM57XX_EVM_H */ diff --git a/include/configs/an7581.h b/include/configs/an7581.h new file mode 100644 index 00000000000..64f04c9d9a5 --- /dev/null +++ b/include/configs/an7581.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for Airoha AN7581 + */ + +#ifndef __AN7581_H +#define __AN7581_H + +#include <linux/sizes.h> + +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE + +#define CFG_SYS_INIT_RAM_ADDR CONFIG_TEXT_BASE +#define CFG_SYS_INIT_RAM_SIZE SZ_2M + +/* DRAM */ +#define CFG_SYS_SDRAM_BASE 0x80000000 + +#endif diff --git a/include/configs/display5.h b/include/configs/display5.h index 98b1e5af2c0..19d71d6066f 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -29,11 +29,6 @@ * 0x1F00000 - 0x2000000 : SPI.factory (1MiB) */ -/* Below values are "dummy" - only to avoid build break */ -#define CFG_SYS_SPI_KERNEL_OFFS 0x150000 -#define CFG_SYS_SPI_ARGS_OFFS 0x140000 -#define CFG_SYS_SPI_ARGS_SIZE 0x10000 - #define CFG_MXC_UART_BASE UART5_BASE /* MMC Configs */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 96dcd731cb6..3c960ca2ce2 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -47,22 +47,6 @@ #include <configs/ti_omap5_common.h> -/* - * Default to using SPI for environment, etc. - * 0x000000 - 0x040000 : QSPI.SPL (256KiB) - * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) - * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) - * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) - * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) - * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) - * 0x9E0000 - 0x2000000 : USERLAND - */ -#define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000 -#define CFG_SYS_SPI_ARGS_OFFS 0x140000 -#define CFG_SYS_SPI_ARGS_SIZE 0x80000 - -/* SPI SPL */ - /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ diff --git a/include/configs/ouya.h b/include/configs/ouya.h new file mode 100644 index 00000000000..cc86c1002e3 --- /dev/null +++ b/include/configs/ouya.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2010,2012 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2025 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tegra30-common.h" + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "Ouya Game Console" + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 2996b375723..cd8d0438ba6 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> -#define CFG_SYS_SDRAM_BASE 0x80000000 #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMEROFF 0xbff8 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 27e0912665b..e0064edc5c9 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -11,6 +11,5 @@ #include <linux/sizes.h> -#define CFG_SYS_SDRAM_BASE 0x80000000 #endif /* __SIFIVE_UNMATCHED_H */ diff --git a/include/configs/xea.h b/include/configs/xea.h index 00d62748733..21454d13d21 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -12,14 +12,6 @@ #ifndef __CONFIGS_XEA_H__ #define __CONFIGS_XEA_H__ -#include <linux/sizes.h> - -/* SPL */ - -#define CFG_SYS_SPI_KERNEL_OFFS SZ_1M -#define CFG_SYS_SPI_ARGS_OFFS SZ_512K -#define CFG_SYS_SPI_ARGS_SIZE SZ_32K - /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 13941ba3589..ec78f2ee8ed 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -194,12 +194,6 @@ "dfu_bufsiz=0x1000\0" #endif -#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) -# define CFG_SYS_SPI_KERNEL_OFFS 0x80000 -# define CFG_SYS_SPI_ARGS_OFFS 0xa0000 -# define CFG_SYS_SPI_ARGS_SIZE 0xa0000 -#endif - #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" #endif diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 37c77aa1611..93ae5891a07 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -191,14 +191,6 @@ /* Not using MMC raw mode - just for compilation purpose */ -/* qspi mode is working fine */ -#ifdef CONFIG_ZYNQ_QSPI -#define CFG_SYS_SPI_ARGS_OFFS 0x200000 -#define CFG_SYS_SPI_ARGS_SIZE 0x80000 -#define CFG_SYS_SPI_KERNEL_OFFS (CFG_SYS_SPI_ARGS_OFFS + \ - CFG_SYS_SPI_ARGS_SIZE) -#endif - /* SP location before relocation, must use scratch RAM */ /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ diff --git a/include/dbsc5.h b/include/dbsc5.h new file mode 100644 index 00000000000..cec937d89e7 --- /dev/null +++ b/include/dbsc5.h @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024-2025 Renesas Electronics Corp. + */ + +#ifndef __INCLUDE_DBSC5_H__ +#define __INCLUDE_DBSC5_H__ + +/* The number of channels V4H has */ +#define DRAM_CH_CNT 4 +/* The number of slices V4H has */ +#define SLICE_CNT 2 +/* The number of chip select V4H has */ +#define CS_CNT 2 + +struct renesas_dbsc5_board_config { + /* Channels in use */ + u8 bdcfg_phyvalid; + /* Read vref (SoC) training range */ + u32 bdcfg_vref_r; + /* Write vref (MR14, MR15) training range */ + u16 bdcfg_vref_w; + /* CA vref (MR12) training range */ + u16 bdcfg_vref_ca; + /* RFM required check */ + bool bdcfg_rfm_chk; + + /* Board parameter about channels */ + struct { + /* + * 0x00: 4Gb dual channel die / 2Gb single channel die + * 0x01: 6Gb dual channel die / 3Gb single channel die + * 0x02: 8Gb dual channel die / 4Gb single channel die + * 0x03: 12Gb dual channel die / 6Gb single channel die + * 0x04: 16Gb dual channel die / 8Gb single channel die + * 0x05: 24Gb dual channel die / 12Gb single channel die + * 0x06: 32Gb dual channel die / 16Gb single channel die + * 0x07: 24Gb single channel die + * 0x08: 32Gb single channel die + * 0xFF: NO_MEMORY + */ + u8 bdcfg_ddr_density[CS_CNT]; + /* SoC caX([6][5][4][3][2][1][0]) -> MEM caY: */ + u32 bdcfg_ca_swap; + /* SoC dqsX([1][0]) -> MEM dqsY: */ + u8 bdcfg_dqs_swap; + /* SoC dq([7][6][5][4][3][2][1][0]) -> MEM dqY/dm: (8 means DM) */ + u32 bdcfg_dq_swap[SLICE_CNT]; + /* SoC dm -> MEM dqY/dm: (8 means DM) */ + u8 bdcfg_dm_swap[SLICE_CNT]; + /* SoC ckeX([1][0]) -> MEM csY */ + u8 bdcfg_cs_swap; + } ch[4]; +}; + +#endif /* __INCLUDE_DBSC5_H__ */ diff --git a/include/dm/device.h b/include/dm/device.h index add67f9ec06..678cd83c271 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -81,7 +81,10 @@ struct driver_info; */ #define DM_FLAG_VITAL (1 << 14) -/* Device must be probed after it was bound */ +/* Device must be probed after it was bound. This flag is per-device and does + * nothing if set on a U_BOOT_DRIVER() definition. Apply it with + * dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND) in the devices bind function. + */ #define DM_FLAG_PROBE_AFTER_BIND (1 << 15) /* diff --git a/include/dm/platform_data/serial_mxc.h b/include/dm/platform_data/serial_mxc.h index cc59eeb1dd1..52657aa3deb 100644 --- a/include/dm/platform_data/serial_mxc.h +++ b/include/dm/platform_data/serial_mxc.h @@ -9,6 +9,9 @@ /* Information about a serial port */ struct mxc_serial_plat { struct mxc_uart *reg; /* address of registers in physical memory */ +#if CONFIG_IS_ENABLED(CLK_CCF) + struct clk_bulk clks; +#endif bool use_dte; }; diff --git a/include/dt-bindings/reset/spacemit-k1-reset.h b/include/dt-bindings/reset/spacemit-k1-reset.h new file mode 100644 index 00000000000..74db58b27ef --- /dev/null +++ b/include/dt-bindings/reset/spacemit-k1-reset.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Spacemit Inc. + * Copyright (C) 2025 Huan Zhou <pericycle.cc@gmail.com> + */ + +#ifndef __DT_BINDINGS_RESET_SAPCEMIT_K1_H__ +#define __DT_BINDINGS_RESET_SAPCEMIT_K1_H__ +/* APBC */ +#define RESET_UART1 1 +#define RESET_UART2 2 +#define RESET_GPIO 3 +#define RESET_PWM0 4 +#define RESET_PWM1 5 +#define RESET_PWM2 6 +#define RESET_PWM3 7 +#define RESET_PWM4 8 +#define RESET_PWM5 9 +#define RESET_PWM6 10 +#define RESET_PWM7 11 +#define RESET_PWM8 12 +#define RESET_PWM9 13 +#define RESET_PWM10 14 +#define RESET_PWM11 15 +#define RESET_PWM12 16 +#define RESET_PWM13 17 +#define RESET_PWM14 18 +#define RESET_PWM15 19 +#define RESET_PWM16 20 +#define RESET_PWM17 21 +#define RESET_PWM18 22 +#define RESET_PWM19 23 +#define RESET_SSP3 24 +#define RESET_UART3 25 +#define RESET_RTC 26 +#define RESET_TWSI0 27 +#define RESET_TIMERS1 28 +#define RESET_AIB 29 +#define RESET_TIMERS2 30 +#define RESET_ONEWIRE 31 +#define RESET_SSPA0 32 +#define RESET_SSPA1 33 +#define RESET_DRO 34 +#define RESET_IR 35 +#define RESET_TWSI1 36 +#define RESET_TSEN 37 +#define RESET_TWSI2 38 +#define RESET_TWSI4 39 +#define RESET_TWSI5 40 +#define RESET_TWSI6 41 +#define RESET_TWSI7 42 +#define RESET_TWSI8 43 +#define RESET_IPC_AP2AUD 44 +#define RESET_UART4 45 +#define RESET_UART5 46 +#define RESET_UART6 47 +#define RESET_UART7 48 +#define RESET_UART8 49 +#define RESET_UART9 50 +#define RESET_CAN0 51 + +/* MPMU */ +#define RESET_WDT 52 + +/* APMU */ +#define RESET_JPG 53 +#define RESET_CSI 54 +#define RESET_CCIC2_PHY 55 +#define RESET_CCIC3_PHY 56 +#define RESET_ISP 57 +#define RESET_ISP_AHB 58 +#define RESET_ISP_CI 59 +#define RESET_ISP_CPP 60 +#define RESET_LCD 61 +#define RESET_DSI_ESC 62 +#define RESET_V2D 63 +#define RESET_MIPI 64 +#define RESET_LCD_SPI 65 +#define RESET_LCD_SPI_BUS 66 +#define RESET_LCD_SPI_HBUS 67 +#define RESET_LCD_MCLK 68 +#define RESET_CCIC_4X 69 +#define RESET_CCIC1_PHY 70 +#define RESET_SDH_AXI 71 +#define RESET_SDH0 72 +#define RESET_SDH1 73 +#define RESET_USB_AXI 74 +#define RESET_USBP1_AXI 75 +#define RESET_USB3_0 76 +#define RESET_QSPI 77 +#define RESET_QSPI_BUS 78 +#define RESET_DMA 79 +#define RESET_AES 80 +#define RESET_VPU 81 +#define RESET_GPU 82 +#define RESET_SDH2 83 +#define RESET_MC 84 +#define RESET_EM_AXI 85 +#define RESET_EM 86 +#define RESET_AUDIO_SYS 87 +#define RESET_HDMI 88 +#define RESET_PCIE0 89 +#define RESET_PCIE1 90 +#define RESET_PCIE2 91 +#define RESET_EMAC0 92 +#define RESET_EMAC1 93 + +/* APBC2 */ +#define RESET_SEC_UART1 94 +#define RESET_SEC_SSP2 95 +#define RESET_SEC_TWSI3 96 +#define RESET_SEC_RTC 97 +#define RESET_SEC_TIMERS0 98 +#define RESET_SEC_KPC 99 +#define RESET_SEC_GPIO 100 +#define RESET_NUMBER 101 + +#endif diff --git a/include/efi.h b/include/efi.h index d005cb6181e..f9bbb175c3a 100644 --- a/include/efi.h +++ b/include/efi.h @@ -705,4 +705,17 @@ static inline bool efi_use_host_arch(void) */ int efi_get_pxe_arch(void); +/** + * fdt_efi_pmem_setup() - Pmem setup in DT and EFI memory map + * @fdt: Devicetree to add the pmem nodes to + * + * Iterate through all the blkmap devices, look for BLKMAP_MEM devices, + * and add pmem nodes corresponding to the blkmap slice to the + * devicetree along with removing the corresponding region from the + * EFI memory map. + * + * Returns: 0 on success, negative error on failure + */ +int fdt_efi_pmem_setup(void *fdt); + #endif /* _LINUX_EFI_H */ diff --git a/include/efi_loader.h b/include/efi_loader.h index e9c10819ba2..5f769786786 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -878,6 +878,21 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, /* Adds a range into the EFI memory map */ efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type); +/** + * efi_update_memory_map() - update the memory map by adding/removing pages + * + * @start: start address, must be a multiple of + * EFI_PAGE_SIZE + * @pages: number of pages to add + * @memory_type: type of memory added + * @overlap_conventional: region may only overlap free(conventional) + * memory + * @remove: remove memory map + * Return: status code + */ +efi_status_t efi_update_memory_map(u64 start, u64 pages, int memory_type, + bool overlap_conventional, bool remove); + /* Called by board init to initialize the EFI drivers */ efi_status_t efi_driver_init(void); /* Called when a block device is added */ diff --git a/include/env/nvidia/prod_upd.env b/include/env/nvidia/prod_upd.env index f4e381994be..6a457d1b75b 100644 --- a/include/env/nvidia/prod_upd.env +++ b/include/env/nvidia/prod_upd.env @@ -3,6 +3,7 @@ boot_block_size=0x1000 bootloader_file=u-boot-dtb-tegra.bin spi_size=0x400000 boot_dev=0 +boot_interface=mmc flash_uboot=echo Preparing RAM; mw ${kernel_addr_r} 0 ${boot_block_size_r}; @@ -11,9 +12,9 @@ flash_uboot=echo Preparing RAM; mmc dev 0 1; mmc read ${kernel_addr_r} 0 ${boot_block_size}; echo Reading bootloader; - if load mmc ${boot_dev}:1 ${ramdisk_addr_r} ${bootloader_file}; + if load ${boot_interface} ${boot_dev}:1 ${ramdisk_addr_r} ${bootloader_file}; then echo Calculating bootloader size; - size mmc ${boot_dev}:1 ${bootloader_file}; + size ${boot_interface} ${boot_dev}:1 ${bootloader_file}; ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize}; echo Writing bootloader to eMMC; mmc dev 0 1; diff --git a/include/exfat.h b/include/exfat.h new file mode 100644 index 00000000000..7e43beeb348 --- /dev/null +++ b/include/exfat.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _EXFAT_H_ +#define _EXFAT_H_ + +struct disk_partition; + +int exfat_fs_opendir(const char *filename, struct fs_dir_stream **dirsp); +int exfat_fs_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp); +int exfat_fs_ls(const char *dirname); +int exfat_fs_probe(struct blk_desc *fs_dev_desc, + struct disk_partition *fs_partition); +int exfat_fs_read(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actread); +int exfat_fs_size(const char *filename, loff_t *size); +int exfat_fs_exists(const char *filename); +void exfat_fs_close(void); +void exfat_fs_closedir(struct fs_dir_stream *dirs); + +int exfat_fs_unlink(const char *filename); +int exfat_fs_mkdir(const char *dirname); +int exfat_fs_write(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actwrite); + +#endif /* _EXFAT_H */ diff --git a/include/fdt_support.h b/include/fdt_support.h index f0ad2e6b365..049190cf3d7 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -471,6 +471,20 @@ int fdt_valid(struct fdt_header **blobp); */ int fdt_get_cells_len(const void *blob, char *nr_cells_name); +/** + * fdt_fixup_pmem_region() - add a pmem node on the device tree + * + * This functions adds/updates a pmem node to the device tree. + * Usually used with EFI installers to preserve installer + * images + * + * @fdt: device tree provided by caller + * @addr: start address of the pmem node + * @size: size of the memory of the pmem node + * Return: 0 on success or < 0 on failure + */ +int fdt_fixup_pmem_region(void *fdt, u64 pmem_start, u64 pmem_size); + #endif /* !USE_HOSTCC */ #ifdef USE_HOSTCC diff --git a/include/fs.h b/include/fs.h index 54449faf2e5..731aaa02637 100644 --- a/include/fs.h +++ b/include/fs.h @@ -18,6 +18,7 @@ struct cmd_tbl; #define FS_TYPE_SQUASHFS 6 #define FS_TYPE_EROFS 7 #define FS_TYPE_SEMIHOSTING 8 +#define FS_TYPE_EXFAT 9 struct blk_desc; @@ -173,7 +174,7 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len, #define FS_DT_REG 8 /* regular file */ #define FS_DT_LNK 10 /* symbolic link */ -#define FS_DIRENT_NAME_LEN 256 +#define FS_DIRENT_NAME_LEN CONFIG_IS_ENABLED(FS_EXFAT, (1024), (256)) /** * struct fs_dirent - directory entry diff --git a/include/fs_internal.h b/include/fs_internal.h index 07f6bc5ea40..351582db61a 100644 --- a/include/fs_internal.h +++ b/include/fs_internal.h @@ -12,5 +12,7 @@ int fs_devread(struct blk_desc *, struct disk_partition *, lbaint_t, int, int, char *); +int fs_devwrite(struct blk_desc *, struct disk_partition *, lbaint_t, int, int, + const char *); #endif /* __U_BOOT_FS_INTERNAL_H__ */ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 59f9c241b84..5ea2171492e 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -105,7 +105,7 @@ struct clk_gate { #define CLK_GATE_HIWORD_MASK BIT(1) extern const struct clk_ops clk_gate_ops; -struct clk *clk_register_gate(struct device *dev, const char *name, +struct clk *clk_register_gate(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock); @@ -223,7 +223,7 @@ struct clk_composite { #define to_clk_composite(_clk) container_of(_clk, struct clk_composite, clk) -struct clk *clk_register_composite(struct device *dev, const char *name, +struct clk *clk_register_composite(struct udevice *dev, const char *name, const char * const *parent_names, int num_parents, struct clk *mux_clk, const struct clk_ops *mux_ops, struct clk *rate_clk, const struct clk_ops *rate_ops, @@ -233,16 +233,16 @@ struct clk *clk_register_composite(struct device *dev, const char *name, int clk_register(struct clk *clk, const char *drv_name, const char *name, const char *parent_name); -struct clk *clk_register_fixed_factor(struct device *dev, const char *name, +struct clk *clk_register_fixed_factor(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div); -struct clk *clk_register_divider(struct device *dev, const char *name, +struct clk *clk_register_divider(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags); -struct clk *clk_register_mux(struct device *dev, const char *name, +struct clk *clk_register_mux(struct udevice *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, diff --git a/include/linux/stat.h b/include/linux/stat.h index 5eba6334e60..b65bff7e97d 100644 --- a/include/linux/stat.h +++ b/include/linux/stat.h @@ -65,9 +65,7 @@ struct stat { unsigned long __unused5; }; -#endif /* __PPC__ */ - -#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\ +#elif defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\ defined (__microblaze__) || defined (__nios2__) struct stat { @@ -93,9 +91,7 @@ struct stat { unsigned long __unused5; }; -#endif /* __ARM__ */ - -#if defined (__MIPS__) +#elif defined (__MIPS__) struct stat { dev_t st_dev; @@ -124,9 +120,7 @@ struct stat { long st_pad4[14]; }; -#endif /* __MIPS__ */ - -#if defined(__SH__) || defined(__XTENSA__) +#elif defined(__SH__) || defined(__XTENSA__) struct stat { unsigned long st_dev; @@ -149,7 +143,38 @@ struct stat { unsigned long __unused5; }; -#endif /* __SH__ || __XTENSA__ */ +#else + +/* + * Everybody gets this wrong and has to stick with it for all + * eternity. Hopefully, this version gets used by new architectures + * so they don't fall into the same traps. + * + */ +struct stat { + unsigned long st_dev; /* Device. */ + unsigned long st_ino; /* File serial number. */ + unsigned int st_mode; /* File mode. */ + unsigned int st_nlink; /* Link count. */ + unsigned int st_uid; /* User ID of the file's owner. */ + unsigned int st_gid; /* Group ID of the file's group. */ + unsigned long st_rdev; /* Device number, if device. */ + unsigned long __pad1; + long st_size; /* Size of file, in bytes. */ + int st_blksize; /* Optimal block size for I/O. */ + int __pad2; + long st_blocks; /* Number 512-byte blocks allocated. */ + long st_atime; /* Time of last access. */ + unsigned long st_atime_nsec; + long st_mtime; /* Time of last modification. */ + unsigned long st_mtime_nsec; + long st_ctime; /* Time of last status change. */ + unsigned long st_ctime_nsec; + unsigned int __unused4; + unsigned int __unused5; +}; + +#endif #ifdef __cplusplus } diff --git a/include/lmb.h b/include/lmb.h index 09297a4f530..0d316c64c0a 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -135,9 +135,9 @@ phys_addr_t lmb_alloc_base(phys_size_t size, ulong align, phys_addr_t max_addr, * parameter. The base parameter is used to specify the base address * of the requested region. * - * Return: Base address on success, 0 on error. + * Return: 0 on success -1 on error */ -phys_addr_t lmb_alloc_addr(phys_addr_t base, phys_size_t size, u32 flags); +int lmb_alloc_addr(phys_addr_t base, phys_size_t size, u32 flags); /** * lmb_is_reserved_flags() - Test if address is in reserved region with flag @@ -175,7 +175,7 @@ void lmb_pop(struct lmb *store); static inline int lmb_read_check(phys_addr_t addr, phys_size_t len) { - return lmb_alloc_addr(addr, len, LMB_NONE) == addr ? 0 : -1; + return lmb_alloc_addr(addr, len, LMB_NONE); } /** diff --git a/include/mapmem.h b/include/mapmem.h index f496c96d16c..8ec03d59f0b 100644 --- a/include/mapmem.h +++ b/include/mapmem.h @@ -33,7 +33,7 @@ static inline phys_addr_t map_to_sysmem(const void *ptr) * nomap_sysmem() - pass through an address unchanged * * This is used to indicate an address which should NOT be mapped, e.g. in - * SMBIOS tables. Using this function instead of a case shows that the sandbox + * SMBIOS tables. Using this function instead of a cast shows that the sandbox * conversion has been done */ static inline void *nomap_sysmem(phys_addr_t paddr, unsigned long len) diff --git a/include/phy.h b/include/phy.h index 36785031eeb..36354aaf774 100644 --- a/include/phy.h +++ b/include/phy.h @@ -334,6 +334,30 @@ int gen10g_shutdown(struct phy_device *phydev); int gen10g_discover_mmds(struct phy_device *phydev); /** + * phy_set_bits - Convenience function for setting bits in a PHY register + * @phydev: the phy_device struct + * @devad: The MMD to read from + * @regnum: register number to write + * @val: bits to set + */ +static inline int phy_set_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val) +{ + return phy_modify(phydev, devad, regnum, 0, val); +} + +/** + * phy_clear_bits - Convenience function for clearing bits in a PHY register + * @phydev: the phy_device struct + * @devad: The MMD to write to + * @regnum: register number to write + * @val: bits to clear + */ +static inline int phy_clear_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val) +{ + return phy_modify(phydev, devad, regnum, val, 0); +} + +/** * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver * @__name: name of the driver */ diff --git a/include/renesas/rzg2l-usbphy.h b/include/renesas/rzg2l-usbphy.h new file mode 100644 index 00000000000..1a46b585f17 --- /dev/null +++ b/include/renesas/rzg2l-usbphy.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * RZ/G2L USB PHY common definitions + * + * Copyright (C) 2021-2023 Renesas Electronics Corp. + */ + +#ifndef RENESAS_RZG2L_USBPHY_H +#define RENESAS_RZG2L_USBPHY_H + +#include <fdtdec.h> + +struct rzg2l_usbphy_ctrl_priv { + fdt_addr_t regs; +}; + +#endif /* RENESAS_RZG2L_USBPHY_H */ |