diff options
Diffstat (limited to 'include')
84 files changed, 2363 insertions, 288 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index c83fc01b764..dffd6b26026 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -122,6 +122,13 @@ typedef struct global_data { struct list_head log_head; /* List of struct log_device */ int log_fmt; /* Mask containing log format info */ #endif +#if CONFIG_IS_ENABLED(BLOBLIST) + struct bloblist_hdr *bloblist; /* Bloblist information */ + struct bloblist_hdr *new_bloblist; /* Relocated blolist info */ +# ifdef CONFIG_SPL + struct spl_handoff *spl_handoff; +# endif +#endif } gd_t; #endif diff --git a/include/asm-generic/pe.h b/include/asm-generic/pe.h index 9a8b5e82e38..faae534e371 100644 --- a/include/asm-generic/pe.h +++ b/include/asm-generic/pe.h @@ -11,6 +11,24 @@ #ifndef _ASM_PE_H #define _ASM_PE_H +/* Characteristics */ +#define IMAGE_FILE_RELOCS_STRIPPED 0x0001 +#define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 +#define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 +#define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 +#define IMAGE_FILE_AGGRESSIVE_WS_TRIM 0x0010 +#define IMAGE_FILE_LARGE_ADDRESS_AWARE 0x0020 +/* Reserved 0x0040 */ +#define IMAGE_FILE_BYTES_REVERSED_LO 0x0080 +#define IMAGE_FILE_32BIT_MACHINE 0x0100 +#define IMAGE_FILE_DEBUG_STRIPPED 0x0200 +#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP 0x0400 +#define IMAGE_FILE_NET_RUN_FROM_SWAP 0x0800 +#define IMAGE_FILE_SYSTEM 0x1000 +#define IMAGE_FILE_DLL 0x2000 +#define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000 +#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000 + /* Subsystem type */ #define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 #define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 diff --git a/include/bloblist.h b/include/bloblist.h new file mode 100644 index 00000000000..85144010abe --- /dev/null +++ b/include/bloblist.h @@ -0,0 +1,195 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This provides a standard way of passing information between boot phases + * (TPL -> SPL -> U-Boot proper.) + * + * A list of blobs of data, tagged with their owner. The list resides in memory + * and can be updated by SPL, U-Boot, etc. + * + * Copyright 2018 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __BLOBLIST_H +#define __BLOBLIST_H + +enum { + BLOBLIST_VERSION = 0, + BLOBLIST_MAGIC = 0xb00757a3, + BLOBLIST_ALIGN = 16, +}; + +enum bloblist_tag_t { + BLOBLISTT_NONE = 0, + + /* Vendor-specific tags are permitted here */ + BLOBLISTT_EC_HOSTEVENT, /* Chromium OS EC host-event mask */ + BLOBLISTT_SPL_HANDOFF, /* Hand-off info from SPL */ + BLOBLISTT_VBOOT_CTX, /* Chromium OS verified boot context */ + BLOBLISTT_VBOOT_HANDOFF, /* Chromium OS internal handoff info */ +}; + +/** + * struct bloblist_hdr - header for the bloblist + * + * This is stored at the start of the bloblist which is always on a 16-byte + * boundary. Records follow this header. The bloblist normally stays in the + * same place in memory as SPL and U-Boot execute, but it can be safely moved + * around. + * + * None of the bloblist structures contain pointers but it is possible to put + * pointers inside a bloblist record if desired. This is not encouraged, + * since it can make part of the bloblist inaccessible if the pointer is + * no-longer valid. It is better to just store all the data inside a bloblist + * record. + * + * Each bloblist record is aligned to a 16-byte boundary and follows immediately + * from the last. + * + * @version: BLOBLIST_VERSION + * @hdr_size: Size of this header, normally sizeof(struct bloblist_hdr). The + * first bloblist_rec starts at this offset from the start of the header + * @flags: Space for BLOBLISTF_... flags (none yet) + * @magic: BLOBLIST_MAGIC + * @size: Total size of all records (non-zero if valid) including this header. + * The bloblist extends for this many bytes from the start of this header. + * @alloced: Total size allocated for this bloblist. When adding new records, + * the bloblist can grow up to this size. This starts out as + * sizeof(bloblist_hdr) since we need at least that much space to store a + * valid bloblist + * @spare: Space space + * @chksum: CRC32 for the entire bloblist allocated area. Since any of the + * blobs can be altered after being created, this checksum is only valid + * when the bloblist is finalised before jumping to the next stage of boot. + * Note: @chksum is last to make it easier to exclude it from the checksum + * calculation. + */ +struct bloblist_hdr { + u32 version; + u32 hdr_size; + u32 flags; + u32 magic; + + u32 size; + u32 alloced; + u32 spare; + u32 chksum; +}; + +/** + * struct bloblist_rec - record for the bloblist + * + * NOTE: Only exported for testing purposes. Do not use this struct. + * + * The bloblist contains a number of records each consisting of this record + * structure followed by the data contained. Each records is 16-byte aligned. + * + * @tag: Tag indicating what the record contains + * @hdr_size: Size of this header, normally sizeof(struct bloblist_rec). The + * record's data starts at this offset from the start of the record + * @size: Size of record in bytes, excluding the header size. This does not + * need to be aligned (e.g. 3 is OK). + * @spare: Spare space for other things + */ +struct bloblist_rec { + u32 tag; + u32 hdr_size; + u32 size; + u32 spare; +}; + +/** + * bloblist_find() - Find a blob + * + * Searches the bloblist and returns the blob with the matching tag + * + * @tag: Tag to search for (enum bloblist_tag_t) + * @size: Expected size of the blob + * @return pointer to blob if found, or NULL if not found, or a blob was found + * but it is the wrong size + */ +void *bloblist_find(uint tag, int size); + +/** + * bloblist_add() - Add a new blob + * + * Add a new blob to the bloblist + * + * This should only be called if you konw there is no existing blob for a + * particular tag. It is typically safe to call in the first phase of U-Boot + * (e.g. TPL or SPL). After that, bloblist_ensure() should be used instead. + * + * @tag: Tag to add (enum bloblist_tag_t) + * @size: Size of the blob + * @return pointer to the newly added block, or NULL if there is not enough + * space for the blob + */ +void *bloblist_add(uint tag, int size); + +/** + * bloblist_ensure_size() - Find or add a blob + * + * Find an existing blob, or add a new one if not found + * + * @tag: Tag to add (enum bloblist_tag_t) + * @size: Size of the blob + * @blobp: Returns a pointer to blob on success + * @return 0 if OK, -ENOSPC if it is missing and could not be added due to lack + * of space, or -ESPIPE it exists but has the wrong size + */ +int bloblist_ensure_size(uint tag, int size, void **blobp); + +/** + * bloblist_ensure() - Find or add a blob + * + * Find an existing blob, or add a new one if not found + * + * @tag: Tag to add (enum bloblist_tag_t) + * @size: Size of the blob + * @return pointer to blob, or NULL if it is missing and could not be added due + * to lack of space, or it exists but has the wrong size + */ +void *bloblist_ensure(uint tag, int size); + +/** + * bloblist_new() - Create a new, empty bloblist of a given size + * + * @addr: Address of bloblist + * @size: Initial size for bloblist + * @flags: Flags to use for bloblist + * @return 0 if OK, -EFAULT if addr is not aligned correctly, -ENOSPC is the + * area is not large enough + */ +int bloblist_new(ulong addr, uint size, uint flags); + +/** + * bloblist_check() - Check if a bloblist exists + * + * @addr: Address of bloblist + * @size: Expected size of blobsize, or 0 to detect the size + * @return 0 if OK, -ENOENT if the magic number doesn't match (indicating that + * there problem is no bloblist at the given address), -EPROTONOSUPPORT + * if the version does not match, -EIO if the checksum does not match, + * -EFBIG if the expected size does not match the detected size + */ +int bloblist_check(ulong addr, uint size); + +/** + * bloblist_finish() - Set up the bloblist for the next U-Boot part + * + * This sets the correct checksum for the bloblist. This ensures that the + * bloblist will be detected correctly by the next phase of U-Boot. + * + * @return 0 + */ +int bloblist_finish(void); + +/** + * bloblist_init() - Init the bloblist system with a single bloblist + * + * This uses CONFIG_BLOBLIST_ADDR and CONFIG_BLOBLIST_SIZE to set up a bloblist + * for use by U-Boot. + */ +int bloblist_init(void); + +#endif /* __BLOBLIST_H */ diff --git a/include/common.h b/include/common.h index cfbdf7ebcb4..faf512ed152 100644 --- a/include/common.h +++ b/include/common.h @@ -106,6 +106,17 @@ int mdm_init(void); void board_show_dram(phys_size_t size); /** + * Get the uppermost pointer that is valid to access + * + * Some systems may not map all of their address space. This function allows + * boards to indicate what their highest support pointer value is for DRAM + * access. + * + * @param total_size Size of U-Boot (unused?) + */ +ulong board_get_usable_ram_top(ulong total_size); + +/** * arch_fixup_fdt() - Write arch-specific information to fdt * * Defined in arch/$(ARCH)/lib/bootm-fdt.c @@ -542,11 +553,6 @@ int cpu_release(u32 nr, int argc, char * const argv[]); #endif #endif -#ifdef CONFIG_INIT_CRITICAL -#error CONFIG_INIT_CRITICAL is deprecated! -#error Read section CONFIG_SKIP_LOWLEVEL_INIT in README. -#endif - #define ROUND(a,b) (((a) + (b) - 1) & ~((b) - 1)) /* diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 5838eb34779..555efb7433f 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -99,9 +99,9 @@ #define BOOTEFI_NAME "bootia32.efi" #elif defined(CONFIG_X86_RUN_64BIT) #define BOOTEFI_NAME "bootx64.efi" -#elif defined(CONFIG_CPU_RISCV_32) +#elif defined(CONFIG_ARCH_RV32I) #define BOOTEFI_NAME "bootriscv32.efi" -#elif defined(CONFIG_CPU_RISCV_64) +#elif defined(CONFIG_ARCH_RV64I) #define BOOTEFI_NAME "bootriscv64.efi" #endif #endif @@ -242,6 +242,18 @@ BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB #endif +#ifdef CONFIG_CMD_VIRTIO +#define BOOTENV_SHARED_VIRTIO BOOTENV_SHARED_BLKDEV(virtio) +#define BOOTENV_DEV_VIRTIO BOOTENV_DEV_BLKDEV +#define BOOTENV_DEV_NAME_VIRTIO BOOTENV_DEV_NAME_BLKDEV +#else +#define BOOTENV_SHARED_VIRTIO +#define BOOTENV_DEV_VIRTIO \ + BOOT_TARGET_DEVICES_references_VIRTIO_without_CONFIG_CMD_VIRTIO +#define BOOTENV_DEV_NAME_VIRTIO \ + BOOT_TARGET_DEVICES_references_VIRTIO_without_CONFIG_CMD_VIRTIO +#endif + #if defined(CONFIG_CMD_DHCP) #if defined(CONFIG_EFI_LOADER) /* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */ @@ -257,10 +269,10 @@ #elif defined(__i386__) #define BOOTENV_EFI_PXE_ARCH "0x6" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00006:UNDI:003000" -#elif defined(CONFIG_CPU_RISCV_32) || ((defined(__riscv) && __riscv_xlen == 32)) +#elif defined(CONFIG_ARCH_RV32I) || ((defined(__riscv) && __riscv_xlen == 32)) #define BOOTENV_EFI_PXE_ARCH "0x19" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00025:UNDI:003000" -#elif defined(CONFIG_CPU_RISCV_64) || ((defined(__riscv) && __riscv_xlen == 64)) +#elif defined(CONFIG_ARCH_RV64I) || ((defined(__riscv) && __riscv_xlen == 64)) #define BOOTENV_EFI_PXE_ARCH "0x1b" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000" #elif defined(CONFIG_SANDBOX) @@ -350,6 +362,7 @@ BOOTENV_SHARED_IDE \ BOOTENV_SHARED_UBIFS \ BOOTENV_SHARED_EFI \ + BOOTENV_SHARED_VIRTIO \ "boot_prefixes=/ /boot/\0" \ "boot_scripts=boot.scr.uimg boot.scr\0" \ "boot_script_dhcp=boot.scr.uimg\0" \ diff --git a/include/configs/alt.h b/include/configs/alt.h index cc6a7bf6387..3f7f379e06c 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -39,8 +39,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 484c5ef2fe1..31749c6d06f 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -29,7 +29,9 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" #endif +#ifndef CONFIG_CPU_V7R #define CONFIG_SKIP_LOWLEVEL_INIT +#endif #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 006b049d09d..ccbdc0a3356 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -34,15 +34,8 @@ /* FIT support */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -/* UBI Support */ - -/* I2C configuration */ - #ifdef CONFIG_NAND -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00080000 -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ -#endif + #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -264,10 +257,6 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_OTG -/* Network. */ -#define CONFIG_PHY_SMSC -#define CONFIG_PHY_ATHEROS - /* NAND support */ #ifdef CONFIG_NAND #define GPMC_NAND_ECC_LP_x8_LAYOUT 1 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ba878eb13be..14a3046f19e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -124,8 +124,9 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif +#define CONFIG_ENV_SPI_MAX_HZ 0 +#define CONFIG_ENV_SPI_MODE 0 #ifdef CONFIG_USE_SPIFLASH #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 89aa11c0ed4..645fc3ffb81 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -29,7 +29,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_MARVELL 1 #define CONFIG_FEROCEON 1 /* CPU Core subversion */ #define CONFIG_88F5182 1 /* SOC Name */ diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 385d59e3387..9a205edc7c0 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -11,7 +11,7 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_SDRAM_BASE 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_8M +#define CONFIG_SYS_SDRAM_SIZE SZ_16M #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M) diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h index 34739c74745..b742d98706b 100644 --- a/include/configs/evb_rv1108.h +++ b/include/configs/evb_rv1108.h @@ -11,11 +11,14 @@ /* * Default environment settings */ +#undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "ipaddr=172.16.12.50\0" \ "serverip=172.16.12.69\0" \ "" + +#undef CONFIG_BOOTCOMMAND #define CONFIG_BOOTCOMMAND \ "sf probe;" \ "sf read 0x62000000 0x140800 0x500000;" \ diff --git a/include/configs/gose.h b/include/configs/gose.h index 36ac88a20df..8f0e3784881 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -35,8 +35,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h deleted file mode 100644 index 6615f7711db..00000000000 --- a/include/configs/khadas-vim.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Khadas VIM - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/khadas-vim2.h b/include/configs/khadas-vim2.h deleted file mode 100644 index 7ef8f42bd2f..00000000000 --- a/include/configs/khadas-vim2.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Khadas VIM2 - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MISC_INIT_R - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxm-khadas-vim2.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index e2585171afb..0de83f6723c 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -22,7 +22,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_MARVELL #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ #define CONFIG_KW88F6281 /* SOC Name */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index ef26a144a95..33c8bd41497 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -35,8 +35,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/lager.h b/include/configs/lager.h index 08498c6d810..89c5d01d3c5 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -36,8 +36,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h deleted file mode 100644 index a0856f98dac..00000000000 --- a/include/configs/libretech-cc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for LibreTech CC - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 94214b135df..3fca28da6b5 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -110,7 +110,6 @@ * RTC */ #ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_M41T62 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 #endif diff --git a/include/configs/meson-gx-common.h b/include/configs/meson64.h index c46522ef7e3..40ac079dfc8 100644 --- a/include/configs/meson-gx-common.h +++ b/include/configs/meson64.h @@ -1,11 +1,20 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Configuration for Amlogic Meson GX SoCs + * Configuration for Amlogic Meson 64bits SoCs * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> */ -#ifndef __MESON_GX_COMMON_CONFIG_H -#define __MESON_GX_COMMON_CONFIG_H +#ifndef __MESON64_CONFIG_H +#define __MESON64_CONFIG_H + +/* Generic Interrupt Controller Definitions */ +#if defined(CONFIG_MESON_AXG) +#define GICD_BASE 0xffc01000 +#define GICC_BASE 0xffc02000 +#else /* MESON GXL and GXBB */ +#define GICD_BASE 0xc4301000 +#define GICC_BASE 0xc4302000 +#endif #define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF @@ -17,10 +26,19 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_INIT_SP_ADDR 0x20000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ -/* Generic Interrupt Controller Definitions */ -#define GICD_BASE 0xc4301000 -#define GICC_BASE 0xc4302000 +/* ROM USB boot support, auto-execute boot.scr at scriptaddr */ +#define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ + "bootcmd_romusb=" \ + "if test \"${boot_source}\" = \"usb\" && " \ + "test -n \"${scriptaddr}\"; then " \ + "echo '(ROM USB boot)'; " \ + "source ${scriptaddr}; " \ + "fi\0" + +#define BOOTENV_DEV_NAME_ROMUSB(devtypeu, devtypel, instance) \ + "romusb " #ifdef CONFIG_CMD_USB #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) @@ -28,25 +46,28 @@ #define BOOT_TARGET_DEVICES_USB(func) #endif +#ifndef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ + func(ROMUSB, romusb, na) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) +#endif -#include <config_distro_bootcmd.h> - +#ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_addr_r=0x01000000\0" \ - "scriptaddr=0x1f000000\0" \ - "kernel_addr_r=0x01080000\0" \ + "fdt_addr_r=0x08008000\0" \ + "scriptaddr=0x08000000\0" \ + "kernel_addr_r=0x08080000\0" \ "pxefile_addr_r=0x01080000\0" \ "ramdisk_addr_r=0x13000000\0" \ - MESON_FDTFILE_SETTING \ + "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV +#endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */ +#include <config_distro_bootcmd.h> -#endif /* __MESON_GX_COMMON_CONFIG_H */ +#endif /* __MESON64_CONFIG_H */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h new file mode 100644 index 00000000000..68da920e300 --- /dev/null +++ b/include/configs/mt7623.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7623 SoC + * + * Copyright (C) 2018 MediaTek Inc. + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef __MT7623_H +#define __MT7623_H + +#include <linux/sizes.h> + +/* Miscellaneous configurable options */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_CMDLINE_TAG + +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_CBSIZE SZ_1K +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_4M + +/* Environment */ +#define CONFIG_ENV_SIZE SZ_4K +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Preloader -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) + +/* UBoot -> Kernel */ +#define CONFIG_LOADADDR 0x84000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* MMC */ +#define MMC_SUPPORTS_TUNING +#define CONFIG_SUPPORT_EMMC_BOOT + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* This is neede for kernel booting */ +#define FDT_HIGH "fdt_high=0xac000000\0" + +/* Extra environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + FDT_HIGH + +#endif diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h new file mode 100644 index 00000000000..a665a5eb7f2 --- /dev/null +++ b/include/configs/mt7629.h @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7629 SoC + * + * Copyright (C) 2018 MediaTek Inc. + * Author: Ryder Lee <ryder.lee@mediatek.com> + */ + +#ifndef __MT7629_H +#define __MT7629_H + +#include <linux/sizes.h> + +/* Miscellaneous configurable options */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_CMDLINE_TAG + +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_CBSIZE SZ_1K +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_4M + +/* Environment */ +#define CONFIG_ENV_SIZE SZ_4K +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Defines for SPL */ +#define CONFIG_SPL_STACK 0x106000 +#define CONFIG_SPL_TEXT_BASE 0x201000 +#define CONFIG_SPL_MAX_SIZE SZ_64K +#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K +#define CONFIG_SPL_PAD_TO 0x10000 + +#define CONFIG_SPI_ADDR 0x30000000 +#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) + +/* SPL -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) + +/* UBoot -> Kernel */ +#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000 +#define CONFIG_LOADADDR 0x42007f1c +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +#endif diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 5eeb5a16249..a8030931635 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -19,7 +19,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_MARVELL 1 /* * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h deleted file mode 100644 index ef53f20c0f2..00000000000 --- a/include/configs/nanopi-k2.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for NANOPI-K2 - * (C) Copyright 2018 Thomas McKahan - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h deleted file mode 100644 index d117b183aa4..00000000000 --- a/include/configs/odroid-c2.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for ODROID-C2 - * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-odroidc2.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/p212.h b/include/configs/p212.h deleted file mode 100644 index 2aa9f5d143c..00000000000 --- a/include/configs/p212.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Amlogic P212 - * - * Copyright (C) 2017 Baylibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* Serial setup */ - -#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-p212.dtb\0" - -#include <configs/meson-gx-common.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 99977954341..e125a38e7d4 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -58,7 +58,6 @@ #define CONFIG_SYS_I2C_MXC /* RTC (actually an RV-4162 but M41T62-compatible) */ -#define CONFIG_RTC_M41T62 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_SYS_RTC_BUS_NUM 2 diff --git a/include/configs/porter.h b/include/configs/porter.h index e56dc3f1ec6..9950f80afd7 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -40,8 +40,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index d279c233b2c..b29d155d095 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -15,7 +15,35 @@ #define CONFIG_SYS_MALLOC_LEN SZ_8M +#define CONFIG_SYS_BOOTM_LEN SZ_16M + /* Environment options */ #define CONFIG_ENV_SIZE SZ_4K +#define BOOT_TARGET_DEVICES(func) \ + func(QEMU, qemu, na) \ + func(VIRTIO, virtio, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define BOOTENV_DEV_QEMU(devtypeu, devtypel, instance) \ + "bootcmd_qemu=" \ + "if env exists kernel_start; then " \ + "bootm ${kernel_start} - ${fdtcontroladdr};" \ + "fi;\0" + +#define BOOTENV_DEV_NAME_QEMU(devtypeu, devtypel, instance) \ + "qemu " + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x82000000\0" \ + "scriptaddr=0x82100000\0" \ + "pxefile_addr_r=0x82200000\0" \ + "ramdisk_addr_r=0x82300000\0" \ + BOOTENV + #endif /* __CONFIG_H */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 435d1086285..6c2fa6a63cd 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -59,8 +59,7 @@ #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffffffffffff\0" \ - "initrd_high=0xffffffffffffffff\0" + "bootm_size=0x10000000\0" #define CONFIG_BOOTCOMMAND \ "tftp 0x48080000 Image; " \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 37be6dbeeb0..9ce41767a97 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -148,6 +148,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 2ab3b85e0c1..16d4e2e355c 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -17,6 +17,9 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +/* MMC/SD IP block */ +#define CONFIG_BOUNCE_BUFFER + #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) @@ -25,3 +28,18 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif + +#ifndef CONFIG_SPL_BUILD +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x60000000\0" \ + "fdt_addr_r=0x61f00000\0" \ + "kernel_addr_r=0x62000000\0" \ + "ramdisk_addr_r=0x64000000\0" + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + BOOTENV +#endif diff --git a/include/configs/silk.h b/include/configs/silk.h index a94928bd169..112806c342b 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -40,8 +40,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/stout.h b/include/configs/stout.h index b72b565c33d..93d980569c9 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -44,8 +44,7 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" + "bootm_size=0x10000000\0" /* SPL support */ #define CONFIG_SPL_TEXT_BASE 0xe6300000 diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 267b230fda6..47ea89df660 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -120,7 +120,7 @@ #define CONFIG_INITRD_TAG 1 /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) /* >= 512 KiB */ #define SCTL_BASE V2M_SYSCTL #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0) diff --git a/include/configs/x600.h b/include/configs/x600.h index a6835ebbd56..639da8012c6 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -75,7 +75,6 @@ #define CONFIG_SYS_I2C_SLAVE 0x02 #define CONFIG_I2C_CHIPADDRESS 0x50 -#define CONFIG_RTC_M41T62 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* FPGA config options */ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 00ca3d4be82..7138851daef 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -12,9 +12,12 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 +#define CONFIG_EXTRA_ENV_SETTINGS + #include <configs/xilinx_zynqmp.h> /* Undef unneeded configs */ +#undef CONFIG_BOOTCOMMAND #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_MALLOC_LEN #undef CONFIG_ZLIB diff --git a/include/configs/xilinx_zynqmp_zcu104_revC.h b/include/configs/xilinx_zynqmp_zcu104_revC.h new file mode 100644 index 00000000000..8b3ae36d0f3 --- /dev/null +++ b/include/configs/xilinx_zynqmp_zcu104_revC.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx ZynqMP zcu104 + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + */ + +#ifndef __CONFIG_ZYNQMP_ZCU104_REVC_H +#define __CONFIG_ZYNQMP_ZCU104_REVC_H + +#include <configs/xilinx_zynqmp_zcu104.h> + +#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 +#define CONFIG_ZYNQ_EEPROM_BUS 1 + +#endif /* __CONFIG_ZYNQMP_ZCU104_REVC_H */ diff --git a/include/cros_ec.h b/include/cros_ec.h index 4771e6b7d1c..f4b9b7a5c26 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -187,6 +187,14 @@ int cros_ec_flash_protect(struct udevice *dev, uint32_t set_mask, uint32_t set_flags, struct ec_response_flash_protect *resp); +/** + * Notify EC of current boot mode + * + * @param dev CROS-EC device + * @param vboot_mode Verified boot mode + * @return 0 if ok, <0 on error + */ +int cros_ec_entering_mode(struct udevice *dev, int mode); /** * Run internal tests on the cros_ec interface. @@ -397,4 +405,85 @@ struct i2c_msg; int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *msg, int nmsgs); +/** + * cros_ec_get_events_b() - Get event mask B + * + * @return value of event mask, default value of 0 if it could not be read + */ +uint64_t cros_ec_get_events_b(struct udevice *dev); + +/** + * cros_ec_clear_events_b() - Clear even mask B + * + * Any pending events in the B range are cleared + * + * @return 0 if OK, -ve on error + */ +int cros_ec_clear_events_b(struct udevice *dev, uint64_t mask); + +/** + * cros_ec_efs_verify() - tell the EC to verify one of its images + * + * @param dev CROS-EC device + * @param region Flash region to query + * @return 0 if OK, -ve on error + */ +int cros_ec_efs_verify(struct udevice *dev, enum ec_flash_region region); + +/** + * cros_ec_battery_cutoff() - Request that the battery be cut off + * + * This tells the battery to stop supplying power. This is used before shipping + * a device to ensure that the battery remains charged while the device is + * shipped or sitting on the shelf waiting to be purchased. + * + * @param dev CROS-EC device + * @param flags Flags to use (EC_BATTERY_CUTOFF_FLAG_...) + * @return 0 if OK, -ve on error + */ +int cros_ec_battery_cutoff(struct udevice *dev, uint8_t flags); + +/** + * cros_ec_read_limit_power() - Check if power is limited by batter/charger + * + * Sometimes the battery is low and / or the device is connected to a charger + * that cannot supply much power. + * + * @param dev CROS-EC device + * @param limit_powerp Returns whether power is limited (0 or 1) + * @return 0 if OK, -ENOSYS if the EC does not support this comment, -EINVAL + * if the EC returned an invalid response + */ +int cros_ec_read_limit_power(struct udevice *dev, int *limit_powerp); + +/** + * cros_ec_config_powerbtn() - Configure the behaviour of the power button + * + * @param dev CROS-EC device + * @param flags Flags to use (EC_POWER_BUTTON_...) + * @return 0 if OK, -ve on error + */ +int cros_ec_config_powerbtn(struct udevice *dev, uint32_t flags); + +/** + * cros_ec_get_lid_shutdown_mask() - Set the lid shutdown mask + * + * Determines whether a lid close event is reported + * + * @param dev CROS-EC device + * @return shufdown mas if OK, -ve on error + */ +int cros_ec_get_lid_shutdown_mask(struct udevice *dev); + +/** + * cros_ec_set_lid_shutdown_mask() - Set the lid shutdown mask + * + * Set whether a lid close event is reported + * + * @param dev CROS-EC device + * @param enable true to enable reporting, false to disable + * @return shufdown mas if OK, -ve on error + */ +int cros_ec_set_lid_shutdown_mask(struct udevice *dev, int enable); + #endif diff --git a/include/dm/device.h b/include/dm/device.h index 847934425bb..27a6d7b9fdb 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -525,6 +525,8 @@ int device_find_next_child(struct udevice **devp); * This is used to locate an existing child of a device which is of a given * uclass. * + * The device is NOT probed + * * @parent: Parent device to search * @uclass_id: Uclass to look for * @devp: Returns device found, if any @@ -535,6 +537,29 @@ int device_find_first_inactive_child(struct udevice *parent, struct udevice **devp); /** + * device_find_first_child_by_uclass() - Find the first child of a device in uc + * + * @parent: Parent device to search + * @uclass_id: Uclass to look for + * @devp: Returns first child device in that uclass, if any + * @return 0 if found, else -ENODEV + */ +int device_find_first_child_by_uclass(struct udevice *parent, + enum uclass_id uclass_id, + struct udevice **devp); + +/** + * device_find_child_by_name() - Find a child by device name + * + * @parent: Parent device to search + * @name: Name to look for + * @devp: Returns device found, if any + * @return 0 if found, else -ENODEV + */ +int device_find_child_by_name(struct udevice *parent, const char *name, + struct udevice **devp); + +/** * device_has_children() - check if a device has any children * * @dev: Device to check diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 2fc9fa39a35..d206ee2caab 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -237,6 +237,16 @@ int ofnode_read_u32_default(ofnode ref, const char *propname, u32 def); int ofnode_read_s32_default(ofnode node, const char *propname, s32 def); /** + * ofnode_read_u64() - Read a 64-bit integer from a property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * @return 0 if OK, -ve on error + */ +int ofnode_read_u64(ofnode node, const char *propname, u64 *outp); + +/** * ofnode_read_u64_default() - Read a 64-bit integer from a property * * @ref: valid node reference to read property from @@ -323,7 +333,7 @@ ofnode ofnode_get_parent(ofnode node); * ofnode_get_name() - get the name of a node * * @node: valid node to look up - * @return name or node + * @return name of node */ const char *ofnode_get_name(ofnode node); diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index c91dca1f824..a5fcb69dbad 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -21,10 +21,10 @@ enum uclass_id { UCLASS_TEST_DUMMY, UCLASS_SPI_EMUL, /* sandbox SPI device emulator */ UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ + UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */ UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ - UCLASS_SIMPLE_BUS, /* bus with child devices */ /* U-Boot uclasses start here - in alphabetical order */ UCLASS_ADC, /* Analog-to-digital converter */ @@ -78,6 +78,7 @@ enum uclass_id { UCLASS_RTC, /* Real time clock device */ UCLASS_SCSI, /* SCSI device */ UCLASS_SERIAL, /* Serial UART */ + UCLASS_SIMPLE_BUS, /* Bus with child devices */ UCLASS_SMEM, /* Shared memory interface */ UCLASS_SPI, /* SPI bus */ UCLASS_SPMI, /* System Power Management Interface bus */ diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 30d5a4fb9bf..8a4839ee882 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -143,6 +143,23 @@ int uclass_find_device_by_ofnode(enum uclass_id id, ofnode node, struct udevice **devp); /** + * uclass_find_device_by_phandle() - Find a uclass device by phandle + * + * This searches the devices in the uclass for one with the given phandle. + * + * The device is NOT probed, it is merely returned. + * + * @id: ID to look up + * @parent: Parent device containing the phandle pointer + * @name: Name of property in the parent device node + * @devp: Returns pointer to device (there is only one for each node) + * @return 0 if OK, -ENOENT if there is no @name present in the node, other + * -ve on error + */ +int uclass_find_device_by_phandle(enum uclass_id id, struct udevice *parent, + const char *name, struct udevice **devp); + +/** * uclass_bind_device() - Associate device with a uclass * * Connect the device into uclass's list of devices. diff --git a/include/dt-bindings/clock/axg-aoclkc.h b/include/dt-bindings/clock/axg-aoclkc.h new file mode 100644 index 00000000000..61955016a55 --- /dev/null +++ b/include/dt-bindings/clock/axg-aoclkc.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* + * Copyright (c) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * Copyright (c) 2018 Amlogic, inc. + * Author: Qiufang Dai <qiufang.dai@amlogic.com> + */ + +#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK +#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK + +#define CLKID_AO_REMOTE 0 +#define CLKID_AO_I2C_MASTER 1 +#define CLKID_AO_I2C_SLAVE 2 +#define CLKID_AO_UART1 3 +#define CLKID_AO_UART2 4 +#define CLKID_AO_IR_BLASTER 5 +#define CLKID_AO_SAR_ADC 6 +#define CLKID_AO_CLK81 7 +#define CLKID_AO_SAR_ADC_SEL 8 +#define CLKID_AO_SAR_ADC_DIV 9 +#define CLKID_AO_SAR_ADC_CLK 10 +#define CLKID_AO_ALT_XTAL 11 + +#endif diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h new file mode 100644 index 00000000000..fd9c362099d --- /dev/null +++ b/include/dt-bindings/clock/axg-audio-clkc.h @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (c) 2018 Baylibre SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + */ + +#ifndef __AXG_AUDIO_CLKC_BINDINGS_H +#define __AXG_AUDIO_CLKC_BINDINGS_H + +#define AUD_CLKID_SLV_SCLK0 9 +#define AUD_CLKID_SLV_SCLK1 10 +#define AUD_CLKID_SLV_SCLK2 11 +#define AUD_CLKID_SLV_SCLK3 12 +#define AUD_CLKID_SLV_SCLK4 13 +#define AUD_CLKID_SLV_SCLK5 14 +#define AUD_CLKID_SLV_SCLK6 15 +#define AUD_CLKID_SLV_SCLK7 16 +#define AUD_CLKID_SLV_SCLK8 17 +#define AUD_CLKID_SLV_SCLK9 18 +#define AUD_CLKID_SLV_LRCLK0 19 +#define AUD_CLKID_SLV_LRCLK1 20 +#define AUD_CLKID_SLV_LRCLK2 21 +#define AUD_CLKID_SLV_LRCLK3 22 +#define AUD_CLKID_SLV_LRCLK4 23 +#define AUD_CLKID_SLV_LRCLK5 24 +#define AUD_CLKID_SLV_LRCLK6 25 +#define AUD_CLKID_SLV_LRCLK7 26 +#define AUD_CLKID_SLV_LRCLK8 27 +#define AUD_CLKID_SLV_LRCLK9 28 +#define AUD_CLKID_DDR_ARB 29 +#define AUD_CLKID_PDM 30 +#define AUD_CLKID_TDMIN_A 31 +#define AUD_CLKID_TDMIN_B 32 +#define AUD_CLKID_TDMIN_C 33 +#define AUD_CLKID_TDMIN_LB 34 +#define AUD_CLKID_TDMOUT_A 35 +#define AUD_CLKID_TDMOUT_B 36 +#define AUD_CLKID_TDMOUT_C 37 +#define AUD_CLKID_FRDDR_A 38 +#define AUD_CLKID_FRDDR_B 39 +#define AUD_CLKID_FRDDR_C 40 +#define AUD_CLKID_TODDR_A 41 +#define AUD_CLKID_TODDR_B 42 +#define AUD_CLKID_TODDR_C 43 +#define AUD_CLKID_LOOPBACK 44 +#define AUD_CLKID_SPDIFIN 45 +#define AUD_CLKID_SPDIFOUT 46 +#define AUD_CLKID_RESAMPLE 47 +#define AUD_CLKID_POWER_DETECT 48 +#define AUD_CLKID_MST_A_MCLK 49 +#define AUD_CLKID_MST_B_MCLK 50 +#define AUD_CLKID_MST_C_MCLK 51 +#define AUD_CLKID_MST_D_MCLK 52 +#define AUD_CLKID_MST_E_MCLK 53 +#define AUD_CLKID_MST_F_MCLK 54 +#define AUD_CLKID_SPDIFOUT_CLK 55 +#define AUD_CLKID_SPDIFIN_CLK 56 +#define AUD_CLKID_PDM_DCLK 57 +#define AUD_CLKID_PDM_SYSCLK 58 +#define AUD_CLKID_MST_A_SCLK 79 +#define AUD_CLKID_MST_B_SCLK 80 +#define AUD_CLKID_MST_C_SCLK 81 +#define AUD_CLKID_MST_D_SCLK 82 +#define AUD_CLKID_MST_E_SCLK 83 +#define AUD_CLKID_MST_F_SCLK 84 +#define AUD_CLKID_MST_A_LRCLK 86 +#define AUD_CLKID_MST_B_LRCLK 87 +#define AUD_CLKID_MST_C_LRCLK 88 +#define AUD_CLKID_MST_D_LRCLK 89 +#define AUD_CLKID_MST_E_LRCLK 90 +#define AUD_CLKID_MST_F_LRCLK 91 +#define AUD_CLKID_TDMIN_A_SCLK_SEL 116 +#define AUD_CLKID_TDMIN_B_SCLK_SEL 117 +#define AUD_CLKID_TDMIN_C_SCLK_SEL 118 +#define AUD_CLKID_TDMIN_LB_SCLK_SEL 119 +#define AUD_CLKID_TDMOUT_A_SCLK_SEL 120 +#define AUD_CLKID_TDMOUT_B_SCLK_SEL 121 +#define AUD_CLKID_TDMOUT_C_SCLK_SEL 122 +#define AUD_CLKID_TDMIN_A_SCLK 123 +#define AUD_CLKID_TDMIN_B_SCLK 124 +#define AUD_CLKID_TDMIN_C_SCLK 125 +#define AUD_CLKID_TDMIN_LB_SCLK 126 +#define AUD_CLKID_TDMOUT_A_SCLK 127 +#define AUD_CLKID_TDMOUT_B_SCLK 128 +#define AUD_CLKID_TDMOUT_C_SCLK 129 +#define AUD_CLKID_TDMIN_A_LRCLK 130 +#define AUD_CLKID_TDMIN_B_LRCLK 131 +#define AUD_CLKID_TDMIN_C_LRCLK 132 +#define AUD_CLKID_TDMIN_LB_LRCLK 133 +#define AUD_CLKID_TDMOUT_A_LRCLK 134 +#define AUD_CLKID_TDMOUT_B_LRCLK 135 +#define AUD_CLKID_TDMOUT_C_LRCLK 136 + +#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h new file mode 100644 index 00000000000..fd1f938c38d --- /dev/null +++ b/include/dt-bindings/clock/axg-clkc.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Meson-AXG clock tree IDs + * + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + */ + +#ifndef __AXG_CLKC_H +#define __AXG_CLKC_H + +#define CLKID_SYS_PLL 0 +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 2 +#define CLKID_FCLK_DIV3 3 +#define CLKID_FCLK_DIV4 4 +#define CLKID_FCLK_DIV5 5 +#define CLKID_FCLK_DIV7 6 +#define CLKID_GP0_PLL 7 +#define CLKID_CLK81 10 +#define CLKID_MPLL0 11 +#define CLKID_MPLL1 12 +#define CLKID_MPLL2 13 +#define CLKID_MPLL3 14 +#define CLKID_DDR 15 +#define CLKID_AUDIO_LOCKER 16 +#define CLKID_MIPI_DSI_HOST 17 +#define CLKID_ISA 18 +#define CLKID_PL301 19 +#define CLKID_PERIPHS 20 +#define CLKID_SPICC0 21 +#define CLKID_I2C 22 +#define CLKID_RNG0 23 +#define CLKID_UART0 24 +#define CLKID_MIPI_DSI_PHY 25 +#define CLKID_SPICC1 26 +#define CLKID_PCIE_A 27 +#define CLKID_PCIE_B 28 +#define CLKID_HIU_IFACE 29 +#define CLKID_ASSIST_MISC 30 +#define CLKID_SD_EMMC_B 31 +#define CLKID_SD_EMMC_C 32 +#define CLKID_DMA 33 +#define CLKID_SPI 34 +#define CLKID_AUDIO 35 +#define CLKID_ETH 36 +#define CLKID_UART1 37 +#define CLKID_G2D 38 +#define CLKID_USB0 39 +#define CLKID_USB1 40 +#define CLKID_RESET 41 +#define CLKID_USB 42 +#define CLKID_AHB_ARB0 43 +#define CLKID_EFUSE 44 +#define CLKID_BOOT_ROM 45 +#define CLKID_AHB_DATA_BUS 46 +#define CLKID_AHB_CTRL_BUS 47 +#define CLKID_USB1_DDR_BRIDGE 48 +#define CLKID_USB0_DDR_BRIDGE 49 +#define CLKID_MMC_PCLK 50 +#define CLKID_VPU_INTR 51 +#define CLKID_SEC_AHB_AHB3_BRIDGE 52 +#define CLKID_GIC 53 +#define CLKID_AO_MEDIA_CPU 54 +#define CLKID_AO_AHB_SRAM 55 +#define CLKID_AO_AHB_BUS 56 +#define CLKID_AO_IFACE 57 +#define CLKID_AO_I2C 58 +#define CLKID_SD_EMMC_B_CLK0 59 +#define CLKID_SD_EMMC_C_CLK0 60 +#define CLKID_HIFI_PLL 69 +#define CLKID_PCIE_CML_EN0 79 +#define CLKID_PCIE_CML_EN1 80 +#define CLKID_MIPI_ENABLE 81 +#define CLKID_GEN_CLK 84 + +#endif /* __AXG_CLKC_H */ diff --git a/include/dt-bindings/clock/mt7623-clk.h b/include/dt-bindings/clock/mt7623-clk.h new file mode 100644 index 00000000000..71ced1593af --- /dev/null +++ b/include/dt-bindings/clock/mt7623-clk.h @@ -0,0 +1,413 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_CLK_MT2701_H +#define _DT_BINDINGS_CLK_MT2701_H + +/* TOPCKGEN */ +#define CLK_TOP_FCLKS_OFF 0 + +#define CLK_TOP_DPI 0 +#define CLK_TOP_DMPLL 1 +#define CLK_TOP_VENCPLL 2 +#define CLK_TOP_HDMI_0_PIX340M 3 +#define CLK_TOP_HDMI_0_DEEP340M 4 +#define CLK_TOP_HDMI_0_PLL340M 5 +#define CLK_TOP_HADDS2_FB 6 +#define CLK_TOP_WBG_DIG_416M 7 +#define CLK_TOP_DSI0_LNTC_DSI 8 +#define CLK_TOP_HDMI_SCL_RX 9 +#define CLK_TOP_32K_EXTERNAL 10 +#define CLK_TOP_HDMITX_CLKDIG_CTS 11 +#define CLK_TOP_AUD_EXT1 12 +#define CLK_TOP_AUD_EXT2 13 +#define CLK_TOP_NFI1X_PAD 14 + +#define CLK_TOP_SYSPLL 15 +#define CLK_TOP_SYSPLL_D2 16 +#define CLK_TOP_SYSPLL_D3 17 +#define CLK_TOP_SYSPLL_D5 18 +#define CLK_TOP_SYSPLL_D7 19 +#define CLK_TOP_SYSPLL1_D2 20 +#define CLK_TOP_SYSPLL1_D4 21 +#define CLK_TOP_SYSPLL1_D8 22 +#define CLK_TOP_SYSPLL1_D16 23 +#define CLK_TOP_SYSPLL2_D2 24 +#define CLK_TOP_SYSPLL2_D4 25 +#define CLK_TOP_SYSPLL2_D8 26 +#define CLK_TOP_SYSPLL3_D2 27 +#define CLK_TOP_SYSPLL3_D4 28 +#define CLK_TOP_SYSPLL4_D2 29 +#define CLK_TOP_SYSPLL4_D4 30 +#define CLK_TOP_UNIVPLL 31 +#define CLK_TOP_UNIVPLL_D2 32 +#define CLK_TOP_UNIVPLL_D3 33 +#define CLK_TOP_UNIVPLL_D5 34 +#define CLK_TOP_UNIVPLL_D7 35 +#define CLK_TOP_UNIVPLL_D26 36 +#define CLK_TOP_UNIVPLL_D52 37 +#define CLK_TOP_UNIVPLL_D108 38 +#define CLK_TOP_USB_PHY48M 39 +#define CLK_TOP_UNIVPLL1_D2 40 +#define CLK_TOP_UNIVPLL1_D4 41 +#define CLK_TOP_UNIVPLL1_D8 42 +#define CLK_TOP_UNIVPLL2_D2 43 +#define CLK_TOP_UNIVPLL2_D4 44 +#define CLK_TOP_UNIVPLL2_D8 45 +#define CLK_TOP_UNIVPLL2_D16 46 +#define CLK_TOP_UNIVPLL2_D32 47 +#define CLK_TOP_UNIVPLL3_D2 48 +#define CLK_TOP_UNIVPLL3_D4 49 +#define CLK_TOP_UNIVPLL3_D8 50 +#define CLK_TOP_MSDCPLL 51 +#define CLK_TOP_MSDCPLL_D2 52 +#define CLK_TOP_MSDCPLL_D4 53 +#define CLK_TOP_MSDCPLL_D8 54 +#define CLK_TOP_MMPLL 55 +#define CLK_TOP_MMPLL_D2 56 +#define CLK_TOP_DMPLL_D2 57 +#define CLK_TOP_DMPLL_D4 58 +#define CLK_TOP_DMPLL_X2 59 +#define CLK_TOP_TVDPLL 60 +#define CLK_TOP_TVDPLL_D2 61 +#define CLK_TOP_TVDPLL_D4 62 +#define CLK_TOP_VDECPLL 63 +#define CLK_TOP_TVD2PLL 64 +#define CLK_TOP_TVD2PLL_D2 65 +#define CLK_TOP_MIPIPLL 66 +#define CLK_TOP_MIPIPLL_D2 67 +#define CLK_TOP_MIPIPLL_D4 68 +#define CLK_TOP_HDMIPLL 69 +#define CLK_TOP_HDMIPLL_D2 70 +#define CLK_TOP_HDMIPLL_D3 71 +#define CLK_TOP_ARMPLL_1P3G 72 +#define CLK_TOP_AUDPLL 73 +#define CLK_TOP_AUDPLL_D4 74 +#define CLK_TOP_AUDPLL_D8 75 +#define CLK_TOP_AUDPLL_D16 76 +#define CLK_TOP_AUDPLL_D24 77 +#define CLK_TOP_AUD1PLL_98M 78 +#define CLK_TOP_AUD2PLL_90M 79 +#define CLK_TOP_HADDS2PLL_98M 80 +#define CLK_TOP_HADDS2PLL_294M 81 +#define CLK_TOP_ETHPLL_500M 82 +#define CLK_TOP_CLK26M_D8 83 +#define CLK_TOP_32K_INTERNAL 84 +#define CLK_TOP_AXISEL_D4 85 +#define CLK_TOP_8BDAC 86 + +#define CLK_TOP_AXI_SEL 87 +#define CLK_TOP_MEM_SEL 88 +#define CLK_TOP_DDRPHYCFG_SEL 89 +#define CLK_TOP_MM_SEL 90 +#define CLK_TOP_PWM_SEL 91 +#define CLK_TOP_VDEC_SEL 92 +#define CLK_TOP_MFG_SEL 93 +#define CLK_TOP_CAMTG_SEL 94 +#define CLK_TOP_UART_SEL 95 +#define CLK_TOP_SPI0_SEL 96 +#define CLK_TOP_USB20_SEL 97 +#define CLK_TOP_MSDC30_0_SEL 98 +#define CLK_TOP_MSDC30_1_SEL 99 +#define CLK_TOP_MSDC30_2_SEL 100 +#define CLK_TOP_AUDIO_SEL 101 +#define CLK_TOP_AUDINTBUS_SEL 102 +#define CLK_TOP_PMICSPI_SEL 103 +#define CLK_TOP_SCP_SEL 104 +#define CLK_TOP_DPI0_SEL 105 +#define CLK_TOP_DPI1_SEL 106 +#define CLK_TOP_TVE_SEL 107 +#define CLK_TOP_HDMI_SEL 108 +#define CLK_TOP_APLL_SEL 109 +#define CLK_TOP_RTC_SEL 110 +#define CLK_TOP_NFI2X_SEL 111 +#define CLK_TOP_EMMC_HCLK_SEL 112 +#define CLK_TOP_FLASH_SEL 113 +#define CLK_TOP_DI_SEL 114 +#define CLK_TOP_NR_SEL 115 +#define CLK_TOP_OSD_SEL 116 +#define CLK_TOP_HDMIRX_BIST_SEL 117 +#define CLK_TOP_INTDIR_SEL 118 +#define CLK_TOP_ASM_I_SEL 119 +#define CLK_TOP_ASM_M_SEL 120 +#define CLK_TOP_ASM_H_SEL 121 +#define CLK_TOP_MS_CARD_SEL 122 +#define CLK_TOP_ETHIF_SEL 123 +#define CLK_TOP_HDMIRX26_24_SEL 124 +#define CLK_TOP_MSDC30_3_SEL 125 +#define CLK_TOP_CMSYS_SEL 126 +#define CLK_TOP_SPI1_SEL 127 +#define CLK_TOP_SPI2_SEL 128 +#define CLK_TOP_8BDAC_SEL 129 +#define CLK_TOP_AUD2DVD_SEL 130 +#define CLK_TOP_PADMCLK_SEL 131 +#define CLK_TOP_AUD_MUX1_SEL 132 +#define CLK_TOP_AUD_MUX2_SEL 133 +#define CLK_TOP_AUDPLL_MUX_SEL 134 +#define CLK_TOP_AUD_K1_SRC_SEL 135 +#define CLK_TOP_AUD_K2_SRC_SEL 136 +#define CLK_TOP_AUD_K3_SRC_SEL 137 +#define CLK_TOP_AUD_K4_SRC_SEL 138 +#define CLK_TOP_AUD_K5_SRC_SEL 139 +#define CLK_TOP_AUD_K6_SRC_SEL 140 + +#define CLK_TOP_AUD_EXTCK1_DIV 141 +#define CLK_TOP_AUD_EXTCK2_DIV 142 +#define CLK_TOP_AUD_MUX1_DIV 143 +#define CLK_TOP_AUD_MUX2_DIV 144 +#define CLK_TOP_AUD_K1_SRC_DIV 145 +#define CLK_TOP_AUD_K2_SRC_DIV 146 +#define CLK_TOP_AUD_K3_SRC_DIV 147 +#define CLK_TOP_AUD_K4_SRC_DIV 148 +#define CLK_TOP_AUD_K5_SRC_DIV 149 +#define CLK_TOP_AUD_K6_SRC_DIV 150 +#define CLK_TOP_AUD_48K_TIMING 151 +#define CLK_TOP_AUD_44K_TIMING 152 +#define CLK_TOP_AUD_I2S1_MCLK 153 +#define CLK_TOP_AUD_I2S2_MCLK 154 +#define CLK_TOP_AUD_I2S3_MCLK 155 +#define CLK_TOP_AUD_I2S4_MCLK 156 +#define CLK_TOP_AUD_I2S5_MCLK 157 +#define CLK_TOP_AUD_I2S6_MCLK 158 +#define CLK_TOP_NR 159 + +/* APMIXEDSYS */ +#define CLK_APMIXED_ARMPLL 0 +#define CLK_APMIXED_MAINPLL 1 +#define CLK_APMIXED_UNIVPLL 2 +#define CLK_APMIXED_MMPLL 3 +#define CLK_APMIXED_MSDCPLL 4 +#define CLK_APMIXED_TVDPLL 5 +#define CLK_APMIXED_AUD1PLL 6 +#define CLK_APMIXED_TRGPLL 7 +#define CLK_APMIXED_ETHPLL 8 +#define CLK_APMIXED_VDECPLL 9 +#define CLK_APMIXED_HADDS2PLL 10 +#define CLK_APMIXED_AUD2PLL 11 +#define CLK_APMIXED_TVD2PLL 12 +#define CLK_APMIXED_NR 13 + +/* INFRACFG */ +#define CLK_INFRA_DBG 0 +#define CLK_INFRA_SMI 1 +#define CLK_INFRA_QAXI_CM4 2 +#define CLK_INFRA_AUD_SPLIN_B 3 +#define CLK_INFRA_AUDIO 4 +#define CLK_INFRA_EFUSE 5 +#define CLK_INFRA_L2C_SRAM 6 +#define CLK_INFRA_M4U 7 +#define CLK_INFRA_CONNMCU 8 +#define CLK_INFRA_TRNG 9 +#define CLK_INFRA_RAMBUFIF 10 +#define CLK_INFRA_CPUM 11 +#define CLK_INFRA_KP 12 +#define CLK_INFRA_CEC 13 +#define CLK_INFRA_IRRX 14 +#define CLK_INFRA_PMICSPI 15 +#define CLK_INFRA_PMICWRAP 16 +#define CLK_INFRA_DDCCI 17 +#define CLK_INFRA_CPUSEL 18 +#define CLK_INFRA_NR 19 + +/* PERICFG */ +#define CLK_PERI_NFI 0 +#define CLK_PERI_THERM 1 +#define CLK_PERI_PWM1 2 +#define CLK_PERI_PWM2 3 +#define CLK_PERI_PWM3 4 +#define CLK_PERI_PWM4 5 +#define CLK_PERI_PWM5 6 +#define CLK_PERI_PWM6 7 +#define CLK_PERI_PWM7 8 +#define CLK_PERI_PWM 9 +#define CLK_PERI_USB0 10 +#define CLK_PERI_USB1 11 +#define CLK_PERI_AP_DMA 12 +#define CLK_PERI_MSDC30_0 13 +#define CLK_PERI_MSDC30_1 14 +#define CLK_PERI_MSDC30_2 15 +#define CLK_PERI_MSDC30_3 16 +#define CLK_PERI_MSDC50_3 17 +#define CLK_PERI_NLI 18 +#define CLK_PERI_UART0 19 +#define CLK_PERI_UART1 20 +#define CLK_PERI_UART2 21 +#define CLK_PERI_UART3 22 +#define CLK_PERI_BTIF 23 +#define CLK_PERI_I2C0 24 +#define CLK_PERI_I2C1 25 +#define CLK_PERI_I2C2 26 +#define CLK_PERI_I2C3 27 +#define CLK_PERI_AUXADC 28 +#define CLK_PERI_SPI0 39 +#define CLK_PERI_ETH 30 +#define CLK_PERI_USB0_MCU 31 + +#define CLK_PERI_USB1_MCU 32 +#define CLK_PERI_USB_SLV 33 +#define CLK_PERI_GCPU 34 +#define CLK_PERI_NFI_ECC 35 +#define CLK_PERI_NFI_PAD 36 +#define CLK_PERI_FLASH 37 +#define CLK_PERI_HOST89_INT 38 +#define CLK_PERI_HOST89_SPI 39 +#define CLK_PERI_HOST89_DVD 40 +#define CLK_PERI_SPI1 41 +#define CLK_PERI_SPI2 42 +#define CLK_PERI_FCI 43 +#define CLK_PERI_NR 44 + +/* AUDIO */ +#define CLK_AUD_AFE 0 +#define CLK_AUD_LRCK_DETECT 1 +#define CLK_AUD_I2S 2 +#define CLK_AUD_APLL_TUNER 3 +#define CLK_AUD_HDMI 4 +#define CLK_AUD_SPDF 5 +#define CLK_AUD_SPDF2 6 +#define CLK_AUD_APLL 7 +#define CLK_AUD_TML 8 +#define CLK_AUD_AHB_IDLE_EXT 9 +#define CLK_AUD_AHB_IDLE_INT 10 + +#define CLK_AUD_I2SIN1 11 +#define CLK_AUD_I2SIN2 12 +#define CLK_AUD_I2SIN3 13 +#define CLK_AUD_I2SIN4 14 +#define CLK_AUD_I2SIN5 15 +#define CLK_AUD_I2SIN6 16 +#define CLK_AUD_I2SO1 17 +#define CLK_AUD_I2SO2 18 +#define CLK_AUD_I2SO3 19 +#define CLK_AUD_I2SO4 20 +#define CLK_AUD_I2SO5 21 +#define CLK_AUD_I2SO6 22 +#define CLK_AUD_ASRCI1 23 +#define CLK_AUD_ASRCI2 24 +#define CLK_AUD_ASRCO1 25 +#define CLK_AUD_ASRCO2 26 +#define CLK_AUD_ASRC11 27 +#define CLK_AUD_ASRC12 28 +#define CLK_AUD_HDMIRX 29 +#define CLK_AUD_INTDIR 30 +#define CLK_AUD_A1SYS 31 +#define CLK_AUD_A2SYS 32 +#define CLK_AUD_AFE_CONN 33 +#define CLK_AUD_AFE_PCMIF 34 +#define CLK_AUD_AFE_MRGIF 35 + +#define CLK_AUD_MMIF_UL1 36 +#define CLK_AUD_MMIF_UL2 37 +#define CLK_AUD_MMIF_UL3 38 +#define CLK_AUD_MMIF_UL4 39 +#define CLK_AUD_MMIF_UL5 40 +#define CLK_AUD_MMIF_UL6 41 +#define CLK_AUD_MMIF_DL1 42 +#define CLK_AUD_MMIF_DL2 43 +#define CLK_AUD_MMIF_DL3 44 +#define CLK_AUD_MMIF_DL4 45 +#define CLK_AUD_MMIF_DL5 46 +#define CLK_AUD_MMIF_DL6 47 +#define CLK_AUD_MMIF_DLMCH 48 +#define CLK_AUD_MMIF_ARB1 49 +#define CLK_AUD_MMIF_AWB1 50 +#define CLK_AUD_MMIF_AWB2 51 +#define CLK_AUD_MMIF_DAI 52 + +#define CLK_AUD_DMIC1 53 +#define CLK_AUD_DMIC2 54 +#define CLK_AUD_ASRCI3 55 +#define CLK_AUD_ASRCI4 56 +#define CLK_AUD_ASRCI5 57 +#define CLK_AUD_ASRCI6 58 +#define CLK_AUD_ASRCO3 59 +#define CLK_AUD_ASRCO4 60 +#define CLK_AUD_ASRCO5 61 +#define CLK_AUD_ASRCO6 62 +#define CLK_AUD_MEM_ASRC1 63 +#define CLK_AUD_MEM_ASRC2 64 +#define CLK_AUD_MEM_ASRC3 65 +#define CLK_AUD_MEM_ASRC4 66 +#define CLK_AUD_MEM_ASRC5 67 +#define CLK_AUD_DSD_ENC 68 +#define CLK_AUD_ASRC_BRG 60 +#define CLK_AUD_NR 70 + +/* MMSYS */ +#define CLK_MM_SMI_COMMON 0 +#define CLK_MM_SMI_LARB0 1 +#define CLK_MM_CMDQ 2 +#define CLK_MM_MUTEX 3 +#define CLK_MM_DISP_COLOR 4 +#define CLK_MM_DISP_BLS 5 +#define CLK_MM_DISP_WDMA 6 +#define CLK_MM_DISP_RDMA 7 +#define CLK_MM_DISP_OVL 8 +#define CLK_MM_MDP_TDSHP 9 +#define CLK_MM_MDP_WROT 10 +#define CLK_MM_MDP_WDMA 11 +#define CLK_MM_MDP_RSZ1 12 +#define CLK_MM_MDP_RSZ0 13 +#define CLK_MM_MDP_RDMA 14 +#define CLK_MM_MDP_BLS_26M 15 +#define CLK_MM_CAM_MDP 16 +#define CLK_MM_FAKE_ENG 17 +#define CLK_MM_MUTEX_32K 18 +#define CLK_MM_DISP_RDMA1 19 +#define CLK_MM_DISP_UFOE 20 + +#define CLK_MM_DSI_ENGINE 21 +#define CLK_MM_DSI_DIG 22 +#define CLK_MM_DPI_DIGL 23 +#define CLK_MM_DPI_ENGINE 24 +#define CLK_MM_DPI1_DIGL 25 +#define CLK_MM_DPI1_ENGINE 26 +#define CLK_MM_TVE_OUTPUT 27 +#define CLK_MM_TVE_INPUT 28 +#define CLK_MM_HDMI_PIXEL 29 +#define CLK_MM_HDMI_PLL 30 +#define CLK_MM_HDMI_AUDIO 31 +#define CLK_MM_HDMI_SPDIF 32 +#define CLK_MM_TVE_FMM 33 +#define CLK_MM_NR 34 + +/* IMGSYS */ +#define CLK_IMG_SMI_COMM 0 +#define CLK_IMG_RESZ 1 +#define CLK_IMG_JPGDEC_SMI 2 +#define CLK_IMG_JPGDEC 3 +#define CLK_IMG_VENC_LT 4 +#define CLK_IMG_VENC 5 +#define CLK_IMG_NR 6 + +/* VDEC */ +#define CLK_VDEC_CKGEN 0 +#define CLK_VDEC_LARB 1 +#define CLK_VDEC_NR 2 + +/* HIFSYS */ +#define CLK_HIFSYS_USB0PHY 0 +#define CLK_HIFSYS_USB1PHY 1 +#define CLK_HIFSYS_PCIE0 2 +#define CLK_HIFSYS_PCIE1 3 +#define CLK_HIFSYS_PCIE2 4 +#define CLK_HIFSYS_NR 5 + +/* ETHSYS */ +#define CLK_ETHSYS_HSDMA 0 +#define CLK_ETHSYS_ESW 1 +#define CLK_ETHSYS_GP2 2 +#define CLK_ETHSYS_GP1 3 +#define CLK_ETHSYS_PCM 4 +#define CLK_ETHSYS_GDMA 5 +#define CLK_ETHSYS_I2S 6 +#define CLK_ETHSYS_CRYPTO 7 +#define CLK_ETHSYS_NR 8 + +/* G3DSYS */ +#define CLK_G3DSYS_CORE 0 +#define CLK_G3DSYS_NR 1 + +#endif /* _DT_BINDINGS_CLK_MT2701_H */ diff --git a/include/dt-bindings/clock/mt7629-clk.h b/include/dt-bindings/clock/mt7629-clk.h new file mode 100644 index 00000000000..0bbfbfa744a --- /dev/null +++ b/include/dt-bindings/clock/mt7629-clk.h @@ -0,0 +1,206 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_CLK_MT7629_H +#define _DT_BINDINGS_CLK_MT7629_H + +/* TOPCKGEN */ +#define CLK_TOP_FCLKS_OFF 0 + +#define CLK_TOP_TO_U2_PHY 0 +#define CLK_TOP_TO_U2_PHY_1P 1 +#define CLK_TOP_PCIE0_PIPE_EN 2 +#define CLK_TOP_PCIE1_PIPE_EN 3 +#define CLK_TOP_SSUSB_TX250M 4 +#define CLK_TOP_SSUSB_EQ_RX250M 5 +#define CLK_TOP_SSUSB_CDR_REF 6 +#define CLK_TOP_SSUSB_CDR_FB 7 +#define CLK_TOP_SATA_ASIC 8 +#define CLK_TOP_SATA_RBC 9 + +#define CLK_TOP_TO_USB3_SYS 10 +#define CLK_TOP_P1_1MHZ 11 +#define CLK_TOP_4MHZ 12 +#define CLK_TOP_P0_1MHZ 13 +#define CLK_TOP_ETH_500M 14 +#define CLK_TOP_TXCLK_SRC_PRE 15 +#define CLK_TOP_RTC 16 +#define CLK_TOP_PWM_QTR_26M 17 +#define CLK_TOP_CPUM_TCK_IN 18 +#define CLK_TOP_TO_USB3_DA_TOP 19 +#define CLK_TOP_MEMPLL 20 +#define CLK_TOP_DMPLL 21 +#define CLK_TOP_DMPLL_D4 22 +#define CLK_TOP_DMPLL_D8 23 +#define CLK_TOP_SYSPLL_D2 24 +#define CLK_TOP_SYSPLL1_D2 25 +#define CLK_TOP_SYSPLL1_D4 26 +#define CLK_TOP_SYSPLL1_D8 27 +#define CLK_TOP_SYSPLL1_D16 28 +#define CLK_TOP_SYSPLL2_D2 29 +#define CLK_TOP_SYSPLL2_D4 30 +#define CLK_TOP_SYSPLL2_D8 31 +#define CLK_TOP_SYSPLL_D5 32 +#define CLK_TOP_SYSPLL3_D2 33 +#define CLK_TOP_SYSPLL3_D4 34 +#define CLK_TOP_SYSPLL_D7 35 +#define CLK_TOP_SYSPLL4_D2 36 +#define CLK_TOP_SYSPLL4_D4 37 +#define CLK_TOP_SYSPLL4_D16 38 +#define CLK_TOP_UNIVPLL 39 +#define CLK_TOP_UNIVPLL1_D2 40 +#define CLK_TOP_UNIVPLL1_D4 41 +#define CLK_TOP_UNIVPLL1_D8 42 +#define CLK_TOP_UNIVPLL_D3 43 +#define CLK_TOP_UNIVPLL2_D2 44 +#define CLK_TOP_UNIVPLL2_D4 45 +#define CLK_TOP_UNIVPLL2_D8 46 +#define CLK_TOP_UNIVPLL2_D16 47 +#define CLK_TOP_UNIVPLL_D5 48 +#define CLK_TOP_UNIVPLL3_D2 49 +#define CLK_TOP_UNIVPLL3_D4 50 +#define CLK_TOP_UNIVPLL3_D16 51 +#define CLK_TOP_UNIVPLL_D7 52 +#define CLK_TOP_UNIVPLL_D80_D4 53 +#define CLK_TOP_UNIV48M 54 +#define CLK_TOP_SGMIIPLL_D2 55 +#define CLK_TOP_CLKXTAL_D4 56 +#define CLK_TOP_HD_FAXI 57 +#define CLK_TOP_FAXI 58 +#define CLK_TOP_F_FAUD_INTBUS 59 +#define CLK_TOP_AP2WBHIF_HCLK 60 +#define CLK_TOP_10M_INFRAO 61 +#define CLK_TOP_MSDC30_1 62 +#define CLK_TOP_SPI 63 +#define CLK_TOP_SF 64 +#define CLK_TOP_FLASH 65 +#define CLK_TOP_TO_USB3_REF 66 +#define CLK_TOP_TO_USB3_MCU 67 +#define CLK_TOP_TO_USB3_DMA 68 +#define CLK_TOP_FROM_TOP_AHB 69 +#define CLK_TOP_FROM_TOP_AXI 70 +#define CLK_TOP_PCIE1_MAC_EN 71 +#define CLK_TOP_PCIE0_MAC_EN 72 + +#define CLK_TOP_AXI_SEL 73 +#define CLK_TOP_MEM_SEL 74 +#define CLK_TOP_DDRPHYCFG_SEL 75 +#define CLK_TOP_ETH_SEL 76 +#define CLK_TOP_PWM_SEL 77 +#define CLK_TOP_F10M_REF_SEL 78 +#define CLK_TOP_NFI_INFRA_SEL 79 +#define CLK_TOP_FLASH_SEL 80 +#define CLK_TOP_UART_SEL 81 +#define CLK_TOP_SPI0_SEL 82 +#define CLK_TOP_SPI1_SEL 83 +#define CLK_TOP_MSDC50_0_SEL 84 +#define CLK_TOP_MSDC30_0_SEL 85 +#define CLK_TOP_MSDC30_1_SEL 86 +#define CLK_TOP_AP2WBMCU_SEL 87 +#define CLK_TOP_AP2WBHIF_SEL 88 +#define CLK_TOP_AUDIO_SEL 89 +#define CLK_TOP_AUD_INTBUS_SEL 90 +#define CLK_TOP_PMICSPI_SEL 91 +#define CLK_TOP_SCP_SEL 92 +#define CLK_TOP_ATB_SEL 93 +#define CLK_TOP_HIF_SEL 94 +#define CLK_TOP_SATA_SEL 95 +#define CLK_TOP_U2_SEL 96 +#define CLK_TOP_AUD1_SEL 97 +#define CLK_TOP_AUD2_SEL 98 +#define CLK_TOP_IRRX_SEL 99 +#define CLK_TOP_IRTX_SEL 100 +#define CLK_TOP_SATA_MCU_SEL 101 +#define CLK_TOP_PCIE0_MCU_SEL 102 +#define CLK_TOP_PCIE1_MCU_SEL 103 +#define CLK_TOP_SSUSB_MCU_SEL 104 +#define CLK_TOP_CRYPTO_SEL 105 +#define CLK_TOP_SGMII_REF_1_SEL 106 +#define CLK_TOP_10M_SEL 107 +#define CLK_TOP_NR_CLK 108 + +/* INFRACFG */ +#define CLK_INFRA_MUX1_SEL 0 +#define CLK_INFRA_DBGCLK_PD 1 +#define CLK_INFRA_TRNG_PD 2 +#define CLK_INFRA_DEVAPC_PD 3 +#define CLK_INFRA_APXGPT_PD 4 +#define CLK_INFRA_SEJ_PD 5 +#define CLK_INFRA_NR_CLK 6 + +/* PERICFG */ +#define CLK_PERIBUS_SEL 0 +#define CLK_PERI_PWM1_PD 1 +#define CLK_PERI_PWM2_PD 2 +#define CLK_PERI_PWM3_PD 3 +#define CLK_PERI_PWM4_PD 4 +#define CLK_PERI_PWM5_PD 5 +#define CLK_PERI_PWM6_PD 6 +#define CLK_PERI_PWM7_PD 7 +#define CLK_PERI_PWM_PD 8 +#define CLK_PERI_AP_DMA_PD 9 +#define CLK_PERI_MSDC30_1_PD 10 +#define CLK_PERI_UART0_PD 11 +#define CLK_PERI_UART1_PD 12 +#define CLK_PERI_UART2_PD 13 +#define CLK_PERI_UART3_PD 14 +#define CLK_PERI_BTIF_PD 15 +#define CLK_PERI_I2C0_PD 16 +#define CLK_PERI_SPI0_PD 17 +#define CLK_PERI_SNFI_PD 18 +#define CLK_PERI_NFI_PD 19 +#define CLK_PERI_NFIECC_PD 20 +#define CLK_PERI_FLASH_PD 21 +#define CLK_PERI_NR_CLK 22 + +/* APMIXEDSYS */ +#define CLK_APMIXED_ARMPLL 0 +#define CLK_APMIXED_MAINPLL 1 +#define CLK_APMIXED_UNIV2PLL 2 +#define CLK_APMIXED_ETH1PLL 3 +#define CLK_APMIXED_ETH2PLL 4 +#define CLK_APMIXED_SGMIPLL 5 +#define CLK_APMIXED_NR_CLK 6 + +/* SSUSBSYS */ +#define CLK_SSUSB_U2_PHY_1P_EN 0 +#define CLK_SSUSB_U2_PHY_EN 1 +#define CLK_SSUSB_REF_EN 2 +#define CLK_SSUSB_SYS_EN 3 +#define CLK_SSUSB_MCU_EN 4 +#define CLK_SSUSB_DMA_EN 5 +#define CLK_SSUSB_NR_CLK 6 + +/* PCIESYS */ +#define CLK_PCIE_P1_AUX_EN 0 +#define CLK_PCIE_P1_OBFF_EN 1 +#define CLK_PCIE_P1_AHB_EN 2 +#define CLK_PCIE_P1_AXI_EN 3 +#define CLK_PCIE_P1_MAC_EN 4 +#define CLK_PCIE_P1_PIPE_EN 5 +#define CLK_PCIE_P0_AUX_EN 6 +#define CLK_PCIE_P0_OBFF_EN 7 +#define CLK_PCIE_P0_AHB_EN 8 +#define CLK_PCIE_P0_AXI_EN 9 +#define CLK_PCIE_P0_MAC_EN 10 +#define CLK_PCIE_P0_PIPE_EN 11 +#define CLK_PCIE_NR_CLK 12 + +/* ETHSYS */ +#define CLK_ETH_FE_EN 0 +#define CLK_ETH_GP2_EN 1 +#define CLK_ETH_GP1_EN 2 +#define CLK_ETH_GP0_EN 3 +#define CLK_ETH_ESW_EN 4 +#define CLK_ETH_NR_CLK 5 + +/* SGMIISYS */ +#define CLK_SGMII_TX_EN 0 +#define CLK_SGMII_RX_EN 1 +#define CLK_SGMII_CDR_REF 2 +#define CLK_SGMII_CDR_FB 3 +#define CLK_SGMII_NR_CLK 4 + +#endif /* _DT_BINDINGS_CLK_MT7629_H */ diff --git a/include/dt-bindings/clock/r8a77965-cpg-mssr.h b/include/dt-bindings/clock/r8a77965-cpg-mssr.h new file mode 100644 index 00000000000..6d3b5a9a608 --- /dev/null +++ b/include/dt-bindings/clock/r8a77965-cpg-mssr.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a77965 CPG Core Clocks */ +#define R8A77965_CLK_Z 0 +#define R8A77965_CLK_ZR 1 +#define R8A77965_CLK_ZG 2 +#define R8A77965_CLK_ZTR 3 +#define R8A77965_CLK_ZTRD2 4 +#define R8A77965_CLK_ZT 5 +#define R8A77965_CLK_ZX 6 +#define R8A77965_CLK_S0D1 7 +#define R8A77965_CLK_S0D2 8 +#define R8A77965_CLK_S0D3 9 +#define R8A77965_CLK_S0D4 10 +#define R8A77965_CLK_S0D6 11 +#define R8A77965_CLK_S0D8 12 +#define R8A77965_CLK_S0D12 13 +#define R8A77965_CLK_S1D1 14 +#define R8A77965_CLK_S1D2 15 +#define R8A77965_CLK_S1D4 16 +#define R8A77965_CLK_S2D1 17 +#define R8A77965_CLK_S2D2 18 +#define R8A77965_CLK_S2D4 19 +#define R8A77965_CLK_S3D1 20 +#define R8A77965_CLK_S3D2 21 +#define R8A77965_CLK_S3D4 22 +#define R8A77965_CLK_LB 23 +#define R8A77965_CLK_CL 24 +#define R8A77965_CLK_ZB3 25 +#define R8A77965_CLK_ZB3D2 26 +#define R8A77965_CLK_CR 27 +#define R8A77965_CLK_CRD2 28 +#define R8A77965_CLK_SD0H 29 +#define R8A77965_CLK_SD0 30 +#define R8A77965_CLK_SD1H 31 +#define R8A77965_CLK_SD1 32 +#define R8A77965_CLK_SD2H 33 +#define R8A77965_CLK_SD2 34 +#define R8A77965_CLK_SD3H 35 +#define R8A77965_CLK_SD3 36 +#define R8A77965_CLK_SSP2 37 +#define R8A77965_CLK_SSP1 38 +#define R8A77965_CLK_SSPRS 39 +#define R8A77965_CLK_RPC 40 +#define R8A77965_CLK_RPCD2 41 +#define R8A77965_CLK_MSO 42 +#define R8A77965_CLK_CANFD 43 +#define R8A77965_CLK_HDMI 44 +#define R8A77965_CLK_CSI0 45 +#define R8A77965_CLK_CP 46 +#define R8A77965_CLK_CPEX 47 +#define R8A77965_CLK_R 48 +#define R8A77965_CLK_OSC 49 + +#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a77990-cpg-mssr.h b/include/dt-bindings/clock/r8a77990-cpg-mssr.h index c806fce449d..a596a482f3a 100644 --- a/include/dt-bindings/clock/r8a77990-cpg-mssr.h +++ b/include/dt-bindings/clock/r8a77990-cpg-mssr.h @@ -56,8 +56,7 @@ #define R8A77990_CLK_LV0 45 #define R8A77990_CLK_LV1 46 #define R8A77990_CLK_CSI0 47 -#define R8A77990_CLK_POST3 48 -#define R8A77990_CLK_CP 49 -#define R8A77990_CLK_CPEX 50 +#define R8A77990_CLK_CP 48 +#define R8A77990_CLK_CPEX 49 #endif /* __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h index 9219a50a241..10ed9d140f4 100644 --- a/include/dt-bindings/clock/rv1108-cru.h +++ b/include/dt-bindings/clock/rv1108-cru.h @@ -14,7 +14,6 @@ #define ARMCLK 3 /* sclk gates (special clocks) */ -#define SCLK_MAC 64 #define SCLK_SPI0 65 #define SCLK_NANDC 67 #define SCLK_SDMMC 68 @@ -35,20 +34,77 @@ #define SCLK_SDMMC_SAMPLE 84 #define SCLK_SDIO_SAMPLE 85 #define SCLK_EMMC_SAMPLE 86 -#define SCLK_MAC_RX 87 -#define SCLK_MAC_TX 88 -#define SCLK_MACREF 89 -#define SCLK_MACREF_OUT 90 -#define SCLK_SARADC 91 +#define SCLK_VENC_CORE 87 +#define SCLK_HEVC_CORE 88 +#define SCLK_HEVC_CABAC 89 +#define SCLK_PWM0_PMU 90 +#define SCLK_I2C0_PMU 91 +#define SCLK_WIFI 92 +#define SCLK_CIFOUT 93 +#define SCLK_MIPI_CSI_OUT 94 +#define SCLK_CIF0 95 +#define SCLK_CIF1 96 +#define SCLK_CIF2 97 +#define SCLK_CIF3 98 +#define SCLK_DSP 99 +#define SCLK_DSP_IOP 100 +#define SCLK_DSP_EPP 101 +#define SCLK_DSP_EDP 102 +#define SCLK_DSP_EDAP 103 +#define SCLK_CVBS_HOST 104 +#define SCLK_HDMI_SFR 105 +#define SCLK_HDMI_CEC 106 +#define SCLK_CRYPTO 107 +#define SCLK_SPI 108 +#define SCLK_SARADC 109 +#define SCLK_TSADC 110 +#define SCLK_MAC_PRE 111 +#define SCLK_MAC 112 +#define SCLK_MAC_RX 113 +#define SCLK_MAC_REF 114 +#define SCLK_MAC_REFOUT 115 +#define SCLK_DSP_PFM 116 +#define SCLK_RGA 117 +#define SCLK_I2C1 118 +#define SCLK_I2C2 119 +#define SCLK_I2C3 120 +#define SCLK_PWM 121 +#define SCLK_ISP 122 +#define SCLK_USBPHY 123 +#define SCLK_I2S0_SRC 124 +#define SCLK_I2S1_SRC 125 +#define SCLK_I2S2_SRC 126 +#define SCLK_UART0_SRC 127 +#define SCLK_UART1_SRC 128 +#define SCLK_UART2_SRC 129 +#define SCLK_MAC_TX 130 +#define SCLK_MACREF 131 +#define SCLK_MACREF_OUT 132 +#define DCLK_VOP_SRC 185 +#define DCLK_HDMIPHY 186 +#define DCLK_VOP 187 /* aclk gates */ #define ACLK_DMAC 192 #define ACLK_PRE 193 #define ACLK_CORE 194 #define ACLK_ENMCORE 195 -#define ACLK_GMAC 196 - +#define ACLK_RKVENC 196 +#define ACLK_RKVDEC 197 +#define ACLK_VPU 198 +#define ACLK_CIF0 199 +#define ACLK_VIO0 200 +#define ACLK_VIO1 201 +#define ACLK_VOP 202 +#define ACLK_IEP 203 +#define ACLK_RGA 204 +#define ACLK_ISP 205 +#define ACLK_CIF1 206 +#define ACLK_CIF2 207 +#define ACLK_CIF3 208 +#define ACLK_PERI 209 +#define ACLK_GMAC 210 /* pclk gates */ #define PCLK_GPIO1 256 @@ -67,12 +123,24 @@ #define PCLK_PWM 269 #define PCLK_TIMER 270 #define PCLK_PERI 271 -#define PCLK_GMAC 272 -#define PCLK_SARADC 273 +#define PCLK_GPIO0_PMU 272 +#define PCLK_I2C0_PMU 273 +#define PCLK_PWM0_PMU 274 +#define PCLK_ISP 275 +#define PCLK_VIO 276 +#define PCLK_MIPI_DSI 277 +#define PCLK_HDMI_CTRL 278 +#define PCLK_SARADC 279 +#define PCLK_DSP_CFG 280 +#define PCLK_BUS 281 +#define PCLK_EFUSE0 282 +#define PCLK_EFUSE1 283 +#define PCLK_WDT 284 +#define PCLK_GMAC 285 /* hclk gates */ #define HCLK_I2S0_8CH 320 -#define HCLK_I2S1_8CH 321 +#define HCLK_I2S1_2CH 321 #define HCLK_I2S2_2CH 322 #define HCLK_NANDC 323 #define HCLK_SDMMC 324 @@ -80,20 +148,37 @@ #define HCLK_EMMC 326 #define HCLK_PERI 327 #define HCLK_SFC 328 +#define HCLK_RKVENC 329 +#define HCLK_RKVDEC 330 +#define HCLK_CIF0 331 +#define HCLK_VIO 332 +#define HCLK_VOP 333 +#define HCLK_IEP 334 +#define HCLK_RGA 335 +#define HCLK_ISP 336 +#define HCLK_CRYPTO_MST 337 +#define HCLK_CRYPTO_SLV 338 +#define HCLK_HOST0 339 +#define HCLK_OTG 340 +#define HCLK_CIF1 341 +#define HCLK_CIF2 342 +#define HCLK_CIF3 343 +#define HCLK_BUS 344 +#define HCLK_VPU 345 -#define CLK_NR_CLKS (HCLK_SFC + 1) +#define CLK_NR_CLKS (HCLK_VPU + 1) /* reset id */ -#define SRST_CORE_PO_AD 0 +#define SRST_CORE_PO_AD 0 #define SRST_CORE_AD 1 #define SRST_L2_AD 2 -#define SRST_CPU_NIU_AD 3 +#define SRST_CPU_NIU_AD 3 #define SRST_CORE_PO 4 #define SRST_CORE 5 -#define SRST_L2 6 +#define SRST_L2 6 #define SRST_CORE_DBG 8 #define PRST_DBG 9 -#define RST_DAP 10 +#define RST_DAP 10 #define PRST_DBG_NIU 11 #define ARST_STRC_SYS_AD 15 @@ -160,9 +245,9 @@ #define HRST_SYSBUS 75 #define PRST_USBGRF 76 -#define ARST_PERIPH_NIU 80 -#define HRST_PERIPH_NIU 81 -#define PRST_PERIPH_NIU 82 +#define ARST_PERIPH_NIU 80 +#define HRST_PERIPH_NIU 81 +#define PRST_PERIPH_NIU 82 #define HRST_PERIPH 83 #define HRST_SDMMC 84 #define HRST_SDIO 85 @@ -180,7 +265,7 @@ #define HRST_HOST0_AUX 96 #define HRST_HOST0_ARB 97 #define SRST_HOST0_EHCIPHY 98 -#define SRST_HOST0_UTMI 99 +#define SRST_HOST0_UTMI 99 #define SRST_USBPOR 100 #define SRST_UTMI0 101 #define SRST_UTMI1 102 @@ -227,21 +312,21 @@ #define HRST_VPU_NIU 141 #define ARST_VPU 142 #define HRST_VPU 143 -#define ARST_RKVDEC_NIU 144 -#define HRST_RKVDEC_NIU 145 +#define ARST_RKVDEC_NIU 144 +#define HRST_RKVDEC_NIU 145 #define ARST_RKVDEC 146 #define HRST_RKVDEC 147 #define SRST_RKVDEC_CABAC 148 #define SRST_RKVDEC_CORE 149 -#define ARST_RKVENC_NIU 150 -#define HRST_RKVENC_NIU 151 +#define ARST_RKVENC_NIU 150 +#define HRST_RKVENC_NIU 151 #define ARST_RKVENC 152 #define HRST_RKVENC 153 #define SRST_RKVENC_CORE 154 #define SRST_DSP_CORE 156 #define SRST_DSP_SYS 157 -#define SRST_DSP_GLOBAL 158 +#define SRST_DSP_GLOBAL 158 #define SRST_DSP_OECM 159 #define PRST_DSP_IOP_NIU 160 #define ARST_DSP_EPP_NIU 161 @@ -259,7 +344,7 @@ #define SRST_PMU_I2C0 173 #define PRST_PMU_I2C0 174 #define PRST_PMU_GPIO0 175 -#define PRST_PMU_INTMEM 176 +#define PRST_PMU_INTMEM 176 #define PRST_PMU_PWM0 177 #define SRST_PMU_PWM0 178 #define PRST_PMU_GRF 179 diff --git a/include/dt-bindings/gpio/meson-axg-gpio.h b/include/dt-bindings/gpio/meson-axg-gpio.h new file mode 100644 index 00000000000..25bb1fffa97 --- /dev/null +++ b/include/dt-bindings/gpio/meson-axg-gpio.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen <xingyu.chen@amlogic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DT_BINDINGS_MESON_AXG_GPIO_H +#define _DT_BINDINGS_MESON_AXG_GPIO_H + +/* First GPIO chip */ +#define GPIOAO_0 0 +#define GPIOAO_1 1 +#define GPIOAO_2 2 +#define GPIOAO_3 3 +#define GPIOAO_4 4 +#define GPIOAO_5 5 +#define GPIOAO_6 6 +#define GPIOAO_7 7 +#define GPIOAO_8 8 +#define GPIOAO_9 9 +#define GPIOAO_10 10 +#define GPIOAO_11 11 +#define GPIOAO_12 12 +#define GPIOAO_13 13 +#define GPIO_TEST_N 14 + +/* Second GPIO chip */ +#define GPIOZ_0 0 +#define GPIOZ_1 1 +#define GPIOZ_2 2 +#define GPIOZ_3 3 +#define GPIOZ_4 4 +#define GPIOZ_5 5 +#define GPIOZ_6 6 +#define GPIOZ_7 7 +#define GPIOZ_8 8 +#define GPIOZ_9 9 +#define GPIOZ_10 10 +#define BOOT_0 11 +#define BOOT_1 12 +#define BOOT_2 13 +#define BOOT_3 14 +#define BOOT_4 15 +#define BOOT_5 16 +#define BOOT_6 17 +#define BOOT_7 18 +#define BOOT_8 19 +#define BOOT_9 20 +#define BOOT_10 21 +#define BOOT_11 22 +#define BOOT_12 23 +#define BOOT_13 24 +#define BOOT_14 25 +#define GPIOA_0 26 +#define GPIOA_1 27 +#define GPIOA_2 28 +#define GPIOA_3 29 +#define GPIOA_4 30 +#define GPIOA_5 31 +#define GPIOA_6 32 +#define GPIOA_7 33 +#define GPIOA_8 34 +#define GPIOA_9 35 +#define GPIOA_10 36 +#define GPIOA_11 37 +#define GPIOA_12 38 +#define GPIOA_13 39 +#define GPIOA_14 40 +#define GPIOA_15 41 +#define GPIOA_16 42 +#define GPIOA_17 43 +#define GPIOA_18 44 +#define GPIOA_19 45 +#define GPIOA_20 46 +#define GPIOX_0 47 +#define GPIOX_1 48 +#define GPIOX_2 49 +#define GPIOX_3 50 +#define GPIOX_4 51 +#define GPIOX_5 52 +#define GPIOX_6 53 +#define GPIOX_7 54 +#define GPIOX_8 55 +#define GPIOX_9 56 +#define GPIOX_10 57 +#define GPIOX_11 58 +#define GPIOX_12 59 +#define GPIOX_13 60 +#define GPIOX_14 61 +#define GPIOX_15 62 +#define GPIOX_16 63 +#define GPIOX_17 64 +#define GPIOX_18 65 +#define GPIOX_19 66 +#define GPIOX_20 67 +#define GPIOX_21 68 +#define GPIOX_22 69 +#define GPIOY_0 70 +#define GPIOY_1 71 +#define GPIOY_2 72 +#define GPIOY_3 73 +#define GPIOY_4 74 +#define GPIOY_5 75 +#define GPIOY_6 76 +#define GPIOY_7 77 +#define GPIOY_8 78 +#define GPIOY_9 79 +#define GPIOY_10 80 +#define GPIOY_11 81 +#define GPIOY_12 82 +#define GPIOY_13 83 +#define GPIOY_14 84 +#define GPIOY_15 85 + +#endif /* _DT_BINDINGS_MESON_AXG_GPIO_H */ diff --git a/include/dt-bindings/power/mt7623-power.h b/include/dt-bindings/power/mt7623-power.h new file mode 100644 index 00000000000..0e73bb43a5b --- /dev/null +++ b/include/dt-bindings/power/mt7623-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_MT7623_POWER_H +#define _DT_BINDINGS_MT7623_POWER_H + +#define MT7623_POWER_DOMAIN_CONN 0 +#define MT7623_POWER_DOMAIN_DISP 1 +#define MT7623_POWER_DOMAIN_MFG 2 +#define MT7623_POWER_DOMAIN_VDEC 3 +#define MT7623_POWER_DOMAIN_ISP 4 +#define MT7623_POWER_DOMAIN_BDP 5 +#define MT7623_POWER_DOMAIN_ETH 6 +#define MT7623_POWER_DOMAIN_HIF 7 +#define MT7623_POWER_DOMAIN_IFR_MSC 8 + +#endif /* _DT_BINDINGS_MT7623_POWER_H */ diff --git a/include/dt-bindings/power/mt7629-power.h b/include/dt-bindings/power/mt7629-power.h new file mode 100644 index 00000000000..c7e61305038 --- /dev/null +++ b/include/dt-bindings/power/mt7629-power.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_MT7629_POWER_H +#define _DT_BINDINGS_MT7629_POWER_H + +#define MT7629_POWER_DOMAIN_ETHSYS 0 +#define MT7629_POWER_DOMAIN_HIF0 1 +#define MT7629_POWER_DOMAIN_HIF1 2 + +#endif /* _DT_BINDINGS_MT7629_POWER_H */ diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h index 1409c73a57c..944d85beec1 100644 --- a/include/dt-bindings/power/r8a77990-sysc.h +++ b/include/dt-bindings/power/r8a77990-sysc.h @@ -11,8 +11,14 @@ * (e.g. SYSCISR, Interrupt Status Register) */ -#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_CPU1 6 +#define R8A77990_PD_CR7 13 +#define R8A77990_PD_A3VC 14 +#define R8A77990_PD_3DG_A 17 +#define R8A77990_PD_3DG_B 18 #define R8A77990_PD_CA53_SCU 21 +#define R8A77990_PD_A2VC1 26 /* Always-on power area */ #define R8A77990_PD_ALWAYS_ON 32 diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h new file mode 100644 index 00000000000..05c36367875 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) + * + * Copyright (c) 2018 Baylibre SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H +#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H + +#define AXG_ARB_TODDR_A 0 +#define AXG_ARB_TODDR_B 1 +#define AXG_ARB_TODDR_C 2 +#define AXG_ARB_FRDDR_A 3 +#define AXG_ARB_FRDDR_B 4 +#define AXG_ARB_FRDDR_C 5 + +#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */ diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h new file mode 100644 index 00000000000..ad6f55dabd6 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-axg-reset.h @@ -0,0 +1,124 @@ +/* + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * Copyright (c) 2017 Amlogic, inc. + * Author: Yixun Lan <yixun.lan@amlogic.com> + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD) + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H + +/* RESET0 */ +#define RESET_HIU 0 +#define RESET_PCIE_A 1 +#define RESET_PCIE_B 2 +#define RESET_DDR_TOP 3 +/* 4 */ +#define RESET_VIU 5 +#define RESET_PCIE_PHY 6 +#define RESET_PCIE_APB 7 +/* 8 */ +/* 9 */ +#define RESET_VENC 10 +#define RESET_ASSIST 11 +/* 12 */ +#define RESET_VCBUS 13 +/* 14 */ +/* 15 */ +#define RESET_GIC 16 +#define RESET_CAPB3_DECODE 17 +/* 18-21 */ +#define RESET_SYS_CPU_CAPB3 22 +#define RESET_CBUS_CAPB3 23 +#define RESET_AHB_CNTL 24 +#define RESET_AHB_DATA 25 +#define RESET_VCBUS_CLK81 26 +#define RESET_MMC 27 +/* 28-31 */ +/* RESET1 */ +/* 32 */ +/* 33 */ +#define RESET_USB_OTG 34 +#define RESET_DDR 35 +#define RESET_AO_RESET 36 +/* 37 */ +#define RESET_AHB_SRAM 38 +/* 39 */ +/* 40 */ +#define RESET_DMA 41 +#define RESET_ISA 42 +#define RESET_ETHERNET 43 +/* 44 */ +#define RESET_SD_EMMC_B 45 +#define RESET_SD_EMMC_C 46 +#define RESET_ROM_BOOT 47 +#define RESET_SYS_CPU_0 48 +#define RESET_SYS_CPU_1 49 +#define RESET_SYS_CPU_2 50 +#define RESET_SYS_CPU_3 51 +#define RESET_SYS_CPU_CORE_0 52 +#define RESET_SYS_CPU_CORE_1 53 +#define RESET_SYS_CPU_CORE_2 54 +#define RESET_SYS_CPU_CORE_3 55 +#define RESET_SYS_PLL_DIV 56 +#define RESET_SYS_CPU_AXI 57 +#define RESET_SYS_CPU_L2 58 +#define RESET_SYS_CPU_P 59 +#define RESET_SYS_CPU_MBIST 60 +/* 61-63 */ +/* RESET2 */ +/* 64 */ +/* 65 */ +#define RESET_AUDIO 66 +/* 67 */ +#define RESET_MIPI_HOST 68 +#define RESET_AUDIO_LOCKER 69 +#define RESET_GE2D 70 +/* 71-76 */ +#define RESET_AO_CPU_RESET 77 +/* 78-95 */ +/* RESET3 */ +#define RESET_RING_OSCILLATOR 96 +/* 97-127 */ +/* RESET4 */ +/* 128 */ +/* 129 */ +#define RESET_MIPI_PHY 130 +/* 131-140 */ +#define RESET_VENCL 141 +#define RESET_I2C_MASTER_2 142 +#define RESET_I2C_MASTER_1 143 +/* 144-159 */ +/* RESET5 */ +/* 160-191 */ +/* RESET6 */ +#define RESET_PERIPHS_GENERAL 192 +#define RESET_PERIPHS_SPICC 193 +/* 194 */ +/* 195 */ +#define RESET_PERIPHS_I2C_MASTER_0 196 +/* 197-200 */ +#define RESET_PERIPHS_UART_0 201 +#define RESET_PERIPHS_UART_1 202 +/* 203-204 */ +#define RESET_PERIPHS_SPI_0 205 +#define RESET_PERIPHS_I2C_MASTER_3 206 +/* 207-223 */ +/* RESET7 */ +#define RESET_USB_DDR_0 224 +#define RESET_USB_DDR_1 225 +#define RESET_USB_DDR_2 226 +#define RESET_USB_DDR_3 227 +/* 228 */ +#define RESET_DEVICE_MMC_ARB 229 +/* 230 */ +#define RESET_VID_LOCK 231 +#define RESET_A9_DMC_PIPEL 232 +#define RESET_DMC_VPU_PIPEL 233 +/* 234-255 */ + +#endif diff --git a/include/dt-bindings/reset/axg-aoclkc.h b/include/dt-bindings/reset/axg-aoclkc.h new file mode 100644 index 00000000000..d342c0b6b2a --- /dev/null +++ b/include/dt-bindings/reset/axg-aoclkc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* + * Copyright (c) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * Copyright (c) 2018 Amlogic, inc. + * Author: Qiufang Dai <qiufang.dai@amlogic.com> + */ + +#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK +#define DT_BINDINGS_RESET_AMLOGIC_MESON_AXG_AOCLK + +#define RESET_AO_REMOTE 0 +#define RESET_AO_I2C_MASTER 1 +#define RESET_AO_I2C_SLAVE 2 +#define RESET_AO_UART1 3 +#define RESET_AO_UART2 4 +#define RESET_AO_IR_BLASTER 5 + +#endif diff --git a/include/efi.h b/include/efi.h index b1deb609b46..b5e2c64f38b 100644 --- a/include/efi.h +++ b/include/efi.h @@ -96,7 +96,7 @@ typedef struct { typedef unsigned long efi_status_t; typedef u64 efi_physical_addr_t; typedef u64 efi_virtual_addr_t; -typedef void *efi_handle_t; +typedef struct efi_object *efi_handle_t; #define EFI_GUID(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ {{ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, \ diff --git a/include/efi_api.h b/include/efi_api.h index e850b951eb0..aef77b6319d 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -85,10 +85,10 @@ struct efi_boot_services { efi_status_t (EFIAPI *check_event)(struct efi_event *event); #define EFI_NATIVE_INTERFACE 0x00000000 efi_status_t (EFIAPI *install_protocol_interface)( - void **handle, const efi_guid_t *protocol, + efi_handle_t *handle, const efi_guid_t *protocol, int protocol_interface_type, void *protocol_interface); efi_status_t (EFIAPI *reinstall_protocol_interface)( - void *handle, const efi_guid_t *protocol, + efi_handle_t handle, const efi_guid_t *protocol, void *old_interface, void *new_interface); efi_status_t (EFIAPI *uninstall_protocol_interface)( efi_handle_t handle, const efi_guid_t *protocol, @@ -164,9 +164,9 @@ struct efi_boot_services { efi_status_t (EFIAPI *locate_protocol)(const efi_guid_t *protocol, void *registration, void **protocol_interface); efi_status_t (EFIAPI *install_multiple_protocol_interfaces)( - void **handle, ...); + efi_handle_t *handle, ...); efi_status_t (EFIAPI *uninstall_multiple_protocol_interfaces)( - void *handle, ...); + efi_handle_t handle, ...); efi_status_t (EFIAPI *calculate_crc32)(const void *data, efi_uintn_t data_size, u32 *crc32); @@ -241,8 +241,8 @@ struct efi_runtime_services { efi_status_t (EFIAPI *query_capsule_caps)( struct efi_capsule_header **capsule_header_array, efi_uintn_t capsule_count, - u64 maximum_capsule_size, - u32 reset_type); + u64 *maximum_capsule_size, + u32 *reset_type); efi_status_t (EFIAPI *query_variable_info)( u32 attributes, u64 *maximum_variable_storage_size, @@ -965,7 +965,7 @@ struct efi_file_info { struct efi_time last_access_time; struct efi_time modification_time; u64 attribute; - s16 file_name[0]; + u16 file_name[0]; }; struct efi_file_system_info { diff --git a/include/efi_loader.h b/include/efi_loader.h index 1417c3588fb..53f08161ab6 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -167,28 +167,41 @@ struct efi_handler { struct list_head open_infos; }; -/* - * UEFI has a poor man's OO model where one "object" can be polymorphic and have - * multiple different protocols (classes) attached to it. +/** + * struct efi_object - dereferenced EFI handle + * + * @link: pointers to put the handle into a linked list + * @protocols: linked list with the protocol interfaces installed on this + * handle + * + * UEFI offers a flexible and expandable object model. The objects in the UEFI + * API are devices, drivers, and loaded images. struct efi_object is our storage + * structure for these objects. * - * This struct is the parent struct for all of our actual implementation objects - * that can include it to make themselves an EFI object + * When including this structure into a larger structure always put it first so + * that when deleting a handle the whole encompassing structure can be freed. + * + * A pointer to this structure is referred to as a handle. Typedef efi_handle_t + * has been created for such pointers. */ struct efi_object { /* Every UEFI object is part of a global object list */ struct list_head link; /* The list of protocols */ struct list_head protocols; - /* The object spawner can either use this for data or as identifier */ - void *handle; }; /** * struct efi_loaded_image_obj - handle of a loaded image + * + * @header: EFI object header + * @reloc_base: base address for the relocated image + * @reloc_size: size of the relocated image + * @exit_jmp: long jump buffer for returning form started image + * @entry: entry address of the relocated image */ struct efi_loaded_image_obj { - /* Generic EFI object parent class data */ - struct efi_object parent; + struct efi_object header; void *reloc_base; aligned_u64 reloc_size; efi_status_t exit_status; @@ -290,11 +303,11 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map); /* Call this to set the current device name */ void efi_set_bootdev(const char *dev, const char *devnr, const char *path); /* Add a new object to the object list. */ -void efi_add_handle(struct efi_object *obj); +void efi_add_handle(efi_handle_t obj); /* Create handle */ efi_status_t efi_create_handle(efi_handle_t *handle); /* Delete handle */ -void efi_delete_handle(struct efi_object *obj); +void efi_delete_handle(efi_handle_t obj); /* Call this to validate a handle and find the EFI object for it */ struct efi_object *efi_search_obj(const efi_handle_t handle); /* Find a protocol on a handle */ @@ -331,7 +344,16 @@ struct efi_simple_file_system_protocol *efi_simple_file_system( /* open file from device-path: */ struct efi_file_handle *efi_file_from_path(struct efi_device_path *fp); - +/** + * efi_size_in_pages() - convert size in bytes to size in pages + * + * This macro returns the number of EFI memory pages required to hold 'size' + * bytes. + * + * @size: size in bytes + * Return: size in pages + */ +#define efi_size_in_pages(size) ((size + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT) /* Generic EFI memory allocator, call this to get memory */ void *efi_alloc(uint64_t len, int memory_type); /* More specific EFI memory allocator, called by EFI payloads */ @@ -419,6 +441,10 @@ const struct efi_device_path *efi_dp_last_node( efi_status_t efi_dp_split_file_path(struct efi_device_path *full_path, struct efi_device_path **device_path, struct efi_device_path **file_path); +efi_status_t efi_dp_from_name(const char *dev, const char *devnr, + const char *path, + struct efi_device_path **device, + struct efi_device_path **file); #define EFI_DP_TYPE(_dp, _type, _subtype) \ (((_dp)->type == DEVICE_PATH_TYPE_##_type) && \ @@ -492,6 +518,29 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor, u32 attributes, efi_uintn_t data_size, void *data); +/* + * See section 3.1.3 in the v2.7 UEFI spec for more details on + * the layout of EFI_LOAD_OPTION. In short it is: + * + * typedef struct _EFI_LOAD_OPTION { + * UINT32 Attributes; + * UINT16 FilePathListLength; + * // CHAR16 Description[]; <-- variable length, NULL terminated + * // EFI_DEVICE_PATH_PROTOCOL FilePathList[]; + * <-- FilePathListLength bytes + * // UINT8 OptionalData[]; + * } EFI_LOAD_OPTION; + */ +struct efi_load_option { + u32 attributes; + u16 file_path_length; + u16 *label; + struct efi_device_path *file_path; + u8 *optional_data; +}; + +void efi_deserialize_load_option(struct efi_load_option *lo, u8 *data); +unsigned long efi_serialize_load_option(struct efi_load_option *lo, u8 **data); void *efi_bootmgr_load(struct efi_device_path **device_path, struct efi_device_path **file_path); diff --git a/include/efi_selftest.h b/include/efi_selftest.h index 56beac305ec..49d3d6d0b47 100644 --- a/include/efi_selftest.h +++ b/include/efi_selftest.h @@ -129,7 +129,6 @@ u16 efi_st_get_key(void); * @setup: set up the unit test * @teardown: tear down the unit test * @execute: execute the unit test - * @setup_ok: setup was successful (set at runtime) * @on_request: test is only executed on request */ struct efi_unit_test { @@ -139,7 +138,6 @@ struct efi_unit_test { const struct efi_system_table *systable); int (*execute)(void); int (*teardown)(void); - int setup_ok; bool on_request; }; diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 3c9c87f21b1..5891009a5a2 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -34,9 +34,9 @@ "partitions_android=" \ "uuid_disk=${uuid_gpt_disk};" \ "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ - "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ + "name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};" \ + "name=reserved,start=2432K,size=256K,uuid=${uuid_gpt_reserved};" \ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ - "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \ diff --git a/include/fdtdec.h b/include/fdtdec.h index c26df50543a..b15da00fb28 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -956,6 +956,7 @@ int fdtdec_setup(void); * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined * and the board implements it. */ +void *board_fdt_blob_setup(void); /* * Decode the size of memory diff --git a/include/handoff.h b/include/handoff.h new file mode 100644 index 00000000000..aacb0f5ebf2 --- /dev/null +++ b/include/handoff.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Passing basic information from SPL to U-Boot proper + * + * Copyright 2018 Google, Inc + */ + +#ifndef __HANDOFF_H +#define __HANDOFF_H + +#if CONFIG_IS_ENABLED(HANDOFF) + +#include <asm/handoff.h> + +/** + * struct spl_handoff - information passed from SPL to U-Boot proper + * + * @ram_size: Value to use for gd->ram_size + */ +struct spl_handoff { + struct arch_spl_handoff arch; + u64 ram_size; +#ifdef CONFIG_NR_DRAM_BANKS + struct { + u64 start; + u64 size; + } ram_bank[CONFIG_NR_DRAM_BANKS]; +#endif +}; + +void handoff_save_dram(struct spl_handoff *ho); +void handoff_load_dram_size(struct spl_handoff *ho); +void handoff_load_dram_banks(struct spl_handoff *ho); +#endif + +#endif diff --git a/include/i2c.h b/include/i2c.h index d33f827500b..ccffc195527 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -536,6 +536,27 @@ int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip); */ void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs); +/** + * i2c_emul_find() - Find an emulator for an i2c sandbox device + * + * This looks at the device's 'emul' phandle + * + * @dev: Device to find an emulator for + * @emulp: Returns the associated emulator, if found * + * @return 0 if OK, -ENOENT or -ENODEV if not found + */ +int i2c_emul_find(struct udevice *dev, struct udevice **emulp); + +/** + * i2c_emul_get_device() - Find the device being emulated + * + * Given an emulator this returns the associated device + * + * @emul: Emulator for the device + * @return device that @emul is emulating + */ +struct udevice *i2c_emul_get_device(struct udevice *emul); + #ifndef CONFIG_DM_I2C /* diff --git a/include/image.h b/include/image.h index 031c355b48d..83a2d412c9f 100644 --- a/include/image.h +++ b/include/image.h @@ -30,6 +30,7 @@ struct fdt_region; #define IMAGE_ENABLE_FIT 1 #define IMAGE_ENABLE_OF_LIBFDT 1 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ +#define CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT 1 #define CONFIG_FIT_ENABLE_SHA256_SUPPORT #define CONFIG_SHA1 #define CONFIG_SHA256 @@ -278,6 +279,7 @@ enum { IH_TYPE_PMMC, /* TI Power Management Micro-Controller Firmware */ IH_TYPE_STM32IMAGE, /* STMicroelectronics STM32 Image */ IH_TYPE_SOCFPGAIMAGE_V1, /* Altera SOCFPGA A10 Preloader */ + IH_TYPE_MTKIMAGE, /* MediaTek BootROM loadable Image */ IH_TYPE_COUNT, /* Number of image types */ }; @@ -1100,6 +1102,7 @@ struct image_sign_info { int node_offset; /* Offset of signature node */ const char *name; /* Algorithm name */ struct checksum_algo *checksum; /* Checksum algorithm information */ + struct padding_algo *padding; /* Padding algorithm information */ struct crypto_algo *crypto; /* Crypto algorithm information */ const void *fdt_blob; /* FDT containing public keys */ int required_keynode; /* Node offset of key to use: -1=any */ @@ -1185,6 +1188,13 @@ struct crypto_algo { uint8_t *sig, uint sig_len); }; +struct padding_algo { + const char *name; + int (*verify)(struct image_sign_info *info, + uint8_t *pad, int pad_len, + const uint8_t *hash, int hash_len); +}; + /** * image_get_checksum_algo() - Look up a checksum algorithm * @@ -1202,6 +1212,14 @@ struct checksum_algo *image_get_checksum_algo(const char *full_name); struct crypto_algo *image_get_crypto_algo(const char *full_name); /** + * image_get_padding_algo() - Look up a padding algorithm + * + * @param name Name of padding algorithm + * @return pointer to algorithm information, or NULL if not found + */ +struct padding_algo *image_get_padding_algo(const char *name); + +/** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' * * @fit: FIT to check diff --git a/include/linux/psci.h b/include/linux/psci.h index 8d13bd27021..9433df836b6 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -88,10 +88,8 @@ #define PSCI_RET_DISABLED -8 #ifdef CONFIG_ARM_PSCI_FW -typedef unsigned long (psci_fn)(unsigned long, unsigned long, - unsigned long, unsigned long); - -extern psci_fn *invoke_psci_fn; +unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3); #else unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3) diff --git a/include/log.h b/include/log.h index a872fc6ef5f..0f2bc19477f 100644 --- a/include/log.h +++ b/include/log.h @@ -47,6 +47,8 @@ enum log_category_t { LOGC_DT, /* Device-tree */ LOGC_EFI, /* EFI implementation */ LOGC_ALLOC, /* Memory allocation */ + LOGC_SANDBOX, /* Related to the sandbox board */ + LOGC_BLOBLIST, /* Bloblist */ LOGC_COUNT, /* Number of log categories */ LOGC_END, /* Sentinel value for a list of log categories */ @@ -107,14 +109,19 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #define log_io(_fmt...) #endif +#if CONFIG_IS_ENABLED(LOG) + /* Emit a log record if the level is less that the maximum */ #define log(_cat, _level, _fmt, _args...) ({ \ int _l = _level; \ - if (_l <= _LOG_MAX_LEVEL) \ + if (CONFIG_IS_ENABLED(LOG) && _l <= _LOG_MAX_LEVEL) \ _log((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \ __func__, \ pr_fmt(_fmt), ##_args); \ }) +#else +#define log(_cat, _level, _fmt, _args...) +#endif #ifdef DEBUG #define _DEBUG 1 @@ -174,7 +181,16 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line, ({ if (!(x) && _DEBUG) \ __assert_fail(#x, __FILE__, __LINE__, __func__); }) -#ifdef CONFIG_LOG_ERROR_RETURN +#if CONFIG_IS_ENABLED(LOG) && defined(CONFIG_LOG_ERROR_RETURN) +/* + * Log an error return value, possibly with a message. Usage: + * + * return log_ret(fred_call()); + * + * or: + * + * return log_msg_ret("fred failed", fred_call()); + */ #define log_ret(_ret) ({ \ int __ret = (_ret); \ if (__ret < 0) \ @@ -189,8 +205,9 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line, __ret; \ }) #else +/* Non-logging versions of the above which just return the error code */ #define log_ret(_ret) (_ret) -#define log_msg_ret(_msg, _ret) (_ret) +#define log_msg_ret(_msg, _ret) ((void)(_msg), _ret) #endif /** diff --git a/include/malloc.h b/include/malloc.h index 8175c75920c..b714fedf457 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -880,6 +880,7 @@ static inline void free(void *ptr) {} void *calloc(size_t nmemb, size_t size); void *memalign_simple(size_t alignment, size_t bytes); void *realloc_simple(void *ptr, size_t size); +void malloc_simple_info(void); #else # ifdef USE_DL_PREFIX diff --git a/include/misc.h b/include/misc.h index 50515852b25..12d1325ee26 100644 --- a/include/misc.h +++ b/include/misc.h @@ -13,7 +13,7 @@ * @buf: pointer to data buffer * @size: data size in bytes to read the device * - * Return: 0 if OK, -ve on error + * Return: number of bytes read if OK (may be 0 if EOF), -ve on error */ int misc_read(struct udevice *dev, int offset, void *buf, int size); @@ -24,7 +24,7 @@ int misc_read(struct udevice *dev, int offset, void *buf, int size); * @buf: pointer to data buffer * @size: data size in bytes to write the device * - * Return: 0 if OK, -ve on error + * Return: number of bytes written if OK (may be < @size), -ve on error */ int misc_write(struct udevice *dev, int offset, void *buf, int size); @@ -90,7 +90,7 @@ struct misc_ops { * @buf: pointer to data buffer * @size: data size in bytes to read the device * - * Return: 0 if OK, -ve on error + * Return: number of bytes read if OK (may be 0 if EOF), -ve on error */ int (*read)(struct udevice *dev, int offset, void *buf, int size); @@ -101,7 +101,7 @@ struct misc_ops { * @buf: pointer to data buffer * @size: data size in bytes to write the device * - * Return: 0 if OK, -ve on error + * Return: number of bytes written if OK (may be < @size), -ve on error */ int (*write)(struct udevice *dev, int offset, const void *buf, int size); diff --git a/include/os.h b/include/os.h index 28eb6252849..6f33b08cf0b 100644 --- a/include/os.h +++ b/include/os.h @@ -350,4 +350,18 @@ int os_mprotect_allow(void *start, size_t len); */ int os_write_file(const char *name, const void *buf, int size); +/** + * os_read_file() - Read a file from the host filesystem + * + * This can be useful when reading test data into sandbox for use by test + * routines. The data is allocated using os_malloc() and should be freed by + * the caller. + * + * @name: File path to read from + * @bufp: Returns buffer containing data read + * @sizep: Returns size of data + * @return 0 if OK, -ve on error + */ +int os_read_file(const char *name, void **bufp, int *sizep); + #endif diff --git a/include/serial.h b/include/serial.h index ec25db6e601..9133d07fd51 100644 --- a/include/serial.h +++ b/include/serial.h @@ -224,7 +224,6 @@ struct serial_dev_priv { void atmel_serial_initialize(void); void mcf_serial_initialize(void); void mpc85xx_serial_initialize(void); -void mpc8xx_serial_initialize(void); void mxc_serial_initialize(void); void ns16550_serial_initialize(void); void pl01x_serial_initialize(void); diff --git a/include/sound.h b/include/sound.h index 3269f2371c3..77bfe6a93b2 100644 --- a/include/sound.h +++ b/include/sound.h @@ -31,11 +31,13 @@ struct sound_codec_info { /* * Generates square wave sound data for 1 second * + * @param sample_rate Sample rate in Hz * @param data data buffer pointer * @param size size of the buffer * @param freq frequency of the wave */ -void sound_create_square_wave(unsigned short *data, int size, uint32_t freq); +void sound_create_square_wave(uint sample_rate, unsigned short *data, int size, + uint freq); /* * Initialises audio sub system diff --git a/include/spi_flash.h b/include/spi_flash.h index 0ec98fb55df..e427e960d54 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -112,6 +112,19 @@ struct dm_spi_flash_ops { int (*write)(struct udevice *dev, u32 offset, size_t len, const void *buf); int (*erase)(struct udevice *dev, u32 offset, size_t len); + /** + * get_sw_write_prot() - Check state of software write-protect feature + * + * SPI flash chips can lock a region of the flash defined by a + * 'protected area'. This function checks if this protected area is + * defined. + * + * @dev: SPI flash device + * @return 0 if no region is write-protected, 1 if a region is + * write-protected, -ENOSYS if the driver does not implement this, + * other -ve value on error + */ + int (*get_sw_write_prot)(struct udevice *dev); }; /* Access the serial operations for a device */ @@ -153,6 +166,20 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, */ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len); +/** + * spl_flash_get_sw_write_prot() - Check state of software write-protect feature + * + * SPI flash chips can lock a region of the flash defined by a + * 'protected area'. This function checks if this protected area is + * defined. + * + * @dev: SPI flash device + * @return 0 if no region is write-protected, 1 if a region is + * write-protected, -ENOSYS if the driver does not implement this, + * other -ve value on error + */ +int spl_flash_get_sw_write_prot(struct udevice *dev); + int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode, struct udevice **devp); diff --git a/include/spl.h b/include/spl.h index 9a439f468b9..ee92832f0ae 100644 --- a/include/spl.h +++ b/include/spl.h @@ -11,6 +11,7 @@ /* Platform-specific defines */ #include <linux/compiler.h> #include <asm/spl.h> +#include <handoff.h> /* Value in r0 indicates we booted from U-Boot */ #define UBOOT_NOT_LOADED_FROM_SPL 0x13578642 @@ -21,6 +22,46 @@ #define MMCSD_MODE_FS 2 #define MMCSD_MODE_EMMCBOOT 3 +/* + * u_boot_first_phase() - check if this is the first U-Boot phase + * + * U-Boot has up to three phases: TPL, SPL and U-Boot proper. Depending on the + * build flags we can determine whether the current build is for the first + * phase of U-Boot or not. If there is no SPL, then this is U-Boot proper. If + * there is SPL but no TPL, the the first phase is SPL. If there is TPL, then + * it is the first phase. + * + * @returns true if this is the first phase of U-Boot + * + */ +static inline bool u_boot_first_phase(void) +{ + if (IS_ENABLED(CONFIG_TPL)) { + if (IS_ENABLED(CONFIG_TPL_BUILD)) + return true; + } else if (IS_ENABLED(CONFIG_SPL)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return true; + } else { + return true; + } + + return false; +} + +/* A string name for SPL or TPL */ +#ifdef CONFIG_SPL_BUILD +# ifdef CONFIG_TPL_BUILD +# define SPL_TPL_NAME "tpl" +# else +# define SPL_TPL_NAME "spl" +# endif +# define SPL_TPL_PROMPT SPL_TPL_NAME ": " +#else +# define SPL_TPL_NAME "" +# define SPL_TPL_PROMPT "" +#endif + struct spl_image_info { const char *name; u8 os; diff --git a/include/test/suites.h b/include/test/suites.h index abb3a4b8169..77d863b4a6a 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -23,6 +23,7 @@ struct unit_test; int cmd_ut_category(const char *name, struct unit_test *tests, int n_ents, int argc, char * const argv[]); +int do_ut_bloblist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]); int do_ut_compression(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]); int do_ut_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); diff --git a/include/tpm-common.h b/include/tpm-common.h index 5f8bc6bc528..3d88b44db7a 100644 --- a/include/tpm-common.h +++ b/include/tpm-common.h @@ -26,6 +26,8 @@ enum tpm_duration { /* Max buffer size supported by our tpm */ #define TPM_DEV_BUFSIZE 1260 +#define TPM_PCR_MINIMUM_DIGEST_SIZE 20 + /** * enum tpm_version - The version of the TPM stack to be used * @TPM_V1: Use TPM v1.x stack @@ -174,12 +176,40 @@ struct tpm_ops { int do_##cmd(cmd_tbl_t *cmdtp, int flag, \ int argc, char * const argv[]) \ { \ + struct udevice *dev; \ + int rc; \ + \ + rc = get_tpm(&dev); \ + if (rc) \ + return rc; \ if (argc != 1) \ return CMD_RET_USAGE; \ - return report_return_code(cmd()); \ + return report_return_code(cmd(dev)); \ } /** + * tpm_open() - Request access to locality 0 for the caller + * + * After all commands have been completed the caller is supposed to + * call tpm_close(). + * + * @dev - TPM device + * Returns 0 on success, -ve on failure. + */ +int tpm_open(struct udevice *dev); + +/** + * tpm_close() - Close the current session + * + * Releasing the locked locality. Returns 0 on success, -ve 1 on + * failure (in case lock removal did not succeed). + * + * @dev - TPM device + * Returns 0 on success, -ve on failure. + */ +int tpm_close(struct udevice *dev); + +/** * tpm_get_desc() - Get a text description of the TPM * * @dev: Device to check @@ -202,6 +232,7 @@ int tpm_get_desc(struct udevice *dev, char *buf, int size); * Note that the outgoing data is inspected to determine command type * (ordinal) and a timeout is used for that command type. * + * @dev - TPM device * @sendbuf - buffer of the data to send * @send_size size of the data to send * @recvbuf - memory to save the response to @@ -216,9 +247,10 @@ int tpm_xfer(struct udevice *dev, const u8 *sendbuf, size_t send_size, /** * Initialize TPM device. It must be called before any TPM commands. * + * @dev - TPM device * @return 0 on success, non-0 on error. */ -int tpm_init(void); +int tpm_init(struct udevice *dev); /** * Retrieve the array containing all the v1 (resp. v2) commands. diff --git a/include/tpm-v1.h b/include/tpm-v1.h index be2eca946fb..45b7a4831d4 100644 --- a/include/tpm-v1.h +++ b/include/tpm-v1.h @@ -282,64 +282,72 @@ struct __packed tpm_nv_data_public { /** * Issue a TPM_Startup command. * + * @param dev TPM device * @param mode TPM startup mode * @return return code of the operation */ -u32 tpm_startup(enum tpm_startup_type mode); +u32 tpm_startup(struct udevice *dev, enum tpm_startup_type mode); /** * Issue a TPM_SelfTestFull command. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_self_test_full(void); +u32 tpm_self_test_full(struct udevice *dev); /** * Issue a TPM_ContinueSelfTest command. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_continue_self_test(void); +u32 tpm_continue_self_test(struct udevice *dev); /** * Issue a TPM_NV_DefineSpace command. The implementation is limited * to specify TPM_NV_ATTRIBUTES and size of the area. The area index * could be one of the special value listed in enum tpm_nv_index. * + * @param dev TPM device * @param index index of the area * @param perm TPM_NV_ATTRIBUTES of the area * @param size size of the area * @return return code of the operation */ -u32 tpm_nv_define_space(u32 index, u32 perm, u32 size); +u32 tpm_nv_define_space(struct udevice *dev, u32 index, u32 perm, u32 size); /** * Issue a TPM_NV_ReadValue command. This implementation is limited * to read the area from offset 0. The area index could be one of * the special value listed in enum tpm_nv_index. * + * @param dev TPM device * @param index index of the area * @param data output buffer of the area contents * @param count size of output buffer * @return return code of the operation */ -u32 tpm_nv_read_value(u32 index, void *data, u32 count); +u32 tpm_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count); /** * Issue a TPM_NV_WriteValue command. This implementation is limited * to write the area from offset 0. The area index could be one of * the special value listed in enum tpm_nv_index. * + * @param dev TPM device * @param index index of the area * @param data input buffer to be wrote to the area * @param length length of data bytes of input buffer * @return return code of the operation */ -u32 tpm_nv_write_value(u32 index, const void *data, u32 length); +u32 tpm_nv_write_value(struct udevice *dev, u32 index, const void *data, + u32 length); /** * Issue a TPM_Extend command. * + * @param dev TPM device * @param index index of the PCR * @param in_digest 160-bit value representing the event to be * recorded @@ -347,69 +355,78 @@ u32 tpm_nv_write_value(u32 index, const void *data, u32 length); * command * @return return code of the operation */ -u32 tpm_extend(u32 index, const void *in_digest, void *out_digest); +u32 tpm_extend(struct udevice *dev, u32 index, const void *in_digest, + void *out_digest); /** * Issue a TPM_PCRRead command. * + * @param dev TPM device * @param index index of the PCR * @param data output buffer for contents of the named PCR * @param count size of output buffer * @return return code of the operation */ -u32 tpm_pcr_read(u32 index, void *data, size_t count); +u32 tpm_pcr_read(struct udevice *dev, u32 index, void *data, size_t count); /** * Issue a TSC_PhysicalPresence command. TPM physical presence flag * is bit-wise OR'ed of flags listed in enum tpm_physical_presence. * + * @param dev TPM device * @param presence TPM physical presence flag * @return return code of the operation */ -u32 tpm_tsc_physical_presence(u16 presence); +u32 tpm_tsc_physical_presence(struct udevice *dev, u16 presence); /** * Issue a TPM_ReadPubek command. * + * @param dev TPM device * @param data output buffer for the public endorsement key * @param count size of output buffer * @return return code of the operation */ -u32 tpm_read_pubek(void *data, size_t count); +u32 tpm_read_pubek(struct udevice *dev, void *data, size_t count); /** * Issue a TPM_ForceClear command. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_force_clear(void); +u32 tpm_force_clear(struct udevice *dev); /** * Issue a TPM_PhysicalEnable command. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_physical_enable(void); +u32 tpm_physical_enable(struct udevice *dev); /** * Issue a TPM_PhysicalDisable command. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_physical_disable(void); +u32 tpm_physical_disable(struct udevice *dev); /** * Issue a TPM_PhysicalSetDeactivated command. * + * @param dev TPM device * @param state boolean state of the deactivated flag * @return return code of the operation */ -u32 tpm_physical_set_deactivated(u8 state); +u32 tpm_physical_set_deactivated(struct udevice *dev, u8 state); /** * Issue a TPM_GetCapability command. This implementation is limited * to query sub_cap index that is 4-byte wide. * + * @param dev TPM device * @param cap_area partition of capabilities * @param sub_cap further definition of capability, which is * limited to be 4-byte wide @@ -417,15 +434,17 @@ u32 tpm_physical_set_deactivated(u8 state); * @param count size of output buffer * @return return code of the operation */ -u32 tpm_get_capability(u32 cap_area, u32 sub_cap, void *cap, size_t count); +u32 tpm_get_capability(struct udevice *dev, u32 cap_area, u32 sub_cap, + void *cap, size_t count); /** * Issue a TPM_FlushSpecific command for a AUTH resource. * + * @param dev TPM device * @param auth_handle handle of the auth session * @return return code of the operation */ -u32 tpm_terminate_auth_session(u32 auth_handle); +u32 tpm_terminate_auth_session(struct udevice *dev, u32 auth_handle); /** * Issue a TPM_OIAP command to setup an object independent authorization @@ -434,22 +453,25 @@ u32 tpm_terminate_auth_session(u32 auth_handle); * If there was already an OIAP session active it is terminated and a new * session is set up. * + * @param dev TPM device * @param auth_handle pointer to the (new) auth handle or NULL. * @return return code of the operation */ -u32 tpm_oiap(u32 *auth_handle); +u32 tpm_oiap(struct udevice *dev, u32 *auth_handle); /** * Ends an active OIAP session. * + * @param dev TPM device * @return return code of the operation */ -u32 tpm_end_oiap(void); +u32 tpm_end_oiap(struct udevice *dev); /** * Issue a TPM_LoadKey2 (Auth1) command using an OIAP session for authenticating * the usage of the parent key. * + * @param dev TPM device * @param parent_handle handle of the parent key. * @param key pointer to the key structure (TPM_KEY or TPM_KEY12). * @param key_length size of the key structure @@ -457,13 +479,15 @@ u32 tpm_end_oiap(void); * @param key_handle pointer to the key handle * @return return code of the operation */ -u32 tpm_load_key2_oiap(u32 parent_handle, const void *key, size_t key_length, - const void *parent_key_usage_auth, u32 *key_handle); +u32 tpm_load_key2_oiap(struct udevice *dev, u32 parent_handle, const void *key, + size_t key_length, const void *parent_key_usage_auth, + u32 *key_handle); /** * Issue a TPM_GetPubKey (Auth1) command using an OIAP session for * authenticating the usage of the key. * + * @param dev TPM device * @param key_handle handle of the key * @param usage_auth usage auth for the key * @param pubkey pointer to the pub key buffer; may be NULL if the pubkey @@ -473,45 +497,51 @@ u32 tpm_load_key2_oiap(u32 parent_handle, const void *key, size_t key_length, * of the stored TPM_PUBKEY structure (iff pubkey != NULL). * @return return code of the operation */ -u32 tpm_get_pub_key_oiap(u32 key_handle, const void *usage_auth, void *pubkey, +u32 tpm_get_pub_key_oiap(struct udevice *dev, u32 key_handle, + const void *usage_auth, void *pubkey, size_t *pubkey_len); /** * Get the TPM permanent flags value * + * @param dev TPM device * @param pflags Place to put permanent flags * @return return code of the operation */ -u32 tpm_get_permanent_flags(struct tpm_permanent_flags *pflags); +u32 tpm_get_permanent_flags(struct udevice *dev, + struct tpm_permanent_flags *pflags); /** * Get the TPM permissions * + * @param dev TPM device * @param perm Returns permissions value * @return return code of the operation */ -u32 tpm_get_permissions(u32 index, u32 *perm); +u32 tpm_get_permissions(struct udevice *dev, u32 index, u32 *perm); /** * Flush a resource with a given handle and type from the TPM * + * @param dev TPM device * @param key_handle handle of the resource * @param resource_type type of the resource * @return return code of the operation */ -u32 tpm_flush_specific(u32 key_handle, u32 resource_type); +u32 tpm_flush_specific(struct udevice *dev, u32 key_handle, u32 resource_type); #ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1 /** * Search for a key by usage AuthData and the hash of the parent's pub key. * + * @param dev TPM device * @param auth Usage auth of the key to search for * @param pubkey_digest SHA1 hash of the pub key structure of the key * @param[out] handle The handle of the key (Non-null iff found) * @return 0 if key was found in TPM; != 0 if not. */ -u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], - u32 *handle); +u32 tpm_find_key_sha1(struct udevice *dev, const u8 auth[20], + const u8 pubkey_digest[20], u32 *handle); #endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */ /** @@ -519,38 +549,43 @@ u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], * that the TPM may legally return fewer bytes than requested by retrying * until @p count bytes have been received. * + * @param dev TPM device * @param data output buffer for the random bytes * @param count size of output buffer * @return return code of the operation */ -u32 tpm_get_random(void *data, u32 count); +u32 tpm_get_random(struct udevice *dev, void *data, u32 count); /** * tpm_finalise_physical_presence() - Finalise physical presence * + * @param dev TPM device * @return return code of the operation (0 = success) */ -u32 tpm_finalise_physical_presence(void); +u32 tpm_finalise_physical_presence(struct udevice *dev); /** * tpm_nv_set_locked() - lock the non-volatile space * + * @param dev TPM device * @return return code of the operation (0 = success) */ -u32 tpm_nv_set_locked(void); +u32 tpm_nv_set_locked(struct udevice *dev); /** * tpm_set_global_lock() - set the global lock * + * @param dev TPM device * @return return code of the operation (0 = success) */ -u32 tpm_set_global_lock(void); +u32 tpm_set_global_lock(struct udevice *dev); /** * tpm_resume() - start up the TPM from resume (after suspend) * + * @param dev TPM device * @return return code of the operation (0 = success) */ -u32 tpm_resume(void); +u32 tpm_resume(struct udevice *dev); #endif /* __TPM_V1_H */ diff --git a/include/tpm-v2.h b/include/tpm-v2.h index c77b416182e..2f2e66de195 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -131,45 +131,51 @@ enum tpm2_algorithms { /** * Issue a TPM2_Startup command. * + * @dev TPM device * @mode TPM startup mode * * @return code of the operation */ -u32 tpm2_startup(enum tpm2_startup_types mode); +u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode); /** * Issue a TPM2_SelfTest command. * + * @dev TPM device * @full_test Asking to perform all tests or only the untested ones * * @return code of the operation */ -u32 tpm2_self_test(enum tpm2_yes_no full_test); +u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no full_test); /** * Issue a TPM2_Clear command. * + * @dev TPM device * @handle Handle * @pw Password * @pw_sz Length of the password * * @return code of the operation */ -u32 tpm2_clear(u32 handle, const char *pw, const ssize_t pw_sz); +u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw, + const ssize_t pw_sz); /** * Issue a TPM2_PCR_Extend command. * + * @dev TPM device * @index Index of the PCR * @digest Value representing the event to be recorded * * @return code of the operation */ -u32 tpm2_pcr_extend(u32 index, const uint8_t *digest); +u32 tpm2_pcr_extend(struct udevice *dev, u32 index, const uint8_t *digest); /** * Issue a TPM2_PCR_Read command. * + * @dev TPM device * @idx Index of the PCR * @idx_min_sz Minimum size in bytes of the pcrSelect array * @data Output buffer for contents of the named PCR @@ -177,13 +183,14 @@ u32 tpm2_pcr_extend(u32 index, const uint8_t *digest); * * @return code of the operation */ -u32 tpm2_pcr_read(u32 idx, unsigned int idx_min_sz, void *data, - unsigned int *updates); +u32 tpm2_pcr_read(struct udevice *dev, u32 idx, unsigned int idx_min_sz, + void *data, unsigned int *updates); /** * Issue a TPM2_GetCapability command. This implementation is limited * to query property index that is 4-byte wide. * + * @dev TPM device * @capability Partition of capabilities * @property Further definition of capability, limited to be 4 bytes wide * @buf Output buffer for capability information @@ -191,22 +198,24 @@ u32 tpm2_pcr_read(u32 idx, unsigned int idx_min_sz, void *data, * * @return code of the operation */ -u32 tpm2_get_capability(u32 capability, u32 property, void *buf, - size_t prop_count); +u32 tpm2_get_capability(struct udevice *dev, u32 capability, u32 property, + void *buf, size_t prop_count); /** * Issue a TPM2_DictionaryAttackLockReset command. * + * @dev TPM device * @pw Password * @pw_sz Length of the password * * @return code of the operation */ -u32 tpm2_dam_reset(const char *pw, const ssize_t pw_sz); +u32 tpm2_dam_reset(struct udevice *dev, const char *pw, const ssize_t pw_sz); /** * Issue a TPM2_DictionaryAttackParameters command. * + * @dev TPM device * @pw Password * @pw_sz Length of the password * @max_tries Count of authorizations before lockout @@ -215,13 +224,15 @@ u32 tpm2_dam_reset(const char *pw, const ssize_t pw_sz); * * @return code of the operation */ -u32 tpm2_dam_parameters(const char *pw, const ssize_t pw_sz, - unsigned int max_tries, unsigned int recovery_time, +u32 tpm2_dam_parameters(struct udevice *dev, const char *pw, + const ssize_t pw_sz, unsigned int max_tries, + unsigned int recovery_time, unsigned int lockout_recovery); /** * Issue a TPM2_HierarchyChangeAuth command. * + * @dev TPM device * @handle Handle * @newpw New password * @newpw_sz Length of the new password @@ -230,12 +241,14 @@ u32 tpm2_dam_parameters(const char *pw, const ssize_t pw_sz, * * @return code of the operation */ -int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz, - const char *oldpw, const ssize_t oldpw_sz); +int tpm2_change_auth(struct udevice *dev, u32 handle, const char *newpw, + const ssize_t newpw_sz, const char *oldpw, + const ssize_t oldpw_sz); /** * Issue a TPM_PCR_SetAuthPolicy command. * + * @dev TPM device * @pw Platform password * @pw_sz Length of the password * @index Index of the PCR @@ -243,12 +256,13 @@ int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz, * * @return code of the operation */ -u32 tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index, - const char *key); +u32 tpm2_pcr_setauthpolicy(struct udevice *dev, const char *pw, + const ssize_t pw_sz, u32 index, const char *key); /** * Issue a TPM_PCR_SetAuthValue command. * + * @dev TPM device * @pw Platform password * @pw_sz Length of the password * @index Index of the PCR @@ -257,7 +271,8 @@ u32 tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index, * * @return code of the operation */ -u32 tpm2_pcr_setauthvalue(const char *pw, const ssize_t pw_sz, u32 index, - const char *key, const ssize_t key_sz); +u32 tpm2_pcr_setauthvalue(struct udevice *dev, const char *pw, + const ssize_t pw_sz, u32 index, const char *key, + const ssize_t key_sz); #endif /* __TPM_V2_H */ diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h index 68bcb14c74d..2d3024d8b71 100644 --- a/include/u-boot/rsa.h +++ b/include/u-boot/rsa.h @@ -97,6 +97,16 @@ static inline int rsa_add_verify_data(struct image_sign_info *info, int rsa_verify(struct image_sign_info *info, const struct image_region region[], int region_count, uint8_t *sig, uint sig_len); + +int padding_pkcs_15_verify(struct image_sign_info *info, + uint8_t *msg, int msg_len, + const uint8_t *hash, int hash_len); + +#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT +int padding_pss_verify(struct image_sign_info *info, + uint8_t *msg, int msg_len, + const uint8_t *hash, int hash_len); +#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */ #else static inline int rsa_verify(struct image_sign_info *info, const struct image_region region[], int region_count, @@ -104,8 +114,26 @@ static inline int rsa_verify(struct image_sign_info *info, { return -ENXIO; } + +static inline int padding_pkcs_15_verify(struct image_sign_info *info, + uint8_t *msg, int msg_len, + const uint8_t *hash, int hash_len) +{ + return -ENXIO; +} + +#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT +static inline int padding_pss_verify(struct image_sign_info *info, + uint8_t *msg, int msg_len, + const uint8_t *hash, int hash_len) +{ + return -ENXIO; +} +#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */ #endif +#define RSA_DEFAULT_PADDING_NAME "pkcs-1.5" + #define RSA2048_BYTES (2048 / 8) #define RSA4096_BYTES (4096 / 8) diff --git a/include/usb.h b/include/usb.h index b6b48a8c605..420a30e49fa 100644 --- a/include/usb.h +++ b/include/usb.h @@ -140,7 +140,7 @@ struct usb_device { int act_len; /* transferred bytes */ int maxchild; /* Number of ports if hub */ int portnr; /* Port number, 1=first */ -#ifndef CONFIG_DM_USB +#if !CONFIG_IS_ENABLED(DM_USB) /* parent hub, or NULL if this is the root hub */ struct usb_device *parent; struct usb_device *children[USB_MAXCHILDREN]; @@ -148,7 +148,7 @@ struct usb_device { #endif /* slot_id - for xHCI enabled devices */ unsigned int slot_id; -#ifdef CONFIG_DM_USB +#if CONFIG_IS_ENABLED(DM_USB) struct udevice *dev; /* Pointer to associated device */ struct udevice *controller_dev; /* Pointer to associated controller */ #endif @@ -173,7 +173,7 @@ enum usb_init_type { int usb_lowlevel_init(int index, enum usb_init_type init, void **controller); int usb_lowlevel_stop(int index); -#if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_DM_USB) +#if defined(CONFIG_USB_MUSB_HOST) || CONFIG_IS_ENABLED(DM_USB) int usb_reset_root_port(struct usb_device *dev); #else #define usb_reset_root_port(dev) @@ -187,7 +187,7 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval); #if defined CONFIG_USB_EHCI_HCD || defined CONFIG_USB_MUSB_HOST \ - || defined(CONFIG_DM_USB) + || CONFIG_IS_ENABLED(DM_USB) struct int_queue *create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, int elementsize, void *buffer, int interval); int destroy_int_queue(struct usb_device *dev, struct int_queue *queue); @@ -588,7 +588,7 @@ struct usb_hub_device { struct usb_tt tt; /* Transaction Translator */ }; -#ifdef CONFIG_DM_USB +#if CONFIG_IS_ENABLED(DM_USB) /** * struct usb_platdata - Platform data about a USB controller * @@ -912,7 +912,7 @@ int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp); */ void usb_stor_reset(void); -#else /* !CONFIG_DM_USB */ +#else /* !CONFIG_IS_ENABLED(DM_USB) */ struct usb_device *usb_get_dev_index(int index); diff --git a/include/video.h b/include/video.h index 75200f0e452..1d57b48b173 100644 --- a/include/video.h +++ b/include/video.h @@ -61,7 +61,9 @@ enum video_log2_bpp { * @font_size: Font size in pixels (0 to use a default value) * @fb: Frame buffer * @fb_size: Frame buffer size - * @line_length: Length of each frame buffer line, in bytes + * @line_length: Length of each frame buffer line, in bytes. This can be + * set by the driver, but if not, the uclass will set it after + * probing * @colour_fg: Foreground colour (pixel value) * @colour_bg: Background colour (pixel value) * @flush_dcache: true to enable flushing of the data cache after @@ -191,9 +193,10 @@ void video_set_flush_dcache(struct udevice *dev, bool flush); /** * Set default colors and attributes * - * @priv device information + * @dev: video device + * @invert true to invert colours */ -void video_set_default_colors(struct video_priv *priv); +void video_set_default_colors(struct udevice *dev, bool invert); #endif /* CONFIG_DM_VIDEO */ |