diff options
Diffstat (limited to 'include')
33 files changed, 300 insertions, 962 deletions
diff --git a/include/alist.h b/include/alist.h index 68d268f01af..b00d9ea97d6 100644 --- a/include/alist.h +++ b/include/alist.h @@ -72,6 +72,21 @@ static inline bool alist_has(struct alist *lst, uint index) } /** + * alist_calc_index() - Calculate the index of an item in the list + * + * The returned element number will be -1 if the list is empty or the pointer + * pointers to before the list starts. + * + * If the pointer points to after the last item, the calculated element-number + * will be returned, even though it is greater than lst->count + * + * @lst: alist to check + * @ptr: pointer to check + * Return: element number of the pointer + */ +int alist_calc_index(const struct alist *lst, const void *ptr); + +/** * alist_err() - Check if the alist is still valid * * @lst: List to check @@ -116,7 +131,12 @@ static inline const void *alist_getd(struct alist *lst, uint index) return lst->data + index * lst->obj_size; } -/** get an entry as a constant */ +/** + * alist_get() - get an entry as a constant + * + * Use as (to obtain element 2 of the list): + * const struct my_struct *ptr = alist_get(lst, 2, struct my_struct) + */ #define alist_get(_lst, _index, _struct) \ ((const _struct *)alist_get_ptr(_lst, _index)) @@ -151,8 +171,9 @@ void *alist_ensure_ptr(struct alist *lst, uint index); * alist_add_placeholder() - Add a new item to the end of the list * * @lst: alist to add to - * Return: Pointer to the newly added position. Note that this is not inited so - * the caller must copy the requested struct to the returned pointer + * Return: Pointer to the newly added position, or NULL if out of memory. Note + * that this is not inited so the caller must copy the requested struct to the + * returned pointer */ void *alist_add_placeholder(struct alist *lst); @@ -184,6 +205,112 @@ bool alist_expand_by(struct alist *lst, uint inc_by); #define alist_add(_lst, _obj) \ ((typeof(_obj) *)alist_add_ptr(_lst, &(_obj))) +/** get next entry as a constant */ +#define alist_next(_lst, _objp) \ + ((const typeof(_objp))alist_next_ptrd(_lst, _objp)) + +/** get next entry, which can be written to */ +#define alist_nextw(_lst, _objp) \ + ((typeof(_objp))alist_next_ptrd(_lst, _objp)) + +/** + * alist_next_ptrd() - Get a pointer to the next list element + * + * This returns NULL if the requested element is beyond lst->count + * + * @lst: List to check + * @ptr: Pointer to current element (must be valid) + * Return: Pointer to next element, or NULL if @ptr is the last + */ +const void *alist_next_ptrd(const struct alist *lst, const void *ptr); + +/** + * alist_chk_ptr() - Check whether a pointer is within a list + * + * Checks if the pointer points to an existing element of the list. The pointer + * must point to the start of an element, either in the list, or just outside of + * it. This function is only useful for handling for() loops + * + * Return: true if @ptr is within the list (0..count-1), else false + */ +bool alist_chk_ptr(const struct alist *lst, const void *ptr); + +/** + * alist_start() - Get the start of the list (first element) + * + * Note that this will always return ->data even if it is not NULL + * + * Usage: + * const struct my_struct *obj; # 'const' is optional + * + * alist_start(&lst, struct my_struct) + */ +#define alist_start(_lst, _struct) \ + ((_struct *)(_lst)->data) + +/** + * alist_end() - Get the end of the list (just after last element) + * + * Usage: + * const struct my_struct *obj; # 'const' is optional + * + * alist_end(&lst, struct my_struct) + */ +#define alist_end(_lst, _struct) \ + ((_struct *)(_lst)->data + (_lst)->count) + +/** + * alist_for_each() - Iterate over an alist (with constant pointer) + * + * Use as: + * const struct my_struct *obj; # 'const' is optional + * + * alist_for_each(obj, &lst) { + * obj->... + * } + */ +#define alist_for_each(_pos, _lst) \ + for (_pos = alist_start(_lst, typeof(*(_pos))); \ + _pos < alist_end(_lst, typeof(*(_pos))); \ + _pos++) + +/** + * alist_for_each_filter() - version which sets up a 'from' pointer too + * + * This is used for filtering out information in the list. It works by iterating + * through the list, copying elements down over the top of elements to be + * deleted. + * + * In this example, 'from' iterates through the list from start to end,, 'to' + * also begins at the start, but only increments if the element at 'from' should + * be kept. This provides an O(n) filtering operation. Note that + * alist_update_end() must be called after the loop, to update the count. + * + * alist_for_each_filter(from, to, &lst) { + * if (from->val != 2) + * *to++ = *from; + * } + * alist_update_end(&lst, to); + */ +#define alist_for_each_filter(_pos, _from, _lst) \ + for (_pos = _from = alist_start(_lst, typeof(*(_pos))); \ + _pos < alist_end(_lst, typeof(*(_pos))); \ + _pos++) + +/** + * alist_update_end() - Set the element count based on a given pointer + * + * Set the given element as the final one + */ +void alist_update_end(struct alist *lst, const void *end); + +/** + * alist_empty() - Empty an alist + * + * This removes all entries from the list, without changing the allocated size + */ +void alist_empty(struct alist *lst); + /** * alist_init() - Set up a new object list * @@ -197,6 +324,12 @@ bool alist_expand_by(struct alist *lst, uint inc_by); */ bool alist_init(struct alist *lst, uint obj_size, uint alloc_size); +/** + * alist_init_struct() - Typed version of alist_init() + * + * Use as: + * alist_init(&lst, struct my_struct); + */ #define alist_init_struct(_lst, _struct) \ alist_init(_lst, sizeof(_struct), 0) diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index bf593d96a84..26277b93976 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -545,8 +545,10 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #if CONFIG_IS_ENABLED(BLOBLIST) #define gd_bloblist() gd->bloblist +#define gd_set_bloblist(_val) gd->bloblist = (_val) #else #define gd_bloblist() NULL +#define gd_set_bloblist(_val) #endif #if CONFIG_IS_ENABLED(BOOTSTAGE) diff --git a/include/configs/genbook-cm5-rk3588.h b/include/configs/genbook-cm5-rk3588.h new file mode 100644 index 00000000000..194f97469df --- /dev/null +++ b/include/configs/genbook-cm5-rk3588.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __GENBOOK_CM5_RK3588_H +#define __GENBOOK_CM5_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +/* + * As a laptop, there is no sdmmc, and we want to + * set usb the highest boot priority for third-part + * os installation. + */ +#define BOOT_TARGETS "usb mmc0" + +#include <configs/rk3588_common.h> + +#endif /* __GENBOOK_CM5_RK3588_H */ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 53fb8c9b1ba..260a5043d53 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -27,6 +27,12 @@ #define BOOTENV #endif +#ifdef CONFIG_SYS_MMC_ENV_DEV +#define IMX93_EVK_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_DEV +#else +#define IMX93_EVK_MMC_ENV_DEV 0 +#endif + /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ @@ -42,7 +48,7 @@ "boot_fit=no\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "bootm_size=0x10000000\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcdev=" __stringify(IMX93_EVK_MMC_ENV_DEV)"\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ "mmcautodetect=yes\0" \ diff --git a/include/configs/khadas-vim3_android.h b/include/configs/khadas-vim3_android.h index fc89efb4c36..0e2953fe71b 100644 --- a/include/configs/khadas-vim3_android.h +++ b/include/configs/khadas-vim3_android.h @@ -24,7 +24,7 @@ "name=boot_a,size=64M,bootable,uuid=${uuid_gpt_boot_a};" \ "name=boot_b,size=64M,bootable,uuid=${uuid_gpt_boot_b};" \ "name=super,size=3072M,uuid=${uuid_gpt_super};" \ - "name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \ + "name=userdata,size=11218M,uuid=${uuid_gpt_userdata};" \ "name=rootfs,size=-,uuid=" ROOT_UUID #else #define PARTS_DEFAULT \ @@ -37,7 +37,7 @@ "name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \ "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ "name=super,size=1792M,uuid=${uuid_gpt_super};" \ - "name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \ + "name=userdata,size=12722M,uuid=${uuid_gpt_userdata};" \ "name=rootfs,size=-,uuid=" ROOT_UUID #endif diff --git a/include/configs/khadas-vim3l_android.h b/include/configs/khadas-vim3l_android.h index 5b2aed1cf62..f39a3782d66 100644 --- a/include/configs/khadas-vim3l_android.h +++ b/include/configs/khadas-vim3l_android.h @@ -24,7 +24,7 @@ "name=boot_a,size=64M,bootable,uuid=${uuid_gpt_boot_a};" \ "name=boot_b,size=64M,bootable,uuid=${uuid_gpt_boot_b};" \ "name=super,size=3072M,uuid=${uuid_gpt_super};" \ - "name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \ + "name=userdata,size=11218M,uuid=${uuid_gpt_userdata};" \ "name=rootfs,size=-,uuid=" ROOT_UUID #else #define PARTS_DEFAULT \ @@ -37,7 +37,7 @@ "name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \ "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ "name=super,size=1792M,uuid=${uuid_gpt_super};" \ - "name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \ + "name=userdata,size=12722M,uuid=${uuid_gpt_userdata};" \ "name=rootfs,size=-,uuid=" ROOT_UUID #endif diff --git a/include/configs/qnap_ts433.h b/include/configs/qnap_ts433.h new file mode 100644 index 00000000000..aee4546bf07 --- /dev/null +++ b/include/configs/qnap_ts433.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __QNAP_TS433_H +#define __QNAP_TS433_H + +#define ROCKCHIP_DEVICE_SETTINGS + +#include <configs/rk3568_common.h> + +#endif diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 9b8ab3cdf20..d5550a46575 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -13,7 +13,9 @@ #ifndef CONFIG_XPL_BUILD +#ifndef BOOT_TARGETS #define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp spi" +#endif #ifdef CONFIG_ARM64 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0" diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index a8bd8e259cc..5cc0166f19e 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -11,37 +11,6 @@ /* Link Definitions */ -/* AP non-secure UART base address */ -#define UART0_BASE 0x2A400000 - -/* PL011 Serial Configuration */ -#define CFG_PL011_CLOCK 7372800 - -/* Miscellaneous configurable options */ - -/* Physical Memory Map */ -#define PHYS_SDRAM_1 0x80000000 -/* Top 48MB reserved for secure world use */ -#define DRAM_SEC_SIZE 0x03000000 -#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 - -#define PHYS_SDRAM_2 0x8080000000 -#define PHYS_SDRAM_2_SIZE 0x180000000 - -#define CFG_EXTRA_ENV_SETTINGS \ - "bootm_size=0x20000000\0" \ - "load_addr=0xa0000000\0" \ - "kernel_addr_r=0x80080000\0" \ - "initrd_addr_r=0x88000000\0" \ - "fdt_addr_r=0x83000000\0" -/* - * If vbmeta partition is present, boot Android with verification using AVB. - * Else if system partition is present (no vbmeta partition), boot Android - * without verification (for development purposes). - * Else boot FIT image. - */ - #define CFG_SYS_FLASH_BASE 0x0C000000 #endif /* __TOTAL_COMPUTE_H */ diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 456eef7f2f3..c2793040923 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -436,6 +436,17 @@ int uclass_first_device_drvdata(enum uclass_id id, ulong driver_data, struct udevice **devp); /** + * uclass_try_first_device()- See if there is a device for a uclass + * + * If the uclass exists, this returns the first device on that uclass, without + * probing it. If the uclass does not exist, it gives up + * + * @id: Uclass ID to check + * Return: Pointer to device, if found, else NULL + */ +struct udevice *uclass_try_first_device(enum uclass_id id); + +/** * uclass_probe_all() - Probe all devices based on an uclass ID * * This function probes all devices associated with a uclass by diff --git a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h deleted file mode 100644 index 06f198ee762..00000000000 --- a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h +++ /dev/null @@ -1,168 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ -/* - * Copyright (c) 2019 Amlogic, Inc. All rights reserved. - * Author: Jian Hu <jian.hu@amlogic.com> - * - * Copyright (c) 2023, SberDevices. All Rights Reserved. - * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> - */ - -#ifndef __A1_PERIPHERALS_CLKC_H -#define __A1_PERIPHERALS_CLKC_H - -#define CLKID_XTAL_IN 0 -#define CLKID_FIXPLL_IN 1 -#define CLKID_USB_PHY_IN 2 -#define CLKID_USB_CTRL_IN 3 -#define CLKID_HIFIPLL_IN 4 -#define CLKID_SYSPLL_IN 5 -#define CLKID_DDS_IN 6 -#define CLKID_SYS 7 -#define CLKID_CLKTREE 8 -#define CLKID_RESET_CTRL 9 -#define CLKID_ANALOG_CTRL 10 -#define CLKID_PWR_CTRL 11 -#define CLKID_PAD_CTRL 12 -#define CLKID_SYS_CTRL 13 -#define CLKID_TEMP_SENSOR 14 -#define CLKID_AM2AXI_DIV 15 -#define CLKID_SPICC_B 16 -#define CLKID_SPICC_A 17 -#define CLKID_MSR 18 -#define CLKID_AUDIO 19 -#define CLKID_JTAG_CTRL 20 -#define CLKID_SARADC_EN 21 -#define CLKID_PWM_EF 22 -#define CLKID_PWM_CD 23 -#define CLKID_PWM_AB 24 -#define CLKID_CEC 25 -#define CLKID_I2C_S 26 -#define CLKID_IR_CTRL 27 -#define CLKID_I2C_M_D 28 -#define CLKID_I2C_M_C 29 -#define CLKID_I2C_M_B 30 -#define CLKID_I2C_M_A 31 -#define CLKID_ACODEC 32 -#define CLKID_OTP 33 -#define CLKID_SD_EMMC_A 34 -#define CLKID_USB_PHY 35 -#define CLKID_USB_CTRL 36 -#define CLKID_SYS_DSPB 37 -#define CLKID_SYS_DSPA 38 -#define CLKID_DMA 39 -#define CLKID_IRQ_CTRL 40 -#define CLKID_NIC 41 -#define CLKID_GIC 42 -#define CLKID_UART_C 43 -#define CLKID_UART_B 44 -#define CLKID_UART_A 45 -#define CLKID_SYS_PSRAM 46 -#define CLKID_RSA 47 -#define CLKID_CORESIGHT 48 -#define CLKID_AM2AXI_VAD 49 -#define CLKID_AUDIO_VAD 50 -#define CLKID_AXI_DMC 51 -#define CLKID_AXI_PSRAM 52 -#define CLKID_RAMB 53 -#define CLKID_RAMA 54 -#define CLKID_AXI_SPIFC 55 -#define CLKID_AXI_NIC 56 -#define CLKID_AXI_DMA 57 -#define CLKID_CPU_CTRL 58 -#define CLKID_ROM 59 -#define CLKID_PROC_I2C 60 -#define CLKID_DSPA_SEL 61 -#define CLKID_DSPB_SEL 62 -#define CLKID_DSPA_EN 63 -#define CLKID_DSPA_EN_NIC 64 -#define CLKID_DSPB_EN 65 -#define CLKID_DSPB_EN_NIC 66 -#define CLKID_RTC 67 -#define CLKID_CECA_32K 68 -#define CLKID_CECB_32K 69 -#define CLKID_24M 70 -#define CLKID_12M 71 -#define CLKID_FCLK_DIV2_DIVN 72 -#define CLKID_GEN 73 -#define CLKID_SARADC_SEL 74 -#define CLKID_SARADC 75 -#define CLKID_PWM_A 76 -#define CLKID_PWM_B 77 -#define CLKID_PWM_C 78 -#define CLKID_PWM_D 79 -#define CLKID_PWM_E 80 -#define CLKID_PWM_F 81 -#define CLKID_SPICC 82 -#define CLKID_TS 83 -#define CLKID_SPIFC 84 -#define CLKID_USB_BUS 85 -#define CLKID_SD_EMMC 86 -#define CLKID_PSRAM 87 -#define CLKID_DMC 88 -#define CLKID_SYS_A_SEL 89 -#define CLKID_SYS_A_DIV 90 -#define CLKID_SYS_A 91 -#define CLKID_SYS_B_SEL 92 -#define CLKID_SYS_B_DIV 93 -#define CLKID_SYS_B 94 -#define CLKID_DSPA_A_SEL 95 -#define CLKID_DSPA_A_DIV 96 -#define CLKID_DSPA_A 97 -#define CLKID_DSPA_B_SEL 98 -#define CLKID_DSPA_B_DIV 99 -#define CLKID_DSPA_B 100 -#define CLKID_DSPB_A_SEL 101 -#define CLKID_DSPB_A_DIV 102 -#define CLKID_DSPB_A 103 -#define CLKID_DSPB_B_SEL 104 -#define CLKID_DSPB_B_DIV 105 -#define CLKID_DSPB_B 106 -#define CLKID_RTC_32K_IN 107 -#define CLKID_RTC_32K_DIV 108 -#define CLKID_RTC_32K_XTAL 109 -#define CLKID_RTC_32K_SEL 110 -#define CLKID_CECB_32K_IN 111 -#define CLKID_CECB_32K_DIV 112 -#define CLKID_CECB_32K_SEL_PRE 113 -#define CLKID_CECB_32K_SEL 114 -#define CLKID_CECA_32K_IN 115 -#define CLKID_CECA_32K_DIV 116 -#define CLKID_CECA_32K_SEL_PRE 117 -#define CLKID_CECA_32K_SEL 118 -#define CLKID_DIV2_PRE 119 -#define CLKID_24M_DIV2 120 -#define CLKID_GEN_SEL 121 -#define CLKID_GEN_DIV 122 -#define CLKID_SARADC_DIV 123 -#define CLKID_PWM_A_SEL 124 -#define CLKID_PWM_A_DIV 125 -#define CLKID_PWM_B_SEL 126 -#define CLKID_PWM_B_DIV 127 -#define CLKID_PWM_C_SEL 128 -#define CLKID_PWM_C_DIV 129 -#define CLKID_PWM_D_SEL 130 -#define CLKID_PWM_D_DIV 131 -#define CLKID_PWM_E_SEL 132 -#define CLKID_PWM_E_DIV 133 -#define CLKID_PWM_F_SEL 134 -#define CLKID_PWM_F_DIV 135 -#define CLKID_SPICC_SEL 136 -#define CLKID_SPICC_DIV 137 -#define CLKID_SPICC_SEL2 138 -#define CLKID_TS_DIV 139 -#define CLKID_SPIFC_SEL 140 -#define CLKID_SPIFC_DIV 141 -#define CLKID_SPIFC_SEL2 142 -#define CLKID_USB_BUS_SEL 143 -#define CLKID_USB_BUS_DIV 144 -#define CLKID_SD_EMMC_SEL 145 -#define CLKID_SD_EMMC_DIV 146 -#define CLKID_SD_EMMC_SEL2 147 -#define CLKID_PSRAM_SEL 148 -#define CLKID_PSRAM_DIV 149 -#define CLKID_PSRAM_SEL2 150 -#define CLKID_DMC_SEL 151 -#define CLKID_DMC_DIV 152 -#define CLKID_DMC_SEL2 153 - -#endif /* __A1_PERIPHERALS_CLKC_H */ diff --git a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h deleted file mode 100644 index 2b660c0f2c9..00000000000 --- a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ -/* - * Copyright (c) 2019 Amlogic, Inc. All rights reserved. - * Author: Jian Hu <jian.hu@amlogic.com> - * - * Copyright (c) 2023, SberDevices. All Rights Reserved. - * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> - */ - -#ifndef __A1_PLL_CLKC_H -#define __A1_PLL_CLKC_H - -#define CLKID_FIXED_PLL_DCO 0 -#define CLKID_FIXED_PLL 1 -#define CLKID_FCLK_DIV2_DIV 2 -#define CLKID_FCLK_DIV3_DIV 3 -#define CLKID_FCLK_DIV5_DIV 4 -#define CLKID_FCLK_DIV7_DIV 5 -#define CLKID_FCLK_DIV2 6 -#define CLKID_FCLK_DIV3 7 -#define CLKID_FCLK_DIV5 8 -#define CLKID_FCLK_DIV7 9 -#define CLKID_HIFI_PLL 10 - -#endif /* __A1_PLL_CLKC_H */ diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h deleted file mode 100644 index f561f5c5ef8..00000000000 --- a/include/dt-bindings/clock/axg-audio-clkc.h +++ /dev/null @@ -1,94 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ -/* - * Copyright (c) 2018 Baylibre SAS. - * Author: Jerome Brunet <jbrunet@baylibre.com> - */ - -#ifndef __AXG_AUDIO_CLKC_BINDINGS_H -#define __AXG_AUDIO_CLKC_BINDINGS_H - -#define AUD_CLKID_DDR_ARB 29 -#define AUD_CLKID_PDM 30 -#define AUD_CLKID_TDMIN_A 31 -#define AUD_CLKID_TDMIN_B 32 -#define AUD_CLKID_TDMIN_C 33 -#define AUD_CLKID_TDMIN_LB 34 -#define AUD_CLKID_TDMOUT_A 35 -#define AUD_CLKID_TDMOUT_B 36 -#define AUD_CLKID_TDMOUT_C 37 -#define AUD_CLKID_FRDDR_A 38 -#define AUD_CLKID_FRDDR_B 39 -#define AUD_CLKID_FRDDR_C 40 -#define AUD_CLKID_TODDR_A 41 -#define AUD_CLKID_TODDR_B 42 -#define AUD_CLKID_TODDR_C 43 -#define AUD_CLKID_LOOPBACK 44 -#define AUD_CLKID_SPDIFIN 45 -#define AUD_CLKID_SPDIFOUT 46 -#define AUD_CLKID_RESAMPLE 47 -#define AUD_CLKID_POWER_DETECT 48 -#define AUD_CLKID_MST_A_MCLK 49 -#define AUD_CLKID_MST_B_MCLK 50 -#define AUD_CLKID_MST_C_MCLK 51 -#define AUD_CLKID_MST_D_MCLK 52 -#define AUD_CLKID_MST_E_MCLK 53 -#define AUD_CLKID_MST_F_MCLK 54 -#define AUD_CLKID_SPDIFOUT_CLK 55 -#define AUD_CLKID_SPDIFIN_CLK 56 -#define AUD_CLKID_PDM_DCLK 57 -#define AUD_CLKID_PDM_SYSCLK 58 -#define AUD_CLKID_MST_A_SCLK 79 -#define AUD_CLKID_MST_B_SCLK 80 -#define AUD_CLKID_MST_C_SCLK 81 -#define AUD_CLKID_MST_D_SCLK 82 -#define AUD_CLKID_MST_E_SCLK 83 -#define AUD_CLKID_MST_F_SCLK 84 -#define AUD_CLKID_MST_A_LRCLK 86 -#define AUD_CLKID_MST_B_LRCLK 87 -#define AUD_CLKID_MST_C_LRCLK 88 -#define AUD_CLKID_MST_D_LRCLK 89 -#define AUD_CLKID_MST_E_LRCLK 90 -#define AUD_CLKID_MST_F_LRCLK 91 -#define AUD_CLKID_TDMIN_A_SCLK_SEL 116 -#define AUD_CLKID_TDMIN_B_SCLK_SEL 117 -#define AUD_CLKID_TDMIN_C_SCLK_SEL 118 -#define AUD_CLKID_TDMIN_LB_SCLK_SEL 119 -#define AUD_CLKID_TDMOUT_A_SCLK_SEL 120 -#define AUD_CLKID_TDMOUT_B_SCLK_SEL 121 -#define AUD_CLKID_TDMOUT_C_SCLK_SEL 122 -#define AUD_CLKID_TDMIN_A_SCLK 123 -#define AUD_CLKID_TDMIN_B_SCLK 124 -#define AUD_CLKID_TDMIN_C_SCLK 125 -#define AUD_CLKID_TDMIN_LB_SCLK 126 -#define AUD_CLKID_TDMOUT_A_SCLK 127 -#define AUD_CLKID_TDMOUT_B_SCLK 128 -#define AUD_CLKID_TDMOUT_C_SCLK 129 -#define AUD_CLKID_TDMIN_A_LRCLK 130 -#define AUD_CLKID_TDMIN_B_LRCLK 131 -#define AUD_CLKID_TDMIN_C_LRCLK 132 -#define AUD_CLKID_TDMIN_LB_LRCLK 133 -#define AUD_CLKID_TDMOUT_A_LRCLK 134 -#define AUD_CLKID_TDMOUT_B_LRCLK 135 -#define AUD_CLKID_TDMOUT_C_LRCLK 136 -#define AUD_CLKID_SPDIFOUT_B 151 -#define AUD_CLKID_SPDIFOUT_B_CLK 152 -#define AUD_CLKID_TDM_MCLK_PAD0 155 -#define AUD_CLKID_TDM_MCLK_PAD1 156 -#define AUD_CLKID_TDM_LRCLK_PAD0 157 -#define AUD_CLKID_TDM_LRCLK_PAD1 158 -#define AUD_CLKID_TDM_LRCLK_PAD2 159 -#define AUD_CLKID_TDM_SCLK_PAD0 160 -#define AUD_CLKID_TDM_SCLK_PAD1 161 -#define AUD_CLKID_TDM_SCLK_PAD2 162 -#define AUD_CLKID_TOP 163 -#define AUD_CLKID_TORAM 164 -#define AUD_CLKID_EQDRC 165 -#define AUD_CLKID_RESAMPLE_B 166 -#define AUD_CLKID_TOVAD 167 -#define AUD_CLKID_LOCKER 168 -#define AUD_CLKID_SPDIFIN_LB 169 -#define AUD_CLKID_FRDDR_D 170 -#define AUD_CLKID_TODDR_D 171 -#define AUD_CLKID_LOOPBACK_B 172 - -#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h deleted file mode 100644 index 93752ea107e..00000000000 --- a/include/dt-bindings/clock/axg-clkc.h +++ /dev/null @@ -1,100 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Meson-AXG clock tree IDs - * - * Copyright (c) 2017 Amlogic, Inc. All rights reserved. - */ - -#ifndef __AXG_CLKC_H -#define __AXG_CLKC_H - -#define CLKID_SYS_PLL 0 -#define CLKID_FIXED_PLL 1 -#define CLKID_FCLK_DIV2 2 -#define CLKID_FCLK_DIV3 3 -#define CLKID_FCLK_DIV4 4 -#define CLKID_FCLK_DIV5 5 -#define CLKID_FCLK_DIV7 6 -#define CLKID_GP0_PLL 7 -#define CLKID_CLK81 10 -#define CLKID_MPLL0 11 -#define CLKID_MPLL1 12 -#define CLKID_MPLL2 13 -#define CLKID_MPLL3 14 -#define CLKID_DDR 15 -#define CLKID_AUDIO_LOCKER 16 -#define CLKID_MIPI_DSI_HOST 17 -#define CLKID_ISA 18 -#define CLKID_PL301 19 -#define CLKID_PERIPHS 20 -#define CLKID_SPICC0 21 -#define CLKID_I2C 22 -#define CLKID_RNG0 23 -#define CLKID_UART0 24 -#define CLKID_MIPI_DSI_PHY 25 -#define CLKID_SPICC1 26 -#define CLKID_PCIE_A 27 -#define CLKID_PCIE_B 28 -#define CLKID_HIU_IFACE 29 -#define CLKID_ASSIST_MISC 30 -#define CLKID_SD_EMMC_B 31 -#define CLKID_SD_EMMC_C 32 -#define CLKID_DMA 33 -#define CLKID_SPI 34 -#define CLKID_AUDIO 35 -#define CLKID_ETH 36 -#define CLKID_UART1 37 -#define CLKID_G2D 38 -#define CLKID_USB0 39 -#define CLKID_USB1 40 -#define CLKID_RESET 41 -#define CLKID_USB 42 -#define CLKID_AHB_ARB0 43 -#define CLKID_EFUSE 44 -#define CLKID_BOOT_ROM 45 -#define CLKID_AHB_DATA_BUS 46 -#define CLKID_AHB_CTRL_BUS 47 -#define CLKID_USB1_DDR_BRIDGE 48 -#define CLKID_USB0_DDR_BRIDGE 49 -#define CLKID_MMC_PCLK 50 -#define CLKID_VPU_INTR 51 -#define CLKID_SEC_AHB_AHB3_BRIDGE 52 -#define CLKID_GIC 53 -#define CLKID_AO_MEDIA_CPU 54 -#define CLKID_AO_AHB_SRAM 55 -#define CLKID_AO_AHB_BUS 56 -#define CLKID_AO_IFACE 57 -#define CLKID_AO_I2C 58 -#define CLKID_SD_EMMC_B_CLK0 59 -#define CLKID_SD_EMMC_C_CLK0 60 -#define CLKID_HIFI_PLL 69 -#define CLKID_PCIE_CML_EN0 79 -#define CLKID_PCIE_CML_EN1 80 -#define CLKID_GEN_CLK 84 -#define CLKID_VPU_0_SEL 92 -#define CLKID_VPU_0 93 -#define CLKID_VPU_1_SEL 95 -#define CLKID_VPU_1 96 -#define CLKID_VPU 97 -#define CLKID_VAPB_0_SEL 99 -#define CLKID_VAPB_0 100 -#define CLKID_VAPB_1_SEL 102 -#define CLKID_VAPB_1 103 -#define CLKID_VAPB_SEL 104 -#define CLKID_VAPB 105 -#define CLKID_VCLK 106 -#define CLKID_VCLK2 107 -#define CLKID_VCLK_DIV1 122 -#define CLKID_VCLK_DIV2 123 -#define CLKID_VCLK_DIV4 124 -#define CLKID_VCLK_DIV6 125 -#define CLKID_VCLK_DIV12 126 -#define CLKID_VCLK2_DIV1 127 -#define CLKID_VCLK2_DIV2 128 -#define CLKID_VCLK2_DIV4 129 -#define CLKID_VCLK2_DIV6 130 -#define CLKID_VCLK2_DIV12 131 -#define CLKID_CTS_ENCL 133 -#define CLKID_VDIN_MEAS 136 - -#endif /* __AXG_CLKC_H */ diff --git a/include/dt-bindings/clock/r9a07g044-cpg.h b/include/dt-bindings/clock/r9a07g044-cpg.h deleted file mode 100644 index 0bb17ff1a01..00000000000 --- a/include/dt-bindings/clock/r9a07g044-cpg.h +++ /dev/null @@ -1,220 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) - * - * Copyright (C) 2021 Renesas Electronics Corp. - */ -#ifndef __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ -#define __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ - -#include <dt-bindings/clock/renesas-cpg-mssr.h> - -/* R9A07G044 CPG Core Clocks */ -#define R9A07G044_CLK_I 0 -#define R9A07G044_CLK_I2 1 -#define R9A07G044_CLK_G 2 -#define R9A07G044_CLK_S0 3 -#define R9A07G044_CLK_S1 4 -#define R9A07G044_CLK_SPI0 5 -#define R9A07G044_CLK_SPI1 6 -#define R9A07G044_CLK_SD0 7 -#define R9A07G044_CLK_SD1 8 -#define R9A07G044_CLK_M0 9 -#define R9A07G044_CLK_M1 10 -#define R9A07G044_CLK_M2 11 -#define R9A07G044_CLK_M3 12 -#define R9A07G044_CLK_M4 13 -#define R9A07G044_CLK_HP 14 -#define R9A07G044_CLK_TSU 15 -#define R9A07G044_CLK_ZT 16 -#define R9A07G044_CLK_P0 17 -#define R9A07G044_CLK_P1 18 -#define R9A07G044_CLK_P2 19 -#define R9A07G044_CLK_AT 20 -#define R9A07G044_OSCCLK 21 -#define R9A07G044_CLK_P0_DIV2 22 - -/* R9A07G044 Module Clocks */ -#define R9A07G044_CA55_SCLK 0 -#define R9A07G044_CA55_PCLK 1 -#define R9A07G044_CA55_ATCLK 2 -#define R9A07G044_CA55_GICCLK 3 -#define R9A07G044_CA55_PERICLK 4 -#define R9A07G044_CA55_ACLK 5 -#define R9A07G044_CA55_TSCLK 6 -#define R9A07G044_GIC600_GICCLK 7 -#define R9A07G044_IA55_CLK 8 -#define R9A07G044_IA55_PCLK 9 -#define R9A07G044_MHU_PCLK 10 -#define R9A07G044_SYC_CNT_CLK 11 -#define R9A07G044_DMAC_ACLK 12 -#define R9A07G044_DMAC_PCLK 13 -#define R9A07G044_OSTM0_PCLK 14 -#define R9A07G044_OSTM1_PCLK 15 -#define R9A07G044_OSTM2_PCLK 16 -#define R9A07G044_MTU_X_MCK_MTU3 17 -#define R9A07G044_POE3_CLKM_POE 18 -#define R9A07G044_GPT_PCLK 19 -#define R9A07G044_POEG_A_CLKP 20 -#define R9A07G044_POEG_B_CLKP 21 -#define R9A07G044_POEG_C_CLKP 22 -#define R9A07G044_POEG_D_CLKP 23 -#define R9A07G044_WDT0_PCLK 24 -#define R9A07G044_WDT0_CLK 25 -#define R9A07G044_WDT1_PCLK 26 -#define R9A07G044_WDT1_CLK 27 -#define R9A07G044_WDT2_PCLK 28 -#define R9A07G044_WDT2_CLK 29 -#define R9A07G044_SPI_CLK2 30 -#define R9A07G044_SPI_CLK 31 -#define R9A07G044_SDHI0_IMCLK 32 -#define R9A07G044_SDHI0_IMCLK2 33 -#define R9A07G044_SDHI0_CLK_HS 34 -#define R9A07G044_SDHI0_ACLK 35 -#define R9A07G044_SDHI1_IMCLK 36 -#define R9A07G044_SDHI1_IMCLK2 37 -#define R9A07G044_SDHI1_CLK_HS 38 -#define R9A07G044_SDHI1_ACLK 39 -#define R9A07G044_GPU_CLK 40 -#define R9A07G044_GPU_AXI_CLK 41 -#define R9A07G044_GPU_ACE_CLK 42 -#define R9A07G044_ISU_ACLK 43 -#define R9A07G044_ISU_PCLK 44 -#define R9A07G044_H264_CLK_A 45 -#define R9A07G044_H264_CLK_P 46 -#define R9A07G044_CRU_SYSCLK 47 -#define R9A07G044_CRU_VCLK 48 -#define R9A07G044_CRU_PCLK 49 -#define R9A07G044_CRU_ACLK 50 -#define R9A07G044_MIPI_DSI_PLLCLK 51 -#define R9A07G044_MIPI_DSI_SYSCLK 52 -#define R9A07G044_MIPI_DSI_ACLK 53 -#define R9A07G044_MIPI_DSI_PCLK 54 -#define R9A07G044_MIPI_DSI_VCLK 55 -#define R9A07G044_MIPI_DSI_LPCLK 56 -#define R9A07G044_LCDC_CLK_A 57 -#define R9A07G044_LCDC_CLK_P 58 -#define R9A07G044_LCDC_CLK_D 59 -#define R9A07G044_SSI0_PCLK2 60 -#define R9A07G044_SSI0_PCLK_SFR 61 -#define R9A07G044_SSI1_PCLK2 62 -#define R9A07G044_SSI1_PCLK_SFR 63 -#define R9A07G044_SSI2_PCLK2 64 -#define R9A07G044_SSI2_PCLK_SFR 65 -#define R9A07G044_SSI3_PCLK2 66 -#define R9A07G044_SSI3_PCLK_SFR 67 -#define R9A07G044_SRC_CLKP 68 -#define R9A07G044_USB_U2H0_HCLK 69 -#define R9A07G044_USB_U2H1_HCLK 70 -#define R9A07G044_USB_U2P_EXR_CPUCLK 71 -#define R9A07G044_USB_PCLK 72 -#define R9A07G044_ETH0_CLK_AXI 73 -#define R9A07G044_ETH0_CLK_CHI 74 -#define R9A07G044_ETH1_CLK_AXI 75 -#define R9A07G044_ETH1_CLK_CHI 76 -#define R9A07G044_I2C0_PCLK 77 -#define R9A07G044_I2C1_PCLK 78 -#define R9A07G044_I2C2_PCLK 79 -#define R9A07G044_I2C3_PCLK 80 -#define R9A07G044_SCIF0_CLK_PCK 81 -#define R9A07G044_SCIF1_CLK_PCK 82 -#define R9A07G044_SCIF2_CLK_PCK 83 -#define R9A07G044_SCIF3_CLK_PCK 84 -#define R9A07G044_SCIF4_CLK_PCK 85 -#define R9A07G044_SCI0_CLKP 86 -#define R9A07G044_SCI1_CLKP 87 -#define R9A07G044_IRDA_CLKP 88 -#define R9A07G044_RSPI0_CLKB 89 -#define R9A07G044_RSPI1_CLKB 90 -#define R9A07G044_RSPI2_CLKB 91 -#define R9A07G044_CANFD_PCLK 92 -#define R9A07G044_GPIO_HCLK 93 -#define R9A07G044_ADC_ADCLK 94 -#define R9A07G044_ADC_PCLK 95 -#define R9A07G044_TSU_PCLK 96 - -/* R9A07G044 Resets */ -#define R9A07G044_CA55_RST_1_0 0 -#define R9A07G044_CA55_RST_1_1 1 -#define R9A07G044_CA55_RST_3_0 2 -#define R9A07G044_CA55_RST_3_1 3 -#define R9A07G044_CA55_RST_4 4 -#define R9A07G044_CA55_RST_5 5 -#define R9A07G044_CA55_RST_6 6 -#define R9A07G044_CA55_RST_7 7 -#define R9A07G044_CA55_RST_8 8 -#define R9A07G044_CA55_RST_9 9 -#define R9A07G044_CA55_RST_10 10 -#define R9A07G044_CA55_RST_11 11 -#define R9A07G044_CA55_RST_12 12 -#define R9A07G044_GIC600_GICRESET_N 13 -#define R9A07G044_GIC600_DBG_GICRESET_N 14 -#define R9A07G044_IA55_RESETN 15 -#define R9A07G044_MHU_RESETN 16 -#define R9A07G044_DMAC_ARESETN 17 -#define R9A07G044_DMAC_RST_ASYNC 18 -#define R9A07G044_SYC_RESETN 19 -#define R9A07G044_OSTM0_PRESETZ 20 -#define R9A07G044_OSTM1_PRESETZ 21 -#define R9A07G044_OSTM2_PRESETZ 22 -#define R9A07G044_MTU_X_PRESET_MTU3 23 -#define R9A07G044_POE3_RST_M_REG 24 -#define R9A07G044_GPT_RST_C 25 -#define R9A07G044_POEG_A_RST 26 -#define R9A07G044_POEG_B_RST 27 -#define R9A07G044_POEG_C_RST 28 -#define R9A07G044_POEG_D_RST 29 -#define R9A07G044_WDT0_PRESETN 30 -#define R9A07G044_WDT1_PRESETN 31 -#define R9A07G044_WDT2_PRESETN 32 -#define R9A07G044_SPI_RST 33 -#define R9A07G044_SDHI0_IXRST 34 -#define R9A07G044_SDHI1_IXRST 35 -#define R9A07G044_GPU_RESETN 36 -#define R9A07G044_GPU_AXI_RESETN 37 -#define R9A07G044_GPU_ACE_RESETN 38 -#define R9A07G044_ISU_ARESETN 39 -#define R9A07G044_ISU_PRESETN 40 -#define R9A07G044_H264_X_RESET_VCP 41 -#define R9A07G044_H264_CP_PRESET_P 42 -#define R9A07G044_CRU_CMN_RSTB 43 -#define R9A07G044_CRU_PRESETN 44 -#define R9A07G044_CRU_ARESETN 45 -#define R9A07G044_MIPI_DSI_CMN_RSTB 46 -#define R9A07G044_MIPI_DSI_ARESET_N 47 -#define R9A07G044_MIPI_DSI_PRESET_N 48 -#define R9A07G044_LCDC_RESET_N 49 -#define R9A07G044_SSI0_RST_M2_REG 50 -#define R9A07G044_SSI1_RST_M2_REG 51 -#define R9A07G044_SSI2_RST_M2_REG 52 -#define R9A07G044_SSI3_RST_M2_REG 53 -#define R9A07G044_SRC_RST 54 -#define R9A07G044_USB_U2H0_HRESETN 55 -#define R9A07G044_USB_U2H1_HRESETN 56 -#define R9A07G044_USB_U2P_EXL_SYSRST 57 -#define R9A07G044_USB_PRESETN 58 -#define R9A07G044_ETH0_RST_HW_N 59 -#define R9A07G044_ETH1_RST_HW_N 60 -#define R9A07G044_I2C0_MRST 61 -#define R9A07G044_I2C1_MRST 62 -#define R9A07G044_I2C2_MRST 63 -#define R9A07G044_I2C3_MRST 64 -#define R9A07G044_SCIF0_RST_SYSTEM_N 65 -#define R9A07G044_SCIF1_RST_SYSTEM_N 66 -#define R9A07G044_SCIF2_RST_SYSTEM_N 67 -#define R9A07G044_SCIF3_RST_SYSTEM_N 68 -#define R9A07G044_SCIF4_RST_SYSTEM_N 69 -#define R9A07G044_SCI0_RST 70 -#define R9A07G044_SCI1_RST 71 -#define R9A07G044_IRDA_RST 72 -#define R9A07G044_RSPI0_RST 73 -#define R9A07G044_RSPI1_RST 74 -#define R9A07G044_RSPI2_RST 75 -#define R9A07G044_CANFD_RSTP_N 76 -#define R9A07G044_CANFD_RSTC_N 77 -#define R9A07G044_GPIO_RSTN 78 -#define R9A07G044_GPIO_PORT_RESETN 79 -#define R9A07G044_GPIO_SPARE_RESETN 80 -#define R9A07G044_ADC_PRESETN 81 -#define R9A07G044_ADC_ADRST_N 82 -#define R9A07G044_TSU_PRESETN 83 - -#endif /* __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ */ diff --git a/include/dt-bindings/gpio/meson-a1-gpio.h b/include/dt-bindings/gpio/meson-a1-gpio.h deleted file mode 100644 index 40e57a5ff1d..00000000000 --- a/include/dt-bindings/gpio/meson-a1-gpio.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * Copyright (c) 2019 Amlogic, Inc. All rights reserved. - * Author: Qianggui Song <qianggui.song@amlogic.com> - */ - -#ifndef _DT_BINDINGS_MESON_A1_GPIO_H -#define _DT_BINDINGS_MESON_A1_GPIO_H - -#define GPIOP_0 0 -#define GPIOP_1 1 -#define GPIOP_2 2 -#define GPIOP_3 3 -#define GPIOP_4 4 -#define GPIOP_5 5 -#define GPIOP_6 6 -#define GPIOP_7 7 -#define GPIOP_8 8 -#define GPIOP_9 9 -#define GPIOP_10 10 -#define GPIOP_11 11 -#define GPIOP_12 12 -#define GPIOB_0 13 -#define GPIOB_1 14 -#define GPIOB_2 15 -#define GPIOB_3 16 -#define GPIOB_4 17 -#define GPIOB_5 18 -#define GPIOB_6 19 -#define GPIOX_0 20 -#define GPIOX_1 21 -#define GPIOX_2 22 -#define GPIOX_3 23 -#define GPIOX_4 24 -#define GPIOX_5 25 -#define GPIOX_6 26 -#define GPIOX_7 27 -#define GPIOX_8 28 -#define GPIOX_9 29 -#define GPIOX_10 30 -#define GPIOX_11 31 -#define GPIOX_12 32 -#define GPIOX_13 33 -#define GPIOX_14 34 -#define GPIOX_15 35 -#define GPIOX_16 36 -#define GPIOF_0 37 -#define GPIOF_1 38 -#define GPIOF_2 39 -#define GPIOF_3 40 -#define GPIOF_4 41 -#define GPIOF_5 42 -#define GPIOF_6 43 -#define GPIOF_7 44 -#define GPIOF_8 45 -#define GPIOF_9 46 -#define GPIOF_10 47 -#define GPIOF_11 48 -#define GPIOF_12 49 -#define GPIOA_0 50 -#define GPIOA_1 51 -#define GPIOA_2 52 -#define GPIOA_3 53 -#define GPIOA_4 54 -#define GPIOA_5 55 -#define GPIOA_6 56 -#define GPIOA_7 57 -#define GPIOA_8 58 -#define GPIOA_9 59 -#define GPIOA_10 60 -#define GPIOA_11 61 - -#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */ diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h deleted file mode 100644 index 35b6f69b7db..00000000000 --- a/include/dt-bindings/interrupt-controller/arm-gic.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR MIT */ -/* - * This header provides constants for the ARM GIC. - */ - -#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H -#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H - -#include <dt-bindings/interrupt-controller/irq.h> - -/* interrupt specifier cell 0 */ - -#define GIC_SPI 0 -#define GIC_PPI 1 - -/* - * Interrupt specifier cell 2. - * The flags in irq.h are valid, plus those below. - */ -#define GIC_CPU_MASK_RAW(x) ((x) << 8) -#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) - -#endif diff --git a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h b/include/dt-bindings/interrupt-controller/irqc-rzg2l.h deleted file mode 100644 index 34ce778885a..00000000000 --- a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ -/* - * This header provides constants for Renesas RZ/G2L family IRQC bindings. - * - * Copyright (C) 2022 Renesas Electronics Corp. - * - */ - -#ifndef __DT_BINDINGS_IRQC_RZG2L_H -#define __DT_BINDINGS_IRQC_RZG2L_H - -/* NMI maps to SPI0 */ -#define RZG2L_NMI 0 - -/* IRQ0-7 map to SPI1-8 */ -#define RZG2L_IRQ0 1 -#define RZG2L_IRQ1 2 -#define RZG2L_IRQ2 3 -#define RZG2L_IRQ3 4 -#define RZG2L_IRQ4 5 -#define RZG2L_IRQ5 6 -#define RZG2L_IRQ6 7 -#define RZG2L_IRQ7 8 - -#endif /* __DT_BINDINGS_IRQC_RZG2L_H */ diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h deleted file mode 100644 index c78ed5e5efb..00000000000 --- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ -/* - * This header provides constants for Renesas RZ/G2L family pinctrl bindings. - * - * Copyright (C) 2021 Renesas Electronics Corp. - * - */ - -#ifndef __DT_BINDINGS_RZG2L_PINCTRL_H -#define __DT_BINDINGS_RZG2L_PINCTRL_H - -#define RZG2L_PINS_PER_PORT 8 - -/* - * Create the pin index from its bank and position numbers and store in - * the upper 16 bits the alternate function identifier - */ -#define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16)) - -/* Convert a port and pin label to its global pin index */ -#define RZG2L_GPIO(port, pin) ((port) * RZG2L_PINS_PER_PORT + (pin)) - -#endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */ diff --git a/include/dt-bindings/power/meson-a1-power.h b/include/dt-bindings/power/meson-a1-power.h deleted file mode 100644 index 8e39dfc0b62..00000000000 --- a/include/dt-bindings/power/meson-a1-power.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2023 SberDevices, Inc. - * Author: Alexey Romanov <avromanov@sberdevices.ru> - */ - -#ifndef _DT_BINDINGS_MESON_A1_POWER_H -#define _DT_BINDINGS_MESON_A1_POWER_H - -#define PWRC_DSPA_ID 8 -#define PWRC_DSPB_ID 9 -#define PWRC_UART_ID 10 -#define PWRC_DMC_ID 11 -#define PWRC_I2C_ID 12 -#define PWRC_PSRAM_ID 13 -#define PWRC_ACODEC_ID 14 -#define PWRC_AUDIO_ID 15 -#define PWRC_OTP_ID 16 -#define PWRC_DMA_ID 17 -#define PWRC_SD_EMMC_ID 18 -#define PWRC_RAMA_ID 19 -#define PWRC_RAMB_ID 20 -#define PWRC_IR_ID 21 -#define PWRC_SPICC_ID 22 -#define PWRC_SPIFC_ID 23 -#define PWRC_USB_ID 24 -#define PWRC_NIC_ID 25 -#define PWRC_PDMIN_ID 26 -#define PWRC_RSA_ID 27 -#define PWRC_MAX_ID 28 - -#endif diff --git a/include/dt-bindings/reset/amlogic,meson-a1-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-reset.h deleted file mode 100644 index 2c749c655e1..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-a1-reset.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2019 Amlogic, Inc. All rights reserved. - * Author: Xingyu Chen <xingyu.chen@amlogic.com> - * - * Copyright (c) 2023, SberDevices, Inc. - * Author: Alexey Romanov <avromanov@salutedevices.com> - */ - -#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H -#define _DT_BINDINGS_AMLOGIC_MESON_A1_RESET_H - -/* RESET0 */ -/* 0 */ -#define RESET_AM2AXI_VAD 1 -/* 2-3 */ -#define RESET_PSRAM 4 -#define RESET_PAD_CTRL 5 -/* 6 */ -#define RESET_TEMP_SENSOR 7 -#define RESET_AM2AXI_DEV 8 -/* 9 */ -#define RESET_SPICC_A 10 -#define RESET_MSR_CLK 11 -#define RESET_AUDIO 12 -#define RESET_ANALOG_CTRL 13 -#define RESET_SAR_ADC 14 -#define RESET_AUDIO_VAD 15 -#define RESET_CEC 16 -#define RESET_PWM_EF 17 -#define RESET_PWM_CD 18 -#define RESET_PWM_AB 19 -/* 20 */ -#define RESET_IR_CTRL 21 -#define RESET_I2C_S_A 22 -/* 23 */ -#define RESET_I2C_M_D 24 -#define RESET_I2C_M_C 25 -#define RESET_I2C_M_B 26 -#define RESET_I2C_M_A 27 -#define RESET_I2C_PROD_AHB 28 -#define RESET_I2C_PROD 29 -/* 30-31 */ - -/* RESET1 */ -#define RESET_ACODEC 32 -#define RESET_DMA 33 -#define RESET_SD_EMMC_A 34 -/* 35 */ -#define RESET_USBCTRL 36 -/* 37 */ -#define RESET_USBPHY 38 -/* 39-41 */ -#define RESET_RSA 42 -#define RESET_DMC 43 -/* 44 */ -#define RESET_IRQ_CTRL 45 -/* 46 */ -#define RESET_NIC_VAD 47 -#define RESET_NIC_AXI 48 -#define RESET_RAMA 49 -#define RESET_RAMB 50 -/* 51-52 */ -#define RESET_ROM 53 -#define RESET_SPIFC 54 -#define RESET_GIC 55 -#define RESET_UART_C 56 -#define RESET_UART_B 57 -#define RESET_UART_A 58 -#define RESET_OSC_RING 59 -/* 60-63 */ - -/* RESET2 */ -/* 64-95 */ - -#endif diff --git a/include/efi.h b/include/efi.h index 84640cf7b25..c559fda3004 100644 --- a/include/efi.h +++ b/include/efi.h @@ -669,4 +669,38 @@ int efi_get_mmap(struct efi_mem_desc **descp, int *sizep, uint *keyp, */ void efi_show_tables(struct efi_system_table *systab); +/** + * efi_get_basename() - Get the default filename to use when loading + * + * E.g. this function returns BOOTAA64.EFI for an aarch target + * + * Return: Default EFI filename + */ +const char *efi_get_basename(void); + +#ifdef CONFIG_SANDBOX +#include <asm/state.h> +#endif + +static inline bool efi_use_host_arch(void) +{ +#ifdef CONFIG_SANDBOX + struct sandbox_state *state = state_get_current(); + + return state->native; +#else + return false; +#endif +} + +/** + * efi_get_pxe_arch() - Get the architecture value for PXE + * + * See: + * http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml + * + * Return: Architecture value + */ +int efi_get_pxe_arch(void); + #endif /* _LINUX_EFI_H */ diff --git a/include/efi_default_filename.h b/include/efi_default_filename.h deleted file mode 100644 index 77932984b55..00000000000 --- a/include/efi_default_filename.h +++ /dev/null @@ -1,56 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * When a boot option does not provide a file path the EFI file to be - * booted is \EFI\BOOT\$(BOOTEFI_NAME).EFI. The architecture specific - * file name is defined in this include. - * - * Copyright (c) 2022, Heinrich Schuchardt <xypron.glpk@gmx.de> - * Copyright (c) 2022, Linaro Limited - */ - -#ifndef _EFI_DEFAULT_FILENAME_H -#define _EFI_DEFAULT_FILENAME_H - -#include <host_arch.h> - -#undef BOOTEFI_NAME - -#ifdef CONFIG_SANDBOX - -#if HOST_ARCH == HOST_ARCH_X86_64 -#define BOOTEFI_NAME "BOOTX64.EFI" -#elif HOST_ARCH == HOST_ARCH_X86 -#define BOOTEFI_NAME "BOOTIA32.EFI" -#elif HOST_ARCH == HOST_ARCH_AARCH64 -#define BOOTEFI_NAME "BOOTAA64.EFI" -#elif HOST_ARCH == HOST_ARCH_ARM -#define BOOTEFI_NAME "BOOTARM.EFI" -#elif HOST_ARCH == HOST_ARCH_RISCV32 -#define BOOTEFI_NAME "BOOTRISCV32.EFI" -#elif HOST_ARCH == HOST_ARCH_RISCV64 -#define BOOTEFI_NAME "BOOTRISCV64.EFI" -#else -#error Unsupported UEFI architecture -#endif - -#else - -#if defined(CONFIG_ARM64) -#define BOOTEFI_NAME "BOOTAA64.EFI" -#elif defined(CONFIG_ARM) -#define BOOTEFI_NAME "BOOTARM.EFI" -#elif defined(CONFIG_X86_64) -#define BOOTEFI_NAME "BOOTX64.EFI" -#elif defined(CONFIG_X86) -#define BOOTEFI_NAME "BOOTIA32.EFI" -#elif defined(CONFIG_ARCH_RV32I) -#define BOOTEFI_NAME "BOOTRISCV32.EFI" -#elif defined(CONFIG_ARCH_RV64I) -#define BOOTEFI_NAME "BOOTRISCV64.EFI" -#else -#error Unsupported UEFI architecture -#endif - -#endif - -#endif diff --git a/include/efi_loader.h b/include/efi_loader.h index 291eca5c077..39809eac1bc 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -858,7 +858,7 @@ struct efi_device_path *efi_dp_from_file(const struct efi_device_path *dp, struct efi_device_path *efi_dp_from_eth(void); struct efi_device_path *efi_dp_from_mem(uint32_t mem_type, uint64_t start_address, - uint64_t end_address); + size_t size); /* Determine the last device path node that is not the end node. */ const struct efi_device_path *efi_dp_last_node( const struct efi_device_path *dp); diff --git a/include/expo.h b/include/expo.h index 8cb37260db5..3c383d2e2ee 100644 --- a/include/expo.h +++ b/include/expo.h @@ -762,4 +762,12 @@ int expo_apply_theme(struct expo *exp, ofnode node); */ int expo_build(ofnode root, struct expo **expp); +/** + * cb_expo_build() - Build an expo for coreboot CMOS RAM + * + * @expp: Returns the expo created + * Return: 0 if OK, -ve on error + */ +int cb_expo_build(struct expo **expp); + #endif /*__EXPO_H */ diff --git a/include/ext4fs.h b/include/ext4fs.h index 41f9eb8bd33..fe3fb301ec8 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -27,6 +27,7 @@ #ifndef __EXT4__ #define __EXT4__ #include <ext_common.h> +#include <fs.h> struct disk_partition; @@ -218,4 +219,7 @@ int ext4fs_uuid(char *uuid_str); void ext_cache_init(struct ext_block_cache *cache); void ext_cache_fini(struct ext_block_cache *cache); int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size); +int ext4fs_opendir(const char *dirname, struct fs_dir_stream **dirsp); +int ext4fs_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp); +void ext4fs_closedir(struct fs_dir_stream *dirs); #endif diff --git a/include/imx8image.h b/include/imx8image.h index 85fb642ae39..6b95e93fb50 100644 --- a/include/imx8image.h +++ b/include/imx8image.h @@ -146,6 +146,7 @@ struct image_array { enum imx8image_cmd { CMD_INVALID, CMD_BOOT_FROM, + CMD_DCD_SKIP, CMD_FUSE_VERSION, CMD_SW_VERSION, CMD_MSG_BLOCK, diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 655a6d197ea..b8b207f7b5c 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -308,7 +308,7 @@ enum spi_nor_option_flags { SNOR_F_BROKEN_RESET = BIT(6), SNOR_F_SOFT_RESET = BIT(7), SNOR_F_IO_MODE_EN_VOLATILE = BIT(8), -#if defined(CONFIG_SPI_ADVANCE) +#if defined(CONFIG_SPI_STACKED_PARALLEL) SNOR_F_HAS_STACKED = BIT(9), SNOR_F_HAS_PARALLEL = BIT(10), #else diff --git a/include/lmb.h b/include/lmb.h index 2201d6f2b67..f221f0cce8f 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -156,6 +156,57 @@ static inline int lmb_read_check(phys_addr_t addr, phys_size_t len) return lmb_alloc_addr(addr, len) == addr ? 0 : -1; } +/** + * io_lmb_setup() - Initialize LMB struct + * @io_lmb: IO LMB to initialize + * + * Returns: 0 on success, negative error code on failure + */ +int io_lmb_setup(struct lmb *io_lmb); + +/** + * io_lmb_teardown() - Tear LMB struct down + * @io_lmb: IO LMB to teardown + */ +void io_lmb_teardown(struct lmb *io_lmb); + +/** + * io_lmb_add() - Add an IOVA range for allocations + * @io_lmb: LMB to add the space to + * @base: Base Address of region to add + * @size: Size of the region to add + * + * Add the IOVA space [base, base + size] to be managed by io_lmb. + * + * Returns: 0 if the region addition was successful, -1 on failure + */ +long io_lmb_add(struct lmb *io_lmb, phys_addr_t base, phys_size_t size); + +/** + * io_lmb_alloc() - Allocate specified IO memory address with specified alignment + * @io_lmb: LMB to alloc from + * @size: Size of the region requested + * @align: Required address and size alignment + * + * Allocate a region of IO memory. The base parameter is used to specify the + * base address of the requested region. + * + * Return: base IO address on success, 0 on error + */ +phys_addr_t io_lmb_alloc(struct lmb *io_lmb, phys_size_t size, ulong align); + +/** + * io_lmb_free() - Free up a region of IOVA space + * @io_lmb: LMB to return the IO address space to + * @base: Base Address of region to be freed + * @size: Size of the region to be freed + * + * Free up a region of IOVA space. + * + * Return: 0 if successful, -1 on failure + */ +long io_lmb_free(struct lmb *io_lmb, phys_addr_t base, phys_size_t size); + #endif /* __KERNEL__ */ #endif /* _LINUX_LMB_H */ diff --git a/include/log.h b/include/log.h index bf81a27011f..4f6d6a2c2cf 100644 --- a/include/log.h +++ b/include/log.h @@ -106,6 +106,8 @@ enum log_category_t { LOGC_EXPO, /** @LOGC_CONSOLE: Related to the console and stdio */ LOGC_CONSOLE, + /** @LOGC_TEST: Related to testing */ + LOGC_TEST, /** @LOGC_COUNT: Number of log categories */ LOGC_COUNT, /** @LOGC_END: Sentinel value for lists of log categories */ diff --git a/include/menu.h b/include/menu.h index 6571c39b143..6cede89b950 100644 --- a/include/menu.h +++ b/include/menu.h @@ -13,6 +13,7 @@ struct menu *menu_create(char *title, int timeout, int prompt, void (*display_statusline)(struct menu *), void (*item_data_print)(void *), char *(*item_choice)(void *), + bool (*need_reprint)(void *), void *item_choice_data); int menu_default_set(struct menu *m, char *item_key); int menu_get_choice(struct menu *m, void **choice); @@ -39,6 +40,7 @@ int menu_show(int bootdelay); struct bootmenu_data { int delay; /* delay for autoboot */ int active; /* active menu entry */ + int last_active; /* last active menu entry */ int count; /* total count of menu entries */ struct bootmenu_entry *first; /* first menu entry */ }; diff --git a/include/spi.h b/include/spi.h index 3a92d02f215..6944773b596 100644 --- a/include/spi.h +++ b/include/spi.h @@ -41,12 +41,6 @@ #define SPI_3BYTE_MODE 0x0 #define SPI_4BYTE_MODE 0x1 -/* SPI transfer flags */ -#define SPI_XFER_STRIPE (1 << 6) -#define SPI_XFER_MASK (3 << 8) -#define SPI_XFER_LOWER (1 << 8) -#define SPI_XFER_UPPER (2 << 8) - /* Max no. of CS supported per spi device */ #define SPI_CS_CNT_MAX 2 @@ -169,6 +163,8 @@ struct spi_slave { #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_U_PAGE BIT(4) #define SPI_XFER_STACKED BIT(5) +#define SPI_XFER_LOWER BIT(6) + /* * Flag indicating that the spi-controller has multi chip select * capability and can assert/de-assert more than one chip select diff --git a/include/test/test.h b/include/test/test.h index 92eec2eb6f9..21c0478befe 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -29,6 +29,7 @@ * @of_other: Live tree for the other FDT * @runs_per_test: Number of times to run each test (typically 1) * @force_run: true to run tests marked with the UTF_MANUAL flag + * @old_bloblist: stores the old gd->bloblist pointer * @expect_str: Temporary string used to hold expected string value * @actual_str: Temporary string used to hold actual string value */ @@ -50,6 +51,7 @@ struct unit_test_state { struct device_node *of_other; int runs_per_test; bool force_run; + void *old_bloblist; char expect_str[512]; char actual_str[512]; }; @@ -73,6 +75,7 @@ enum ut_flags { UTF_MANUAL = BIT(8), UTF_ETH_BOOTDEV = BIT(9), /* enable Ethernet bootdevs */ UTF_SF_BOOTDEV = BIT(10), /* enable SPI flash bootdevs */ + UFT_BLOBLIST = BIT(11), /* test changes gd->bloblist */ }; /** |