diff options
Diffstat (limited to 'include')
159 files changed, 2125 insertions, 744 deletions
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index c98c874fe40..4030d25c66a 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -913,6 +913,16 @@ void acpi_fill_header(struct acpi_table_header *header, char *signature); */ int acpi_fill_csrt(struct acpi_ctx *ctx); +/** + * write_acpi_tables() - Write out the ACPI tables + * + * This writes all ACPI tables to the given address + * + * @start: Start address for the tables + * @return address of end of tables, where the next tables can be written + */ +ulong write_acpi_tables(ulong start); + #endif /* !__ACPI__*/ #include <asm/acpi_table.h> diff --git a/include/ata.h b/include/ata.h index 32ad5f64271..a7bcee6a64c 100644 --- a/include/ata.h +++ b/include/ata.h @@ -19,9 +19,6 @@ * 8-bit (register) and 16-bit (data) accesses might use different * address spaces. This is implemented by the following definitions. */ -#ifndef CONFIG_SYS_ATA_STRIDE -#define CONFIG_SYS_ATA_STRIDE 1 -#endif #define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE)) #define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) diff --git a/include/bloblist.h b/include/bloblist.h index 173129b0273..d0e128acf10 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -147,16 +147,6 @@ struct bloblist_rec { u32 spare; }; -/* access CONFIG_BLOBLIST_ADDR, dealing with it possibly not being defined */ -static inline ulong bloblist_addr(void) -{ -#ifdef CONFIG_BLOBLIST_FIXED - return CONFIG_BLOBLIST_ADDR; -#else - return 0; -#endif -} - /** * bloblist_check_magic() - return a bloblist if the magic matches * diff --git a/include/clk-uclass.h b/include/clk-uclass.h index 50e8681b553..e44f1caf516 100644 --- a/include/clk-uclass.h +++ b/include/clk-uclass.h @@ -16,96 +16,127 @@ struct ofnode_phandle_args; /** * struct clk_ops - The functions that a clock driver must implement. + * @of_xlate: Translate a client's device-tree (OF) clock specifier. + * @request: Request a translated clock. + * @rfree: Free a previously requested clock. + * @round_rate: Adjust a rate to the exact rate a clock can provide. + * @get_rate: Get current clock rate. + * @set_rate: Set current clock rate. + * @set_parent: Set current clock parent + * @enable: Enable a clock. + * @disable: Disable a clock. + * + * The individual methods are described more fully below. */ struct clk_ops { - /** - * of_xlate - Translate a client's device-tree (OF) clock specifier. - * - * The clock core calls this function as the first step in implementing - * a client's clk_get_by_*() call. - * - * If this function pointer is set to NULL, the clock core will use a - * default implementation, which assumes #clock-cells = <1>, and that - * the DT cell contains a simple integer clock ID. - * - * At present, the clock API solely supports device-tree. If this - * changes, other xxx_xlate() functions may be added to support those - * other mechanisms. - * - * @clock: The clock struct to hold the translation result. - * @args: The clock specifier values from device tree. - * @return 0 if OK, or a negative error code. - */ int (*of_xlate)(struct clk *clock, struct ofnode_phandle_args *args); - /** - * request - Request a translated clock. - * - * The clock core calls this function as the second step in - * implementing a client's clk_get_by_*() call, following a successful - * xxx_xlate() call, or as the only step in implementing a client's - * clk_request() call. - * - * @clock: The clock struct to request; this has been fille in by - * a previoux xxx_xlate() function call, or by the caller - * of clk_request(). - * @return 0 if OK, or a negative error code. - */ int (*request)(struct clk *clock); - /** - * rfree - Free a previously requested clock. - * - * This is the implementation of the client clk_free() API. - * - * @clock: The clock to free. - * @return 0 if OK, or a negative error code. - */ int (*rfree)(struct clk *clock); - /** - * round_rate() - Adjust a rate to the exact rate a clock can provide. - * - * @clk: The clock to manipulate. - * @rate: Desidered clock rate in Hz. - * @return rounded rate in Hz, or -ve error code. - */ ulong (*round_rate)(struct clk *clk, ulong rate); - /** - * get_rate() - Get current clock rate. - * - * @clk: The clock to query. - * @return clock rate in Hz, or -ve error code - */ ulong (*get_rate)(struct clk *clk); - /** - * set_rate() - Set current clock rate. - * - * @clk: The clock to manipulate. - * @rate: New clock rate in Hz. - * @return new rate, or -ve error code. - */ ulong (*set_rate)(struct clk *clk, ulong rate); - /** - * set_parent() - Set current clock parent - * - * @clk: The clock to manipulate. - * @parent: New clock parent. - * @return zero on success, or -ve error code. - */ int (*set_parent)(struct clk *clk, struct clk *parent); - /** - * enable() - Enable a clock. - * - * @clk: The clock to manipulate. - * @return zero on success, or -ve error code. - */ int (*enable)(struct clk *clk); - /** - * disable() - Disable a clock. - * - * @clk: The clock to manipulate. - * @return zero on success, or -ve error code. - */ int (*disable)(struct clk *clk); }; +#if 0 /* For documentation only */ +/** + * of_xlate() - Translate a client's device-tree (OF) clock specifier. + * @clock: The clock struct to hold the translation result. + * @args: The clock specifier values from device tree. + * + * The clock core calls this function as the first step in implementing + * a client's clk_get_by_*() call. + * + * If this function pointer is set to NULL, the clock core will use a + * default implementation, which assumes #clock-cells = <1>, and that + * the DT cell contains a simple integer clock ID. + * + * At present, the clock API solely supports device-tree. If this + * changes, other xxx_xlate() functions may be added to support those + * other mechanisms. + * + * Return: 0 if OK, or a negative error code. + */ +int of_xlate(struct clk *clock, struct ofnode_phandle_args *args); + +/** + * request() - Request a translated clock. + * @clock: The clock struct to request; this has been fille in by + * a previoux xxx_xlate() function call, or by the caller + * of clk_request(). + * + * The clock core calls this function as the second step in + * implementing a client's clk_get_by_*() call, following a successful + * xxx_xlate() call, or as the only step in implementing a client's + * clk_request() call. + * + * Return: 0 if OK, or a negative error code. + */ +int request(struct clk *clock); + +/** + * rfree() - Free a previously requested clock. + * @clock: The clock to free. + * + * This is the implementation of the client clk_free() API. + * + * Return: 0 if OK, or a negative error code. + */ +int rfree(struct clk *clock); + +/** + * round_rate() - Adjust a rate to the exact rate a clock can provide. + * @clk: The clock to manipulate. + * @rate: Desidered clock rate in Hz. + * + * Return: rounded rate in Hz, or -ve error code. + */ +ulong round_rate(struct clk *clk, ulong rate); + +/** + * get_rate() - Get current clock rate. + * @clk: The clock to query. + * + * Return: clock rate in Hz, or -ve error code + */ +ulong get_rate(struct clk *clk); + +/** + * set_rate() - Set current clock rate. + * @clk: The clock to manipulate. + * @rate: New clock rate in Hz. + * + * Return: new rate, or -ve error code. + */ +ulong set_rate(struct clk *clk, ulong rate); + +/** + * set_parent() - Set current clock parent + * @clk: The clock to manipulate. + * @parent: New clock parent. + * + * Return: zero on success, or -ve error code. + */ +int set_parent(struct clk *clk, struct clk *parent); + +/** + * enable() - Enable a clock. + * @clk: The clock to manipulate. + * + * Return: zero on success, or -ve error code. + */ +int enable(struct clk *clk); + +/** + * disable() - Disable a clock. + * @clk: The clock to manipulate. + * + * Return: zero on success, or -ve error code. + */ +int disable(struct clk *clk); +#endif + #endif diff --git a/include/clk.h b/include/clk.h index 040d2d60f7a..23e4d4ea729 100644 --- a/include/clk.h +++ b/include/clk.h @@ -14,6 +14,8 @@ #include <linux/types.h> /** + * DOC: Overview + * * A clock is a hardware signal that oscillates autonomously at a specific * frequency and duty cycle. Most hardware modules require one or more clock * signal to drive their operation. Clock signals are typically generated @@ -34,22 +36,22 @@ struct udevice; /** * struct clk - A handle to (allowing control of) a single clock. - * - * Clients provide storage for clock handles. The content of the structure is - * managed solely by the clock API and clock drivers. A clock struct is - * initialized by "get"ing the clock struct. The clock struct is passed to all - * other clock APIs to identify which clock signal to operate upon. - * * @dev: The device which implements the clock signal. * @rate: The clock rate (in HZ). - * @flags: Flags used across common clock structure (e.g. CLK_) + * @flags: Flags used across common clock structure (e.g. %CLK_) * Clock IP blocks specific flags (i.e. mux, div, gate, etc) are defined - * in struct's for those devices (e.g. struct clk_mux). + * in struct's for those devices (e.g. &struct clk_mux). + * @enable_count: The number of times this clock has been enabled. * @id: The clock signal ID within the provider. * @data: An optional data field for scenarios where a single integer ID is not * sufficient. If used, it can be populated through an .of_xlate op and * processed during the various clock ops. * + * Clients provide storage for clock handles. The content of the structure is + * managed solely by the clock API and clock drivers. A clock struct is + * initialized by "get"ing the clock struct. The clock struct is passed to all + * other clock APIs to identify which clock signal to operate upon. + * * Should additional information to identify and configure any clock signal * for any provider be required in the future, the struct could be expanded to * either (a) add more fields to allow clock providers to store additional @@ -72,15 +74,14 @@ struct clk { /** * struct clk_bulk - A handle to (allowing control of) a bulk of clocks. + * @clks: An array of clock handles. + * @count: The number of clock handles in the clks array. * * Clients provide storage for the clock bulk. The content of the structure is * managed solely by the clock API. A clock bulk struct is * initialized by "get"ing the clock bulk struct. * The clock bulk struct is passed to all other bulk clock APIs to apply * the API to all the clock in the bulk struct. - * - * @clks: An array of clock handles. - * @count: The number of clock handles in the clks array. */ struct clk_bulk { struct clk *clks; @@ -91,16 +92,19 @@ struct clk_bulk { struct phandle_1_arg; /** * clk_get_by_phandle() - Get a clock by its phandle information (of-platadata) + * @dev: Device containing the phandle + * @cells: Phandle info + * @clk: A pointer to a clock struct to initialise * * This function is used when of-platdata is enabled. * * This looks up a clock using the phandle info. With dtoc, each phandle in the - * 'clocks' property is transformed into an idx representing the device. For - * example: + * 'clocks' property is transformed into an idx representing the device. + * For example:: * * clocks = <&dpll_mpu_ck 23>; * - * might result in: + * might result in:: * * .clocks = {1, {23}},}, * @@ -109,9 +113,6 @@ struct phandle_1_arg; * this example it would return a clock containing the 'dpll_mpu_ck' device and * the clock ID 23. * - * @dev: Device containing the phandle - * @cells: Phandle info - * @clock: A pointer to a clock struct to initialise * Return: 0 if OK, or a negative error code. */ int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells, @@ -119,6 +120,10 @@ int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells, /** * clk_get_by_index() - Get/request a clock by integer index. + * @dev: The client device. + * @index: The index of the clock to request, within the client's list of + * clocks. + * @clk: A pointer to a clock struct to initialize. * * This looks up and requests a clock. The index is relative to the client * device; each device is assumed to have n clocks associated with it somehow, @@ -126,30 +131,26 @@ int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells, * device clock indices to provider clocks may be via device-tree properties, * board-provided mapping tables, or some other mechanism. * - * @dev: The client device. - * @index: The index of the clock to request, within the client's list of - * clocks. - * @clock A pointer to a clock struct to initialize. * Return: 0 if OK, or a negative error code. */ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk); /** - * clk_get_by_index_nodev - Get/request a clock by integer index - * without a device. - * - * This is a version of clk_get_by_index() that does not use a device. - * + * clk_get_by_index_nodev() - Get/request a clock by integer index without a + * device. * @node: The client ofnode. * @index: The index of the clock to request, within the client's list of * clocks. - * @clock A pointer to a clock struct to initialize. + * @clk: A pointer to a clock struct to initialize. + * * Return: 0 if OK, or a negative error code. */ int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk); /** - * clk_get_bulk - Get/request all clocks of a device. + * clk_get_bulk() - Get/request all clocks of a device. + * @dev: The client device. + * @bulk: A pointer to a clock bulk struct to initialize. * * This looks up and requests all clocks of the client device; each device is * assumed to have n clocks associated with it somehow, and this function finds @@ -157,14 +158,16 @@ int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk); * device clock indices to provider clocks may be via device-tree properties, * board-provided mapping tables, or some other mechanism. * - * @dev: The client device. - * @bulk A pointer to a clock bulk struct to initialize. * Return: 0 if OK, or a negative error code. */ int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk); /** - * clk_get_by_name - Get/request a clock by name. + * clk_get_by_name() - Get/request a clock by name. + * @dev: The client device. + * @name: The name of the clock to request, within the client's list of + * clocks. + * @clk: A pointer to a clock struct to initialize. * * This looks up and requests a clock. The name is relative to the client * device; each device is assumed to have n clocks associated with it somehow, @@ -172,83 +175,71 @@ int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk); * device clock names to provider clocks may be via device-tree properties, * board-provided mapping tables, or some other mechanism. * - * @dev: The client device. - * @name: The name of the clock to request, within the client's list of - * clocks. - * @clock: A pointer to a clock struct to initialize. * Return: 0 if OK, or a negative error code. */ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk); /** * clk_get_by_name_nodev - Get/request a clock by name without a device. - * - * This is a version of clk_get_by_name() that does not use a device. - * * @node: The client ofnode. * @name: The name of the clock to request, within the client's list of * clocks. - * @clock: A pointer to a clock struct to initialize. + * @clk: A pointer to a clock struct to initialize. + * * Return: 0 if OK, or a negative error code. */ int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk); /** - * clk_get_optional_nodev - Get/request an optinonal clock by name - * without a device. - * @node: The client ofnode. - * @name: The name of the clock to request. - * @name: The name of the clock to request, within the client's list of - * clocks. - * @clock: A pointer to a clock struct to initialize. - * - * Behaves the same as clk_get_by_name_nodev() except where there is - * no clock producer, in this case, skip the error number -ENODATA, and - * the function returns 0. - */ -int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk); - -/** - * devm_clk_get - lookup and obtain a managed reference to a clock producer. + * devm_clk_get() - lookup and obtain a managed reference to a clock producer. * @dev: device for clock "consumer" * @id: clock consumer ID * - * Returns a struct clk corresponding to the clock producer, or - * valid IS_ERR() condition containing errno. The implementation - * uses @dev and @id to determine the clock consumer, and thereby - * the clock producer. (IOW, @id may be identical strings, but - * clk_get may return different clock producers depending on @dev.) + * The implementation uses @dev and @id to determine the clock consumer, and + * thereby the clock producer. (IOW, @id may be identical strings, but clk_get + * may return different clock producers depending on @dev.) * * Drivers must assume that the clock source is not enabled. * - * devm_clk_get should not be called from within interrupt context. - * * The clock will automatically be freed when the device is unbound * from the bus. + * + * Return: + * a struct clk corresponding to the clock producer, or + * valid IS_ERR() condition containing errno */ struct clk *devm_clk_get(struct udevice *dev, const char *id); /** - * devm_clk_get_optional - lookup and obtain a managed reference to an optional - * clock producer. + * devm_clk_get_optional() - lookup and obtain a managed reference to an + * optional clock producer. * @dev: device for clock "consumer" * @id: clock consumer ID * * Behaves the same as devm_clk_get() except where there is no clock producer. - * In this case, instead of returning -ENOENT, the function returns NULL. + * In this case, instead of returning -%ENOENT, the function returns NULL. */ -struct clk *devm_clk_get_optional(struct udevice *dev, const char *id); +static inline struct clk *devm_clk_get_optional(struct udevice *dev, + const char *id) +{ + struct clk *clk = devm_clk_get(dev, id); + + if (PTR_ERR(clk) == -ENODATA) + return NULL; + + return clk; +} /** * clk_release_all() - Disable (turn off)/Free an array of previously * requested clocks. + * @clk: A clock struct array that was previously successfully + * requested by clk_request/get_by_*(). + * @count: Number of clock contained in the array * * For each clock contained in the clock array, this function will check if * clock has been previously requested and then will disable and free it. * - * @clk: A clock struct array that was previously successfully - * requested by clk_request/get_by_*(). - * @count Number of clock contained in the array * Return: zero on success, or -ve error code. */ int clk_release_all(struct clk *clk, int count); @@ -290,17 +281,59 @@ clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk) return -ENOSYS; } -static inline int -clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk) +static inline int clk_release_all(struct clk *clk, int count) { return -ENOSYS; } +#endif -static inline int clk_release_all(struct clk *clk, int count) +/** + * clk_get_by_name_optional() - Get/request a optional clock by name. + * @dev: The client device. + * @name: The name of the clock to request, within the client's list of + * clocks. + * @clk: A pointer to a clock struct to initialize. + * + * Behaves the same as clk_get_by_name(), except when there is no clock + * provider. In the latter case, return 0. + * + * Return: 0 if OK, or a negative error code. + */ +static inline int clk_get_by_name_optional(struct udevice *dev, + const char *name, struct clk *clk) { - return -ENOSYS; + int ret; + + ret = clk_get_by_name(dev, name, clk); + if (ret == -ENODATA) + return 0; + + return ret; +} + +/** + * clk_get_by_name_nodev_optional - Get/request an optinonal clock by name + * without a device. + * @node: The client ofnode. + * @name: The name of the clock to request, within the client's list of + * clocks. + * @clk: A pointer to a clock struct to initialize. + * + * Behaves the same as clk_get_by_name_nodev() except where there is + * no clock producer, in this case, skip the error number -%ENODATA, and + * the function returns 0. + */ +static inline int clk_get_by_name_nodev_optional(ofnode node, const char *name, + struct clk *clk) +{ + int ret; + + ret = clk_get_by_name_nodev(node, name, clk); + if (ret == -ENODATA) + return 0; + + return ret; } -#endif /** * enum clk_defaults_stage - What stage clk_set_defaults() is called at @@ -327,12 +360,13 @@ enum clk_defaults_stage { #if CONFIG_IS_ENABLED(OF_REAL) && CONFIG_IS_ENABLED(CLK) /** - * clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}' + * clk_set_defaults - Process ``assigned-{clocks/clock-parents/clock-rates}`` * properties to configure clocks - * * @dev: A device to process (the ofnode associated with this device * will be processed). * @stage: The stage of the probing process this function is called during. + * + * Return: zero on success, or -ve error code. */ int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage); #else @@ -345,12 +379,12 @@ static inline int clk_set_defaults(struct udevice *dev, int stage) /** * clk_release_bulk() - Disable (turn off)/Free an array of previously * requested clocks in a clock bulk struct. + * @bulk: A clock bulk struct that was previously successfully + * requested by clk_get_bulk(). * * For each clock contained in the clock bulk struct, this function will check * if clock has been previously requested and then will disable and free it. * - * @clk: A clock bulk struct that was previously successfully - * requested by clk_get_bulk(). * Return: zero on success, or -ve error code. */ static inline int clk_release_bulk(struct clk_bulk *bulk) @@ -360,35 +394,35 @@ static inline int clk_release_bulk(struct clk_bulk *bulk) #if CONFIG_IS_ENABLED(CLK) /** - * clk_request - Request a clock by provider-specific ID. + * clk_request() - Request a clock by provider-specific ID. + * @dev: The clock provider device. + * @clk: A pointer to a clock struct to initialize. The caller must + * have already initialized any field in this struct which the + * clock provider uses to identify the clock. * * This requests a clock using a provider-specific ID. Generally, this function * should not be used, since clk_get_by_index/name() provide an interface that * better separates clients from intimate knowledge of clock providers. * However, this function may be useful in core SoC-specific code. * - * @dev: The clock provider device. - * @clock: A pointer to a clock struct to initialize. The caller must - * have already initialized any field in this struct which the - * clock provider uses to identify the clock. * Return: 0 if OK, or a negative error code. */ int clk_request(struct udevice *dev, struct clk *clk); /** - * clk_free - Free a previously requested clock. - * - * @clock: A clock struct that was previously successfully requested by + * clk_free() - Free a previously requested clock. + * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: 0 if OK, or a negative error code. */ int clk_free(struct clk *clk); /** * clk_get_rate() - Get current clock rate. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: clock rate in Hz on success, 0 for invalid clock, or -ve error code * for other errors. */ @@ -396,98 +430,98 @@ ulong clk_get_rate(struct clk *clk); /** * clk_get_parent() - Get current clock's parent. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: pointer to parent's struct clk, or error code passed as pointer */ struct clk *clk_get_parent(struct clk *clk); /** * clk_get_parent_rate() - Get parent of current clock rate. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: clock rate in Hz, or -ve error code. */ long long clk_get_parent_rate(struct clk *clk); /** * clk_round_rate() - Adjust a rate to the exact rate a clock can provide + * @clk: A clock struct that was previously successfully requested by + * clk_request/get_by_*(). + * @rate: desired clock rate in Hz. * * This answers the question "if I were to pass @rate to clk_set_rate(), * what clock rate would I end up with?" without changing the hardware - * in any way. In other words: + * in any way. In other words:: * * rate = clk_round_rate(clk, r); * - * and: + * and:: * * rate = clk_set_rate(clk, r); * * are equivalent except the former does not modify the clock hardware * in any way. * - * @clk: A clock struct that was previously successfully requested by - * clk_request/get_by_*(). - * @rate: desired clock rate in Hz. * Return: rounded rate in Hz, or -ve error code. */ ulong clk_round_rate(struct clk *clk, ulong rate); /** * clk_set_rate() - Set current clock rate. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). * @rate: New clock rate in Hz. + * * Return: new rate, or -ve error code. */ ulong clk_set_rate(struct clk *clk, ulong rate); /** * clk_set_parent() - Set current clock parent. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). * @parent: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: new rate, or -ve error code. */ int clk_set_parent(struct clk *clk, struct clk *parent); /** * clk_enable() - Enable (turn on) a clock. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: zero on success, or -ve error code. */ int clk_enable(struct clk *clk); /** * clk_enable_bulk() - Enable (turn on) all clocks in a clock bulk struct. - * * @bulk: A clock bulk struct that was previously successfully requested * by clk_get_bulk(). + * * Return: zero on success, or -ve error code. */ int clk_enable_bulk(struct clk_bulk *bulk); /** * clk_disable() - Disable (turn off) a clock. - * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). + * * Return: zero on success, or -ve error code. */ int clk_disable(struct clk *clk); /** * clk_disable_bulk() - Disable (turn off) all clocks in a clock bulk struct. - * * @bulk: A clock bulk struct that was previously successfully requested * by clk_get_bulk(). + * * Return: zero on success, or -ve error code. */ int clk_disable_bulk(struct clk_bulk *bulk); @@ -497,28 +531,25 @@ int clk_disable_bulk(struct clk_bulk *bulk); * @p: clk compared against q * @q: clk compared against p * - * Returns true if the two struct clk pointers both point to the same hardware - * clock node. - * - * Returns false otherwise. Note that two NULL clks are treated as matching. + * Return: + * %true if the two struct clk pointers both point to the same hardware clock + * node, and %false otherwise. Note that two %NULL clks are treated as matching. */ bool clk_is_match(const struct clk *p, const struct clk *q); /** * clk_get_by_id() - Get the clock by its ID - * * @id: The clock ID to search for - * * @clkp: A pointer to clock struct that has been found among added clocks * to UCLASS_CLK + * * Return: zero on success, or -ENOENT on error */ int clk_get_by_id(ulong id, struct clk **clkp); /** * clk_dev_binded() - Check whether the clk has a device binded - * - * @clk A pointer to the clk + * @clk: A pointer to the clk * * Return: true on binded, or false on no */ @@ -604,8 +635,8 @@ static inline bool clk_dev_binded(struct clk *clk) /** * clk_valid() - check if clk is valid - * * @clk: the clock to check + * * Return: true if valid, or false */ static inline bool clk_valid(struct clk *clk) diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 04ce88c9dd9..3b4d1fd6265 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -47,13 +47,4 @@ CONFIG_SYS_SDRAM_SIZE - \ CONFIG_SYS_MONITOR_LEN) -/* - * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above - * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the - * reset address, no? This will keep the environment in user region - * of flash. NOTE: the monitor length must be multiple of sector size - * (which is common practice). - */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index e12e54fe4fb..763cb8db7cf 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -47,13 +47,4 @@ CONFIG_SYS_SDRAM_SIZE - \ CONFIG_SYS_MONITOR_LEN) -/* - * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above - * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the - * reset address, no? This will keep the environment in user region - * of flash. NOTE: the monitor length must be multiple of sector size - * (which is common practice). - */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 6ba5c525431..c27f0a5a2d7 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -23,21 +23,8 @@ #ifdef CONFIG_IDE /* ATA */ -# define CONFIG_IDE_RESET 1 # define CONFIG_IDE_PREINIT 1 -# define CONFIG_ATAPI # undef CONFIG_LBA48 - -# define CONFIG_SYS_IDE_MAXBUS 1 -# define CONFIG_SYS_IDE_MAXDEVICE 2 - -# define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800) -# define CONFIG_SYS_ATA_IDE0_OFFSET 0 - -# define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */ -# define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */ -# define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ -# define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ #endif #define CONFIG_DRIVER_DM9000 diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 977d96a5a76..538d9c21978 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -275,7 +275,6 @@ /* * SATA */ -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1_OFFSET 0x18000 #define CONFIG_SYS_SATA1 (CONFIG_SYS_IMMR + CONFIG_SYS_SATA1_OFFSET) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 23b9969f84b..106d1e6a4b7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -544,7 +544,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index ceaed464fe0..e6d5321070b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -349,7 +349,6 @@ #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index ed88b418441..8a0c7039f66 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -11,7 +11,6 @@ #define CONFIG_PCIE3 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 #define CONFIG_SYS_SRIO diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f60010f7876..9433f14227b 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -438,7 +438,6 @@ /* SATA */ #define CONFIG_FSL_SATA_V2 #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index f0bdcbae630..a41f9f0d9b8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -488,7 +488,6 @@ * SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 86dc5bfe82a..7165ba08283 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -443,7 +443,6 @@ * SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6923774a16f..daccd816c10 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -180,7 +180,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA @@ -466,7 +465,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 956844414f8..ff0498acdec 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -48,13 +48,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* * Default to using SPI for environment, etc. * 0x000000 - 0x040000 : QSPI.SPL (256KiB) diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index c2b0d6ff3e6..c87bcd475ef 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -9,8 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index 402fed1bba3..8a6f294ae89 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -10,8 +10,6 @@ #include <linux/sizes.h> #include <linux/stringify.h> -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c165f618be9..bbdcab29d8f 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -108,10 +108,6 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd ; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \ diff --git a/include/configs/apple.h b/include/configs/apple.h index 3e5fb495f1a..b06660add4f 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -5,13 +5,15 @@ /* Environment */ #define ENV_DEVICE_SETTINGS \ - "stdin=serial,usbkbd\0" \ + "stdin=serial,usbkbd,spikbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define ENV_MEM_LAYOUT_SETTINGS \ - "fdt_addr_r=0x960100000\0" \ - "kernel_addr_r=0x960200000\0" +#if CONFIG_IS_ENABLED(CMD_NVME) + #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) +#else + #define BOOT_TARGET_NVME(func) +#endif #if CONFIG_IS_ENABLED(CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) @@ -20,13 +22,13 @@ #endif #define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_NVME(func) \ BOOT_TARGET_USB(func) #include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ ENV_DEVICE_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 1cde5f77f22..70689a6f0fd 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -32,8 +32,6 @@ #define CONFIG_FACTORYSET -#define CONFIG_REMAKE_ELF - /* ENET Config */ #define CONFIG_FEC_XCV_TYPE RMII diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index d5549f62cee..ce36b2e3eae 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -28,8 +28,6 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif -#define CONFIG_REMAKE_ELF - /* Flat Device Tree Definitions */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index c9af5a40cec..871e87c26d0 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -35,15 +35,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* SATA support */ -#ifdef CONFIG_SCSI -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) -#endif - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 40bc8215480..c19aaaccb10 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -160,7 +160,6 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ /* SATA */ -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 787fe33941b..91f0f953a12 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -140,8 +140,9 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* environment organization */ - -/* Environment in eMMC, before config block at the end of 1st "boot sector" */ +#if defined(CONFIG_ENV_IS_IN_NAND) +#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) +#endif #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 01182505cc8..008fa6ef076 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -10,8 +10,6 @@ #include <linux/sizes.h> #include <linux/stringify.h> -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index c8e733bc366..1dbc77dde1c 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -92,10 +92,6 @@ #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index faf27ba4fa3..92e24ea8c61 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -180,6 +180,11 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* environment organization */ +#if defined(CONFIG_ENV_IS_IN_NAND) +#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE) +#endif + #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/comtrend_ar5315u.h b/include/configs/comtrend_ar5315u.h index 9f4b4e28045..7bfc8bbe368 100644 --- a/include/configs/comtrend_ar5315u.h +++ b/include/configs/comtrend_ar5315u.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6318.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/comtrend_ar5387un.h b/include/configs/comtrend_ar5387un.h index 888a6d89859..36d6a7f88ae 100644 --- a/include/configs/comtrend_ar5387un.h +++ b/include/configs/comtrend_ar5387un.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6328.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h index 10e29699480..1ac107599d7 100644 --- a/include/configs/comtrend_ct5361.h +++ b/include/configs/comtrend_ct5361.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6348.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index ee29f702f8f..a46b3946bf5 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -6,8 +6,6 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm63268.h> -#define CONFIG_REMAKE_ELF - #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h index f786c465bac..d9d31289d7d 100644 --- a/include/configs/comtrend_wap5813n.h +++ b/include/configs/comtrend_wap5813n.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6368.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index ff385d9c6be..7fb96e8ad59 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -18,15 +18,6 @@ * U-Boot into it. */ -/* - * SATA/SCSI/AHCI configuration - */ -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* Environment in SPI NOR flash */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index d6d679fd7dd..23c493b2582 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -22,14 +22,5 @@ "stderr=serial,vidconsole\0" /* ATA/IDE support */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 4 -#define CONFIG_SYS_ATA_BASE_ADDR 0 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0 -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 -#define CONFIG_ATAPI #endif /* __CONFIG_H */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 6d272c6d880..bd264122da7 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -347,7 +347,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 5f2611995d3..8dc73e8b1cc 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -13,15 +13,6 @@ /* I2C */ #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE -/* - * SATA/SCSI/AHCI configuration - */ -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* Environment in SPI NOR flash */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 449a56753b1..7baae3b090d 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -28,7 +28,6 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* SATA support */ -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 /* PCIe support */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 8b8cd4c31b4..72843c942ce 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -32,9 +32,9 @@ /* FEC ethernet */ #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_MXC_PHYADDR 7 #define CONFIG_ARP_TIMEOUT 200UL /* MMC Configs */ @@ -75,6 +75,10 @@ "ramdisk_addr_r=0x18000000\0" \ "scriptaddr=0x14000000\0" \ "fdtfile=imx6q-dhcom-pdk2.dtb\0"\ + "update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \ + "load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\ + "sf probe && sf erase 0x0 0xa0000 && " \ + "sf write ${loadaddr} 0x400 ${filesize}\0" \ BOOTENV #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 0ad04eee1b7..736c724736c 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu> * * Based on sheevaplug.h originally written by @@ -18,21 +19,13 @@ #include "mv-common.h" /* - * Environment variables configurations - */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* * Default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "initrd=/boot/uInitrd\0" \ "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" @@ -40,13 +33,10 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - -/* - * File system - */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* _CONFIG_DOCKSTAR_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index aec30c461de..711e37cb9bd 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -74,9 +74,6 @@ /* SPI SPL */ -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT - /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 624f611c8ba..9f765fa4937 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -12,7 +12,6 @@ #include <asm/arch/sysmap-apq8016.h> /* Build new ELF image from u-boot.bin (U-Boot + appended DTB) */ -#define CONFIG_REMAKE_ELF /* Physical Memory Map */ #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index beea234d8dc..fd12a391875 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2011 - * Jason Cooper <u-boot@lakedaemon.net> + * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com> + * (C) Copyright 2011 Jason Cooper <u-boot@lakedaemon.net> * * Based on work by: * Marvell Semiconductor <www.marvell.com> @@ -14,15 +14,6 @@ #include "mv-common.h" /* - * Environment variables configurations - */ - -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* * Default environment variables */ @@ -36,17 +27,15 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif /* * SATA Driver configuration */ -#ifdef CONFIG_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/durian.h b/include/configs/durian.h index c0ea42e180a..f0789d5fb3a 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -18,13 +18,6 @@ /* PCI CONFIG */ #define CONFIG_PCI_SCAN_SHOW -/* SCSI */ -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE 128 -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SATA_MAX_DEVICE 4 - /* BOOT */ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 90e387e6c5e..a599722ae3b 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -110,20 +110,12 @@ #ifdef CONFIG_IDE #define __io /* Data, registers and alternate blocks are at the same offset */ -#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) -#define CONFIG_SYS_ATA_REG_OFFSET (0x0100) -#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) /* Each 8-bit ATA register is aligned to a 4-bytes address */ -#define CONFIG_SYS_ATA_STRIDE 4 /* Controller supports 48-bits LBA addressing */ #define CONFIG_LBA48 /* A single bus, a single device */ -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* ATA registers base is at SATA controller base */ -#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE /* ATA bus 0 is orion5x port 1 on ED Mini V2 */ -#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET /* end of IDE defines */ #endif /* CMD_IDE */ diff --git a/include/configs/efi-x86_payload.h b/include/configs/efi-x86_payload.h index 1cf5c037e85..59fad4c15db 100644 --- a/include/configs/efi-x86_payload.h +++ b/include/configs/efi-x86_payload.h @@ -19,14 +19,5 @@ "stderr=serial,vidconsole\0" /* ATA/IDE support */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 4 -#define CONFIG_SYS_ATA_BASE_ADDR 0 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0 -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 -#define CONFIG_ATAPI #endif /* __CONFIG_H */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index bde14a7b3da..402c5bfacbe 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -21,7 +21,6 @@ /* SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index c2795792683..51e671a9517 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -48,7 +48,6 @@ #endif /* SATA driver configuration */ -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 #endif /* _CONFIG_GOFLEXHOME_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 2853d75a163..668d00cbc0e 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -41,7 +41,6 @@ * SATA Configs */ #ifdef CONFIG_CMD_SATA - #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 @@ -104,7 +103,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ "splashpos=m,m\0" \ - "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \ + "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \ "bootdevs=usb mmc sata flash\0" \ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index de1ebbf3751..151ab66f4c3 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -35,15 +35,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* SATA support */ -#ifdef CONFIG_SCSI -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) -#endif - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 4ef3a46cfb9..55c874bf619 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -16,12 +16,6 @@ #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 387971c687b..c5f9bcea8e7 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -15,8 +15,6 @@ #define CONFIG_POWER_HI6553 -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Physical Memory Map */ diff --git a/include/configs/huawei_hg556a.h b/include/configs/huawei_hg556a.h index 7c88af0532d..5400d1256ee 100644 --- a/include/configs/huawei_hg556a.h +++ b/include/configs/huawei_hg556a.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6358.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 9783fd89ec0..2598deaac6e 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -40,8 +40,6 @@ */ #ifdef CONFIG_IDE #define __io -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET #endif /* CONFIG_IDE */ #endif /* _CONFIG_IB62x0_H */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index f1aad1efde6..44a4b4409f9 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * (C) Copyright 2009-2012 * Wojciech Dubowik <wojciech.dubowik@neratec.com> * Luka Perkov <luka@openwrt.org> @@ -10,32 +11,24 @@ #include "mv-common.h" -/* - * Environment variables configuration - */ - -/* - * Default environment variables - */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" /* * Ethernet driver configuration + * + * This board has PCIe Wifi card, so allow Ethernet to be disabled */ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 11 -#undef CONFIG_RESET_PHY_R +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* CONFIG_CMD_NET */ -/* - * File system - */ - #endif /* _CONFIG_ICONNECT_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 991839c0bcd..7e6be6050c0 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -72,8 +72,7 @@ "fdt_addr=0x43000000\0" \ "fdt_addr_r=0x43000000\0" \ "boot_fit=no\0" \ - "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \ - "u-boot-itb raw 0x300 0x1B00 mmcpart 1\0" \ + "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \ "fdt_file=sb-iotgimx8.dtb\0" \ "fdtfile=sb-iotgimx8.dtb\0" \ "initrd_addr=0x43800000\0" \ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 7ab11cc8fb1..d9a86a62ed0 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -34,8 +34,6 @@ "ramdisk_addr_r=0x46400000\0" \ "scriptaddr=0x46000000\0" -/* Link Definitions */ - /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ @@ -54,8 +52,6 @@ MEM_LAYOUT_ENV_SETTINGS \ "script=boot.scr\0" \ "bootm_size=0x10000000\0" \ - "ipaddr=192.168.1.22\0" \ - "serverip=192.168.1.146\0" \ "dev=2\0" \ "preboot=gsc wd-disable\0" \ "console=ttymxc1,115200\0" \ @@ -109,6 +105,5 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC -#define IMX_FEC_BASE 0x30BE0000 #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 28435359739..e2e322bb4d3 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -29,8 +29,6 @@ #endif /* CONFIG_SPL_BUILD */ -#define CONFIG_REMAKE_ELF - /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h new file mode 100644 index 00000000000..1e800f0ecc0 --- /dev/null +++ b/include/configs/imx8mn_var_som.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 Collabora Ltd. + */ + +#ifndef __IMX8MN_VAR_SOM_H +#define __IMX8MN_VAR_SOM_H + +#include <linux/sizes.h> +#include <linux/stringify.h> +#include <asm/arch/imx-regs.h> + +#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) + +#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#define CONFIG_SPL_STACK 0x980000 +#define CONFIG_SPL_BSS_START_ADDR 0x950000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(MMC, mmc, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) \ + +#include <config_distro_bootcmd.h> + +/* ENET */ +#if defined(CONFIG_FEC_MXC) +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_XCV_TYPE RGMII +#endif /* CONFIG_FEC_MXC */ + +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "ramdisk_addr_r=0x43800000\0" \ + "fdt_addr_r=0x43000000\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fastboot_partition_alias_all=" \ + __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".0:0\0" \ + "fastboot_partition_alias_bootloader=" \ + __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".1:0\0" \ + "emmc_dev=" __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) "\0" \ + "emmc_ack=1\0" \ + "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + BOOTENV + +/* Link Definitions */ + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ + +#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE SZ_2K +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* USDHC */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +/* I2C */ +#define CONFIG_SYS_I2C_SPEED 400000 + +#endif /* __IMX8MN_VAR_SOM_H */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h new file mode 100644 index 00000000000..e7bfcd70af2 --- /dev/null +++ b/include/configs/imx8mn_venice.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 Gateworks Corporation + */ + +#ifndef __IMX8MM_VENICE_H +#define __IMX8MM_VENICE_H + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> + +#define CONFIG_SPL_MAX_SIZE (148 * 1024) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_STACK 0x980000 +#define CONFIG_SPL_BSS_START_ADDR 0x950000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ + +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +#endif + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x44000000\0" \ + "kernel_addr_r=0x42000000\0" \ + "ramdisk_addr_r=0x46400000\0" \ + "scriptaddr=0x46000000\0" + +/* Enable Distro Boot */ +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#undef CONFIG_ISO_PARTITION +#else +#define BOOTENV +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ + "script=boot.scr\0" \ + "bootm_size=0x10000000\0" \ + "dev=2\0" \ + "preboot=gsc wd-disable\0" \ + "console=ttymxc1,115200\0" \ + "update_firmware=" \ + "tftpboot $loadaddr $image && " \ + "setexpr blkcnt $filesize + 0x1ff && " \ + "setexpr blkcnt $blkcnt / 0x200 && " \ + "mmc dev $dev && " \ + "mmc write $loadaddr 0x40 $blkcnt\0" \ + "boot_net=" \ + "tftpboot $kernel_addr_r $image && " \ + "booti $kernel_addr_r - $fdtcontroladdr\0" \ + "update_rootfs=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \ + "update_all=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize\0" \ + "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0" + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* SDRAM configuration */ +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE SZ_1G +#define CONFIG_SYS_BOOTM_LEN SZ_256M + +/* UART */ +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE SZ_2K +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* USDHC */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +/* FEC */ +#define CONFIG_ETHPRIME "eth0" +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC + +#endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h new file mode 100644 index 00000000000..ac4a7d0cb30 --- /dev/null +++ b/include/configs/imx8mp_rsb3720.h @@ -0,0 +1,223 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + * Copyright 2022 Linaro + */ + +#ifndef __IMX8MP_RSB3720_H +#define __IMX8MP_RSB3720_H + +#include <linux/sizes.h> +#include <linux/stringify.h> +#include <asm/arch/imx-regs.h> +#include <config_distro_bootcmd.h> + +#define CONFIG_HAS_ETH1 + +#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) + +#define CONFIG_SPL_MAX_SIZE (152 * 1024) +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x960000 +#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 +#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ + +#define CONFIG_MALLOC_F_ADDR 0x184000 /* malloc f used before \ + * GD_FLG_FULL_MALLOC_INIT \ + * set \ + */ + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#if defined(CONFIG_NAND_BOOT) +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_DMA +#define CONFIG_SPL_NAND_MXS +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_IDENT +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of \ + * first 64MB boot area \ + */ + +/* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full + * boot image (not only FIT part) to the mtdpart, so we check both two offsets + */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ + (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) + +#endif + +#endif + +#define CONFIG_REMAKE_ELF +/* ENET Config */ +/* ENET1 */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_ETHPRIME "eth1" /* Set eqos to primary since we use its MDIO */ + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 4 +#define FEC_QUIRK_ENET_MAC + +#define DWC_NET_PHYADDR 4 +#ifdef CONFIG_DWC_ETH_QOS +#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ +#endif + +#define PHY_ANEG_TIMEOUT 20000 + +#endif + +#if CONFIG_IS_ENABLED(CMD_MMC) +# define BOOT_TARGET_MMC(func) \ + func(MMC, mmc, 2) \ + func(MMC, mmc, 1) +#else +# define BOOT_TARGET_MMC(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_PXE) +# define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +# define BOOT_TARGET_PXE(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) +# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +# define BOOT_TARGET_DHCP(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + "script=boot.scr\0" \ + "image=Image\0" \ + "splashimage=0x50000000\0" \ + "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ + "fdt_addr=0x43000000\0" \ + "fdt_addr_r=0x43000000\0" \ + "boot_fit=no\0" \ + "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "initrd_addr=0x43800000\0" \ + "bootm_size=0x10000000\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcpart=1\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "kernel_addr_r=0x40480000\0" \ + "pxefile_addr_r=0x40480000\0" \ + "ramdisk_addr_r=0x43800000\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ + "bootm ${loadaddr}; " \ + "else " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi;\0" \ + "netargs=setenv bootargs ${jh_clk} console=${console} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ + "bootm ${loadaddr}; " \ + "else " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi;\0" + +/* Link Definitions */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + +/* Totally 6GB or 4G DDR */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G) +#define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ +#define PHYS_SDRAM_2 0x100000000 +#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ +#elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G) +#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GB */ +#define PHYS_SDRAM_2 0xC0000000 +#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ +#endif + +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_IMX_BOOTAUX + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#ifdef CONFIG_FSL_FSPI +#define FSL_FSPI_FLASH_SIZE SZ_32M +#define FSL_FSPI_FLASH_NUM 1 +#define FSPI0_BASE_ADDR 0x30bb0000 +#define FSPI0_AMBA_BASE 0x0 +#define CONFIG_FSPI_QUAD_SUPPORT + +#define CONFIG_SYS_FSL_FSPI_AHB +#endif + +#ifdef CONFIG_NAND_MXS + +/* NAND stuff */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#endif /* CONFIG_NAND_MXS */ + +#define CONFIG_SYS_I2C_SPEED 100000 + +#endif /* __IMX8MP_RSB3720_H */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index b099004937d..d3cf7ab0a7d 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -30,8 +30,6 @@ #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 6e1d387e2b1..4aaed3ae7da 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -35,8 +35,6 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) @@ -61,13 +59,13 @@ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "scriptaddr=0x43500000\0" \ - "kernel_addr_r=0x40880000\0" \ + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "image=Image\0" \ "console=ttymxc0,115200\0" \ - "fdt_addr=0x43000000\0" \ + "fdt_addr_r=0x43000000\0" \ "boot_fdt=try\0" \ - "fdt_file=imx8mq-evk.dtb\0" \ + "fdtfile=imx8mq-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ "mmcpart=1\0" \ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 1668ca8acf3..16a2c2cf9d5 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -29,8 +29,6 @@ #undef CONFIG_DM_MMC #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 884d741789f..c12f383655b 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -29,8 +29,6 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 1a553510f6d..5fcc96325ad 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_REMAKE_ELF #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -21,6 +20,8 @@ #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 +#define CONFIG_SYS_BOOTM_LEN SZ_64M + /* FUSE command */ /* Boot M4 */ @@ -59,7 +60,7 @@ "image=Image\0" \ "panel=NULL\0" \ "console=ttyLP0\0" \ - "fdt_addr=0x83000000\0" \ + "fdt_addr=0x84000000\0" \ "boot_fdt=try\0" \ "fdt_file=imx8qm-rom7720-a1.dtb\0" \ "initrd_addr=0x83800000\0" \ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 3900ef1b500..b1c51e72bf6 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -27,8 +27,6 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 6b25b485dec..7da6802aa5f 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -27,8 +27,6 @@ #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ #if defined(CONFIG_FEC_MXC) #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index abea7517e8b..e4b167dd219 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -66,6 +66,10 @@ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "findfdt=" \ "setenv name_fdt ${default_device_tree};" \ + "if test $board_name = j721e; then " \ + "setenv name_fdt k3-j721e-common-proc-board.dtb; fi;" \ + "if test $board_name = j721e-eaik || test $board_name = j721e-sk; then " \ + "setenv name_fdt k3-j721e-sk.dtb; fi;" \ "setenv fdtfile ${name_fdt}\0" \ "name_kern=Image\0" \ "console=ttyS2,115200n8\0" \ @@ -119,6 +123,16 @@ /* Set the default list of remote processors to boot */ #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) +#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ + "dorprocboot=1\0" \ + "do_main_cpsw0_qsgmii_phyinit=1\0" \ + "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ + "gpio clear gpio@22_16\0" \ + "main_cpsw0_qsgmii_phyinit=" \ + "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ + "test ${boot} = mmc; then " \ + "run init_main_cpsw0_qsgmii_phy;" \ + "fi;\0" #ifdef DEFAULT_RPROCS #undef DEFAULT_RPROCS #endif @@ -136,15 +150,6 @@ #endif /* CONFIG_TARGET_J721E_A72_EVM */ #ifdef CONFIG_TARGET_J7200_A72_EVM -#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ - "do_main_cpsw0_qsgmii_phyinit=1\0" \ - "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ - "gpio clear gpio@22_16\0" \ - "main_cpsw0_qsgmii_phyinit=" \ - "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ - "test ${boot} = mmc; then " \ - "run init_main_cpsw0_qsgmii_phy;" \ - "fi;\0" #define DEFAULT_RPROCS "" \ "2 /lib/firmware/j7200-main-r5f0_0-fw " \ "3 /lib/firmware/j7200-main-r5f0_1-fw " diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h new file mode 100644 index 00000000000..6fd098c957c --- /dev/null +++ b/include/configs/j721s2_evm.h @@ -0,0 +1,191 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration header file for K3 J721S2 EVM + * + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ + * David Huang <d-huang@ti.com> + */ + +#ifndef __CONFIG_J721S2_EVM_H +#define __CONFIG_J721S2_EVM_H + +#include <linux/sizes.h> +#include <config_distro_bootcmd.h> +#include <environment/ti/mmc.h> +#include <environment/ti/k3_rproc.h> +#include <environment/ti/ufs.h> +#include <environment/ti/k3_dfu.h> + +/* DDR Configuration */ +#define CONFIG_SYS_SDRAM_BASE1 0x880000000 + +/* SPL Loader Configuration */ +#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ + CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) +#define CONFIG_SYS_UBOOT_BASE 0x50280000 +/* Image load address in RAM for DFU boot*/ +#else +#define CONFIG_SYS_UBOOT_BASE 0x50080000 +/* + * Maximum size in memory allocated to the SPL BSS. Keep it as tight as + * possible (to allow the build to go through), as this directly affects + * our memory footprint. The less we use for BSS the more we have available + * for everything else. + */ +#define CONFIG_SPL_BSS_MAX_SIZE 0xA000 +/* + * Link BSS to be within SPL in a dedicated region located near the top of + * the MCU SRAM, this way making it available also before relocation. Note + * that we are not using the actual top of the MCU SRAM as there is a memory + * location filled in by the boot ROM that we want to read out without any + * interference from the C context. + */ +#define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\ + CONFIG_SPL_BSS_MAX_SIZE) +/* Set the stack right below the SPL BSS section */ +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR +/* Configure R5 SPL post-relocation malloc pool in DDR */ +#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M +/* Image load address in RAM for DFU boot*/ +#endif + +#ifdef CONFIG_SYS_K3_SPL_ATF +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" +#endif + +#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE + +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_CQSPI_REF_CLK 133333333 + +/* HyperFlash related configuration */ +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 + +/* U-Boot general configuration */ +#define EXTRA_ENV_J721S2_BOARD_SETTINGS \ + "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "findfdt=" \ + "setenv name_fdt ${default_device_tree};" \ + "setenv fdtfile ${name_fdt}\0" \ + "name_kern=Image\0" \ + "console=ttyS2,115200n8\0" \ + "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \ + "${mtdparts}\0" \ + "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" + +#define PARTS_DEFAULT \ + /* Linux partitions */ \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" + +#ifdef CONFIG_SYS_K3_SPL_ATF +#if defined(CONFIG_TARGET_J721S2_R5_EVM) +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ + "addr_mcur5f0_0load=0x89000000\0" \ + "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" +#elif defined(CONFIG_TARGET_J7200_R5_EVM) +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ + "addr_mcur5f0_0load=0x89000000\0" \ + "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0" +#endif /* CONFIG_TARGET_J721S2_R5_EVM */ +#else +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC "" +#endif /* CONFIG_SYS_K3_SPL_ATF */ + +/* U-Boot MMC-specific configuration */ +#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \ + "boot=mmc\0" \ + "mmcdev=1\0" \ + "bootpart=1:2\0" \ + "bootdir=/boot\0" \ + EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ + "rd_spec=-\0" \ + "init_mmc=run args_all args_mmc\0" \ + "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ + "get_overlay_mmc=" \ + "fdt address ${fdtaddr};" \ + "fdt resize 0x100000;" \ + "for overlay in $name_overlays;" \ + "do;" \ + "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ + "fdt apply ${dtboaddr};" \ + "done;\0" \ + "partitions=" PARTS_DEFAULT \ + "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ + "${bootdir}/${name_kern}\0" \ + "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ + "${bootdir}/${name_fit}\0" \ + "partitions=" PARTS_DEFAULT + +/* Set the default list of remote processors to boot */ +#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) +#ifdef DEFAULT_RPROCS +#undef DEFAULT_RPROCS +#endif +#endif + +#ifdef CONFIG_TARGET_J721S2_A72_EVM +#define DEFAULT_RPROCS "" \ + "2 /lib/firmware/j721s2-main-r5f0_0-fw " \ + "3 /lib/firmware/j721s2-main-r5f0_1-fw " \ + "4 /lib/firmware/j721s2-main-r5f1_0-fw " \ + "5 /lib/firmware/j721s2-main-r5f1_1-fw " \ + "6 /lib/firmware/j721s2-c71_0-fw " \ + "7 /lib/firmware/j721s2-c71_1-fw " +#endif /* CONFIG_TARGET_J721S2_A72_EVM */ + +#ifdef CONFIG_TARGET_J7200_A72_EVM +#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ + "do_main_cpsw0_qsgmii_phyinit=1\0" \ + "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ + "gpio clear gpio@22_16\0" \ + "main_cpsw0_qsgmii_phyinit=" \ + "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ + "test ${boot} = mmc; then " \ + "run init_main_cpsw0_qsgmii_phy;" \ + "fi;\0" +#define DEFAULT_RPROCS "" \ + "2 /lib/firmware/j7200-main-r5f0_0-fw " \ + "3 /lib/firmware/j7200-main-r5f0_1-fw " +#endif /* CONFIG_TARGET_J7200_A72_EVM */ + +#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY +#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY +#endif + +/* set default dfu_bufsiz to 128KB (sector size of OSPI) */ +#define EXTRA_ENV_DFUARGS \ + DFU_ALT_INFO_MMC \ + DFU_ALT_INFO_EMMC \ + DFU_ALT_INFO_RAM \ + DFU_ALT_INFO_OSPI + +#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) +#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#else +#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD +#endif + +/* Incorporate settings into the U-Boot environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ + DEFAULT_FIT_TI_ARGS \ + EXTRA_ENV_J721S2_BOARD_SETTINGS \ + EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \ + EXTRA_ENV_RPROC_SETTINGS \ + EXTRA_ENV_DFUARGS \ + DEFAULT_UFS_TI_ARGS \ + EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \ + EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY + +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +/* MMC ENV related defines */ + +#endif /* __CONFIG_J721S2_EVM_H */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 9d7a9e18d59..8453be84959 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -274,4 +274,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ +#define CONFIG_MISC_INIT_F + #endif diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index d1e87f97d6d..788ae77cd31 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -67,15 +67,20 @@ #define FEC_QUIRK_ENET_MAC -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=0x42000000\0" \ - "fdt_addr_r=0x44000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "pxefile_addr_r=0x46000000\0" \ - "scriptaddr=0x46000000\0" \ + "fdt_addr_r=0x48000000\0" \ + "fdtoverlay_addr_r=0x49000000\0" \ + "ramdisk_addr_r=0x48080000\0" \ + "scriptaddr=0x40000000\0"\ + "pxefile_addr_r=0x40100000\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ "dfu_alt_info=sf 0:0=flash-bin raw 0x400 0x1f0000\0" \ "bootdelay=3\0" \ "hostname=" CONFIG_HOSTNAME "\0" \ + ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif /* __KONTRON_MX8MM_CONFIG_H */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h new file mode 100644 index 00000000000..0f96b905ab6 --- /dev/null +++ b/include/configs/kontron_pitx_imx8m.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __KONTRON_PITX_IMX8M_H +#define __KONTRON_PITX_IMX8M_H + +#include <linux/sizes.h> +#include <linux/stringify.h> +#include <asm/arch/imx-regs.h> + +#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) + +#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) +#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x187FF0 +#define CONFIG_SPL_BSS_START_ADDR 0x00180000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K +#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x182000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + + +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#endif + +#define CONFIG_REMAKE_ELF + +/* ENET1 Config */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC + +#define IMX_FEC_BASE 0x30BE0000 +#define PHY_ANEG_TIMEOUT 20000 + +#endif + +#define ENV_MEM_LAYOUT_SETTINGS \ + "kernel_addr_r=0x40880000\0" \ + "fdt_addr_r=0x43000000\0" \ + "scriptaddr=0x43500000\0" \ + "initrd_addr=0x43800000\0" \ + "pxefile_addr_r=0x43500000\0" \ + "bootm_size=0x10000000\0" \ + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) \ + func(PXE, pxe, 0) + +#include <config_distro_bootcmd.h> + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=Image\0" \ + "console=ttymxc2,115200\0" \ + "boot_fdt=try\0" \ + "fdtfile=freescale/imx8mq-kontron-pitx-imx8m.dtb\0" \ + "dfu_alt_info=mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1\0"\ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV + + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ + +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_OF_SYSTEM_SETUP + +#endif diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 046f1888cb1..0a988e2fadf 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -9,8 +9,6 @@ #include "mv-common.h" /* Remove or override few declarations from mv-common.h */ -#undef CONFIG_SYS_IDE_MAXBUS -#undef CONFIG_SYS_IDE_MAXDEVICE /* * Enable platform initialisation via misc_init_r() function @@ -32,9 +30,6 @@ #define CONFIG_LBA48 #if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \ defined(CONFIG_NET2BIG_V2) -#define CONFIG_SYS_SATA_MAX_DEVICE 2 -#else -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #endif #endif /* CONFIG_SATA */ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index bda4283ef5a..0263bb82893 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -14,15 +14,9 @@ #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA AHCI_BASE_ADDR -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 5d561009c56..f92ff17eeb8 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -31,15 +31,9 @@ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA AHCI_BASE_ADDR -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* I2C */ /* GPIO */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 7b4044fba72..2e5b804a4cb 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -81,18 +81,12 @@ */ /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #ifndef PCI_DEVICE_ID_FREESCALE_AHCI #define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440 #endif #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ PCI_DEVICE_ID_FREESCALE_AHCI} -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* SPI */ /* diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index f47bc739843..a517346c129 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -6,8 +6,6 @@ #ifndef __L1028A_COMMON_H #define __L1028A_COMMON_H -#define CONFIG_REMAKE_ELF - #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> #include <asm/arch/soc.h> diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 8e3bd7790fe..1b4d181310f 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -72,13 +72,8 @@ #endif /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #ifndef SPL_NO_ENV #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 5ce9ebbae93..0770f4e268a 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -57,14 +57,9 @@ #endif /* SATA */ -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 /* Initial environment variables */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 3b4f822ecff..83b95c242f0 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -26,8 +26,6 @@ #define SPL_NO_IFC #endif -#define CONFIG_REMAKE_ELF - #include <asm/arch/stream_id_lsch2.h> #include <asm/arch/config.h> diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 5f9cb97855a..ea6831bb827 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -46,7 +46,6 @@ #endif /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID @@ -54,11 +53,6 @@ #define CONFIG_SYS_SATA AHCI_BASE_ADDR -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* * IFC Definitions */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 6d9cbc8c7df..31b578ae33b 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -234,10 +234,6 @@ /* SATA */ #ifndef SPL_NO_SATA -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 2 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index d07d27d1f5c..7552610e035 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -26,8 +26,6 @@ #define SPL_NO_IFC #endif -#define CONFIG_REMAKE_ELF - #include <asm/arch/config.h> #include <asm/arch/stream_id_lsch2.h> @@ -124,14 +122,7 @@ /* SATA */ #ifndef SPL_NO_SATA -#define CONFIG_SCSI_AHCI_PLAT - #define CONFIG_SYS_SATA AHCI_BASE_ADDR - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #endif /* FMan ucode */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 2e52108c23e..33b70c8d8f6 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -20,8 +20,6 @@ #undef CONFIG_DISPLAY_CPUINFO #endif -#define CONFIG_REMAKE_ELF - #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> #include <asm/arch/soc.h> @@ -130,13 +128,7 @@ unsigned long long get_qixis_addr(void); /* SATA */ #ifdef CONFIG_SCSI -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #endif /* Physical Memory Map */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index eea6ce53db5..f2725af0534 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -7,8 +7,6 @@ #ifndef __LS2_COMMON_H #define __LS2_COMMON_H -#define CONFIG_REMAKE_ELF - #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 07cf59fcb8f..7554de1f6d3 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -33,16 +33,10 @@ #endif /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 #define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 6d8effea744..1c05b086778 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -43,16 +43,10 @@ #endif /* SATA */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 #define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index e8e02e7f7b8..7fa4f00734c 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -96,7 +96,6 @@ #endif /* CONFIG_CMD_NET */ #ifdef CONFIG_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_SYS_64BIT_LBA #define CONFIG_LBA48 #endif diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index e285109cbba..4f4b5713dc7 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -10,7 +10,6 @@ #include <asm/arch/config.h> #include <asm/arch/soc.h> -#define CONFIG_REMAKE_ELF #define CONFIG_FSL_MEMAC #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE @@ -110,13 +109,8 @@ /* SATA */ #ifdef CONFIG_SCSI -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 #define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #endif /* USB */ @@ -250,12 +244,36 @@ "run distro_bootcmd;run sd2_bootcmd;" \ "env exists secureboot && esbc_halt;" +#ifdef CONFIG_CMD_USB +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#ifdef CONFIG_MMC +#define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance) +#else +#define BOOT_TARGET_DEVICES_MMC(func) +#endif + +#ifdef CONFIG_SCSI +#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) +#else +#define BOOT_TARGET_DEVICES_SCSI(func) +#endif + +#ifdef CONFIG_CMD_DHCP +#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DEVICES_DHCP(func) +#endif + #define BOOT_TARGET_DEVICES(func) \ - func(USB, usb, 0) \ - func(MMC, mmc, 0) \ - func(MMC, mmc, 1) \ - func(SCSI, scsi, 0) \ - func(DHCP, dhcp, na) + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_MMC(func, 0) \ + BOOT_TARGET_DEVICES_MMC(func, 1) \ + BOOT_TARGET_DEVICES_SCSI(func) \ + BOOT_TARGET_DEVICES_DHCP(func) #include <config_distro_bootcmd.h> #endif /* __LX2_COMMON_H */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 4a1d959d17c..8486cf8fc6e 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -99,7 +99,6 @@ * SATA */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/malta.h b/include/configs/malta.h index 61860ee6942..6d150fd557c 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -63,12 +63,6 @@ /* * IDE/ATA */ -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 2 -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 /* * Commands diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 44f2967fc6b..196e58ed9a3 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -29,7 +29,6 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_REMAKE_ELF #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index ca749ed18ac..fd5a9cf8b8e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,9 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -/* MicroBlaze CPU */ -#define MICROBLAZE_V5 1 - #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* uart */ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index e7f7e772fc7..fd9ce344dbd 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -51,15 +51,9 @@ /* * SATA/SCSI/AHCI configuration */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index ac0fdddbd94..44bba6555cb 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -46,15 +46,9 @@ /* * SATA/SCSI/AHCI configuration */ -#define CONFIG_SCSI_AHCI_PLAT #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* * PCI configuration */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 92140df4be1..01ed221873a 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -125,7 +125,6 @@ #define CONFIG_BOARD_SIZE_LIMIT 785408 #ifdef CONFIG_CMD_SATA - #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 7d3e651f44d..1c25857296c 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -18,7 +18,6 @@ /* SATA Configuration */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 8c4d94215b9..75f5cf0b6de 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -11,6 +11,10 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> +#ifdef CONFIG_SPL +#include "imx7ulp_spl.h" +#endif + #define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 @@ -67,5 +71,7 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +#define CONFIG_ARMV7_SECURE_BASE 0x2F000000 + #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/netgear_dgnd3700v2.h b/include/configs/netgear_dgnd3700v2.h index f14316c8456..c1508059ce6 100644 --- a/include/configs/netgear_dgnd3700v2.h +++ b/include/configs/netgear_dgnd3700v2.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6362.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 1a1c08bd308..678b433cd7b 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -23,7 +23,6 @@ * SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index adfc055a2c9..9be64c3d3f8 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -77,21 +77,10 @@ #define VIDEO_FB_16BPP_PIXEL_SWAP #define VIDEO_FB_16BPP_WORD_SWAP -/* functions for cfb_console */ -#define VIDEO_KBD_INIT_FCT rx51_kp_init() -#define VIDEO_TSTC_FCT rx51_kp_tstc -#define VIDEO_GETC_FCT rx51_kp_getc -#ifndef __ASSEMBLY__ -struct stdio_dev; -int rx51_kp_init(void); -int rx51_kp_tstc(struct stdio_dev *sdev); -int rx51_kp_getc(struct stdio_dev *sdev); -#endif - /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ - "stdin=usbtty,serial,vga\0" \ + "stdin=usbtty,serial,keyboard\0" \ "stdout=usbtty,serial,vga\0" \ "stderr=usbtty,serial,vga\0" \ "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 8cc9ca6a49d..ccf4519119a 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -32,7 +32,6 @@ /* SATA driver configuration */ #ifdef CONFIG_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 #endif /* CONFIG_SATA */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 188ab0bf365..75e84c35ee0 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -49,10 +49,4 @@ #define CONSOLEDEV "ttyS2" -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #endif /* __CONFIG_OMAP5_EVM_H */ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 43d089657b1..7dad002f3b8 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -59,9 +59,5 @@ /* * SATA Driver configuration */ -#ifdef CONFIG_MVSATA_IDE -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET -#endif /*CONFIG_MVSATA_IDE*/ #endif /* _CONFIG_OPENRD_BASE_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index b993ec8316f..92008cd38e4 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -138,7 +138,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 #define CONFIG_HWCONFIG diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 2293a2919e2..7bfa79059a0 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -29,8 +29,6 @@ #undef CONFIG_DM_MMC #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 3e94125cb35..51c802f2b31 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -15,10 +15,6 @@ #include "mv-common.h" /* - * Environment variables configurations - */ - -/* * Default environment variables */ @@ -33,13 +29,10 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - -/* - * File system - */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index 568a93623db..f8555f6e48a 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -43,11 +43,6 @@ #endif /* - * SATA Driver configuration - */ -#define CONFIG_SYS_SATA_MAX_DEVICE 1 - -/* * Support large disk for SATA and USB */ #define CONFIG_SYS_64BIT_LBA diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 928ccb1e18a..30185b14b7a 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -8,8 +8,6 @@ #ifndef __PRESIDIO_ASIC_H #define __PRESIDIO_ASIC_H -#define CONFIG_REMAKE_ELF - #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_BOOTM_LEN 0x00c00000 diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 52c33600b3c..e9dbd54517f 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -33,15 +33,6 @@ * - Only legacy IDE controller is supported for QEMU '-M pc' target * - AHCI controller is supported for QEMU '-M q35' target */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 4 -#define CONFIG_SYS_ATA_BASE_ADDR 0 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0 -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 -#define CONFIG_ATAPI #define CONFIG_SPL_BOARD_LOAD_IMAGE diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index e3105fe53cb..04b34814805 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -30,19 +30,6 @@ #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* - * IDE support - */ -#define CONFIG_IDE_RESET 1 -#define CONFIG_SYS_PIO_MODE 1 -#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 -#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 -#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ -#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ - -/* * SuperH PCI Bridge Configration */ #define CONFIG_SH7751_PCI diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index eed21255eb2..07a30d0f2f0 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -11,8 +11,6 @@ #include <asm/arch/rmobile.h> -#define CONFIG_REMAKE_ELF - #ifdef CONFIG_SPL #define CONFIG_SPL_TARGET "spl/u-boot-spl.scif" #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 9e0e8c7056f..75efbf34481 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -29,22 +29,4 @@ #define CONFIG_SANDBOX_SDL #endif -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_ATA_IDE0_OFFSET 0 -#define CONFIG_SYS_IDE_MAXDEVICE 2 -#define CONFIG_SYS_ATA_BASE_ADDR 0x100 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 1 -#define CONFIG_SYS_ATA_ALT_OFFSET 2 -#define CONFIG_SYS_ATA_STRIDE 4 -#endif - -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_DEVICE 2 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 -#define CONFIG_SYS_SCSI_MAX_LUN 4 - -#define CONFIG_SYS_SATA_MAX_DEVICE 2 - #endif diff --git a/include/configs/sfr_nb4_ser.h b/include/configs/sfr_nb4_ser.h index 7c88af0532d..5400d1256ee 100644 --- a/include/configs/sfr_nb4_ser.h +++ b/include/configs/sfr_nb4_ser.h @@ -6,4 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6358.h> -#define CONFIG_REMAKE_ELF diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 8dba4fcb4f8..4499a63aed2 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -46,7 +46,6 @@ * SATA driver configuration */ #ifdef CONFIG_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 #endif /* CONFIG_SATA */ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 30adfe948f1..087764666bf 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -32,8 +32,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 - /* Environment options */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 8646dc23185..51dc2e41880 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -15,7 +15,6 @@ * U-Boot general configurations */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_REMAKE_ELF /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */ #define CPU_RELEASE_ADDR 0xFFD12210 diff --git a/include/configs/suniv.h b/include/configs/suniv.h new file mode 100644 index 00000000000..6118cd5e1a6 --- /dev/null +++ b/include/configs/suniv.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration settings for new Allwinner F-series (suniv) CPU + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Include common sunxi configuration where most the settings are + */ +#include <configs/sunxi-common.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 7260eb72a40..4bab917c0b7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -22,7 +22,12 @@ /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ +#ifdef CONFIG_MACH_SUNIV +/* suniv doesn't have apb2 and uart is connected to apb1 */ +#define CONFIG_SYS_NS16550_CLK 100000000 +#else #define CONFIG_SYS_NS16550_CLK 24000000 +#endif #ifndef CONFIG_DM_SERIAL # define CONFIG_SYS_NS16550_REG_SIZE -4 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE @@ -49,6 +54,15 @@ * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 +#elif defined(CONFIG_MACH_SUNIV) +#define SDRAM_OFFSET(x) 0x8##x +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here + * since it needs to fit in with the other values. By also #defining it + * we get warnings if the Kconfig value mismatches. + */ +#define CONFIG_SPL_STACK_R_ADDR 0x81e00000 +#define CONFIG_SPL_BSS_START_ADDR 0x81f80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -93,13 +107,9 @@ #endif /* mmc config */ -#ifdef CONFIG_MMC #define CONFIG_MMC_SUNXI_SLOT 0 -#endif #if defined(CONFIG_ENV_IS_IN_MMC) - -#ifdef CONFIG_ARM64 /* * This is actually (CONFIG_ENV_OFFSET - * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used @@ -109,7 +119,6 @@ #endif #define CONFIG_SYS_MMC_MAX_DEVICE 4 -#endif /* * Miscellaneous configurable options @@ -124,8 +133,6 @@ #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ -#define CONFIG_SPL_BOARD_LOAD_IMAGE - /* * We cannot use expressions here, because expressions won't be evaluated in * autoconf.mk. @@ -186,13 +193,40 @@ #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000)) +#elif defined(CONFIG_MACH_SUN8I_V3S) +/* + * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. + * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, + * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. + */ +#define BOOTM_SIZE __stringify(0x2e00000) +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) +#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) + +#elif defined(CONFIG_MACH_SUNIV) +/* + * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc. + * 8M uncompressed kernel, 4M compressed kernel, 512K fdt, + * 512K script, 512K pxe and the ramdisk at the end. + */ +#define BOOTM_SIZE __stringify(0x1700000) +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000)) +#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000)) + #else /* * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. */ -#ifndef CONFIG_MACH_SUN8I_V3S #define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) @@ -200,20 +234,6 @@ #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) -#else -/* - * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. - * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, - * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. - */ -#define BOOTM_SIZE __stringify(0x2e00000) -#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) -#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) -#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) -#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) -#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) -#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) -#endif #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 58ccafc385a..065b406e2e7 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -40,7 +40,6 @@ /* SATA */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/ten64.h b/include/configs/ten64.h new file mode 100644 index 00000000000..54e65f29f1e --- /dev/null +++ b/include/configs/ten64.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2017 NXP + * Copyright 2019-2021 Traverse Technologies + */ + +#ifndef __TEN64_H +#define __TEN64_H + +#include "ls1088a_common.h" + +#define CONFIG_SYS_CLK_FREQ 100000000 +#define COUNTER_FREQUENCY 25000000 /* 25MHz */ + +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 + +#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 + +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd" +#define SD_BOOTCOMMAND "run distro_bootcmd" + +#define QSPI_MC_INIT_CMD \ + "sf probe 0:0 && sf read 0x80000000 0x300000 0x200000 &&" \ + "sf read 0x80200000 0x5C0000 0x40000 &&" \ + "fsl_mc start mc 0x80000000 0x80200000 && " \ + "sf read 0x80300000 0x580000 0x40000 && fsl_mc lazyapply DPL 0x80300000\0" +#define SD_MC_INIT_CMD \ + "mmcinfo; fatload mmc 0 0x80000000 mcfirmware/mc_ls1088a.itb; "\ + "fatload mmc 0 0x80200000 dpaa2config/dpc.0x1D-0x0D.dtb; "\ + "fsl_mc start mc 0x80000000 0x80200000\0" + +#define BOOT_TARGET_DEVICES(func) \ + func(NVME, nvme, 0) \ + func(USB, usb, 0) \ + func(MMC, mmc, 0) \ + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, 0) \ + func(PXE, pxe, 0) +#include <config_distro_bootcmd.h> + +#undef CONFIG_EXTRA_ENV_SETTINGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "BOARD=ten64\0" \ + "fdt_addr_r=0x90000000\0" \ + "fdt_high=0xa0000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "load_addr=0xa0000000\0" \ + BOOTENV \ + "load_efi_dtb=mtd read devicetree $fdt_addr_r && fdt addr $fdt_addr_r && " \ + "fdt resize && fdt boardsetup\0" \ + "bootcmd_recovery=mtd read recovery 0xa0000000; mtd read dpl 0x80100000 && " \ + "fsl_mc apply DPL 0x80100000 && bootm 0xa0000000#ten64\0" + +#endif /* __TEN64_H */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 3c942cc6fa0..14817b165cf 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -41,7 +41,6 @@ "initrd_high=0x10000000\0" /* SATA support */ -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 /* Enable LCD and reserve 512KB from top of memory*/ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 600689843bb..3d770f88bde 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -6,8 +6,6 @@ #ifndef __THUNDERX_88XX_H__ #define __THUNDERX_88XX_H__ -#define CONFIG_REMAKE_ELF - #define CONFIG_THUNDERX #define CONFIG_SYS_64BIT diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 9638ab2017b..0324b1e1b21 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -9,8 +9,6 @@ #ifndef __TOTAL_COMPUTE_H #define __TOTAL_COMPUTE_H -#define CONFIG_REMAKE_ELF - /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h new file mode 100644 index 00000000000..f8b4bf2df9b --- /dev/null +++ b/include/configs/verdin-imx8mp.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2022 Toradex + */ + +#ifndef __VERDIN_IMX8MP_H +#define __VERDIN_IMX8MP_H + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> + +#define CONFIG_SPL_MAX_SIZE (152 * 1024) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x960000 +#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x184000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_POWER_PCA9450 + +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#endif /* CONFIG_SPL_BUILD */ + +#define CONFIG_REMAKE_ELF + +/* ENET Config */ +/* ENET1 */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */ + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 7 +#define FEC_QUIRK_ENET_MAC + +#define PHY_ANEG_TIMEOUT 20000 +#endif /* CONFIG_CMD_NET */ + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x43000000\0" \ + "kernel_addr_r=0x40000000\0" \ + "ramdisk_addr_r=0x46400000\0" \ + "scriptaddr=0x46000000\0" + +/* Enable Distro Boot */ +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#undef CONFIG_ISO_PARTITION +#else +#define BOOTENV +#endif + +#if defined(CONFIG_TDX_EASY_INSTALLER) +# define BOOT_SCRIPT "boot-tezi.scr" +#else +# define BOOT_SCRIPT "boot.scr" +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ + "bootcmd_mfg=fastboot 0\0" \ + "boot_file=Image\0" \ + "boot_scripts=" BOOT_SCRIPT "\0" \ + "boot_script_dhcp=" BOOT_SCRIPT "\0" \ + "console=ttymxc2\0" \ + "fdt_board=dev\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ + "\0" \ + "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ + "tftp ${fdt_addr} verdin/${fdtfile}; " \ + "booti ${loadaddr} - ${fdt_addr}\0" \ + "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \ + "consoleblank=0 earlycon\0" \ + "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ + "if test \"$confirm\" = \"y\"; then " \ + "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ + "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \ + "${blkcnt}; fi\0" + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ + +/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G) +#define PHYS_SDRAM_2 0x100000000 +#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G) + +/* UART */ +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE SZ_2K +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* USDHC */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#endif /* __VERDIN_IMX8MP_H */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 9bf5774a7f1..f0c5ceb3849 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -9,8 +9,6 @@ #include <linux/stringify.h> -#define CONFIG_REMAKE_ELF - /* Link Definitions */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 051c18ca232..80e8fe1deb2 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -17,7 +17,6 @@ /* SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 03539a41b49..bc72f5f35ff 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -10,8 +10,6 @@ #ifndef __XILINX_VERSAL_H #define __XILINX_VERSAL_H -#define CONFIG_REMAKE_ELF - /* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ /* Generic Interrupt Controller Definitions */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index f791ab71c7c..e51d92ffe4e 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -10,8 +10,6 @@ #ifndef __XILINX_ZYNQMP_H #define __XILINX_ZYNQMP_H -#define CONFIG_REMAKE_ELF - /* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ /* Generic Interrupt Controller Definitions */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 1bda0a66904..780952cf5f6 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_ZYNQ_COMMON_H #define __CONFIG_ZYNQ_COMMON_H -#define CONFIG_REMAKE_ELF - /* Cache options */ #ifndef CONFIG_SYS_L2CACHE_OFF # define CONFIG_SYS_L2_PL310 diff --git a/include/dfu.h b/include/dfu.h index f6868982df7..dcb9cd9d799 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -432,11 +432,15 @@ static inline void dfu_set_defer_flush(struct dfu_entity *dfu) int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size); /* Device specific */ +/* Each entity has 5 arguments in maximum. */ +#define DFU_MAX_ENTITY_ARGS 5 + #if CONFIG_IS_ENABLED(DFU_MMC) -extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s); +extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); #else static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("MMC support not available!\n"); return -1; @@ -444,10 +448,11 @@ static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, #endif #if CONFIG_IS_ENABLED(DFU_NAND) -extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s); +extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); #else static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("NAND support not available!\n"); return -1; @@ -455,10 +460,11 @@ static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, #endif #if CONFIG_IS_ENABLED(DFU_RAM) -extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s); +extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); #else static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("RAM support not available!\n"); return -1; @@ -466,10 +472,11 @@ static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, #endif #if CONFIG_IS_ENABLED(DFU_SF) -extern int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s); +extern int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); #else static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("SF support not available!\n"); return -1; @@ -477,10 +484,11 @@ static inline int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, #endif #if CONFIG_IS_ENABLED(DFU_MTD) -int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, char *s); +extern int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); #else static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("MTD support not available!\n"); return -1; @@ -488,7 +496,8 @@ static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, #endif #ifdef CONFIG_DFU_VIRT -int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr, char *s); +int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr, + char **argv, int argc); int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset, void *buf, long *len); int dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size); @@ -496,7 +505,7 @@ int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, void *buf, long *len); #else static inline int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr, - char *s) + char **argv, int argc) { puts("VIRT support not available!\n"); return -1; diff --git a/include/dm/device.h b/include/dm/device.h index 435a1114f1c..cb52a0997c8 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -212,7 +212,7 @@ struct udevice_rt { #define DM_MAX_SEQ_STR 3 /* Returns the operations for a device */ -#define device_get_ops(dev) (dev->driver->ops) +#define device_get_ops(dev) ((dev)->driver->ops) #if CONFIG_IS_ENABLED(OF_PLATDATA_RT) u32 dev_get_flags(const struct udevice *dev); diff --git a/include/dt-bindings/bus/moxtet.h b/include/dt-bindings/bus/moxtet.h new file mode 100644 index 00000000000..10528de7b3e --- /dev/null +++ b/include/dt-bindings/bus/moxtet.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Constant for device tree bindings for Turris Mox module configuration bus + * + * Copyright (C) 2019 Marek Behún <kabel@kernel.org> + */ + +#ifndef _DT_BINDINGS_BUS_MOXTET_H +#define _DT_BINDINGS_BUS_MOXTET_H + +#define MOXTET_IRQ_PCI 0 +#define MOXTET_IRQ_USB3 4 +#define MOXTET_IRQ_PERIDOT(n) (8 + (n)) +#define MOXTET_IRQ_TOPAZ 12 + +#endif /* _DT_BINDINGS_BUS_MOXTET_H */ diff --git a/include/dt-bindings/clock/suniv-ccu-f1c100s.h b/include/dt-bindings/clock/suniv-ccu-f1c100s.h new file mode 100644 index 00000000000..f5ac155c9c7 --- /dev/null +++ b/include/dt-bindings/clock/suniv-ccu-f1c100s.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) + * + * Copyright (c) 2018 Icenowy Zheng <icenowy@aosc.xyz> + * + */ + +#ifndef _DT_BINDINGS_CLK_SUNIV_F1C100S_H_ +#define _DT_BINDINGS_CLK_SUNIV_F1C100S_H_ + +#define CLK_CPU 11 + +#define CLK_BUS_DMA 14 +#define CLK_BUS_MMC0 15 +#define CLK_BUS_MMC1 16 +#define CLK_BUS_DRAM 17 +#define CLK_BUS_SPI0 18 +#define CLK_BUS_SPI1 19 +#define CLK_BUS_OTG 20 +#define CLK_BUS_VE 21 +#define CLK_BUS_LCD 22 +#define CLK_BUS_DEINTERLACE 23 +#define CLK_BUS_CSI 24 +#define CLK_BUS_TVD 25 +#define CLK_BUS_TVE 26 +#define CLK_BUS_DE_BE 27 +#define CLK_BUS_DE_FE 28 +#define CLK_BUS_CODEC 29 +#define CLK_BUS_SPDIF 30 +#define CLK_BUS_IR 31 +#define CLK_BUS_RSB 32 +#define CLK_BUS_I2S0 33 +#define CLK_BUS_I2C0 34 +#define CLK_BUS_I2C1 35 +#define CLK_BUS_I2C2 36 +#define CLK_BUS_PIO 37 +#define CLK_BUS_UART0 38 +#define CLK_BUS_UART1 39 +#define CLK_BUS_UART2 40 + +#define CLK_MMC0 41 +#define CLK_MMC0_SAMPLE 42 +#define CLK_MMC0_OUTPUT 43 +#define CLK_MMC1 44 +#define CLK_MMC1_SAMPLE 45 +#define CLK_MMC1_OUTPUT 46 +#define CLK_I2S 47 +#define CLK_SPDIF 48 + +#define CLK_USB_PHY0 49 + +#define CLK_DRAM_VE 50 +#define CLK_DRAM_CSI 51 +#define CLK_DRAM_DEINTERLACE 52 +#define CLK_DRAM_TVD 53 +#define CLK_DRAM_DE_FE 54 +#define CLK_DRAM_DE_BE 55 + +#define CLK_DE_BE 56 +#define CLK_DE_FE 57 +#define CLK_TCON 58 +#define CLK_DEINTERLACE 59 +#define CLK_TVE2_CLK 60 +#define CLK_TVE1_CLK 61 +#define CLK_TVD 62 +#define CLK_CSI 63 +#define CLK_VE 64 +#define CLK_CODEC 65 +#define CLK_AVS 66 + +#endif diff --git a/include/dt-bindings/interconnect/imx8mq.h b/include/dt-bindings/interconnect/imx8mq.h new file mode 100644 index 00000000000..1a4cae7f8be --- /dev/null +++ b/include/dt-bindings/interconnect/imx8mq.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019-2020, NXP + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MQ_H +#define __DT_BINDINGS_INTERCONNECT_IMX8MQ_H + +#define IMX8MQ_ICN_NOC 1 +#define IMX8MQ_ICS_DRAM 2 +#define IMX8MQ_ICS_OCRAM 3 +#define IMX8MQ_ICM_A53 4 + +#define IMX8MQ_ICM_VPU 5 +#define IMX8MQ_ICN_VIDEO 6 + +#define IMX8MQ_ICM_GPU 7 +#define IMX8MQ_ICN_GPU 8 + +#define IMX8MQ_ICM_DCSS 9 +#define IMX8MQ_ICN_DCSS 10 + +#define IMX8MQ_ICM_USB1 11 +#define IMX8MQ_ICM_USB2 12 +#define IMX8MQ_ICN_USB 13 + +#define IMX8MQ_ICM_CSI1 14 +#define IMX8MQ_ICM_CSI2 15 +#define IMX8MQ_ICM_LCDIF 16 +#define IMX8MQ_ICN_DISPLAY 17 + +#define IMX8MQ_ICM_SDMA2 18 +#define IMX8MQ_ICN_AUDIO 19 + +#define IMX8MQ_ICN_ENET 20 +#define IMX8MQ_ICM_ENET 21 + +#define IMX8MQ_ICM_SDMA1 22 +#define IMX8MQ_ICM_NAND 23 +#define IMX8MQ_ICM_USDHC1 24 +#define IMX8MQ_ICM_USDHC2 25 +#define IMX8MQ_ICM_PCIE1 26 +#define IMX8MQ_ICM_PCIE2 27 +#define IMX8MQ_ICN_MAIN 28 + +#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MQ_H */ diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h index d417b9268b1..d3116c52ab7 100644 --- a/include/dt-bindings/mux/ti-serdes.h +++ b/include/dt-bindings/mux/ti-serdes.h @@ -95,4 +95,26 @@ #define AM64_SERDES0_LANE0_PCIE0 0x0 #define AM64_SERDES0_LANE0_USB 0x1 +/* J721S2 */ + +#define J721S2_SERDES0_LANE0_EDP_LANE0 0x0 +#define J721S2_SERDES0_LANE0_PCIE1_LANE0 0x1 +#define J721S2_SERDES0_LANE0_IP3_UNUSED 0x2 +#define J721S2_SERDES0_LANE0_IP4_UNUSED 0x3 + +#define J721S2_SERDES0_LANE1_EDP_LANE1 0x0 +#define J721S2_SERDES0_LANE1_PCIE1_LANE1 0x1 +#define J721S2_SERDES0_LANE1_USB 0x2 +#define J721S2_SERDES0_LANE1_IP4_UNUSED 0x3 + +#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0 +#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1 +#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2 +#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3 + +#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0 +#define J721S2_SERDES0_LANE3_PCIE1_LANE3 0x1 +#define J721S2_SERDES0_LANE3_USB 0x2 +#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3 + #endif /* _DT_BINDINGS_MUX_TI_SERDES */ diff --git a/include/dt-bindings/phy/phy-cadence.h b/include/dt-bindings/phy/phy-cadence.h index 4652bcb8626..0122c6067b1 100644 --- a/include/dt-bindings/phy/phy-cadence.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -17,4 +17,8 @@ #define CDNS_SIERRA_PLL_CMNLC 0 #define CDNS_SIERRA_PLL_CMNLC1 1 +#define SIERRA_SERDES_NO_SSC 0 +#define SIERRA_SERDES_EXTERNAL_SSC 1 +#define SIERRA_SERDES_INTERNAL_SSC 2 + #endif /* _DT_BINDINGS_CADENCE_SERDES_H */ diff --git a/include/dt-bindings/phy/phy-imx8-pcie.h b/include/dt-bindings/phy/phy-imx8-pcie.h new file mode 100644 index 00000000000..8bbe2d6538d --- /dev/null +++ b/include/dt-bindings/phy/phy-imx8-pcie.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * This header provides constants for i.MX8 PCIe. + */ + +#ifndef _DT_BINDINGS_IMX8_PCIE_H +#define _DT_BINDINGS_IMX8_PCIE_H + +/* Reference clock PAD mode */ +#define IMX8_PCIE_REFCLK_PAD_UNUSED 0 +#define IMX8_PCIE_REFCLK_PAD_INPUT 1 +#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2 + +#endif /* _DT_BINDINGS_IMX8_PCIE_H */ diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index e085f102b28..63e038e36ca 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -38,4 +38,7 @@ #define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #endif diff --git a/include/dt-bindings/reset/suniv-ccu-f1c100s.h b/include/dt-bindings/reset/suniv-ccu-f1c100s.h new file mode 100644 index 00000000000..6a4b4385fe5 --- /dev/null +++ b/include/dt-bindings/reset/suniv-ccu-f1c100s.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) + * + * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.xyz> + * + */ + +#ifndef _DT_BINDINGS_RST_SUNIV_F1C100S_H_ +#define _DT_BINDINGS_RST_SUNIV_F1C100S_H_ + +#define RST_USB_PHY0 0 +#define RST_BUS_DMA 1 +#define RST_BUS_MMC0 2 +#define RST_BUS_MMC1 3 +#define RST_BUS_DRAM 4 +#define RST_BUS_SPI0 5 +#define RST_BUS_SPI1 6 +#define RST_BUS_OTG 7 +#define RST_BUS_VE 8 +#define RST_BUS_LCD 9 +#define RST_BUS_DEINTERLACE 10 +#define RST_BUS_CSI 11 +#define RST_BUS_TVD 12 +#define RST_BUS_TVE 13 +#define RST_BUS_DE_BE 14 +#define RST_BUS_DE_FE 15 +#define RST_BUS_CODEC 16 +#define RST_BUS_SPDIF 17 +#define RST_BUS_IR 18 +#define RST_BUS_RSB 19 +#define RST_BUS_I2S0 20 +#define RST_BUS_I2C0 21 +#define RST_BUS_I2C1 22 +#define RST_BUS_I2C2 23 +#define RST_BUS_UART0 24 +#define RST_BUS_UART1 25 +#define RST_BUS_UART2 26 + +#endif /* _DT_BINDINGS_RST_SUNIV_F1C100S_H_ */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 4e50f2d0c36..e390d323a98 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -769,6 +769,7 @@ const struct efi_device_path *efi_dp_last_node( efi_status_t efi_dp_split_file_path(struct efi_device_path *full_path, struct efi_device_path **device_path, struct efi_device_path **file_path); +struct efi_device_path *efi_dp_from_uart(void); efi_status_t efi_dp_from_name(const char *dev, const char *devnr, const char *path, struct efi_device_path **device, @@ -974,7 +975,7 @@ efi_status_t efi_capsule_authenticate(const void *capsule, efi_uintn_t capsule_size, void **image, efi_uintn_t *image_size); -#define EFI_CAPSULE_DIR L"\\EFI\\UpdateCapsule\\" +#define EFI_CAPSULE_DIR u"\\EFI\\UpdateCapsule\\" /** * Install the ESRT system table. diff --git a/include/efi_selftest.h b/include/efi_selftest.h index 94ceb147330..5340cefbb6f 100644 --- a/include/efi_selftest.h +++ b/include/efi_selftest.h @@ -16,7 +16,7 @@ #define EFI_ST_SUCCESS 0 #define EFI_ST_FAILURE 1 -#define EFI_ST_SUCCESS_STR L"SUCCESS" +#define EFI_ST_SUCCESS_STR u"SUCCESS" /** * efi_st_printf() - print a message @@ -111,7 +111,7 @@ u16 *efi_st_translate_char(u16 code); * efi_st_translate_code() - translate a scan code to a human readable string * * This function translates the scan code returned by the simple text input - * protocol to a human readable string, e.g. 0x04 is translated to L"Left". + * protocol to a human readable string, e.g. 0x04 is translated to u"Left". * * @code: scan code * Return: Unicode string diff --git a/include/fdtdec.h b/include/fdtdec.h index 4b0b505773d..12355afd7fa 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -1169,7 +1169,6 @@ int fdtdec_setup(void); */ int fdtdec_board_setup(const void *fdt_blob); -#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) /** * fdtdec_resetup() - Set up the device tree again * @@ -1188,7 +1187,6 @@ int fdtdec_board_setup(const void *fdt_blob); * Return: 0 if OK, -ve on error */ int fdtdec_resetup(int *rescan); -#endif /** * Board-specific FDT initialization. Returns the address to a device tree blob. diff --git a/include/ide.h b/include/ide.h index 60739436e9f..2994b7a7622 100644 --- a/include/ide.h +++ b/include/ide.h @@ -41,13 +41,6 @@ int ide_preinit(void); int ide_device_present(int dev); #endif -#if defined(CONFIG_IDE_AHB) -unsigned char ide_read_register(int dev, unsigned int port); -void ide_write_register(int dev, unsigned int port, unsigned char val); -void ide_read_data(int dev, ulong *sect_buf, int words); -void ide_write_data(int dev, const ulong *sect_buf, int words); -#endif - /* * I/O function overrides */ diff --git a/include/k3-clk.h b/include/k3-clk.h index 59c76db86ea..31292b59f20 100644 --- a/include/k3-clk.h +++ b/include/k3-clk.h @@ -173,6 +173,7 @@ struct ti_k3_clk_platdata { extern const struct ti_k3_clk_platdata j721e_clk_platdata; extern const struct ti_k3_clk_platdata j7200_clk_platdata; +extern const struct ti_k3_clk_platdata j721s2_clk_platdata; struct clk *clk_register_ti_pll(const char *name, const char *parent_name, void __iomem *reg); diff --git a/include/k3-dev.h b/include/k3-dev.h index 55c5057db35..b46b8c3aabc 100644 --- a/include/k3-dev.h +++ b/include/k3-dev.h @@ -77,6 +77,7 @@ struct ti_k3_pd_platdata { extern const struct ti_k3_pd_platdata j721e_pd_platdata; extern const struct ti_k3_pd_platdata j7200_pd_platdata; +extern const struct ti_k3_pd_platdata j721s2_pd_platdata; u8 ti_pd_state(struct ti_pd *pd); u8 lpsc_get_state(struct ti_lpsc *lpsc); diff --git a/include/linux/apple-mailbox.h b/include/linux/apple-mailbox.h new file mode 100644 index 00000000000..720fbb70294 --- /dev/null +++ b/include/linux/apple-mailbox.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Apple mailbox message format + * + * Copyright (C) 2021 The Asahi Linux Contributors + */ + +#ifndef _LINUX_APPLE_MAILBOX_H_ +#define _LINUX_APPLE_MAILBOX_H_ + +#include <linux/types.h> + +/* encodes a single 96bit message sent over the single channel */ +struct apple_mbox_msg { + u64 msg0; + u32 msg1; +}; + +#endif diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h index dae4225be54..0a8503af9f1 100644 --- a/include/linux/bitmap.h +++ b/include/linux/bitmap.h @@ -159,6 +159,32 @@ static inline unsigned long find_first_bit(const unsigned long *addr, unsigned l (bit) < (size); \ (bit) = find_next_bit((addr), (size), (bit) + 1)) +static inline unsigned long +bitmap_find_next_zero_area(unsigned long *map, + unsigned long size, + unsigned long start, + unsigned int nr, unsigned long align_mask) +{ + unsigned long index, end, i; +again: + index = find_next_zero_bit(map, size, start); + + /* + * Align allocation + */ + index = (index + align_mask) & ~align_mask; + + end = index + nr; + if (end > size) + return end; + i = find_next_bit(map, end, index); + if (i < end) { + start = i + 1; + goto again; + } + return index; +} + static inline void bitmap_fill(unsigned long *dst, unsigned int nbits) { if (small_const_nbits(nbits)) { diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h index a1d1a298426..d20da615b96 100644 --- a/include/linux/kconfig.h +++ b/include/linux/kconfig.h @@ -17,18 +17,16 @@ * the last step cherry picks the 2nd arg, we get a zero. */ #define __ARG_PLACEHOLDER_1 0, -#define config_enabled(cfg) _config_enabled(cfg) -#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value) -#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0) +#define config_enabled(cfg, def_val) _config_enabled(cfg, def_val) +#define _config_enabled(value, def_val) __config_enabled(__ARG_PLACEHOLDER_##value, def_val) +#define __config_enabled(arg1_or_junk, def_val) ___config_enabled(arg1_or_junk 1, def_val) #define ___config_enabled(__ignored, val, ...) val /* * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', * 0 otherwise. - * */ -#define IS_ENABLED(option) \ - (config_enabled(option)) +#define IS_ENABLED(option) config_enabled(option, 0) /* * U-Boot add-on: Helper macros to reference to different macros (prefixed by @@ -60,6 +58,30 @@ #define CONFIG_VAL(option) config_val(option) /* + * This uses a similar mechanism to config_enabled() above. If cfg is enabled, + * it resolves to the value of opt_cfg, otherwise it resolves to def_val + */ +#define config_opt_enabled(cfg, opt_cfg, def_val) _config_opt_enabled(cfg, opt_cfg, def_val) +#define _config_opt_enabled(cfg_val, opt_value, def_val) \ + __config_opt_enabled(__ARG_PLACEHOLDER_##cfg_val, opt_value, def_val) +#define __config_opt_enabled(arg1_or_junk, arg2, def_val) \ + ___config_opt_enabled(arg1_or_junk arg2, def_val) +#define ___config_opt_enabled(__ignored, val, ...) val + +#ifndef __ASSEMBLY__ +/* + * Detect usage of a the value when the conditional is not enabled. When used + * in assembly context, this likely produces a assembly error, or hopefully at + * least something recognisable. + */ +long invalid_use_of_IF_ENABLED_INT(void); +#endif + +/* Evaluates to int_option if option is defined, otherwise a build error */ +#define IF_ENABLED_INT(option, int_option) \ + config_opt_enabled(option, int_option, invalid_use_of_IF_ENABLED_INT()) + +/* * Count number of arguments to a variadic macro. Currently only need * it for 1, 2 or 3 arguments. */ @@ -76,7 +98,7 @@ #define __CONFIG_IS_ENABLED_1(option) __CONFIG_IS_ENABLED_3(option, (1), (0)) #define __CONFIG_IS_ENABLED_2(option, case1) __CONFIG_IS_ENABLED_3(option, case1, ()) #define __CONFIG_IS_ENABLED_3(option, case1, case0) \ - __concat(__unwrap, config_enabled(CONFIG_VAL(option))) (case1, case0) + __concat(__unwrap, config_enabled(CONFIG_VAL(option), 0)) (case1, case0) /* * CONFIG_IS_ENABLED(FOO) expands to @@ -113,5 +135,21 @@ #define CONFIG_IS_ENABLED(option, ...) \ __concat(__CONFIG_IS_ENABLED_, __count_args(option, ##__VA_ARGS__)) (option, ##__VA_ARGS__) +#ifndef __ASSEMBLY__ +/* + * Detect usage of a the value when the conditional is not enabled. When used + * in assembly context, this likely produces a assembly error, or hopefully at + * least something recognisable. + */ +long invalid_use_of_CONFIG_IF_ENABLED_INT(void); +#endif + +/* + * Evaluates to SPL_/TPL_int_option if SPL_/TPL_/option is not defined, + * otherwise build error + */ +#define CONFIG_IF_ENABLED_INT(option, int_option) \ + CONFIG_IS_ENABLED(option, (CONFIG_VAL(int_option)), \ + (invalid_use_of_CONFIG_IF_ENABLED_INT())) #endif /* __LINUX_KCONFIG_H */ diff --git a/include/pci.h b/include/pci.h index 9e7910b271b..673c95c6bb7 100644 --- a/include/pci.h +++ b/include/pci.h @@ -484,6 +484,22 @@ #define PCI_EXP_DEVCAP 4 /* Device capabilities */ #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ #define PCI_EXP_DEVCTL 8 /* Device Control */ +#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ +#define PCI_EXP_DEVCTL_PAYLOAD_128B 0x0000 /* 128 Bytes */ +#define PCI_EXP_DEVCTL_PAYLOAD_256B 0x0020 /* 256 Bytes */ +#define PCI_EXP_DEVCTL_PAYLOAD_512B 0x0040 /* 512 Bytes */ +#define PCI_EXP_DEVCTL_PAYLOAD_1024B 0x0060 /* 1024 Bytes */ +#define PCI_EXP_DEVCTL_PAYLOAD_2048B 0x0080 /* 2048 Bytes */ +#define PCI_EXP_DEVCTL_PAYLOAD_4096B 0x00a0 /* 4096 Bytes */ +#define PCI_EXP_DEVCTL_RELAX_EN 0x0010 /* Enable relaxed ordering */ +#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */ +#define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */ +#define PCI_EXP_DEVCTL_READRQ_128B 0x0000 /* 128 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_2048B 0x4000 /* 2048 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_4096B 0x5000 /* 4096 Bytes */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ #define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ @@ -522,6 +538,14 @@ #define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002 /* Target Link Speed 5.0GT/s */ #define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Target Link Speed 8.0GT/s */ +/* Advanced Error Reporting */ +#define PCI_ERR_CAP 24 /* Advanced Error Capabilities */ +#define PCI_ERR_CAP_FEP(x) ((x) & 31) /* First Error Pointer */ +#define PCI_ERR_CAP_ECRC_GENC 0x00000020 /* ECRC Generation Capable */ +#define PCI_ERR_CAP_ECRC_GENE 0x00000040 /* ECRC Generation Enable */ +#define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */ +#define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ + /* Single Root I/O Virtualization Registers */ #define PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */ #define PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */ diff --git a/include/pxe_utils.h b/include/pxe_utils.h index dad26688180..4a73b2aace3 100644 --- a/include/pxe_utils.h +++ b/include/pxe_utils.h @@ -33,6 +33,7 @@ * initrd - path to the initrd to use for this label. * attempted - 0 if we haven't tried to boot this label, 1 if we have. * localboot - 1 if this label specified 'localboot', 0 otherwise. + * kaslrseed - 1 if generate kaslrseed from hw_rng * list - lets these form a list, which a pxe_menu struct will hold. */ struct pxe_label { @@ -50,6 +51,7 @@ struct pxe_label { int attempted; int localboot; int localboot_val; + int kaslrseed; struct list_head list; }; diff --git a/include/remoteproc.h b/include/remoteproc.h index a8e654674e8..f48054de6ba 100644 --- a/include/remoteproc.h +++ b/include/remoteproc.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * (C) Copyright 2015 * Texas Instruments Incorporated - http://www.ti.com/ @@ -16,6 +16,375 @@ #include <dm/platdata.h> /* For platform data support - non dt world */ /** + * struct fw_rsc_hdr - firmware resource entry header + * @type: resource type + * @data: resource data + * + * Every resource entry begins with a 'struct fw_rsc_hdr' header providing + * its @type. The content of the entry itself will immediately follow + * this header, and it should be parsed according to the resource type. + */ +struct fw_rsc_hdr { + u32 type; + u8 data[0]; +}; + +/** + * enum fw_resource_type - types of resource entries + * + * @RSC_CARVEOUT: request for allocation of a physically contiguous + * memory region. + * @RSC_DEVMEM: request to iommu_map a memory-based peripheral. + * @RSC_TRACE: announces the availability of a trace buffer into which + * the remote processor will be writing logs. + * @RSC_VDEV: declare support for a virtio device, and serve as its + * virtio header. + * @RSC_PRELOAD_VENDOR: a vendor resource type that needs to be handled by + * remoteproc implementations before loading + * @RSC_POSTLOAD_VENDOR: a vendor resource type that needs to be handled by + * remoteproc implementations after loading + * @RSC_LAST: just keep this one at the end + * + * For more details regarding a specific resource type, please see its + * dedicated structure below. + * + * Please note that these values are used as indices to the rproc_handle_rsc + * lookup table, so please keep them sane. Moreover, @RSC_LAST is used to + * check the validity of an index before the lookup table is accessed, so + * please update it as needed. + */ +enum fw_resource_type { + RSC_CARVEOUT = 0, + RSC_DEVMEM = 1, + RSC_TRACE = 2, + RSC_VDEV = 3, + RSC_PRELOAD_VENDOR = 4, + RSC_POSTLOAD_VENDOR = 5, + RSC_LAST = 6, +}; + +#define FW_RSC_ADDR_ANY (-1) + +/** + * struct fw_rsc_carveout - physically contiguous memory request + * @da: device address + * @pa: physical address + * @len: length (in bytes) + * @flags: iommu protection flags + * @reserved: reserved (must be zero) + * @name: human-readable name of the requested memory region + * + * This resource entry requests the host to allocate a physically contiguous + * memory region. + * + * These request entries should precede other firmware resource entries, + * as other entries might request placing other data objects inside + * these memory regions (e.g. data/code segments, trace resource entries, ...). + * + * Allocating memory this way helps utilizing the reserved physical memory + * (e.g. CMA) more efficiently, and also minimizes the number of TLB entries + * needed to map it (in case @rproc is using an IOMMU). Reducing the TLB + * pressure is important; it may have a substantial impact on performance. + * + * If the firmware is compiled with static addresses, then @da should specify + * the expected device address of this memory region. If @da is set to + * FW_RSC_ADDR_ANY, then the host will dynamically allocate it, and then + * overwrite @da with the dynamically allocated address. + * + * We will always use @da to negotiate the device addresses, even if it + * isn't using an iommu. In that case, though, it will obviously contain + * physical addresses. + * + * Some remote processors needs to know the allocated physical address + * even if they do use an iommu. This is needed, e.g., if they control + * hardware accelerators which access the physical memory directly (this + * is the case with OMAP4 for instance). In that case, the host will + * overwrite @pa with the dynamically allocated physical address. + * Generally we don't want to expose physical addresses if we don't have to + * (remote processors are generally _not_ trusted), so we might want to + * change this to happen _only_ when explicitly required by the hardware. + * + * @flags is used to provide IOMMU protection flags, and @name should + * (optionally) contain a human readable name of this carveout region + * (mainly for debugging purposes). + */ +struct fw_rsc_carveout { + u32 da; + u32 pa; + u32 len; + u32 flags; + u32 reserved; + u8 name[32]; +}; + +/** + * struct fw_rsc_devmem - iommu mapping request + * @da: device address + * @pa: physical address + * @len: length (in bytes) + * @flags: iommu protection flags + * @reserved: reserved (must be zero) + * @name: human-readable name of the requested region to be mapped + * + * This resource entry requests the host to iommu map a physically contiguous + * memory region. This is needed in case the remote processor requires + * access to certain memory-based peripherals; _never_ use it to access + * regular memory. + * + * This is obviously only needed if the remote processor is accessing memory + * via an iommu. + * + * @da should specify the required device address, @pa should specify + * the physical address we want to map, @len should specify the size of + * the mapping and @flags is the IOMMU protection flags. As always, @name may + * (optionally) contain a human readable name of this mapping (mainly for + * debugging purposes). + * + * Note: at this point we just "trust" those devmem entries to contain valid + * physical addresses, but this isn't safe and will be changed: eventually we + * want remoteproc implementations to provide us ranges of physical addresses + * the firmware is allowed to request, and not allow firmwares to request + * access to physical addresses that are outside those ranges. + */ +struct fw_rsc_devmem { + u32 da; + u32 pa; + u32 len; + u32 flags; + u32 reserved; + u8 name[32]; +}; + +/** + * struct fw_rsc_trace - trace buffer declaration + * @da: device address + * @len: length (in bytes) + * @reserved: reserved (must be zero) + * @name: human-readable name of the trace buffer + * + * This resource entry provides the host information about a trace buffer + * into which the remote processor will write log messages. + * + * @da specifies the device address of the buffer, @len specifies + * its size, and @name may contain a human readable name of the trace buffer. + * + * After booting the remote processor, the trace buffers are exposed to the + * user via debugfs entries (called trace0, trace1, etc..). + */ +struct fw_rsc_trace { + u32 da; + u32 len; + u32 reserved; + u8 name[32]; +}; + +/** + * struct fw_rsc_vdev_vring - vring descriptor entry + * @da: device address + * @align: the alignment between the consumer and producer parts of the vring + * @num: num of buffers supported by this vring (must be power of two) + * @notifyid is a unique rproc-wide notify index for this vring. This notify + * index is used when kicking a remote processor, to let it know that this + * vring is triggered. + * @pa: physical address + * + * This descriptor is not a resource entry by itself; it is part of the + * vdev resource type (see below). + * + * Note that @da should either contain the device address where + * the remote processor is expecting the vring, or indicate that + * dynamically allocation of the vring's device address is supported. + */ +struct fw_rsc_vdev_vring { + u32 da; + u32 align; + u32 num; + u32 notifyid; + u32 pa; +}; + +/** + * struct fw_rsc_vdev - virtio device header + * @id: virtio device id (as in virtio_ids.h) + * @notifyid is a unique rproc-wide notify index for this vdev. This notify + * index is used when kicking a remote processor, to let it know that the + * status/features of this vdev have changes. + * @dfeatures specifies the virtio device features supported by the firmware + * @gfeatures is a place holder used by the host to write back the + * negotiated features that are supported by both sides. + * @config_len is the size of the virtio config space of this vdev. The config + * space lies in the resource table immediate after this vdev header. + * @status is a place holder where the host will indicate its virtio progress. + * @num_of_vrings indicates how many vrings are described in this vdev header + * @reserved: reserved (must be zero) + * @vring is an array of @num_of_vrings entries of 'struct fw_rsc_vdev_vring'. + * + * This resource is a virtio device header: it provides information about + * the vdev, and is then used by the host and its peer remote processors + * to negotiate and share certain virtio properties. + * + * By providing this resource entry, the firmware essentially asks remoteproc + * to statically allocate a vdev upon registration of the rproc (dynamic vdev + * allocation is not yet supported). + * + * Note: unlike virtualization systems, the term 'host' here means + * the Linux side which is running remoteproc to control the remote + * processors. We use the name 'gfeatures' to comply with virtio's terms, + * though there isn't really any virtualized guest OS here: it's the host + * which is responsible for negotiating the final features. + * Yeah, it's a bit confusing. + * + * Note: immediately following this structure is the virtio config space for + * this vdev (which is specific to the vdev; for more info, read the virtio + * spec). the size of the config space is specified by @config_len. + */ +struct fw_rsc_vdev { + u32 id; + u32 notifyid; + u32 dfeatures; + u32 gfeatures; + u32 config_len; + u8 status; + u8 num_of_vrings; + u8 reserved[2]; + struct fw_rsc_vdev_vring vring[0]; +}; + +/** + * struct rproc_mem_entry - memory entry descriptor + * @va: virtual address + * @dma: dma address + * @len: length, in bytes + * @da: device address + * @priv: associated data + * @name: associated memory region name (optional) + * @node: list node + */ +struct rproc_mem_entry { + void *va; + dma_addr_t dma; + int len; + u32 da; + void *priv; + char name[32]; + struct list_head node; +}; + +struct rproc; + +typedef u32(*init_func_proto) (u32 core_id, struct rproc *cfg); + +struct l3_map { + u32 priv_addr; + u32 l3_addr; + u32 len; +}; + +struct rproc_intmem_to_l3_mapping { + u32 num_entries; + struct l3_map mappings[16]; +}; + +/** + * enum rproc_crash_type - remote processor crash types + * @RPROC_MMUFAULT: iommu fault + * @RPROC_WATCHDOG: watchdog bite + * @RPROC_FATAL_ERROR fatal error + * + * Each element of the enum is used as an array index. So that, the value of + * the elements should be always something sane. + * + * Feel free to add more types when needed. + */ +enum rproc_crash_type { + RPROC_MMUFAULT, + RPROC_WATCHDOG, + RPROC_FATAL_ERROR, +}; + +/* we currently support only two vrings per rvdev */ +#define RVDEV_NUM_VRINGS 2 + +#define RPMSG_NUM_BUFS (512) +#define RPMSG_BUF_SIZE (512) +#define RPMSG_TOTAL_BUF_SPACE (RPMSG_NUM_BUFS * RPMSG_BUF_SIZE) + +/** + * struct rproc_vring - remoteproc vring state + * @va: virtual address + * @dma: dma address + * @len: length, in bytes + * @da: device address + * @align: vring alignment + * @notifyid: rproc-specific unique vring index + * @rvdev: remote vdev + * @vq: the virtqueue of this vring + */ +struct rproc_vring { + void *va; + dma_addr_t dma; + int len; + u32 da; + u32 align; + int notifyid; + struct rproc_vdev *rvdev; + struct virtqueue *vq; +}; + +/** struct rproc - structure with all processor specific information for + * loading remotecore from boot loader. + * + * @num_iommus: Number of IOMMUs for this remote core. Zero indicates that the + * processor does not have an IOMMU. + * + * @cma_base: Base address of the carveout for this remotecore. + * + * @cma_size: Length of the carveout in bytes. + * + * @page_table_addr: array with the physical address of the page table. We are + * using the same page table for both IOMMU's. There is currently no strong + * usecase for maintaining different page tables for different MMU's servicing + * the same CPU. + * + * @mmu_base_addr: base address of the MMU + * + * @entry_point: address that is the entry point for the remote core. This + * address is in the memory view of the remotecore. + * + * @load_addr: Address to which the bootloader loads the firmware from + * persistent storage before invoking the ELF loader. Keeping this address + * configurable allows future optimizations such as loading the firmware from + * storage for remotecore2 via EDMA while the CPU is processing the ELF image + * of remotecore1. This address is in the memory view of the A15. + * + * @firmware_name: Name of the file that is expected to contain the ELF image. + * + * @has_rsc_table: Flag populated after parsing the ELF binary on target. + */ + +struct rproc { + u32 num_iommus; + unsigned long cma_base; + u32 cma_size; + unsigned long page_table_addr; + unsigned long mmu_base_addr[2]; + unsigned long load_addr; + unsigned long entry_point; + char *core_name; + char *firmware_name; + char *ptn; + init_func_proto start_clocks; + init_func_proto config_mmu; + init_func_proto config_peripherals; + init_func_proto start_core; + u32 has_rsc_table; + struct rproc_intmem_to_l3_mapping *intmem_to_l3_mapping; + u32 trace_pa; + u32 trace_len; +}; + +extern struct rproc *rproc_cfg_arr[2]; +/** * enum rproc_mem_type - What type of memory model does the rproc use * @RPROC_INTERNAL_MEMORY_MAPPED: Remote processor uses own memory and is memory * mapped to the host processor over an address range. @@ -126,6 +495,12 @@ struct dm_rproc_ops { * @return virtual address. */ void * (*device_to_virt)(struct udevice *dev, ulong da, ulong size); + int (*add_res)(struct udevice *dev, + struct rproc_mem_entry *mapping); + void * (*alloc_mem)(struct udevice *dev, unsigned long len, + unsigned long align); + unsigned int (*config_pagetable)(struct udevice *dev, unsigned int virt, + unsigned int phys, unsigned int len); }; /* Accessor */ @@ -322,6 +697,13 @@ int rproc_elf64_load_rsc_table(struct udevice *dev, ulong fw_addr, */ int rproc_elf_load_rsc_table(struct udevice *dev, ulong fw_addr, ulong fw_size, ulong *rsc_addr, ulong *rsc_size); + +unsigned long rproc_parse_resource_table(struct udevice *dev, + struct rproc *cfg); + +struct resource_table *rproc_find_resource_table(struct udevice *dev, + unsigned int addr, + int *tablesz); #else static inline int rproc_init(void) { return -ENOSYS; } static inline int rproc_dev_init(int id) { return -ENOSYS; } diff --git a/include/scsi.h b/include/scsi.h index 66a2caa26e3..b47c7463c1d 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -9,6 +9,10 @@ #include <asm/cache.h> #include <linux/dma-direction.h> +/* Fix this to the maximum */ +#define SCSI_MAX_DEVICE \ + (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN) + struct udevice; struct scsi_cmd { diff --git a/include/sl28cpld.h b/include/sl28cpld.h new file mode 100644 index 00000000000..9a7c6de31f5 --- /dev/null +++ b/include/sl28cpld.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2021 Michael Walle <michael@walle.cc> + */ + +#ifndef __SL28CPLD_H +#define __SL28CPLD_H + +#define SL28CPLD_VERSION 0x03 + +int sl28cpld_read(struct udevice *dev, uint offset); +int sl28cpld_write(struct udevice *dev, uint offset, uint8_t value); +int sl28cpld_update(struct udevice *dev, uint offset, uint8_t clear, + uint8_t set); + +#endif diff --git a/include/spl.h b/include/spl.h index bb92bc6ec6c..8ceb3c0f095 100644 --- a/include/spl.h +++ b/include/spl.h @@ -269,8 +269,8 @@ struct spl_load_info { */ binman_sym_extern(ulong, u_boot_any, image_pos); binman_sym_extern(ulong, u_boot_any, size); -binman_sym_extern(ulong, spl, image_pos); -binman_sym_extern(ulong, spl, size); +binman_sym_extern(ulong, u_boot_spl, image_pos); +binman_sym_extern(ulong, u_boot_spl, size); /** * spl_get_image_pos() - get the image position of the next phase diff --git a/include/usb.h b/include/usb.h index f032de8af93..7e3796bd5ba 100644 --- a/include/usb.h +++ b/include/usb.h @@ -163,7 +163,8 @@ struct int_queue; */ enum usb_init_type { USB_INIT_HOST, - USB_INIT_DEVICE + USB_INIT_DEVICE, + USB_INIT_UNKNOWN, }; /********************************************************************** diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 0b068d7da29..50bf4ef3953 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -342,20 +342,20 @@ enum pm_ioctl_id { IOCTL_AIE_ISR_CLEAR = 24, }; -#define PM_SIP_SVC 0xc2000000 +#define PM_SIP_SVC 0xc2000000 -#define ZYNQMP_PM_VERSION_MAJOR 1 -#define ZYNQMP_PM_VERSION_MINOR 0 -#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16 -#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF +#define ZYNQMP_PM_VERSION_MAJOR 1 +#define ZYNQMP_PM_VERSION_MINOR 0 +#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16 +#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF #define ZYNQMP_PM_VERSION \ ((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \ ZYNQMP_PM_VERSION_MINOR) -#define ZYNQMP_PM_VERSION_INVALID ~0 +#define ZYNQMP_PM_VERSION_INVALID ~0 -#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) +#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) /* * Return payload size @@ -367,8 +367,41 @@ enum pm_ioctl_id { #define PAYLOAD_ARG_CNT 5U unsigned int zynqmp_firmware_version(void); +int zynqmp_pmufw_node(u32 id); +int zynqmp_pmufw_config_close(void); void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size); int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); +/* Type of Config Object */ +#define PM_CONFIG_OBJECT_TYPE_BASE 0x1U +#define PM_CONFIG_OBJECT_TYPE_OVERLAY 0x2U + +/* Section Id */ +#define PM_CONFIG_SLAVE_SECTION_ID 0x102U +#define PM_CONFIG_SET_CONFIG_SECTION_ID 0x107U + +/* Flag Option */ +#define PM_SLAVE_FLAG_IS_SHAREABLE 0x1U +#define PM_MASTER_USING_SLAVE_MASK 0x2U + +/* IPI Mask for Master */ +#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK 0x00000001 +#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK 0x00000100 +#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK 0x00000200 + +enum zynqmp_pm_request_ack { + ZYNQMP_PM_REQUEST_ACK_NO = 1, + ZYNQMP_PM_REQUEST_ACK_BLOCKING = 2, + ZYNQMP_PM_REQUEST_ACK_NON_BLOCKING = 3, +}; + +/* Node capabilities */ +#define ZYNQMP_PM_CAPABILITY_ACCESS 0x1U +#define ZYNQMP_PM_CAPABILITY_CONTEXT 0x2U +#define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U +#define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U + +#define ZYNQMP_PM_MAX_QOS 100U + #endif /* _ZYNQMP_FIRMWARE_H_ */ |