diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/imx95_evk.h | 24 | ||||
| -rw-r--r-- | include/imx8image.h | 19 | ||||
| -rw-r--r-- | include/scmi_agent-uclass.h | 17 | ||||
| -rw-r--r-- | include/scmi_protocols.h | 104 |
4 files changed, 160 insertions, 4 deletions
diff --git a/include/configs/imx95_evk.h b/include/configs/imx95_evk.h new file mode 100644 index 00000000000..2eebdadc51d --- /dev/null +++ b/include/configs/imx95_evk.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2025 NXP + */ + +#ifndef __IMX95_EVK_H +#define __IMX95_EVK_H + +#include <linux/sizes.h> +#include <linux/stringify.h> +#include <asm/arch/imx-regs.h> + +#define CFG_SYS_INIT_RAM_ADDR 0x90000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 + +#define CFG_SYS_SDRAM_BASE 0x90000000 +#define PHYS_SDRAM 0x90000000 +/* Totally 16GB */ +#define PHYS_SDRAM_SIZE 0x70000000 /* 2GB - 256MB DDR */ +#define PHYS_SDRAM_2_SIZE 0x380000000 /* 14GB */ + +#define WDOG_BASE_ADDR WDG3_BASE_ADDR + +#endif diff --git a/include/imx8image.h b/include/imx8image.h index 6b95e93fb50..e0d25c5b6c9 100644 --- a/include/imx8image.h +++ b/include/imx8image.h @@ -157,7 +157,9 @@ enum imx8image_cmd { CMD_SOC_TYPE, CMD_CONTAINER, CMD_IMAGE, - CMD_DATA + CMD_DATA, + CMD_DUMMY_V2X, + CMD_HOLD, }; enum imx8image_core_type { @@ -169,7 +171,9 @@ enum imx8image_core_type { CFG_A35, CFG_A55, CFG_A53, - CFG_A72 + CFG_A72, + CFG_M33, + CFG_OEI, }; enum imx8image_fld_types { @@ -208,7 +212,10 @@ typedef enum option_type { FILEOFF, MSG_BLOCK, SENTINEL, - UPOWER + UPOWER, + OEI, + DUMMY_V2X, + HOLD, } option_type_t; typedef struct { @@ -227,12 +234,16 @@ typedef struct { #define CORE_CA35 4 #define CORE_CA72 5 #define CORE_SECO 6 +#define CORE_M33 7 #define CORE_ULP_CM33 0x1 #define CORE_ULP_CA35 0x2 #define CORE_ULP_UPOWER 0x4 #define CORE_ULP_SENTINEL 0x6 +#define CORE_IMX95_M33P 0 +#define CORE_IMX95_A55C0 2 + #define SC_R_OTP 357U #define SC_R_DEBUG 354U #define SC_R_ROM_0 236U @@ -246,10 +257,12 @@ typedef struct { #define IMG_TYPE_EXEC 0x03 /* Executable image type */ #define IMG_TYPE_DATA 0x04 /* Data image type */ #define IMG_TYPE_DCD_DDR 0x05 /* DCD/DDR image type */ +#define IMG_TYPE_OEI 0x05 /* Optional Executable image type */ #define IMG_TYPE_SECO 0x06 /* SECO image type */ #define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */ #define IMG_TYPE_PROV 0x07 /* Provisioning image type */ #define IMG_TYPE_DEK 0x08 /* DEK validation type */ +#define IMG_TYPE_V2X_DUMMY 0x0E /* V2X Dummy image */ #define IMG_TYPE_SHIFT 0 #define IMG_TYPE_MASK 0x1f diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h index 33e0e18c30d..d6586eb3ff9 100644 --- a/include/scmi_agent-uclass.h +++ b/include/scmi_agent-uclass.h @@ -27,6 +27,7 @@ struct scmi_channel; * @clock_dev: SCMI clock protocol device * @resetdom_dev: SCMI reset domain protocol device * @voltagedom_dev: SCMI voltage domain protocol device + * @pinctrl_dev: SCMI pin control protocol device */ struct scmi_agent_priv { u32 version; @@ -43,6 +44,7 @@ struct scmi_agent_priv { struct udevice *clock_dev; struct udevice *resetdom_dev; struct udevice *voltagedom_dev; + struct udevice *pinctrl_dev; }; static inline u32 scmi_version(struct udevice *dev) @@ -115,4 +117,19 @@ struct scmi_agent_ops { struct scmi_msg *msg); }; +struct scmi_proto_match { + unsigned int proto_id; +}; + +struct scmi_proto_driver { + struct driver *driver; + const struct scmi_proto_match *match; +}; + +#define U_BOOT_SCMI_PROTO_DRIVER(__name, __match) \ + ll_entry_declare(struct scmi_proto_driver, __name, scmi_proto_driver) = { \ + .driver = llsym(struct driver, __name, driver), \ + .match = __match, \ + } + #endif /* _SCMI_TRANSPORT_UCLASS_H */ diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h index 7abb2a6f36b..9046de7e3e7 100644 --- a/include/scmi_protocols.h +++ b/include/scmi_protocols.h @@ -24,6 +24,8 @@ enum scmi_std_protocol { SCMI_PROTOCOL_ID_SENSOR = 0x15, SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16, SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN = 0x17, + SCMI_PROTOCOL_ID_PINCTRL = 0x19, + SCMI_PROTOCOL_ID_IMX_MISC = 0x84, }; enum scmi_status_code { @@ -49,6 +51,10 @@ enum scmi_discovery_id { SCMI_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2, }; +enum scmi_imx_misc_message_id { + SCMI_MISC_ROM_PASSOVER_GET = 0x7 +}; + /* * SCMI Base Protocol */ @@ -139,7 +145,7 @@ struct scmi_base_discover_impl_version_out { struct scmi_base_discover_list_protocols_out { s32 status; u32 num_protocols; - u32 protocols[3]; + u32 protocols[]; }; /** @@ -725,12 +731,15 @@ int scmi_pwd_name_get(struct udevice *dev, u32 domain_id, u8 **name); /* * SCMI Clock Protocol */ +#define CLOCK_PROTOCOL_VERSION_3_0 0x30000 enum scmi_clock_message_id { SCMI_CLOCK_ATTRIBUTES = 0x3, SCMI_CLOCK_RATE_SET = 0x5, SCMI_CLOCK_RATE_GET = 0x6, SCMI_CLOCK_CONFIG_SET = 0x7, + SCMI_CLOCK_PARENT_SET = 0xD, + SCMI_CLOCK_GET_PERMISSIONS = 0xF, }; #define SCMI_CLK_PROTO_ATTR_COUNT_MASK GENMASK(15, 0) @@ -769,6 +778,7 @@ struct scmi_clk_attribute_in { struct scmi_clk_attribute_out { s32 status; u32 attributes; +#define CLK_HAS_RESTRICTIONS(x) ((x) & BIT(1)) char clock_name[SCMI_CLOCK_NAME_LENGTH_MAX]; }; @@ -833,6 +843,45 @@ struct scmi_clk_rate_set_out { s32 status; }; +/** + * struct scmi_clk_parent_state_in - Message payload for CLOCK_PARENT_SET command + * @clock_id: SCMI clock ID + * @parent_clk: SCMI clock ID + */ +struct scmi_clk_parent_set_in { + u32 clock_id; + u32 parent_clk; +}; + +/** + * struct scmi_clk_parent_set_out - Response payload for CLOCK_PARENT_SET command + * @status: SCMI command status + */ +struct scmi_clk_parent_set_out { + s32 status; +}; + +/** + * @clock_id: Identifier for the clock device. + */ +struct scmi_clk_get_permissions_in { + u32 clock_id; +}; + +/** + * @status: Negative 32-bit integers are used to return error status codes. + * @permissions: Bit[31] Clock state control, Bit[30] Clock parent control, + * Bit[29] Clock rate control, Bits[28:0] Reserved, must be zero. + */ +struct scmi_clk_get_permissions_out { + s32 status; + u32 permissions; +}; + +#define SUPPORT_CLK_STAT_CONTROL BIT(31) +#define SUPPORT_CLK_PARENT_CONTROL BIT(30) +#define SUPPORT_CLK_RATE_CONTROL BIT(29) + /* * SCMI Reset Domain Protocol */ @@ -1005,4 +1054,57 @@ struct scmi_voltd_level_get_out { s32 voltage_level; }; +/* SCMI Pinctrl Protocol */ +enum scmi_pinctrl_message_id { + SCMI_MSG_PINCTRL_CONFIG_SET = 0x6 +}; + +struct scmi_pin_config { + u32 type; + u32 val; +}; + +/** + * struct scmi_pad_config_set_in - Message payload for PAD_CONFIG_SET command + * @identifier: Identifier for the pin or group. + * @function_id: Identifier for the function selected to be enabled + * for the selected pin or group. This field is set to + * 0xFFFFFFFF if no function should be enabled by the + * pin or group. + * @attributes: Bits[31:11] Reserved, must be zero. + * Bit[10] Function valid. + * Bits[9:2] Number of configurations to set. + * Bits[1:0] Selector: Whether the identifier field + * refers to a pin or a group. + * @configs: Array of configurations. + */ +struct scmi_pinctrl_config_set_in { + u32 identifier; + u32 function_id; + u32 attributes; + struct scmi_pin_config configs[4]; +}; + +struct scmi_pinctrl_config_set_out { + s32 status; +}; + +/* SCMI Perf Protocol */ +enum scmi_perf_message_id { + SCMI_PERF_DOMAIN_ATTRIBUTES = 0x3, + SCMI_PERF_DESCRIBE_LEVELS = 0x4, + SCMI_PERF_LIMITS_SET = 0x5, + SCMI_PERF_LIMITS_GET = 0x6, + SCMI_PERF_LEVEL_SET = 0x7, + SCMI_PERF_LEVEL_GET = 0x8 +}; + +struct scmi_perf_in { + u32 domain_id; + u32 perf_level; +}; + +struct scmi_perf_out { + s32 status; +}; #endif /* _SCMI_PROTOCOLS_H */ |