summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2025-04-12video: panel: add Motorola Atrix 4G and Droid X2 panelSvyatoslav Ryhel
Add support for the LCD panel module used in Motorola Atrix 4G or Droid X2. Exact panel vendor and model are unknown. The panel has a 540x960 (qHD) resolution and uses 24 bit RGB per pixel. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12input: add support for CPCAP power buttonSvyatoslav Ryhel
CPCAP has a dedicated interrupt for power button. Implement this to have more input control over the devices. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12power: regulator: add regulator support for CPCAP PMICSvyatoslav Ryhel
The driver provides regulator set/get voltage and enable/disable functions for CPCAP PMIC. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12power: pmic: add the basic CPCAP PMIC supportSvyatoslav Ryhel
The CPCAP is a Motorola/ST-Ericsson creation, a multifunctional IC whose main purpose was power control. It was used in a wide variety of Motorola products, both Tegra and OMAP based. The most notable devices using this PMIC are the Motorola Droid 4, Atrix 4G, and Droid X2. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12video: tegra: adjust DC and DSI config namesSvyatoslav Ryhel
Fix DC and DSI config names to reflect more generic nature of existing Tegra video drivers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12video: tegra: drop prefix from file namesSvyatoslav Ryhel
Dir name is enough. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12video: move tegra124 into common tegra dirSvyatoslav Ryhel
Place Tegra124 SOR and eDP implenetation into common Tegra driver folder until it is integrated into existing setup. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12video: rename tegra20 to tegraSvyatoslav Ryhel
Since this set of drivers suports four Tegra SoC generations, lets name it just 'tegra'. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2025-04-12video: tegra20: dsi: add Tegra20 supportSvyatoslav Ryhel
Existing Tegra30 DSI configuration is fully compatible with Tegra20. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12sysreset: diverge GPIO reset and poweroff configs per-phaseSvyatoslav Ryhel
GPIO reset and power-off functionality depends on device tree data, which is often absent in SPL or TPL. To address this, incorporate PHASE_ into the config option and add Kconfig option or each phase. Adjust SYSRESET_GPIO and POWEROFF_GPIO uses to address possible regressions. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12ARM: tegra: clock: fix PLLD2 info table entry on Tegra124 and Tegra210Svyatoslav Ryhel
Historically, PLLD2 mirrored PLLD's layout on Tegra30 and 114. However, with the introduction of Tegra124, this changed. This layout alteration was not considered, and it now requires a corrective action to prevent future complications. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12ARM: tegra: clock: take in account PLLD/D2 enable bit on clock_set_rateSvyatoslav Ryhel
PLLD and PLLD2 clocks possess a unique enable bit within their miscellaneous register. Take this into account when using clock_set_rate function. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12spi: tegra20_slink: fix CS polarity setupSvyatoslav Ryhel
Add missing configuration of chip select polarity. Default polarity is LOW, which satisfies most cases but some devices require HIGH polarity and will not work. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-11Merge patch series "Switch to using $(PHASE_) in Makefiles"Tom Rini
Tom Rini <trini@konsulko.com> says: This series switches to always using $(PHASE_) in Makefiles when building rather than $(PHASE_) or $(XPL_). It also starts on documenting this part of the build, but as a follow-up we need to rename doc/develop/spl.rst and expand on explaining things a bit. Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
2025-04-11doc/develop/codingstyle.rst: Expand to include CONFIG_IS_ENABLED and PHASE_Tom Rini
Expand the conditional compilation section to explain when to use CONFIG_IS_ENABLED rather than IS_ENABLED and provide an example. Next, note what the PHASE_ macro is supposed to be used for as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-11doc/develop/codingstyle.rst: Add a section on conditional compilationTom Rini
In order to make a start on explaining how and when to use certain macros, we need to document their usage somewhere. As a first step, take section 21 of the v6.13 Linux Kernel coding-style document on conditional compilation, verbatim, and add it to our documentation. Further rewording to be clearer about U-Boot will be done next. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-11Kbuild: Always use $(PHASE_)Tom Rini
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our Makefiles as part of the macros to determine when to do something in our Makefiles based on what phase of the build we are in. For consistency, bring this down to a single macro and use "$(PHASE_)" only. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-11cmd: optee: fix hello subcommand argument checkVincent Stehlé
When the `optee hello' subcommand is called, the do_optee_hello_world_ta() function passes a NULL pointer to the strcmp() function while verifying its input argument, which results in the following crash: => optee hello "Synchronous Abort" handler, esr 0x96000010, far 0x0 Fix this by verifying the number of input arguments instead. Fixes: e3cf80fbe02d ("cmd: Add support for optee commands") Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com> Cc: Jens Wiklander <jens.wiklander@linaro.org> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Tom Rini <trini@konsulko.com> Cc: Jerome Forissier <jerome.forissier@linaro.org> Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
2025-04-11configs: qemu-arm raise CONFIG_NR_DRAM_BANKSHeinrich Schuchardt
The number of memory banks in QEMU is not bounded by 1. In this example we have two banks: qemu-system-aarch64 \ -machine virt \ -nographic \ -cpu cortex-a72 \ -m 8G \ -smp 8,sockets=2,cores=4,threads=1 \ -object memory-backend-ram,id=mem0,size=4G \ -numa node,cpus=0-3,memdev=mem0 \ -object memory-backend-ram,id=mem1,size=4G \ -numa node,cpus=4-7,memdev=mem1 \ -bios u-boot.bin Use the default value defined in /Kconfig as 4. Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Suggested-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11configs: phycore_am62x_a53_defconfig: Enable gpioDaniel Schultz
The AM62x uses the DA8XX (DaVinci) GPIO controller. Enable CONFIG_DA8XX_GPIO to support GPIO access from the Cortex-A53. Also enable the 'gpio' command to allow users to interact with GPIOs from the U-Boot shell. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-04-11configs: phycore_am62x_a53_defconfig: Enable remoteproc cmdDaniel Schultz
This enables the 'rproc' command, allowing users to start, stop, and manage co-processors as well as load firmware images. Useful for systems with auxiliary cores, such as the M4 core in the AM62x soc. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-04-11configs: phycore_am64x_a53_defconfig: Enable remoteproc cmdDaniel Schultz
This enables the 'rproc' command, allowing users to start, stop, and manage co-processors as well as load firmware images. Useful for systems with auxiliary cores, such as M4 or R5 cores in the AM64x soc. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-04-11CI: Build missing binman tools before binman testsLeonard Anderweit
The CI image does not ship with all tools required for the binman tests. Have binman build the missing tools. Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
2025-04-11Merge tag 'qcom-for-2025.07' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon Qualcomm changes for v2025.07: CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/25653 There's been a surprising amount of activity lately on the Qualcomm side with the two oldest boards getting some fresh attention and a lot of cleanup and polish going on across the board. * SDM660 gets USB phy fixes and a pinctrl driver * The recently added SA8775P/QCS9100 SoC gets a pinctrl driver * The Qualcomm pinctrl driver now handles reserved pins correctly, fixing crashes on some boards when running "gpio status -a" * OF_UPSTREAM_BUILD_VENDOR is enabled in qcom_defconfig * SDM845 and SC7280 get missing clocks added (since we're now stricter about those). This gets USB working more reliably in more cases. * DM_USB_GADGET is enabled for all boards using DWC3 and fasbtoot is enabled too * A bug in the livetree fixup code is fixed (making USB work on a lot more platforms) * Button label lookup is made case insensitive* bootretry becomes more dynamic, allowing it to be hijacked to make a "persistent" boot menu that allows dropping to U-Boot shell later on * A new qcom-phone.config fragment is added along with a phone-specific default environment and phone-specific debugging/bringup docs. These make U-Boot more usable on devices without a serial port or keyboard. * The db820c gets fixed up and updated documentation * The db410c also gets some love and modernisation as well as a new reviewer. * A new driver is added for the USB VBUS regulator found on various Qualcomm PMICs * The Qualcomm SPMI driver gets some fixes and cleanup for SPMI v5 and v7 support.
2025-04-11Merge tag 'u-boot-imx-master-20250411' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25652 - Add i.MX8MP LDB support. - Various phycore-imx93 environment improvements. - Add support for Toradex SMARC iMX8MP.
2025-04-11Merge tag 'efi-2025-07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2025-07-rc1 CI: * https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25648 Documentation: * Update authenticated capsules documentation UEFI: * Add support for loading FIT images including initrd - efi_loader: efi_load_initrd: provide a memory mapped initrd - efi_loader: binary_run: register an initrd - bootm: add support for initrd in do_bootm_efi * efi_selftest: remove un-needed NULL checks * efi: Fix efiboot for payloads loaded from memory * Print extra information from the bootmgr * Move public cert for capsules to .rodata * Set EFI capsule dfu_alt_info env explicitly * Make FDT extra space configurable * Install the ACPI table from the bloblist * Handle GD_FLG_SKIP_RELOC * Handle malloc() errors Others: * acpi: select CONFIG_BLOBLIST * smbios: select CONFIG_BLOBLIST * xilinx: dfu: Fill directly update_info.dfu_string * cmd: fwu: Dump custom fields from mdata structure * board: remove capsule update support in set_dfu_alt_info()
2025-04-11Merge tag 'mmc-2025-04-11' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mmc CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/25640 - Support Sandisk and Micron eMMC BOOT/RPMB hardware partition resizing - Optimize eMMC erasing time - Simplify poll CD logic - Fix possible Synchronous Abort for sdhci - Kconfig dependencies fix - Minor code update, return fail if mmc_complete_init, avoid uniniting twice
2025-04-11board: dragonboard410c: Update maintainersStephan Gerhold
Ramon has been inactive on the U-Boot mailing list for over a year now and the DB410c port has not been updated much lately. I've been doing most of the DB410c-specific fixes/rework lately and try to test it every now and then, so add myself as new maintainer. Also add Sam as reviewer, since he's been doing lots of testing and reviews for MSM8916 recently. Cc: Sam Day <me@samcday.com> Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-13-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Use button_cmd instead of custom codeStephan Gerhold
Simplify the board code by using the new BUTTON_CMD functionality, instead of implementing this separately using C code. This allows disabling or customizing this functionality if wanted. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-12-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Enable support for Android boot imagesStephan Gerhold
The U-Boot port for DB410c still has plenty of extra space available at this point, so avoid disabling features that would be normally enabled by default. In particular, this incldues support for Android boot images, which is quite likely to be used together with the USB Fastboot interface. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-11-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Use BOOTSTD instead of DISTRO_DEFAULTSStephan Gerhold
Reduce the environment size by using standard boot instead of distro boot. It uses faster bootdevs first by default (eMMC -> SD -> USB -> Network), so set "boot_targets" to keep the current ordering (USB -> SD -> eMMC -> Network). Perhaps this should be changed for consistency, but for now this keeps the behavior similar to before. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-10-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Enable RTL8152 ethernetStephan Gerhold
The Geniatech DB4 V3 [1] has a RTL8152 onboard for Ethernet. I don't have one to test if that works, but the other USB Ethernet drivers work pretty much as-is, so just enable it with the assumption it will work out fine. [1]: https://www.96boards.org/product/db4/ Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-9-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Fix counter frequencyStephan Gerhold
The actual counter frequency is 19.2 MHz, not 19.0 MHz. This isn't really used so far though, since probably no one (except me) ever tried using U-Boot in EL3 where we need to program the counter frequency. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-8-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Use dynamically allocated load addressesStephan Gerhold
The generic Qualcomm board code allocates addresses for loading the kernel, ramdisk, DT, fastboot etc. This also happens on the DB410c and already overrides these definitions defined in the default env. So let's just drop the static ones, since the dynamic ones work just fine. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-7-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Drop unused linux_imageStephan Gerhold
This does not seem to be used anywhere. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-6-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Drop reflash functionalityStephan Gerhold
This is broken ever since we switched to using U-Boot as first stage bootloader. Since no one seems to test this actively, let's just drop this entirely. There are other tools available for re-flashing the DB410c. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-5-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Drop UNSTUFF_BITS() macroStephan Gerhold
This was originally taken from Linux, but at this point it's an inline function upstream and no longer a macro. Given that we just want to extract the serial number from the MMC CID, let's just inline that specifically. This is also the style used in the MMC core code within U-Boot. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-4-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Fix BD addressStephan Gerhold
local-bd-address in the device tree needs to be formatted with the least significant byte first (i.e. little endian). We're not doing this when adding it to the DT, which means the MAC address ends up being reversed in Linux. Fix this by reversing the array before setting it in the DT. We're also flipping the wrong bit when generating the BD address. Before reversing the array, the least significant bit is in the last byte. Fixes: ff06dc240325 ("db410: alter WLAN/BT MAC address fixup") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-3-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board: dragonboard410c: Fix RAM sizeStephan Gerhold
DB410c has exactly 1 GiB of RAM. Some of it is reserved, but this is described separately in the DT. This was fixed before in commit 1d667227ea51 ("board: dragonboard410c: Fix PHYS_SDRAM_1_SIZE"), but was reintroduced when DB410c was converted to use the upstream device tree. Note that there are variants of apq8016-sbc with 2 GiB RAM (e.g. the Geniatech DB4). They need the WIP SMEM memory map parsing [1] to use the full amount of RAM. [1]: https://lore.kernel.org/u-boot/20241124-b4-modernise-smem-v1-0-b7852c11b67c@linaro.org/T/ Fixes: ed8fbd2889fc ("dts: msm8916: replace with upstream DTS") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-2-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11mach-snapdragon: Fix EL2 boot on DragonBoard 410cStephan Gerhold
The workaround for the "PSCI bug" on DragonBoard 410c implemented in arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register by storing the CurrentEL in there. When running in EL1, the mode switch sequence implemented there later clears the register again, but this is skipped when U-Boot is booted in EL2. This causes crashes in the mach-snapdragon board_fdt_blob_setup() later, because the invalid address stored in x0 gets dereferenced to check if it points to a valid DTB. We can't rely on having a valid values in the CPU registers for the first stage bootloader configuration on DB410c, and nothing would place a DTB there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0 hook case to avoid crashing with the clobbered register value. Fixes: 059d526af312 ("mach-snapdragon: generalise board support") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-1-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11pinctrl: qcom: handle reserved rangesCaleb Connolly
Some Qualcomm boards feature reserved ranges of pins which are protected by firmware. Attempting to read or write any registers associated with these pins results the board resetting. Add support for parsing these ranges from devicetree and ensure that the pinctrl and GPIO drivers don't try to interact with these pins. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250410-topic-sm8x50-pinctrl-reserved-ranges-v2-1-654488392b9a@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11button: make button_get_by_label() case insensitiveCaleb Connolly
This function is already doing a fuzzy match, since there are no guarantees that a given label is unique. Ignoring case makes it much easier to catch "Volume down" or "Volume Down" in board-agnostic code. Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-6-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11button: qcom-pmic: prettify and standardise button labelsCaleb Connolly
Boards using gpio-keys for volume buttons label them "Volume Down", let's match that here, and make the power button nicer too. This simplifies configuring button_cmds in a board-agnostic way. Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-5-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11doc: board/qualcomm: describe phone support and bringupCaleb Connolly
Add some documentation which attempts to describe Qualcomm smartphone support with the qcom-phone.config fragment, as well as a high level debugging guide for diagnosing U-Boot issues when UART and framebuffer are unavailable. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-4-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11bootretry: check for bootretry variable changesCaleb Connolly
To enable more complex sequencing of the bootmenu, autoboot, and bootretry, handle changes to the bootretry variable between tries. This makes it possible to turn bootretry off (e.g. to drop to a shell) and then back on again. This makes it possible to have a persistent bootmenu (the only way to navigate U-Boot on devices like smartphones which lack a physical keyboard) by having bootcmd be defined to launch the bootmenu. This allows for menu options like enabling USB mass storage gadget to return back to the boot menu once the gadget is shut down. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-3-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11cli_hush: support running bootcmd on boot retryCaleb Connolly
Introduce a new config option: RETRY_BOOTCMD. When enabled this causes hush shell to re-run "bootcmd" when the auto-boot counter times out. Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-2-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11board/qualcomm: introduce phone configCaleb Connolly
Phones don't have keyboards! Introduce a phone-specific config fragment and associated environment file to make U-Boot more useful on these devices. This allows for navigating via the buttons and enabling various USB gadget modes or displaying info about U-Boot. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-1-f52e57d3b8c6@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driverAlexey Minnekhanov
Add support for TLMM pin controller block (Top Level Mode Multiplexer) on SDM630/660 SoCs, with support for special pins. Correct pin configuration is required for working debug UART and eMMC/SD cards. SDM630 and SDM660 TLMM blocks are the same. Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11gpio: msm: return correct value return for special output pinsNeil Armstrong
When a special pin is output only, the current code would return 0, but if the pin is output only we can get the output value. Try to return the output value and in all the other cases return an error instead of 0. Fixes: f9bb539460d ("gpio: msm: add support for special pins") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-2-a1148a02bb16@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11gpio: msm: fix get_function return for special pinsNeil Armstrong
The get_function callback wrongly returns 0 for special pins, return the appropriate pin function by probing into the special pins data fields to find if the pin is gpio capable. Fixes: f9bb539460d ("gpio: msm: add support for special pins") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-1-a1148a02bb16@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-02 17:57:21 +0000