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2021-04-10efi_loader: EFI_UNACCEPTED_MEMORY_TYPEHeinrich Schuchardt
* UEFI spec 2.9 introduced a new memory type EFI_UNACCEPTED_MEMORY_TYPE. Add it to enum EFI_MEMORY_TYPE. * Add missing EFI_MEMORY_CPU_CRYPTO constant * Improve description of EFI_PERSISTENT_MEMORY_TYPE Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10efi_loader: simplify efi_get_device_path_text()Heinrich Schuchardt
Replace static function efi_get_device_handle_info() by a simplified function efi_get_device_path_text() avoiding EFI_CALL(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10doc: mmc man-pageJaehoon Chung
Provide a man-pages for the mmc command. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-10doc: Add build instructions for OP-TEE backed EFI variablesIlias Apalodimas
Since that invlolves external projects and not only U-Boot, add guidance for supported platforms Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10efi_loader: documentation codepage_437[]Heinrich Schuchardt
Variables cannot be documented via kernel-doc. Avoid 'make htmldocs' build warning ./include/charset.h:19: warning: cannot understand function prototype: 'const u16 codepage_437[128]; ' Fixes: 70616a1ed8c7 ("efi_loader: move codepage 437 table") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10linker_lists: document ll_entry_ref parametersHeinrich Schuchardt
Avoid 'make htmldocs' build warnings: ./include/linker_lists.h:224: warning: Function parameter or member '_type' not described in 'll_entry_ref' ./include/linker_lists.h:224: warning: Function parameter or member '_name' not described in 'll_entry_ref' ./include/linker_lists.h:224: warning: Function parameter or member '_list' not described in 'll_entry_ref' Fixes: 851144350b6f ("linker_lists: Allow use in data structures") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10efi_loader: improve documentation of enum efi_test_phaseHeinrich Schuchardt
* Avoid a warning: "Incorrect use of kernel-doc format". * Remove duplicate text. * Clarify usage of EFI_SETTING_VIRTUAL_ADDRESS_MAP. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10fs: fat: fix file_fat_detectfs()Heinrich Schuchardt
Up to now file_fat_detectfs() did not detect some interface types like EFI, HOST, VIRTIO. Avoid duplicate code by calling blk_get_if_type_name(). The interface type now will be shown in lower case to match all other use cases. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10efi_loader: Cleanup get_var duplicationIlias Apalodimas
get_var() is defined statically in efi_bootmgr.c and doesn't properly check a buffer allocation. Remove it completely and use the exported function from efi_var_common.c that does the same thing Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10doc: Update uefi documentation for initrd loading optionsIlias Apalodimas
Document the command line options for efidebug and initrd loading Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Rewiewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10rockchip: video: vop: Add reset supportArnaud Patard (Rtp)
In order to ensure that the VOP registers are in correct state, add missing support for the VOP reset lines found in the device-tree Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: edp: Add missing reset supportArnaud Patard (Rtp)
In order to ensure that the eDP registers are in correct state, add missing support for the eDP reset lines found in the device-tree. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: vop: Fix format of fbbase in debug stringArnaud Patard (Rtp)
The debug string printing the device name, framebuffer address and of node is using %lu as format for the framebuffer address, which is not so nice. Change it to %lx. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: pwm: Fix default polarityArnaud Patard (Rtp)
In the code, the default polarity is set to positive/positive, which is neither normal polarity or inverted polarity. It's only the hardware default. This leads to booting linux with wrong polarity setting. Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE by default instead. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: Pinebook Pro: Enable edpArnaud Patard (Rtp)
- uboot rockchip edp code is looking for a rockchip,panel property for the edp dts node, so add it. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10Rockchip: video: vop: Reserve efi fb memoryArnaud Patard (Rtp)
When booting with EFI and graphics, the memory used for framebuffer has to be reserved, otherwise it may leads to kernel memory overwrite. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10Rockchip: video: edp: Change interrupt polarity configurationArnaud Patard (Rtp)
The linux code is setting polarity configuration to 3 but uboot code is setting it to 1. Change the configuration to match the linux configuration Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: edp: Add rk3399 supportArnaud Patard (Rtp)
According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 eDP IPs are nearly the same, the difference is in the grf register (SOC_CON6 versus SOC_CON20). So, change the code to use the right register on each IP. The clocks don't seem to be the same, the eDP clock is not at index 1 on rk3399, so don't try changing the clock at index 1 to rate 0 on rk3399. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: vop: Use endpoint compatible string to find VOP modeArnaud Patard (Rtp)
The current code is using an hard coded enum and the of node reg value of endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order is different between rk3288, rk3399 vop little, rk3399 vop big. A possible solution would be to make sure that the rk3288.dtsi and rk3399.dtsi files have "expected" reg value or an other solution is to find the kind of endpoint by comparing the endpoint compatible value. This patch is implementing the more flexible second solution. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-09Merge tag 'u-boot-stm32-20210409' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
2021-04-09Merge branch 'v2021.07-rc1' of https://github.com/lftan/u-bootTom Rini
2021-04-09Merge tag 'u-boot-imx-20210409' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210409 ------------------- - Secure Boot : - HAB for MX8M / MX7ULP - CAAM fixes - Fixes for imxrt1020 - Fixes for USDHC driver - Fixes for Toradex (Colibri / Apalis) - Switch to DM for several boards - mx23 olinuxo - usbarmory - marsboard / riotboard - Gateworks GW Ventana - NXP upstream patches (LPDDR / CAAM / HAB) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-09arm: stm32mp1: Set soc_type, soc_pkg, soc_rev env variablesMarek Vasut
Split up get_soc_name(), clean the decoding up a bit, and set up environment variables which contain the SoC type, package, revision. This is useful on SoMs, where multiple SoC options are populated. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09configs: stm32mp1: Fix misleading SPL size limitationsAlexandru Gagniuc
A now removed comment promises to "limit SYSRAM usage to first 128 KB". This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be used. This is not what happens at all. First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000). Some of it is in the first 128 KiB and some of it is in the second 128 KiB chunk of SYSRAM. Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much larger than SYSRAM, and doesn't account for the non-BSS sections. Because we're putting the .text and .bss in the same boat, the correct way to limit them together is via SPL_MAX_FOOTPRINT. With the current SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first 128 KiB, and there is no technical reason to do so. Because of this, simply allow the SPL to use all SYSRAM. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09configs: stm32mp1: Remove misleading CONFIG_SPL_BSS_START_ADDRAlexandru Gagniuc
CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts. stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds, which does not make use of this definition. The SPL BSS starts in SRAM, right after .text, .rodata, .data, and .u_boot_list. A very short version of the STM32MP1 memory map is: * SYSRAM: 2ffc0000 - 30000000 <- all of SPL is here * DRAM: c0000000+ 0xC0200000 is a DRAM address, and has nothing to do with SPL. It is just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to have it at all. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09configs: stm32mp1: stm32mp1: Increase SPL malloc() sizeAlexandru Gagniuc
Since commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images"), FIT images must be malloc()'d before being loaded. The old size of 1 MiB is suitable for FIT images with u-boot and an FDT, but something containing a linux kernel is almost sure to fail. It's safe to extend malloc all the way to 0xc2000000, but no further. Linux likes to be loaded at 0xc2000000, so we use that as our cutoff point. This gives us 29 MiB of malloc() space, which suited for more complex FIT images including several DTBs, kernel, and OP-TEE images. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09stm32mp1: remove the board_check_usb_power function when ADC is not activatedPatrick Delaunay
Simplify the code of the function board_check_usb_power based in CONFIG_ADC and adc_measurement; the function is removed by the linker when the CONFIG_ADC is not activated. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-09stm32mp: replace printf by log macro in setup_boot_modePatrick Delaunay
Replace the remaining printf in setup_boot_mode() by log macro to handle filtering for log features. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09stm32mp: update uart number in trace of serial device not foundPatrick Delaunay
Align the uart number in the trace of setup_boot_mode() with the name of the uart/usart device (start at 1) and not with the instance value (start at 0), i.e. the serial device sequence number and the index in serial_addr[]. Fixes: f49eb16c17e2c ("stm32mp: stm32prog: replace alias by serial device sequence number") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09stm32mp: stm32prog: add FIP header supportPatrick Delaunay
Add support of TF-A FIP header in command stm32prog for all the boot partition and not only the STM32IMAGE. This patch is a preliminary patch to support FIP as second boot stage after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain. The FIP is archive binary loaded by TF-A BL2, which contains the secure OS = OP-TEE and the non secure firmware and device tree = U-Boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OFJagan Teki
7" OF is a capacitive touch 7" Open Frame panel solutions with - 7" AUO B101AW03 LVDS panel - EDT, FT5526 Touch MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" Open Frame Solution board. Linux dts commit details: commit <1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 boardJagan Teki
MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. Genaral features: - Ethernet 10/100 - USB Type A - Audio Out - microSD - LVDS panel connector - Wifi/BT (option) - UMTS LTE with sim connector (option) MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. Linux dts commit details: commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 Micro SoMJagan Teki
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. General features: - STM32MP157AAC - Up to 1GB DDR3L-800 - 512MB Nand flash - I2S MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier boards for creating complete platform solutions. Linux dts commit details: commit <0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoM") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09board: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0Jagan Teki
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Carrier board for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. Linux dts commit details: commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09board: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter KitJagan Teki
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Evaluation board for creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. Linux dts commit details: commit <adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09ARM: stm32: Imply SPL_SPI_LOADJagan Teki
SPI Load isn't mandatory for STM32 builds. Let's imply instead of select it to get rid of build issues for non-SPI defconfigs. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09ARM: dts: stm32: Add Engicam i.Core STM32MP1 1X4Gb DDR3Jagan Teki
Engicam i.Core STM32MP1 SODIMM SoM has mounted 1x4Gb DDR3 which has 32bits width 528000Khz frequency. Add DDR configuration via dtsi. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoMJagan Teki
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. General features: - STM32MP157A - Up to 1GB DDR3L - 4GB eMMC - 10/100 Ethernet - USB 2.0 Host/OTG - I2S - MIPI DSI to LVDS - rest of STM32MP157A features i.Core STM32MP1 needs to mount on top of Engicam baseboards for creating complete platform solutions. Linux commit details: commit <30f9a9da4ee1> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09board: Add rt-thread art-pi board supportdillon min
All these files are add for support rt-thread art-pi board - add board/st/stm32h750-art-pi, defconfig, header support for u-boot for more information about art-pi, please goto: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ram: stm32: fix strsep failed on read only memorydillon min
strsep will change data from original memory address, in case the memory is in non-sdram/sram place, will run into a bug(hang at SDRAM: ) just add a temporary array to store bank_name[] to fix this bug. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6dillon min
This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add pin groups for usart3/uart4/spi1/sdmmc2 - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750i-art-pi.dts to support art-pi board - add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot) art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ARM: dts: stm32: fix i2c node typo in stm32h743, update dmamux1 registerdillon min
Replace upper case by lower case in i2c nodes name. update dmamux1 register range. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ARM: dts: stm32: add new instances for stm32h743 MCUdillon min
Some instances are missing in current support of stm32h743 MCU. This commit adds usart3/uart4 and sdmmc2 support. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750dillon min
This patch is intend to add support stm32h750 value line, just add stm32h7-pinctrl.dtsi for extending, with following changes: - rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi - move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi - update stm32h743i-{disco, eval}.dts to include stm32h7-pinctrl.dtsi Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09ARM: dts: stm32: split sdram pin & timing parameter into specific board dtsdillon min
As different boards has their own sdram hw connection, mount different sdram modules, so move sdram timing parameter and pin configuration to their board device tree. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-08imx: bootaux fix elf loadingMax Krummenacher
This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit 805b3cac1e0c. The loader function name was changed so that it does not clash with the generically available function in lib/elf.c. imx-bootaux loads an elf file linked for an auxilary core. Thus the loader function requires address translation from the auxilary core's address space to where those are mapped into U-Boot's address space. So the elf loader is specific and must not be replaced with a generic loader which doesn't provide the address translation functionality. Fixes commit 805b3cac1e0c ("lib: elf: Move the generic elf loading/validating functions to lib") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-04-08pico-imx6ul: Pass the PMIC I2C address in pmic_get()Fabio Estevam
Pass "pfuze3000@8" in pmic_get() so that the PMIC node can be found in the devicetree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-08mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessaryHaibo Chen
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need around 18ms, common code only delay 10ms, so need to delay extra 8ms. Otherwise voltage switch will timeout when wait for data0 line. This IO voltage switch time depends on board design, depend on the PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF capacitance. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: fsl_esdhc_imx: remove redundant cmd11 related code.Haibo Chen
Common code already handle the voltage switch sequence based on spec, so remove the redundant voltage switch code. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08imx6: icorem6: chmod 644 enigcam.bmpHeinrich Schuchardt
Bitmap files should not be executable. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-25 18:01:35 +0000