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Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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This adds initial support for the Toradex Verdin AM62P module.
The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.
These specific changes adds support for Toradex Verdin AM62P Quad 2GB WB
IT module.
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
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Add the new PID4 to the ConfigBlock handling:
- 0098 Aquila iMX95 Hexa 16GB WB IT
- 0099 Verdin AM62P Quad 2GB WB IT
- 0201 SMARC iMX95 Hexa 8GB IT
- 0202 SMARC iMX95 Hexa 4GB WB IT
- 0203 SMARC iMX95 Hexa 4GB ET
- 0204 SMARC iMX95 Hexa 2GB WB IT
- 0205 SMARC iMX95 Hexa 2GB ET
- 0206 SMARC iMX8M Plus Quad 4GB IT
- 0207 SMARC iMX8M Plus Quad 2GB WB IT
- 0208 SMARC iMX8M Plus Quad 2GB IT
- 0209 SMARC iMX8M Plus Quadlite 1GB WB ET
- 0210 SMARC iMX8M Plus Quadlite 1GB ET
- 0211 Aquila AM69 Octa 32GB IT
- 0212 Aquila AM69 Octa 16GB WB IT
- 0213 Aquila AM69 Octa 16GB IT
- 0214 Aquila AM69 Octa 8GB WB IT
- 0215 Aquila AM69 Octa 8GB IT
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
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implement a driver to use semtech pinctrl and
gpio expander, this driver is adapted from a
existent linux driver that is written by
Gregory Bean <gbean@codeaurora.org>.
Signed-off-by: Anis Chali <chalianis1@gmail.com>
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Prevent file descriptor leaks by properly closing 'fd' and 'new_fd'
when fstat() or write() operations fail.
- Added close(fd) before return in open_for_read() if fstat() fails.
- Added close(new_fd) before return in write_image() if write() fails.
- No close needed if open() fails (fd == -1 is invalid).
Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
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Tom Rini <trini@konsulko.com> says:
Hey all,
Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.
Link: https://lore.kernel.org/r/20250521230119.2084088-1-trini@konsulko.com
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The value of "ETH_ALEN" is defined to 6 in <linux/if_ether.h>. This file
is included in <net.h>. In the places where we had ETH_ALEN but no
direct include of <net.h>, add <linux/if_ether.h>. In the places where
we had a custom name used, make use of ETH_ALEN instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
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There are only a few things found in <mtd.h> today. Go through and audit
the C files which include <mtd.h> and remove it when not required. Then,
add it to the files which had either missed it or had an indirect
inclusion of it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <linux/sizes.h> nor <linux/compiler.h> so remove
them. This exposes however that a number of other files had been relying
on this implicit include for <linux/sizes.h> so add that where needed.
Signed-off-by: Tom Rini <trini@konsulko.com>
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At this point in time, <ide.h> provides the IDE_BUS macro and the
function prototype for ide_set_reset, which is used with IDE_RESET. The
only files which should include this header are the ones that either use
that macro or that function. Remove <blk.h> from <ide.h> and remove
<ide.h> from places which do not need it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <asm/cache.h> so remove it. However the file
common/spl/spl_fat.c does need it, so add it there.
Signed-off-by: Tom Rini <trini@konsulko.com>
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In include/efi_loader.h we do not directly need <log.h>, <part_efi.h>,
<pe.h> nor <linux/oid_registry.h> so remove them. In include/efi_tcg2.h
we make use of <part_efi.h> but did not include it, so add it directly.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <asm/cache.h> so remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <edid.h> so remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need a forward declaration of 'struct list_head' as
it includes <linux/list.h> so remove it.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <time.h> so remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <compiler.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <linux/mtd/mtd.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <linux/list.h> so remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <linux/list.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <pc.h> but does directly need
<linux/types.h>. Furthermore, arch/x86/lib/bios.c was getting <pci.h>
via <bios_emul.h> so add it there.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <linux/printk.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This file does not need <pci.h> but does directly need <linux/types.h>.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Align U-Boot image end to 8 bytes to make sure DT alignment requirement
is fulfilled. This fixes a possible failure in fdt_find_separate() in
case the U-Boot image is aligned to 4 Bytes and DT is appended at the
end at already 8 Byte aligned offset.
Link: https://source.denx.de/u-boot/u-boot/-/issues/30
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-20250602
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26466
Usb gadget:
dwc2: Fix incorrect ULPI_UTMI_SEL bit setting
dwc2: Fix HBstLen setting for external DMA mode
dwc2: Various refactors to get the code closer to Linux
dwc2: Support reset logic for v4.20a
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Refactor DWC2 USB gadget driver to replace manual read-modify-write
operations with `clrsetbits_le32`, `setbits_le32`, and `clrbits_le32`
macros, which simplify the code and improve readability.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20250126-dwc2-clrsetbits-refactor-v1-1-68c27e1b6f84@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Updates all instances of uint8_t, uint16_t, and uint32_t to u8, u16, and
u32 respectively, ensuring consistent use of kernel-preferred types and
resolving checkpatch.pl warnings.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-8-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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This patch merges flush and reset logic for both host and gadget code
into a common set of functions, reducing duplication. It also adds support
for the updated reset logic to compatible with core version since v4.20a.
This patch mainly refers to the patch in the kernel.
link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=65dc2e725286106f99c6f6b78e3d9c52c15f3a9c
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-7-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Some macros are shared between host and gadget code, causing duplicated
definitions. Move DWC2 macro definitions from host and gadget code into a
common header to reduce duplication.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-6-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Update the DWC2 macros to match those used in the Linux kernel, making
it easier to synchronize updates with kernel. Also removed some unused
macros to cleanup the code.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-5-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Use FIELD_PREP, FIELD_GET, BIT, and GENMASK macros to standardize bit
manipulation across the DWC2 code, improving readability and
maintainability without altering functionality.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-4-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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The loop used to calculate HBstLen for extern DMA mode does not produce
the correct result according to the datasheet [1]. Replacing that loop
with a direct calculation using LOG2 to correctly assign the burst length
in the GAHBCFG register for external DMA mode.
[1] https://rockchip.fr/RK312X%20TRM/chapter-26-usb-otg-2-0.pdf#page=24
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-3-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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The ULPI_UTMI_SEL bit in the DWC2 driver was set incorrectly. According
to the datasheet [1], this bit should be set to 0 for UTMI interface and 1
for ULPI interface. The existing code had this logic reversed,
causing the interface selection to be incorrect.
This commit corrects the ULPI_UTMI_SEL bit setting to match the
datasheet's description. Referencing the kernel's code [2] also confirms
this fix.
[1] https://rockchip.fr/RK312X%20TRM/chapter-26-usb-otg-2-0.pdf#page=30
[2] https://github.com/torvalds/linux/blob/v6.13-rc3/drivers/usb/dwc2/core.c#L1106
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-2-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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The same registers are accessed in both the otg and gatet drivers of
dwc2, and these registers are repeatedly defined in these two parts.
Extract register definitions into a common header file to reduce
redundancy and make the code more maintainable.
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-1-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26436
- Add i.MX6UL clk driver.
- Improve the .MX6UL NAND controller performance.
- Add imx6ulz BSH SMM M2B board.
- Several improvements for imx8m venice boards.
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Introduce the BSH SystemMaster (SMM) M2B board. Notably, the M2B is
designed to leverage the existing device tree of its predecessor, the M2.
The primary distinction arises from memory incompatibilities with the M2.
To address this, we've implemented a configuration system that allows for
selective inclusion of the desired memory components.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
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Enable the clock framework on the m2 platform.
This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
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The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x500000, size 0x800000
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
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Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
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Add i.MX6UL clk driver for i.MX6UL CLK driver model usage
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
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The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.
Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Append the optional board configuration string to the model info.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Update the model string representation for the Venice-Flex product
family (GW8xxx).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The Gateworks Flexible Socket Adapters adapt common
busses such as SDIO/UART/USB/PCI to various connectors
such as M.2 B-Key, M.2 E-Key, M.2 M-Key, and MiniPCIe.
Each FSA has an EEPROM onboard describing its details as well as an
optional port-expander for configurable GPIO's.
Add support for identifying the FSA's and configuring their
details such as user description and GPIO's:
- enable pca953x, pca954x and eeprom support for communicating
with the I2C eeprom and gpio port expander on the FSA
- add FSA detection support
- add FSA gpio configuration support
Each FSA is identified in the device-tree by an alias to it's I2C
bus where an eeprom@54 node must exist as well as an gpio@20 node
for an io-expander. These nodes must be enabled so that
they can be probed to determine if they are actually present in
the system. If not present or not enabled the gpio expander can
not be used. This also requires livetree as the gpio expander
node if not present must be disabled.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
baseboard featuring:
- i.MX8M Plus SoC
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller (GSC)
- microSD (1.8V/3.3V Capable)
- panel status bi-color LED
- pushbutton switch
- fan controller with tachometer
- USB Type-C connector
- PCIe switch
- 2x GbE RJ45 connectors
- multi-protocol RS232/RS485/RS422 Serial ports
- 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
(for M.2 and miniPCIe expansion)
- 2x isolated CAN
- GPS
- accelerometer
- magnetometer
- off-board connectors for: SPI, GPIO, I2C, ADC
- Wide range DC power input
- support for 802.3at PoE (via adapter)
Add support for it by providing its device-tree.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Flip the logic used to determine if a board has the proper hardware to
support enabling the GSC voltage supervisor so that we do not need to
keep adding new models to the list.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Use the SOM model to adjust PMIC settings on SOM's.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The venice family of baseboards which is normally GW7xxx
is being expanded to GW8xxx so we need to use the baseboard
number instead of the som.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The GW7901-SP486 with the exception of the -C revision has 2GB DRAM
loaded but incorrectly specifies 1GB in the EEPROM. Adjust the DRAM size
to account for this.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
of the DDRC and DDR PHY registers.
The 512MB configuration used this alternate bus layout. Change
the 512MB config to the standard bus configuration and add a generic
function to patch the DDRC/PHY configs for the alternate bus layout.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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