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This created a conflict when linking.
Signed-off-by: John Watts <contact@jookia.org>
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These dependencies are required for building the drivers and create
compile errors if not enabled.
Signed-off-by: John Watts <contact@jookia.org>
[trini: Add ARCH_MVEBU to KIRKWOOD_SPI]
Signed-off-by: Tom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
Please pull the updates for rockchip platform:
- dts sync for rk3308;
- sdram: Support getting banks from TPL for rk3568 and rk3588;
- dts and config clean and sync up for rk3568/rk3588;
- Other misc fixes;
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20543
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https://source.denx.de/u-boot/custodians/u-boot-tpm
Minor changes on this PR.
Igor added some orphaned OP-TEE related files on the proper section
of MAINTAINERS and fixed a potential buffer overflow in tee-sandbox
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RK356x-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once
since they are impacted by this change.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588-based devices now support creating DRAM banks with proper holes
by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism
instead.
Since ft_board_setup isn't defined anymore, there's no need for
selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply
removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for
reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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When Rockchip TPL blob is used, the memory areas that can be used for
DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if
Rockchip TPL blob is used. Note that it is technically possible we need
more if one of those 10 areas overlaps with reserved memory area,
forcing us to split it in two. But a default doesn't need to handle all
cases, only most.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Allow RK3568 and RK3588 based boards to get the RAM bank configuration
from the ROCKCHIP_TPL stage instead of the current logic. This fixes
both an issue where 256MB of RAM is blocked for devices with >= 4GB
of RAM and where memory holes need to be defined for devices with
more than 16GB of RAM. In the event that neither SoC is used or the
ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas
defined in mem_map data struct in SoC C files, but only if the DRAM area
overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward
to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1
(e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as
well, but the DDR_MEM tag seems to be pretty much stable (though BL31
seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and
it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Some variants of the ROCK Pi 4 series have an SPI flash chip populated
which can be booted from. This patch enables support in U-Boot for
building the image for the SPI flash, support for booting U-Boot from the
SPI flash chip and support in U-Boot for accessing the SPI flash using
`sf` commands.
Not all variants (e.g. ROCK Pi 4B, ROCK 4 Model C Plus, ROCK 4SE) come
populated with an SPI flash chip, but have the footprint on the board so
a user could solder their own to the board. With this patchset applied,
these board variants without an SPI flash chip still boot from MMC.
I have enabled support for both Winbond and XTX SPI flash devices since
different hardware variants have different devices populated:
- `rockpi4_v13_sch_20181112.pdf` contains a Winbond part `W25Q64FWZPIG`
- `rockpi4_v14_sch_20210114.pdf` contains an XTX part `XT25F32BWOIGT`
The ROCK Pi 4 I have is marked as "ROCK PI 4 v1.48" and contains an SPI
flash chip from XTX:
=> sf probe
SF: Detected xt25f32 with page size 256 Bytes, erase size 4 KiB, total 4 MiB
In the interest of supporting all board variants and not regressing
existing users who boot from MMC, I have enabled support for booting from
both SPI flash chip variants in the defconfig and left the environment
storage location as MMC to not break existing users who have the
environment stored on MMC.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
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To prepare for ROCK Pi 4A SPI flash support, sync the DTS from Linux which
includes an SPI flash node.
Kernel tag: v6.6-rc1
Kernel commits:
- eddf73029770 ("arm64: dts: rockchip: Enable internal SPI flash for ROCK \
Pi 4A/B/C")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
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The vop node should not be included in TPL/SPL control FDT, it should
only be included at U-Boot proper pre-reloc phase.
Change to use bootph-some-ram prop to fix this.
Fixes: 6794063d5065 ("ARM: dts: rk3328: Enable VOP for bootph-all")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Port the RK3328 part of the Rockchip IO-domain driver from linux.
This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.
Enable by default on all RK3328 boards, skip rk3328-evb because this
target is typically also used on miscellaneous boards and boxes not
fully supported by U-Boot.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The RK3328 SoC support ARMv8 Cryptography Extensions and use of the
ARMv8 crypto extensions help speed up FIT checksum validation in SPL.
Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.
Also imply OF_LIVE to help speed up init of U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Sort imply statements under ROCKCHIP_RK3328 alphabetically and remove
ENABLE_ARM_SOC_BOOT0_HOOK, DEBUG_UART_BOARD_INIT and SYS_NS16550, they
are already implyed or selected by ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Use a wildcard to simplify the list of board DT files in the MAINTAINERS
file for the Radxa Rock 2 Square board.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Display TPL init information message only when TPL_BANNER_PRINT
configuration entry is set. This allows to disable information
message in case logs on UART are unwanted.
Update parent ifdef condition to check also CONFIG_TPL_SERIAL
to match logic of the non-PX30 TPL implementation.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The generic RK35xx board targets are intended to be used as a bare
minimum target that can be used to e.g. boot boards that mostly follow
reference hw design before a board spefic target has been added or for
flashing and recovery purposes.
Disable BOOTMETH_VBE, NET and ADC as these features are not intended to
ever be used by these minimal generic board targets.
Enable SYSRESET_PSCI to let TF-A handle sysreset from U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add support for USB OTG, RockUSB and UMS to the generic RK3588S/RK3588
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The default pinctrl for UART2 is using M1 iomux, however, all other
supported RK3588 boards in U-Boot use M0 iomux for UART2.
Change to use the M0 pinctrl for UART2 to match other supported boards.
Fixes: b54c3d0dd69b ("rockchip: board: Add minimal generic RK3588S/RK3588 board")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add support for USB OTG, RockUSB and UMS to the generic RK3566/RK3568
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add support for booting from SPI flash using the generic RK3566/RK3568
target.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add missing emmc_datastrobe and sdmmc0_det pinctrl to fix possible issue
reading from eMMC or SD-card. Also use correct node for mmc1 alias.
Fixes: 683f61a13f16 ("rockchip: board: Add minimal generic RK3566/RK3568 board")
Fixes: 363cbd578169 ("rockchip: rk3568-generic: Enable eMMC HS200 mode")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Enable SPL_FIT_SIGNATURE=y and LEGACY_IMAGE_FORMAT=y to validate FIT
images checksum in SPL.
Change to SPL_MAX_SIZE=0x40000 to allow SPL up to 256 KiB in size.
Enable SPL_DM_SEQ_ALIAS=y and SPL_PINCTRL=y to ensure eMMC and SD-card
pinctrl is configured in SPL.
Enable SYS_NS16550_MEM32=y to use readl/writel in serial driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK35xx boards are expected to use the dwc3-generic driver and not the
xhci-dwc3 driver.
Remove the USB_XHCI_DWC3 option to ensure that the dwc3-generic driver
is used.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add Rockchip Toybrick TB-RK3588X .dtb-file entry in Makefile.
Fixes: 9fdd9a546986 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the
storage device sequence number matches in both SPL and U-Boot proper.
Fixes: 9fdd9a546986 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Fix CoolPi 4 Model B and CoolPi CM5 EVB .dtb-file entries in Makefile.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The SF_DEFAULT_SPEED Kconfig option got lost during merge and this
prevent reading FIT from SPI flash.
Restore the SF_DEFAULT_SPEED option to fix this.
Fixes: 8a94c376f6cb ("rockchip: Use common bss and stack addresses on RK356x")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Also enable the SPL_DM_SEQ_ALIAS Kconfig option to ensure that the
storage device sequence number matches in both SPL and U-Boot proper.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Pinctrl must be configured for eMMC, SD-card and SPI flash to
successfully read FIT from all possible fallback media in SPL.
Include pinctrl props and enable the SPL_PINCTRL Kconfig option to
ensure FIT can be loaded from eMMC, SD-card and SPI flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag")
bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available
in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph
props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they
are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes
is sorted by reg addr then by alphabetical order.
This has no intended change beside sorting existing nodes and removing
a duplicated usbdpphy0_grf node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Imply BOOTSTD_FULL for all RK356x boards to more closely follow RK3588.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Imply support for GbE PHY status parsing and configuration when support
for onboard ethernet is enabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The RK35xx SoCs contain a crypto engine block that can generate random
numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take
advantage of the random generator.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Sort imply statements under ROCKCHIP_RK3568 and ROCKCHIP_RK3588
alphabetically.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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SPL_ROCKCHIP_BACK_TO_BROM should normally only be enabled when BROM
should load U-Boot binary. SPL on Anbernic RGxx3 devices load TF-A and
U-Boot proper from FIT images and does never jump back to BROM from SPL.
Remove the superfluous Kconfig option from defconfig to align with other
RK356x boards.
This patch have no intended change in boot behavior.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop
the superfluous REGULATOR_PWM Kconfig options.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The SCLK_SFC can be set to a rate of 24, 50, 75, 100, 125 or 150 MHz.
However, clk_set_rate() will fail unless one of those exact rates are
used, and with newer and updated device tree files that contain
spi-max-frequency values that does not exactly match these rates use of
SPI flash may fail.
Fix this by using the highest possible rate that exceeds or is equal to
the requested rate.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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