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2022-04-26powerpc: dts: p2020: Do not automatically disable spi@7000 node in ↵Pali Rohár
p2020-post.dtsi Device tree include file p2020-post.dtsi should be included after the board device tree file and overrides settings of the board. So it should not disable some node as board cannot enable it via normal way (it has to enable it after inclusion of p2020-post.dtsi file). Fix it by removal of explicit disable in p2020-post.dtsi file and then remove explicit post-post enable in all P2020 board device tree files. Currently no P2020 board has spi@7000 node disabled. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add Linux compatible string and property for eSDHCPali Rohár
Linux kernel eSDHC driver for P2020 requires additional compatible string fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file to make U-Boot board DTS files compatible for Linux kernel. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add ptp_clock@24e00 node via pq3-etsec1-timer-0.dtsiPali Rohár
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux kernel for P2020. This allows U-Boot to use P2020 device tree files from upstream Linux kernel which reference ptp_clock@24e00 device. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Make PCIe nodes compatible for Linux kernel driverPali Rohár
Linux P2020 PCIe kernel driver uses compatible string fsl,mpc8548-pcie and needs more DT properties. Copy P2020 PCIe nodes and definitions from upstream Linux kernel. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add gpio-controller@fc00 node via pq3-gpio-0.dtsiPali Rohár
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel for P2020. This allows U-Boot to use P2020 device tree files from upstream Linux kernel which reference gpio-controller@fc00 device. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banksPali Rohár
Replace hardcoded i2c hex values for NOR banks by named SW macros in map_lowernorbank/map_uppernorbank env commands. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and addressPali Rohár
Replace hardcoded boot i2c bus num and address by existing macros when generating env for CONFIG_EXTRA_ENV_SETTINGS. Same macros are used in U-Boot board code when reading information from boot i2c data. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addrPali Rohár
Do not stringify env $vscfw_addr two times (once implicitly via string operator "" and second time explicitly via __stringify() macro) and allow to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct placePali Rohár
Whole section about USB/eLBC configuration seems to be P1020 specific. So add ifdefs to not compile it on other platforms (e.g. P2020). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM mapPali Rohár
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and also allow speculative loading (by not setting Guarded attribute). Also enable Memory Coherency attribute for second 1G SDRAM map. In commit 316f0d0f8f3c ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was enabled for all SDRAM maps on all other boards, just missed this one case. As a last thing, first 1G SDRAM map has wrong comment, so adjust it. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when ↵Pali Rohár
SDHC_WP is used as GPIO When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes inserted SD card readonly if GPIO[9] is active. In some design GPIO[9] pin does not have to be connected to SD card write-protect pin and can be used as GPIO. So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for SDHC_WP functionality. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurationsPali Rohár
As written in comment, P2020 has two possible SD switch configurations. Extend code to detect both of them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Do not hang in checkboard()Pali Rohár
Like in all other checks in checkboard() function, do not hang on error. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Define linker sections in ascending orderPali Rohár
It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Put bss after image when not including reset vectorPali Rohár
Linker knows exact size of the image, so there is no need to use CONFIG_SYS_MONITOR_LEN macro (which should be upper limit). Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Remove useless SIZEOF_HEADERS and .interp from ld scriptPali Rohár
.interp section is not available in output ELF binary and SIZEOF_HEADERS is needed at all. There is no change in generated u-boot.bin binary. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Remove duplicate u-boot-nand.ldsPali Rohár
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Remove u-boot-nand_spl.ldsPali Rohár
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since Jun 2014 commit 0234446fd171 ("nand_spl: remove MPC8536DS support"). Remove it. Signed-off-by: Pali Rohár <pali@kernel.org> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE supportPali Rohár
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED. Otherwise it crashes during early init. When debug console is enabled and all debug logging options are turned on then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error: No valid device tree binary found at 110dc300 initcall sequence 110d3560 failed at call 1109535c (err=-1) ### ERROR ### Please RESET the board ### Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set U-Boot binary image without DTB ends immediately after the .u_boot_list section. At this position is defined _end symbol at which U-Boot expects start of the appended DTB. Problem is that after .u_boot_list section are in linker script defined another sections with 256 byte long padding which are completely empty. During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin, objcopy removes trailing zero padding and therefore DTB is appended at wrong position. Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended DTB is finally at he correct position. With this fix U-Boot on P2020 with CONFIG_OF_SEPARATE option starts working again. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p1020/p2020: Fix esdhc node namePali Rohár
For compatibility with Linux kernel DTS files and also with other U-Boot powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi and p2020-post.dtsi include files. Linux kernel DTS files which include these dtsi files, expect that esdhc node has name sdhc@2e000 and do not work with other node names. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add localbus nodePali Rohár
This node is required for NAND and NOR support. Node is taken from the upstream Linux kernel DTS file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: fsl_esdhc_spl: pre-PBL: implement redundancy supportPali Rohár
QorIQ pre-PBL BootROM scans first 24 SD card sectors (each with fixed 512 bytes length) for boot signature. Implement same redundancy behavior in fsl_esdhc_spl driver to allow loading proper U-Boot when boot sector is not the first one. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: fsl_esdhc: Define macro ESDHCCTL_SNOOP for Snoop attributePali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: nand: raw: Add support for DT property nand-ecc-algo=bchPali Rohár
According to Linux kernel DT schema nand-controller.yaml, using DT property nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Use ECC configuration from device treePali Rohár
Initialize ECC configuration after nand_scan_ident() call and only in case nand_scan_ident() have not done it. nand_scan_ident() fills ECC configuration from device tree. Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Add device tree supportPali Rohár
This allows boards to specify NAND settings via standard DT properties. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Implement RNDOUT commandPali Rohár
This is needed for SW ECC. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add serial0 and serial1 via pq3-duart-0.dtsiPali Rohár
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel for P2020. This allows U-Boot to use P2020 device tree files from upstream Linux kernel which reference serial0 or serial1 devices. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: dts: p2020: Add fsl/p2020si-pre.dtsi and fsl/p2020si-post.dtsi symlinksPali Rohár
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and fsl/p2020si-post.dtsi include device tree files. Add symlinks for these include device tree files into U-Boot powerpc directory and points them to U-Boot inline device tree files p2020.dtsi and p2020-post.dtsi. This allows to use P2020 DTS files from upstream Linux kernel in U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: freescale: p1_p2_rdb_pc: Allow to compile it without env supportPali Rohár
When env support is disabled then usage of env_init() or env_relocate() generates linker errors. So do not compile env_init() or env_relocate() in SPL code when env support is disabled in SPL. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26ddr: fsl: Allow to compile it without env supportPali Rohár
When env support is disabled then usage of env_get_f() generates linker errors. So do not compile env_get_f() when env support is disabled (for example when disabled only in SPL). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26hwconfig: Allow to compile it without env supportPali Rohár
When env support is disabled then usage of env_get() generates linker errors. So do not compile env_get() when env support is disabled (for example when disabled only in SPL). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: mmc_mode_name() is used also when LOGLEVEL >= LOGL_DEBUGPali Rohár
When CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher then linker throws error about undefined symbol mmc_mode_name(). So compile mmc_mode_name() also when CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: fsl_esdhc_spl: Call mmc_init() before booting from SD cardPali Rohár
If env is stored on SD card then U-Boot SPL automatically calls mmc_init() before it is going to load proper U-Boot from SD card. If env is not stored on SD card then U-Boot SPL fails to read proper U-Boot from SD card due to missing mmc_init() call. So add missing mmc_init() call into fsl_esdhc_spl's mmc_boot() function. It fixes booting from SD card on P2020 boards without env support in SPL. mmc_init() returns early if card was already initialized, so there is no issue with calling this function more times. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: fsl_esdhc_spl: pre-PBL: fix determining U-Boot sizePali Rohár
In pre-PBL header is stored size of code which BootROM copies from SD card to L2/SRAM. This size has upper limit of L2 cache size. In most cases this is size of U-Boot SPL or size of L2 cache. Therefore this size in pre-PBL header cannot be used for determining size of proper U-Boot. So always use CONFIG_SYS_MMC_U_BOOT_SIZE for determining size of proper U-Boot which stored on SD card. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mmc: fsl_esdhc_spl: pre-PBL: check for BOOT signature instead of MBR/DBRPali Rohár
Pre-PBL BootROMs (MPC8536E, MPC8569E, P2020, P1011, P1012, P1013, P1020, P1021, P1022) require custom BOOT signature on sector 0 and MBR/DBR signature is not required at all. So add check for BOOT signature and remove check for MBR/DBR. This allows U-Boot SPL to load proper U-Boot on pre-PBL BootROMs platforms also from SD cards which do not have MBR/DBR signature on sector 0. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Show e500 core versionPali Rohár
Distinguish between e500v1 and e500v2. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Rename _start_e500 symbol to _startPali Rohár
The real entry point is _start_e500. There is no _start symbol at all. So rename _start_e500 to _start for convension that _start symbol is used as entry point. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26powerpc: mpc85xx: Drop _start symbolPali Rohár
_start symbol contains only 32-bit data number 0x27051956 despite it is marked as text section. This magic number is IH_MAGIC which is used for marking uboot image header. mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC number in _start symbol is useless there. Moreover this _start symbol is not used at all. Entry point is at symbol _start_e500. So because this _start symbol is not used for anything, completely remove it with IH_MAGIC number. After _start symbol was _start_cont symbol, so replace all relative address calculations by _start_cont. Signed-off-by: Pali Rohár <pali@kernel.org> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUsStephen Carlson
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES) that can be configured for the application. Interfaces not used by the application can be set to protocol 0 to turn them off and save power, but U-Boot would emit a warning that 0 was invalid for a SERDES protocol on boot. Replace the warning text with a notice that the SERDES is disabled. Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8: layerscape: fix the function mismatch issueYuantian Tang
Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26board: sl28: add basic PSCI implementationMichael Walle
For now, this only provides reset and poweroff functions. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig optionMichael Walle
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the same meaning but is just for the ls1043ardb board. As no in-tree config uses this, drop it and replace it with something more sophiticated: ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE option which is used as the base to relocate the PSCI code (or any code in the secure region, but that is only PSCI). A SoC (or board) can now opt-in into having such a secure region by enabling SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was possible to relocate the PSCI code before as well as on the LS1028A SoC where there will be PSCI support soon. Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8: psci: skip setup code if we are not EL3Michael Walle
If we are running in EL2 skip PSCI implementation setup. This avoids an exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8: layerscape: get rid of smc_call()Michael Walle
There are two different implementations to do a secure monitor call: smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and seems to be an ad-hoc implementation. The latter is imported from linux. smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined. This makes it impossible to have both PSCI calls and PSCI implementation in one u-boot build. The layerscape SoC code decide at runtime via check_psci() if there is a PSCI support. Therefore, this is a prerequisite patch to add PSCI implementation support for the layerscape SoCs. Note, for the TFA part, this is only compile time tested with (ls1028ardb_tfa_defconfig). Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26armv8: include psci_update_dt() unconditionallyMichael Walle
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is, if u-boot is the PSCI provider. Guard the check which is intended to call into the PSCI implementation in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI. Mark the function as weak because - unfortunately - there is already a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c which does not the same as the common one. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046ASean Anderson
This erratum is reported to cause problems on these processors [1-3]. The problem is usually with the clocking, which is supposed to be configured by the RCW [4]. However, if it is not set, or if the default clocking is not correct, then this erratum will cause an SError. However, according to Ran Wang in [1]: " ... this erratum is used to pass USB compliance test only, you could disable this workaround on your board if you don't any USB issue on normal use case, I think it's fine." So just disable this erratum by default for these processors. [1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/ [2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993 [3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412 [4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw Signed-off-by: Sean Anderson <sean.anderson@seco.com> Acked-by: Ran Wang <ran.wang_1@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-25armv8: fsl-layerscape: Respect Kconfig for erratum A009007Sean Anderson
There is a Kconfig for this erratum, but it is ignored for armv8. Respect it. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-25configs: Layerscape: Remove the 'fdt_addr' envHou Zhiqiang
On Layerscape platforms, the DTB is loaded from boot filesystem, per the fdt_addr description in doc/README.distro, it must be removed. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-23Merge branch '2022-04-22-assorted-updates'Tom Rini
- Add "-q" to fdt addr and use it in distro_bootcmd to make the user experience less scary reading in normal try/fail cases. - Let the adc update an environment variable like many other commands do - Fix TPL SEPARATE_BSS check when locating DTB - Allow ":" in PXE file names again - Two Apple M1 fixes
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