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2023-07-31usb: dwc3-generic: Restrict single ctrl node for RK3328Jagan Teki
Like Rockchip RK3568, the RK3328 also have single node to represent the glue and ctrl for USB 3.0. So, use the driver data to use single ctrl for RK3328 DWC3. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31configs: Drop unused XHCI_DWC3 for RK3328 boardsJagan Teki
Driver support for rk3328 is not supported so drop this unused XHCI_DWC3. Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31arm64: dts: rockchip: Drop unused rk3328-xhci nodeJagan Teki
rk3328-xhci has been added due to the fact that the upstream dwc3 is unsupported. Moreover, the driver for rk3328-xhci is not added to the code tree. By considering these facts and unsupported rk3328-xhci this patch is dropping all related code from DT. However, the DWC3 is fixed now in dwc3-generic and RK3328 USB 3.0 is functional in upcoming patches. Let's drop it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31power: regulator: rk8xx: Add 500us delay after LDO regulator is enabledJonas Karlman
A quick power cycle of a LDO regulator during dw-mmc signal voltage change has shown that SD-card does not always get recognized. Linux driver use an enable_time of 400us for LDO regulators. Apply a 500us delay when a LDO regulator is enabled to fix possible issues. Fixes: 94afc1cb466a ("power: regulator: rk8xx: update the driver for rk808 and rk818") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: elaine.zhang<elaine.zhang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: add Radxa ROCK5A Rk3588 boardEugen Hristev
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specifications: Rockchip Rk3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector 4-lane MIPI DSI connector Audio – 3.5mm earphone jack eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60 Gigabit Ethernet RJ45 with optional PoE support 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 56mm (Raspberry Pi 4 form factor) Kernel commits: d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board") 991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a") 304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a") cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31ARM: dts: rockchip: rk3588: Move bootph-all props to common fileEugen Hristev
Move bootph-all prop to common SoC dt file, because they are typically used by multiple boards. Unreferenced nodes are removed from the SPL device tree during a normal build. Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3568-rock-3a: Fix pcie2x1 and pcie3x2 pinctrl overrideJonas Karlman
The pcie pinctrl override added in the commit a76aa6ffa6cd ("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") is causing a pinmux issue on linux when using a EFI boot flow. The pcie reset-gpios must however be configured with gpio function, or the device will freeze running pci enum and nothing is connected. Adjust the pinctrl override in u-boot.dtsi to fix this issue. PCIe/NVMe continues to work in both U-Boot and linux after this change. Also revert disable of sdmmc2 and uart1 to fix use of wifi in linux when using a EFI boot flow. Fixes: a76aa6ffa6cd ("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") Fixes: 073d911ae64a ("rockchip: rk3568-rock-3a: Sync device tree from linux") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-07-31rockchip: rk3588-rock-5b: Fix SPI Flash aliasJonas Karlman
The commit fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") enabled SPI flash support by adding a spi0 alias. Correct this by adding spi0-spi5 aliases in rk3588s-u-boot.dtsi and SF_DEFAULT_BUS=5 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes: fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3568-rock-3a: Fix SPI Flash aliasJonas Karlman
The commit 64f79f88a751 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") enabled SPI flash support by overriding the spi0 alias. Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes: 64f79f88a751 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31doc: rockchip: Update SPI flashing instructionJonas Karlman
Update documentation on how to write a bootable u-boot-rockchip-spi.bin image into SPI flash. This removes the reference to a hardcoded and now obsolete 0x60000 payload offset. Also remove an obsolete reference to pad_cat. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offsetJonas Karlman
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3399-pinephone-pro: Fix SPL max size and SPI flash payload offsetJonas Karlman
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3399-pinebook-pro: Fix SPL max size and SPI flash payload offsetJonas Karlman
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3399-rockpro64: Fix SPL max size and SPI flash payload offsetJonas Karlman
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also remove CONFIG_LTO=y now that there is sufficient space for SPL in SPI flash, and to fix a build issue reported by Peter Robinson. Fixes: 5713135ecc75 ("rockchip: rockpro64: Build u-boot-rockchip-spi.bin") Reported-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk356x-u-boot: Use relaxed u-boot,spl-boot-orderJonas Karlman
BootRom will try to load TPL+SPL from media in the following order: - SPI NOR Flash - SPI NAND Flash - NAND Flash - eMMC - SDMMC SPL will try to load FIT from media in the order defined in the device tree u-boot,spl-boot-order property. Change the default order to load FIT from to: - same media as TPL+SPL - SDMMC - eMMC Boards with strict load order requirements should override the u-boot,spl-boot-order property in the board specific u-boot.dtsi. Fixes: 42f67fb51cb4 ("rockchip: rk3568: Fix boot device detection") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk356x-u-boot: Add bootph-all to common pinctrl nodesJonas Karlman
Add bootph-all prop to common pinctrl nodes for eMMC, FSPI, SD-card and UART2 that are typically used by multiple boards. Unreferenced nodes are removed from the SPL device tree during a normal build. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3566-radxa-cm3-io: Sync dts from linux v6.4Jonas Karlman
Sync rk3566-radxa-cm3-io.dts from linux v6.4. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk356x: Sync dtsi from linux v6.4Jonas Karlman
Sync rk356x.dtsi from linux v6.4. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 SOQuartz on CM4-IOJonas Karlman
The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 SOQuartz on BladeJonas Karlman
The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz CM4-compatible compute module. It features PoE, an M.2 slot, an SD card slot, HDMI, USB, serial and ethernet. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - PCIe/NVMe - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 SOQuartz on Model AJonas Karlman
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI, CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 Quartz64-B BoardJonas Karlman
The Pine64 Quartz64 Model B is a credit-card sized single-board computer based on the Rockchip RK3566 SoC. The board features an M.2 PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a 40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi. Features tested on a Quartz64-B 4GB v1.4 2022-06-06: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 Quartz64-A BoardJonas Karlman
The Pine64 Quartz64 Model A is a single-board computer based on the Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0, CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a 20 pin GPIO header. Features tested on a Quartz64-A 8GB v2.0 2021-04-27: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3568: Use dwc3-generic driverJonas Karlman
Change RK3568 devices to use the newer dwc3-generic driver instead of the old xhci-dwc3 driver for USB 3.0 support. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31usb: dwc3-generic: Add rk3568 supportJonas Karlman
RK3568 share glue and ctrl in a single node. Use glue_get_ctrl_dev to return the glue node as the ctrl node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Marek Vasut <marex@denx.de>
2023-07-31usb: dwc3-generic: Relax unsupported dr_mode checkJonas Karlman
When dr_mode is peripheral or otg and U-Boot has not been built with DM_USB_GADGET support, booting such device may end up with: dwc3_glue_bind_common: subnode name: usb@fcc00000 Error binding driver 'dwc3-generic-wrapper': -6 Some drivers failed to bind initcall sequence 00000000effbca08 failed at call 0000000000a217c8 (err=-6) ### ERROR ### Please RESET the board ### Instead fail gracfully with ENODEV to allow board continue booting. dwc3_glue_bind_common: subnode name: usb@fcc00000 dwc3_glue_bind_common: unsupported dr_mode 3 Also use CONFIG_IS_ENABLED(USB_HOST) and change switch to if statements to improve readability of the code. Fixes: 446e3a205b87 ("dwc3-generic: Handle the PHYs, the clocks and the reset lines") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Marek Vasut <marex@denx.de>
2023-07-31usb: dwc3-generic: Return early when there is no child nodeJonas Karlman
The current error check for device_find_first_child is not working as expected, the documentation for device_find_first_child mention: @devp: Returns first child device, or NULL if none Return: 0 Change to return early when there is no child node to avoid any possible null pointer dereference. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31Revert "arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb"Jonas Karlman
Remove regulator-boot-on prop from regulators now that the phy core has support for phy-supply after the commit c57e0dcd9384 ("phy: add support for phy-supply"). This reverts commit 7911f409ff20dce5995cc1b703a6e30c94022f6b. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: chromebook_speedy: Enable soundAlper Nebi Yasak
Commit ec107f04b619 ("rockchip: chromebook_minnie: Enable sound") and commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry") enable audio support for chromebook_minnie and chromebook_jerry. Enable it for chromebook_speedy as well, but put the non-upstream sound node in the board -u-boot.dtsi instead. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: chromebook_jerry: Re-enable MAX98090 codec driverAlper Nebi Yasak
Sound support for chromebook_jerry needs the MAX98090 codec driver. This was enabled in commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry"), but apparently lost in commit 7ae2729401bb ("configs: Resync with savedefconfig"). Enable it again. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Use TrueType fontsAlper Nebi Yasak
Commit 815ed79d8338 ("video: rockchip: Use TrueType fonts with jerry") enables makes chromebook_jerry use TrueType fonts. Make other veyron boards switch to it as well. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Add serial, logging, silent console supportAlper Nebi Yasak
Commit eba768c54587 ("rockchip: jerry: Add serial support") enables ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work correctly. Enable it also for other veyron boards. Also enable logging and disable scrolling multiple lines at once as in chromebook_jerry, and enable silent console as chromebook_minnie does. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Unify u-boot.dtsi bootph-all fragmentsAlper Nebi Yasak
The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that. Deduplicate these into the latter file, which should also make the eMMC available to the other veyron boards' SPL. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Enable building SPI ROM imagesAlper Nebi Yasak
Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") produces a u-boot.rom file for chromebook_jerry, intended to be written to SPI flash. Build this file for other veyron boards as well, especially because they are already configured only to boot from SPI. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Enable RESET driverAlper Nebi Yasak
Commit 70e351bdfeee ("rockchip: jerry: Enable RESET driver") enables DM_RESET for chromebook_jerry to fix its display as required by changes to the Rockchip video drivers. Enable it for other veyron boards as well. Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support") Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31configs: rockchip: drop useless DEBUG_UART_SKIP_INITPegorer Massimo
DEBUG_UART_SKIP_INIT feature is implemented only by s5p (DEBUG_UART_S5P) and pl01x (DEBUG_UART_PL010 or DEBUG_UART_PL011) serial drivers, but all ARCH_ROCKCHIP configs rely on default DEBUG_UART_NS16550. The ns16550 serial driver does not depends on DEBUG_UART_SKIP_INIT, so drop it from rockchip configs. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: fix same-as-spl boot orderPegorer Massimo
Boot devices defined in rk3308.c and in rk3308.dtsi do not match, causing 'same-as-spl' feature not to work. Update DTS definitions, aligning to Linux kernel DTS and to other Rockchip DTS files, i.e. from dwmmc to mmc. Add rk3308-rock-pi-s.dtb in dtb-y targets for CONFIG_ROCKCHIP_RK3308. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: add support for sdmmc bootPegorer Massimo
Some ROCK Pi S SKU/models are not equipped with SD-NAND (eMMC), therefore SPL needs access to sdmmc: add it to rk3308-u-boot.dtsi with bootph-all property. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: no DEBUG_UART_BOARD_INIT for ROCK Pi SPegorer Massimo
Call to board_debug_uart_init() is useless, as mainline U-Boot can not build TPL for rk3308, and proprietary ddr.bin to be used as TPL is responsible to init debug uart. Moreover current implementation of board_debug_uart_init() is not compatible with ROCK Pi S, as it sets pins for UART2 channel 1 breaking access to sdmmc due to pinmux conflict. Debug uart for ROCK Pi S is UART0. Thus, avoid ROCKCHIP_RK3308 to select DEBUG_UART_BOARD_INIT and allow to deselct it in rock-pi-s-rk3308_defconfig. The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP, therefore other boards based on rk3308 chip are not affected by change. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: fix board_debug_uart_initPegorer Massimo
Definition of function board_debug_uart_init() must be under CONFIG_DEBUG_UART_BOARD_INIT and not under CONFIG_DEBUG_UART, as it was: see debug_uart.h. In this way the debug uart can be used but its board-specific initialization skipped by configuration, if useless. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28Merge tag 'efi-2023-10-rc2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2023-10-rc2 Documentation: * Update the documentation for TI K3 boards (use SVG images) * Update doc/sphinx/requirements.txt * Describe QEMU emulation of block devices UEFI * Fix device paths for special block devices
2023-07-28Merge branch '2023-07-27-TI-K2-K3-updates'Tom Rini
- Resync some of the K3 DTS files with the kernel, and pull in some required related updates to keep drivers in sync with the dts files now. Bring in some incremental fixes on top of one of the series I applied recently as well as updating the iot2050 platform. Also do a few small updates to the K2 platforms.
2023-07-28Merge tag 'u-boot-rockchip-20230728' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Enable pcie support for rk3568; - Add boards: rk3399: Radxa ROCK 4SE; rk3328: Orange Pi R1 Plus, Orange Pi R1 Plus LTS rk3568: FriendlyARM NanoPi R5S/R5C, Hardkernel ODROID-M1 rk3588: Edgeble Neu6B - support OP-TEE with binman; - support Winbond SPI flash; - rk3588 usbdp phy support; - dts and config updates for different boards;
2023-07-28configs: keystone2: Change to using env filesAndrew Davis
Move to using .env file for setting up environment variables for K2x_evm. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-28configs: keystone2: Unwind KERNEL_MTD_PARTS definitionAndrew Davis
This is more complex than it needs to be and makes converting these boards over to plain text env files more difficult. Remove setting mtdparts as the DTS already contain the partitions. While here also drop the conflicting definitions from the K2 defconfigs. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-28mach-k3: security: improve the checks around authenticationManorit Chawdhry
The following checks are more reasonable as the previous logs were a bit misleading as we could still get the logs that the authetication is being skipped but still authenticate. Move the debug prints and checks to proper locations. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-28env: ti: mmc.env: Fix overlays directory pathVignesh Raghavendra
Similar to get_fdt_mmc make get_overlays_mmc look at /boot/dtb/* path for overlay files. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28env: ti: mmc.env: Move mmc related args to common placeVignesh Raghavendra
All K3 SoCs use same set of args to load kernel for MMC. So move this to common place to avoid duplication. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28configs: am62x: add SPL_MAX_SIZE backManorit Chawdhry
This was regressed by the following commit and is required to build with additional configs enabled. Fixes: 14439cd71c1a ("configs: k3: make consistent bootcmd across all k3 socs") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Tested-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28arm: k3: fix fdt_del_node_path implicit declaration and a missing includeEmanuele Ghidoli
Fix missing declaration of fdt_del_node_path() while compiling am625_fdt.c and missing common_fdt.h include in common_fdt.c Fixes: 70aa5a94d451 ("arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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